From 1dbe31591a24177d1dee3562dffe0f0aabe473f9 Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Wed, 18 Nov 2015 11:59:35 +0000 Subject: [PATCH] Juno R2: Configure the correct L2 RAM latency values The default reset values for the L2 Data & Tag RAM latencies on the Cortex-A72 on Juno R2 are not suitable. This patch modifies the Juno platform reset handler to configure the right settings on Juno R2. Change-Id: I20953de7ba0619324a389e0b7bbf951b64057db8 --- include/lib/cpus/aarch64/cortex_a72.h | 1 + plat/arm/board/juno/aarch64/juno_helpers.S | 24 +++++++++++++++++++++- 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/include/lib/cpus/aarch64/cortex_a72.h b/include/lib/cpus/aarch64/cortex_a72.h index bb32f9b9..fa10ca90 100644 --- a/include/lib/cpus/aarch64/cortex_a72.h +++ b/include/lib/cpus/aarch64/cortex_a72.h @@ -62,6 +62,7 @@ #define L2CTLR_TAG_RAM_LATENCY_SHIFT 6 #define L2_DATA_RAM_LATENCY_3_CYCLES 0x2 +#define L2_TAG_RAM_LATENCY_2_CYCLES 0x1 #define L2_TAG_RAM_LATENCY_3_CYCLES 0x2 #endif /* __CORTEX_A72_H__ */ diff --git a/plat/arm/board/juno/aarch64/juno_helpers.S b/plat/arm/board/juno/aarch64/juno_helpers.S index ab06da20..1931535e 100644 --- a/plat/arm/board/juno/aarch64/juno_helpers.S +++ b/plat/arm/board/juno/aarch64/juno_helpers.S @@ -33,6 +33,7 @@ #include #include #include +#include #include #include "../juno_def.h" @@ -153,10 +154,31 @@ endfunc JUNO_HANDLER(1) * - Quad core Cortex-A53 processor cluster; * - Dual core Cortex-A72 processor cluster. * - * This handler does nothing. + * This handler does the following: + * - Set the L2 Data RAM latency to 2 (i.e. 3 cycles) for Cortex-A72 + * - Set the L2 Tag RAM latency to 1 (i.e. 2 cycles) for Cortex-A72 + * + * Note that: + * - Defect #831273 doesn't affect Juno R2. * -------------------------------------------------------------------- */ func JUNO_HANDLER(2) + /* -------------------------------------------------------------------- + * Nothing to do on Cortex-A53. + * -------------------------------------------------------------------- + */ + jump_if_cpu_midr CORTEX_A72_MIDR, A72 + ret + +A72: + /* -------------------------------------------------------------------- + * Cortex-A72 specific settings + * -------------------------------------------------------------------- + */ + mov x0, #((L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ + (L2_TAG_RAM_LATENCY_2_CYCLES << L2CTLR_TAG_RAM_LATENCY_SHIFT)) + msr L2CTLR_EL1, x0 + isb ret endfunc JUNO_HANDLER(2) -- 2.30.2