From 1b70117924a4f254840ed70fbe3020d4519a1a9a Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Thu, 1 Mar 2012 15:42:56 +1100 Subject: [PATCH] powerpc: Improve behaviour of irq tracing on 64-bit exception entry Some exceptions would unconditionally disable interrupts on entry, which is fine, but calling lockdep every time not only adds more overhead than strictly needed, but also means we get quite a few "redudant" disable logged, which makes it hard to spot the really bad ones. So instead, split the macro used by the exception code into a normal one and a separate one used when CONFIG_TRACE_IRQFLAGS is enabled, and make the later skip th tracing if interrupts were already disabled. Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/exception-64s.h | 25 +++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index bdc9eebd1d44..7f4718c4f04a 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h @@ -272,15 +272,34 @@ label##_hv: \ _MASKABLE_EXCEPTION_PSERIES(vec, label, \ EXC_HV, SOFTEN_TEST_HV) +/* + * Our exception common code can be passed various "additions" + * to specify the behaviour of interrupts, whether to kick the + * runlatch, etc... + */ + +/* Exception addition: Hard disable interrupts */ +#ifdef CONFIG_TRACE_IRQFLAGS #define DISABLE_INTS \ + lbz r10,PACASOFTIRQEN(r13); \ li r11,0; \ - stb r11,PACASOFTIRQEN(r13); \ + cmpwi cr0,r10,0; \ stb r11,PACAHARDIRQEN(r13); \ - TRACE_DISABLE_INTS + beq 44f; \ + stb r11,PACASOFTIRQEN(r13); \ + TRACE_DISABLE_INTS; \ +44: +#else +#define DISABLE_INTS \ + li r11,0; \ + stb r11,PACASOFTIRQEN(r13); \ + stb r11,PACAHARDIRQEN(r13) +#endif /* CONFIG_TRACE_IRQFLAGS */ +/* Exception addition: Keep interrupt state */ #define ENABLE_INTS \ - ld r12,_MSR(r1); \ mfmsr r11; \ + ld r12,_MSR(r1); \ rlwimi r11,r12,0,MSR_EE; \ mtmsrd r11,1 -- 2.30.2