From 1026bea00381fe01326d220c55731ee150b89e10 Mon Sep 17 00:00:00 2001 From: Madhav Chauhan Date: Thu, 29 Nov 2018 16:12:34 +0200 Subject: [PATCH] drm/i915/icl: Ungate DSI clocks Ungate the clocks on the selected port. Signed-off-by: Madhav Chauhan Signed-off-by: Vandita Kulkarni Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/2a01b3158feda624f98581b780854fe3df8c328d.1543500286.git.jani.nikula@intel.com --- drivers/gpu/drm/i915/icl_dsi.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index e42a99fda191..e3aa9d3d2291 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -553,6 +553,23 @@ static void gen11_dsi_gate_clocks(struct intel_encoder *encoder) mutex_unlock(&dev_priv->dpll_lock); } +static void gen11_dsi_ungate_clocks(struct intel_encoder *encoder) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 tmp; + enum port port; + + mutex_lock(&dev_priv->dpll_lock); + tmp = I915_READ(DPCLKA_CFGCR0_ICL); + for_each_dsi_port(port, intel_dsi->ports) { + tmp &= ~DPCLKA_CFGCR0_DDI_CLK_OFF(port); + } + + I915_WRITE(DPCLKA_CFGCR0_ICL, tmp); + mutex_unlock(&dev_priv->dpll_lock); +} + static void gen11_dsi_configure_transcoder(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) @@ -1061,6 +1078,7 @@ static void gen11_dsi_disable_port(struct intel_encoder *encoder) u32 tmp; enum port port; + gen11_dsi_ungate_clocks(encoder); for_each_dsi_port(port, intel_dsi->ports) { tmp = I915_READ(DDI_BUF_CTL(port)); tmp &= ~DDI_BUF_CTL_ENABLE; @@ -1072,6 +1090,7 @@ static void gen11_dsi_disable_port(struct intel_encoder *encoder) DRM_ERROR("DDI port:%c buffer not idle\n", port_name(port)); } + gen11_dsi_ungate_clocks(encoder); } static void gen11_dsi_disable_io_power(struct intel_encoder *encoder) -- 2.30.2