drm/i915/ehl: Define EHL powerwells independently of ICL
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 13 Dec 2019 00:15:09 +0000 (16:15 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Fri, 13 Dec 2019 20:06:34 +0000 (12:06 -0800)
commite8ab8d669d046a8e9b07707d2f00b9ba3e25d0ae
tree74c0237eaa4e4d91c06ece4fb3b7035fba160db5
parent86ca2bf2f9d3941c0ee6087604a3f6cc3efd12ae
drm/i915/ehl: Define EHL powerwells independently of ICL

Outputs C and D on EHL are combo PHY outputs and thus should not be
using the same TC AUX power well handlers as ICL.  And even though
icl_combo_phy_aux_power_well_ops works okay for EHL/JSL combo PHYs none
of its special handling is actually necessary for this platform:
 * EHL/JSL don't actually need to program PORT_CL_DW12
 * Display WA #1178 does not apply to EHL/JSL

Thus we can simply drop back to using our standard "hsw-style" power
well ops for EHL AUX power wells.

Bspec: 4301
Fixes: f722b8c1e2a2 ("drm/i915/ehl: All EHL ports are combo phys")
Cc: Jose Souza <jose.souza@intel.com>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Vivek Kasireddy <vivek.kasireddy@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191213001511.678070-2-matthew.d.roper@intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/i915/display/intel_display_power.c