mvebu: limit mvneta tx queue workaround to 32 bit SoC
authorTomasz Maciej Nowak <tmn505@gmail.com>
Mon, 12 Jul 2021 16:16:30 +0000 (18:16 +0200)
committerHauke Mehrtens <hauke@hauke-m.de>
Sun, 25 Jul 2021 11:52:38 +0000 (13:52 +0200)
commitcbdd2b62e4d5e0572204c37d874d32dc8610840e
tree6036b022e54fbf9bbc14b09dc9fc0e4ce3f00307
parentbbfb142f2a57de46b9b8543cde8b2b171eb3b1c7
mvebu: limit mvneta tx queue workaround to 32 bit SoC

This patch has been carried since introduction throughout every kernel
major bump and no one has tested if the later kernels improved the
situation. The Armada 3720 SoC can only process GbE interrupts on Core 0
and this is already limited in all stable kernels, so ditch this
workaround for 64 bit SoCs.

Ref: https://git.kernel.org/torvalds/c/cf9bf871280d

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
target/linux/mvebu/patches-5.10/700-mvneta-tx-queue-workaround.patch
target/linux/mvebu/patches-5.4/700-mvneta-tx-queue-workaround.patch