ARM: 8043/1: uprobes need icache flush after xol write
authorVictor Kamensky <victor.kamensky@linaro.org>
Tue, 29 Apr 2014 03:20:52 +0000 (04:20 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 25 May 2014 22:48:45 +0000 (23:48 +0100)
commit72e6ae285a1dbff553734985bedadf409d99c02d
treee431dde4c5ddcba69a1c668e9ff9d60491a736c6
parent166aaf396654b533f536f2cf84d7558eb42f1c9f
ARM: 8043/1: uprobes need icache flush after xol write

After instruction write into xol area, on ARM V7
architecture code need to flush dcache and icache to sync
them up for given set of addresses. Having just
'flush_dcache_page(page)' call is not enough - it is
possible to have stale instruction sitting in icache
for given xol area slot address.

Introduce arch_uprobe_ixol_copy weak function
that by default calls uprobes copy_to_page function and
than flush_dcache_page function and on ARM define new one
that handles xol slot copy in ARM specific way

flush_uprobe_xol_access function shares/reuses implementation
with/of flush_ptrace_access function and takes care of writing
instruction to user land address space on given variety of
different cache types on ARM CPUs. Because
flush_uprobe_xol_access does not have vma around
flush_ptrace_access was split into two parts. First that
retrieves set of condition from vma and common that receives
those conditions as flags.

Note ARM cache flush function need kernel address
through which instruction write happened, so instead
of using uprobes copy_to_page function changed
code to explicitly map page and do memcpy.

Note arch_uprobe_copy_ixol function, in similar way as
copy_to_user_page function, has preempt_disable/preempt_enable.

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Oleg Nesterov <oleg@redhat.com>
Reviewed-by: David A. Long <dave.long@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/include/asm/cacheflush.h
arch/arm/kernel/uprobes.c
arch/arm/mm/flush.c
include/linux/uprobes.h
kernel/events/uprobes.c