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1 /*

2 * Driver for the Integrant ITD1000 "Zero-IF Tuner IC for Direct Broadcast Satellite"

3 *

5 *

6 * This program is free software; you can redistribute it and/or modify

7 * it under the terms of the GNU General Public License as published by

8 * the Free Software Foundation; either version 2 of the License, or

9 * (at your option) any later version.

10 *

11 * This program is distributed in the hope that it will be useful,

12 * but WITHOUT ANY WARRANTY; without even the implied warranty of

13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

14 *

15 * GNU General Public License for more details.

16 *

17 * You should have received a copy of the GNU General Public License

18 * along with this program; if not, write to the Free Software

19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.=

20 */

22 #include <linux/module.h>

23 #include <linux/moduleparam.h>

24 #include <linux/delay.h>

25 #include <linux/dvb/frontend.h>

26 #include <linux/i2c.h>

28 #include "dvb_frontend.h"

30 #include "itd1000.h"

31 #include "itd1000_priv.h"

33 static int debug;

34 module_param(debug, int, 0644);

35 MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");

37 #define deb(args...) do { \

38 if (debug) { \

39 printk(KERN_DEBUG "ITD1000: " args);\

40 printk("\n"); \

41 } \

42 } while (0)

44 #define warn(args...) do { \

45 printk(KERN_WARNING "ITD1000: " args); \

46 printk("\n"); \

47 } while (0)

49 #define info(args...) do { \

50 printk(KERN_INFO "ITD1000: " args); \

51 printk("\n"); \

52 } while (0)

54 /* don't write more than one byte with flexcop behind */

55 static int itd1000_write_regs(struct itd1000_state *state, u8 reg, u8 v[], u8 len)

56 {

57 u8 buf[1+len];

58 struct i2c_msg msg = {

59 .addr = state->cfg->i2c_address, .flags = 0, .buf = buf, .len = len+1

60 };

61 buf[0] = reg;

62 memcpy(&buf[1], v, len);

64 /* deb("wr %02x: %02x", reg, v[0]); */

66 if (i2c_transfer(state->i2c, &msg, 1) != 1) {

67 printk(KERN_WARNING "itd1000 I2C write failed\n");

68 return -EREMOTEIO;

69 }

70 return 0;

71 }

73 static int itd1000_read_reg(struct itd1000_state *state, u8 reg)

74 {

75 u8 val;

76 struct i2c_msg msg[2] = {

77 { .addr = state->cfg->i2c_address, .flags = 0, .buf = &reg, .len = 1 },

78 { .addr = state->cfg->i2c_address, .flags = I2C_M_RD, .buf = &val, .len = 1 },

79 };

81 /* ugly flexcop workaround */

82 itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1);

84 if (i2c_transfer(state->i2c, msg, 2) != 2) {

85 warn("itd1000 I2C read failed");

86 return -EREMOTEIO;

87 }

88 return val;

89 }

91 static inline int itd1000_write_reg(struct itd1000_state *state, u8 r, u8 v)

92 {

93 int ret = itd1000_write_regs(state, r, &v, 1);

94 state->shadow[r] = v;

95 return ret;

96 }

99 static struct {

100 u32 symbol_rate;

101 u8 pgaext : 4; /* PLLFH */

102 u8 bbgvmin : 4; /* BBGVMIN */

103 } itd1000_lpf_pga[] = {

104 { 0, 0x8, 0x3 },

105 { 5200000, 0x8, 0x3 },

106 { 12200000, 0x4, 0x3 },

107 { 15400000, 0x2, 0x3 },

108 { 19800000, 0x2, 0x3 },

109 { 21500000, 0x2, 0x3 },

110 { 24500000, 0x2, 0x3 },

111 { 28400000, 0x2, 0x3 },

112 { 33400000, 0x2, 0x3 },

113 { 34400000, 0x1, 0x4 },

114 { 34400000, 0x1, 0x4 },

115 { 38400000, 0x1, 0x4 },

116 { 38400000, 0x1, 0x4 },

117 { 40400000, 0x1, 0x4 },

118 { 45400000, 0x1, 0x4 },

119 };

120

121 static void itd1000_set_lpf_bw(struct itd1000_state *state, u32 symbol_rate)

122 {

123 u8 i;

124 u8 con1 = itd1000_read_reg(state, CON1) & 0xfd;

125 u8 pllfh = itd1000_read_reg(state, PLLFH) & 0x0f;

126 u8 bbgvmin = itd1000_read_reg(state, BBGVMIN) & 0xf0;

127 u8 bw = itd1000_read_reg(state, BW) & 0xf0;

128

129 deb("symbol_rate = %d", symbol_rate);

130

131 /* not sure what is that ? - starting to download the table */

132 itd1000_write_reg(state, CON1, con1 | (1 << 1));

133

134 for (i = 0; i < ARRAY_SIZE(itd1000_lpf_pga); i++)

135 if (symbol_rate < itd1000_lpf_pga[i].symbol_rate) {

136 deb("symrate: index: %d pgaext: %x, bbgvmin: %x", i, itd1000_lpf_pga[i].pgaext, itd1000_lpf_pga[i].bbgvmin);

137 itd1000_write_reg(state, PLLFH, pllfh | (itd1000_lpf_pga[i].pgaext << 4));

138 itd1000_write_reg(state, BBGVMIN, bbgvmin | (itd1000_lpf_pga[i].bbgvmin));

139 itd1000_write_reg(state, BW, bw | (i & 0x0f));

140 break;

141 }

142

143 itd1000_write_reg(state, CON1, con1 | (0 << 1));

144 }

145

146 static struct {

147 u8 vcorg;

148 u32 fmax_rg;

149 } itd1000_vcorg[] = {

150 { 1, 920000 },

151 { 2, 971000 },

152 { 3, 1031000 },

153 { 4, 1091000 },

154 { 5, 1171000 },

155 { 6, 1281000 },

156 { 7, 1381000 },

157 { 8, 500000 }, /* this is intentional. */

158 { 9, 1451000 },

159 { 10, 1531000 },

160 { 11, 1631000 },

161 { 12, 1741000 },

162 { 13, 1891000 },

163 { 14, 2071000 },

164 { 15, 2250000 },

165 };

166

167 static void itd1000_set_vco(struct itd1000_state *state, u32 freq_khz)

168 {

169 u8 i;

170 u8 gvbb_i2c = itd1000_read_reg(state, GVBB_I2C) & 0xbf;

171 u8 vco_chp1_i2c = itd1000_read_reg(state, VCO_CHP1_I2C) & 0x0f;

172 u8 adcout;

173

174 /* reserved bit again (reset ?) */

175 itd1000_write_reg(state, GVBB_I2C, gvbb_i2c | (1 << 6));

176

177 for (i = 0; i < ARRAY_SIZE(itd1000_vcorg); i++) {

178 if (freq_khz < itd1000_vcorg[i].fmax_rg) {

179 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | (itd1000_vcorg[i].vcorg << 4));

180 msleep(1);

181

182 adcout = itd1000_read_reg(state, PLLLOCK) & 0x0f;

183

184 deb("VCO: %dkHz: %d -> ADCOUT: %d %02x", freq_khz, itd1000_vcorg[i].vcorg, adcout, vco_chp1_i2c);

185

186 if (adcout > 13) {

187 if (!(itd1000_vcorg[i].vcorg == 7 || itd1000_vcorg[i].vcorg == 15))

188 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg + 1) << 4));

189 } else if (adcout < 2) {

190 if (!(itd1000_vcorg[i].vcorg == 1 || itd1000_vcorg[i].vcorg == 9))

191 itd1000_write_reg(state, VCO_CHP1_I2C, vco_chp1_i2c | ((itd1000_vcorg[i].vcorg - 1) << 4));

192 }

193 break;

194 }

195 }

196 }

197

198 static const struct {

199 u32 freq;

200 u8 values[10]; /* RFTR, RFST1 - RFST9 */

201 } itd1000_fre_values[] = {

202 { 1075000, { 0x59, 0x1d, 0x1c, 0x17, 0x16, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },

203 { 1250000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },

204 { 1450000, { 0x89, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },

205 { 1650000, { 0x69, 0x1e, 0x1d, 0x17, 0x15, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },

206 { 1750000, { 0x69, 0x1e, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0c, 0x0b, 0x0a } },

207 { 1850000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } },

208 { 1900000, { 0x69, 0x1d, 0x17, 0x15, 0x14, 0x0f, 0x0e, 0x0d, 0x0b, 0x0a } },

209 { 1950000, { 0x69, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0d, 0x0b, 0x0a } },

210 { 2050000, { 0x69, 0x1e, 0x1d, 0x17, 0x16, 0x14, 0x13, 0x0e, 0x0b, 0x0a } },

211 { 2150000, { 0x69, 0x1d, 0x1c, 0x17, 0x15, 0x14, 0x13, 0x0f, 0x0e, 0x0b } }

212 };

213

214

215 #define FREF 16

216

217 static void itd1000_set_lo(struct itd1000_state *state, u32 freq_khz)

218 {

219 int i, j;

220 u32 plln, pllf;

221 u64 tmp;

222

223 plln = (freq_khz * 1000) / 2 / FREF;

224

225 /* Compute the factional part times 1000 */

226 tmp = plln % 1000000;

227 plln /= 1000000;

228

229 tmp *= 1048576;

230 do_div(tmp, 1000000);

231 pllf = (u32) tmp;

232

233 state->frequency = ((plln * 1000) + (pllf * 1000)/1048576) * 2*FREF;

234 deb("frequency: %dkHz (wanted) %dkHz (set), PLLF = %d, PLLN = %d", freq_khz, state->frequency, pllf, plln);

235

236 itd1000_write_reg(state, PLLNH, 0x80); /* PLLNH */;

237 itd1000_write_reg(state, PLLNL, plln & 0xff);

238 itd1000_write_reg(state, PLLFH, (itd1000_read_reg(state, PLLFH) & 0xf0) | ((pllf >> 16) & 0x0f));

239 itd1000_write_reg(state, PLLFM, (pllf >> 8) & 0xff);

240 itd1000_write_reg(state, PLLFL, (pllf >> 0) & 0xff);

241

242 for (i = 0; i < ARRAY_SIZE(itd1000_fre_values); i++) {

243 if (freq_khz <= itd1000_fre_values[i].freq) {

244 deb("fre_values: %d", i);

245 itd1000_write_reg(state, RFTR, itd1000_fre_values[i].values[0]);

246 for (j = 0; j < 9; j++)

247 itd1000_write_reg(state, RFST1+j, itd1000_fre_values[i].values[j+1]);

248 break;

249 }

250 }

251

252 itd1000_set_vco(state, freq_khz);

253 }

254

255 static int itd1000_set_parameters(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)

256 {

257 struct itd1000_state *state = fe->tuner_priv;

258 u8 pllcon1;

259

260 itd1000_set_lo(state, p->frequency);

261 itd1000_set_lpf_bw(state, p->u.qpsk.symbol_rate);

262

263 pllcon1 = itd1000_read_reg(state, PLLCON1) & 0x7f;

264 itd1000_write_reg(state, PLLCON1, pllcon1 | (1 << 7));

265 itd1000_write_reg(state, PLLCON1, pllcon1);

266

267 return 0;

268 }

269

270 static int itd1000_get_frequency(struct dvb_frontend *fe, u32 *frequency)

271 {

272 struct itd1000_state *state = fe->tuner_priv;

273 *frequency = state->frequency;

274 return 0;

275 }

276

277 static int itd1000_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)

278 {

279 return 0;

280 }

281

282 static u8 itd1000_init_tab[][2] = {

283 { PLLCON1, 0x65 }, /* Register does not change */

284 { PLLNH, 0x80 }, /* Bits [7:6] do not change */

285 { RESERVED_0X6D, 0x3b },

286 { VCO_CHP2_I2C, 0x12 },

287 { 0x72, 0xf9 }, /* No such regsister defined */

288 { RESERVED_0X73, 0xff },

289 { RESERVED_0X74, 0xb2 },

290 { RESERVED_0X75, 0xc7 },

291 { EXTGVBBRF, 0xf0 },

292 { DIVAGCCK, 0x80 },

293 { BBTR, 0xa0 },

294 { RESERVED_0X7E, 0x4f },

295 { 0x82, 0x88 }, /* No such regsister defined */

296 { 0x83, 0x80 }, /* No such regsister defined */

297 { 0x84, 0x80 }, /* No such regsister defined */

298 { RESERVED_0X85, 0x74 },

299 { RESERVED_0X86, 0xff },

300 { RESERVED_0X88, 0x02 },

301 { RESERVED_0X89, 0x16 },

302 { RFST0, 0x1f },

303 { RESERVED_0X94, 0x66 },

304 { RESERVED_0X95, 0x66 },

305 { RESERVED_0X96, 0x77 },

306 { RESERVED_0X97, 0x99 },

307 { RESERVED_0X98, 0xff },

308 { RESERVED_0X99, 0xfc },

309 { RESERVED_0X9A, 0xba },

310 { RESERVED_0X9B, 0xaa },

311 };

312

313 static u8 itd1000_reinit_tab[][2] = {

314 { VCO_CHP1_I2C, 0x8a },

315 { BW, 0x87 },

316 { GVBB_I2C, 0x03 },

317 { BBGVMIN, 0x03 },

318 { CON1, 0x2e },

319 };

320

321

322 static int itd1000_init(struct dvb_frontend *fe)

323 {

324 struct itd1000_state *state = fe->tuner_priv;

325 int i;

326

327 for (i = 0; i < ARRAY_SIZE(itd1000_init_tab); i++)

328 itd1000_write_reg(state, itd1000_init_tab[i][0], itd1000_init_tab[i][1]);

329

330 for (i = 0; i < ARRAY_SIZE(itd1000_reinit_tab); i++)

331 itd1000_write_reg(state, itd1000_reinit_tab[i][0], itd1000_reinit_tab[i][1]);

332

333 return 0;

334 }

335

336 static int itd1000_sleep(struct dvb_frontend *fe)

337 {

338 return 0;

339 }

340

341 static int itd1000_release(struct dvb_frontend *fe)

342 {

343 kfree(fe->tuner_priv);

344 fe->tuner_priv = NULL;

345 return 0;

346 }

347

348 static const struct dvb_tuner_ops itd1000_tuner_ops = {

349 .info = {

350 .name = "Integrant ITD1000",

351 .frequency_min = 950000,

352 .frequency_max = 2150000,

353 .frequency_step = 125, /* kHz for QPSK frontends */

354 },

355

356 .release = itd1000_release,

357

358 .init = itd1000_init,

359 .sleep = itd1000_sleep,

360

361 .set_params = itd1000_set_parameters,

362 .get_frequency = itd1000_get_frequency,

363 .get_bandwidth = itd1000_get_bandwidth

364 };

365

366

367 struct dvb_frontend *itd1000_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct itd1000_config *cfg)

368 {

369 struct itd1000_state *state = NULL;

370 u8 i = 0;

371

372 state = kzalloc(sizeof(struct itd1000_state), GFP_KERNEL);

373 if (state == NULL)

374 return NULL;

375

376 state->cfg = cfg;

377 state->i2c = i2c;

378

379 i = itd1000_read_reg(state, 0);

380 if (i != 0) {

381 kfree(state);

382 return NULL;

383 }

384 info("successfully identified (ID: %d)", i);

385

386 memset(state->shadow, 0xff, sizeof(state->shadow));

387 for (i = 0x65; i < 0x9c; i++)

388 state->shadow[i] = itd1000_read_reg(state, i);

389

390 memcpy(&fe->ops.tuner_ops, &itd1000_tuner_ops, sizeof(struct dvb_tuner_ops));

391

392 fe->tuner_priv = state;

393

394 return fe;

395 }

396 EXPORT_SYMBOL(itd1000_attach);

397

398 MODULE_AUTHOR("Patrick Boettcher <pb@linuxtv.org>");

399 MODULE_DESCRIPTION("Integrant ITD1000 driver");

400 MODULE_LICENSE("GPL");