i2c: designware: Call i2c_dw_clk_rate() only once in i2c_dw_init_master()
authorJarkko Nikula <jarkko.nikula@linux.intel.com>
Tue, 19 Jun 2018 11:23:21 +0000 (14:23 +0300)
committerWolfram Sang <wsa@the-dreams.de>
Tue, 3 Jul 2018 21:05:35 +0000 (23:05 +0200)
commit3bd4f277274bd7dde65879e5c8cd16d0b34eba90
treeab00e44111170c8f833ccb0144496c4dfbdfab72
parent83b2cb48cbc5c4196fcc9357836f30713f74dbc2
i2c: designware: Call i2c_dw_clk_rate() only once in i2c_dw_init_master()

This is rather readability update than micro-optimization, or if not
optimization at all. We take the input clock rate to a variable and pass
that to SCL timing parameter calculation functions.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
drivers/i2c/busses/i2c-designware-master.c