Anthony Koo [Thu, 4 May 2017 18:09:09 +0000 (14:09 -0400)]
drm/amd/display: Implement support for backlight optimization
- Add functionality to get real hw backlight level as opposed to user
level, meaning the level that takes into account backlight ramping
over time and backlight reduction due to Varibright
- Add backlight optimization which allows for a second OS state
that is able to control ABM
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Chalmers [Thu, 4 May 2017 17:34:55 +0000 (13:34 -0400)]
drm/amd/display: Continue with stream enable if DP link training fails.
Not necessarily a fatal problem - some monitors will recover and show
the stream anyway if link training fails.
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Tue, 2 May 2017 21:01:10 +0000 (17:01 -0400)]
drm/amd/display: do not set_mpc_tree if tree is already setup
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Wed, 3 May 2017 19:19:07 +0000 (15:19 -0400)]
drm/amd/display: use signal type to decide whether to set backlight
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leon Elazar [Fri, 24 Mar 2017 19:46:24 +0000 (15:46 -0400)]
drm/amd/display: Allow MPO on Raven
Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Wed, 3 May 2017 14:25:51 +0000 (10:25 -0400)]
drm/amd/display: Only apply ctx for specific surface.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 2 May 2017 20:58:39 +0000 (16:58 -0400)]
drm/amd/display: bw debug options now apply to dml as well
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 9 May 2017 14:41:42 +0000 (10:41 -0400)]
drm/amd/display: Keep DVI_SINGLE_LINK signal if low clk
If user is using DVI->HDMI dongle dual link signal might pose a
problem. Keep single link signal type if clk is lower than
max tmds clk.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Sun, 30 Apr 2017 13:20:55 +0000 (09:20 -0400)]
drm/amd/display: i2c/aux Remove link index.
Link index is an unnecessery level of inderection when
calling from kernel i2c/aux transfer into DAL.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 10 May 2017 19:56:17 +0000 (15:56 -0400)]
drm/amd/display: Don't call PSR func if DMCU is off
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
kbuild test robot [Thu, 11 May 2017 01:48:31 +0000 (09:48 +0800)]
drm/amdgpu/display: fix semicolon.cocci warnings
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_resource.c:1085:2-3: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
CC: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
kbuild test robot [Thu, 11 May 2017 01:48:31 +0000 (09:48 +0800)]
drm/amdgpu/display: fix semicolon.cocci warnings
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.c:411:23-24: Unneeded semicolon
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.c:420:39-40: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
CC: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 6 Mar 2017 06:01:11 +0000 (14:01 +0800)]
drm/amdgpu: enable dcn1.0 dc support on raven
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 15 Jun 2017 20:27:42 +0000 (16:27 -0400)]
drm/amdgpu/display: Enable DCN in DC
Enable DCN in DC.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:28:56 +0000 (15:28 -0400)]
drm/amdgpu/display: Add irq support for DCN
DCN code for display interrupts.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:26:37 +0000 (15:26 -0400)]
drm/amdgpu/display: Add i2c/aux support for DCN
Implement support for i2c and aux on DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:21:44 +0000 (15:21 -0400)]
drm/amdgpu/display: Add gpio support for DCN
GPIOs are used for i2c and other things.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:20:38 +0000 (15:20 -0400)]
drm/amdgpu/display: Add dml support for DCN
Display mode lib handles clock, watermark, and bandwidth
calculations for DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:19:06 +0000 (15:19 -0400)]
drm/amdgpu/display: Add core dc support for DCN
Core display support for DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:17:39 +0000 (15:17 -0400)]
drm/amdgpu/display: Add calcs code for DCN
Bandwidth and scaling calculations for DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Wed, 26 Apr 2017 12:09:56 +0000 (17:39 +0530)]
drm/amd/display: fix resume hang because of DP short pulse
There is a hard hang observed during resume from S3 when
the system receives a DP short pulse interrupt. This is
because there are two code paths contending for GPIO
access for AUX channel transactions. One such path is
through amdgpu_dm_display_resume() function which is
invoked from the regular system resume code path. The
other path is through handle_hpd_rx_irq(), which is
invoked in response to system receiving DP short pulse
interrupt. handle_hpd_rx_irq() guards against conflicting
GPIO access using hpd_lock, but the GPIO access from
amdgpu_dm_display_resume() remains unguarded.
This patch makes sure we use hpd_lock inside
amdgpu_dm_display_resume() to avoid race conditions
for GPIO access.
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 3 May 2017 17:58:45 +0000 (13:58 -0400)]
drm/amd/display: Assign stream to map before we need it
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hersen Wu [Fri, 28 Apr 2017 20:21:38 +0000 (16:21 -0400)]
drm/amd/display: Get dprefclk ss percentage from vbios
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Fri, 28 Apr 2017 11:54:34 +0000 (07:54 -0400)]
drm/amd/display: move drr_params definition to TG
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 28 Apr 2017 13:56:08 +0000 (09:56 -0400)]
drm/amd/display: Disable cursor on video surface.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Thu, 27 Apr 2017 16:20:34 +0000 (12:20 -0400)]
drm/amd/display: Add support for FreeSync on eDP to module
Signed-off-by: Eric <eric.cook@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Tue, 25 Apr 2017 14:03:27 +0000 (10:03 -0400)]
drm/amd/display: Add function to set dither option
Signed-off-by: Ding Wang <Ding.Wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Wed, 26 Apr 2017 15:51:38 +0000 (11:51 -0400)]
drm/amd/display: Check for Zero Range in FreeSync Calc
-check for min/max range in freesync calculation and handle it accordingly
Signed-off-by: Eric <eric.cook@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 26 Apr 2017 14:54:45 +0000 (10:54 -0400)]
drm/amd/display: fix crash caused by incorrect index being used for array
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Wed, 12 Apr 2017 19:29:13 +0000 (15:29 -0400)]
drm/amd/display: Define dithering options
Signed-off-by: Ding Wang <Ding.Wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sat, 22 Apr 2017 18:17:51 +0000 (14:17 -0400)]
drm/amd/display: decouple resource_pool from resource_context
to avoid null access in case res_ctx is used to access res_pool before it's fully constructed
also make it clear which function has dependency on resource_pool
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Tue, 18 Apr 2017 19:24:50 +0000 (15:24 -0400)]
drm/amd/display: FreeSync Auto Sweep Support
Implement core support to allow for FreeSync Auto Sweep to work
Signed-off-by: Eric Cook <Eric.Cook@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 24 Apr 2017 21:42:22 +0000 (17:42 -0400)]
drm/amd/display: no need for return value from ipp_program_degamma_pwl
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 24 Apr 2017 20:30:58 +0000 (16:30 -0400)]
drm/amd/display: dce80, 100, 110 and 112 to dce ipp refactor
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 24 Apr 2017 19:20:24 +0000 (15:20 -0400)]
drm/amd/display: dce120 to dce ipp refactor
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Mon, 24 Apr 2017 03:33:26 +0000 (23:33 -0400)]
drm/amd/display: clarify delay param for REG_WAIT
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sun, 23 Apr 2017 14:46:02 +0000 (10:46 -0400)]
drm/amd/display: move tg_color to dc_hw_types
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sylvia Tsai [Fri, 21 Apr 2017 19:29:55 +0000 (15:29 -0400)]
drm/amd/display: PSR Refactor
- Refacotr PSR to follow correct module pattern
- fix eDP only working on sink index 0.
Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Fri, 21 Apr 2017 14:55:01 +0000 (10:55 -0400)]
drm/amd/display: Make dc_link param const in set_drive_settings
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Fri, 21 Apr 2017 13:34:09 +0000 (09:34 -0400)]
drm/amd/display: improve cursor programming reliability
This change will cache cursor attributes and reprogram them
when enabling cursor after power gating if the attributes were not
yet reprogrammed
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Fri, 21 Apr 2017 21:15:40 +0000 (17:15 -0400)]
drm/amd/display: USB-c DP-HDMI dongle shows garbage on Sony TV
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 21 Apr 2017 15:00:43 +0000 (11:00 -0400)]
drm/amd/display: Make sure v_total_min and max not less than v_total.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amy Zhang [Tue, 18 Apr 2017 21:43:09 +0000 (17:43 -0400)]
drm/amd/display: always retrieve PSR cap
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 18 Apr 2017 21:31:46 +0000 (17:31 -0400)]
drm/amd/display: fix memory leak
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 18 Apr 2017 19:35:27 +0000 (15:35 -0400)]
drm/amd/display: set correct v_total_min and v_total_max for dce.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 18 Apr 2017 20:51:39 +0000 (16:51 -0400)]
drm/amd/display: remove unnecessary allocation for regamma_params inside opp
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 18 Apr 2017 19:43:22 +0000 (15:43 -0400)]
drm/amd/display: Fix memory leak in post_update_surfaces
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Mon, 17 Apr 2017 23:02:19 +0000 (19:02 -0400)]
drm/amd/display: Block YCbCr formats for eDP. Revert previous change.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Wed, 12 Apr 2017 10:53:25 +0000 (16:23 +0530)]
drm/amd/display: make dc_commit_surfaces_to_stream() re-entrant
dc_commit_surfaces_to_stream() function currently
is handle's only one plane at a time.
This will not work if multiple planes have to be set to a crtc.
The functionality of dc_commit_surfaces_to_stream() with this patch
is slit into
1. Accumulate and initialise all the surfaces that needs to be
set to a crtc.
2. Update the intialised set of surfaces to the steam in one go.
Hence dc_commit_surfaces_to_stream() is renamed to init_surfaces().
Once all the planes requested by user space are initialised,
dc_commit_surfaces_to_stream() shall sequentially populates *updates,
*flip_addr, *plane_info and *scaling_info for all surfaces.
BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
* Chromium UI comes up, on both eDP & DP.
* 'new_surface_count' now changes as per user input for e.g for
all below run tests its 2, without this patch for the below
tests it used to be 1
* Executed below tests to see YUV(underlay) & RGB planes on eDP
plane_test --format XR24 --size 500x100 -p --format YV12 --size 500x500
plane_test --format AR24 --size 500x50 -p --format YV12 --size 150x150
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768
Signed-off-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Tue, 25 Apr 2017 06:56:57 +0000 (12:26 +0530)]
drm/amd/display: update the YUV plane offsets
This patch updates the planes default offsets to
the appropriate ones, and aligns the pitch to 64 bits.
BUG=SWDEV-119421
TEST=Boots to UI on jadeite
TEST=
plane_test --format AR24 --size 500x50 -p --format YV12 --size 500x500
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1280x720
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 27 Apr 2017 02:36:01 +0000 (22:36 -0400)]
drm/amd/display: initialize YUV plane capabilities
This patch populates the YUV surface configurations.
Tests: (On Chromium OS for Stoney Only)
builds without any errors.
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Mar 2017 15:22:05 +0000 (11:22 -0400)]
drm/amd/display: Return context from validate_context
This will allow us to carry it from check to commit
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Mar 2017 15:15:14 +0000 (11:15 -0400)]
drm/amd/display: Move resource_validate_ctx_destruct to dc.h
This will be needed to clean up context once we add it to private
atomic state.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 22:57:05 +0000 (18:57 -0400)]
drm/amd/display: Copy ctx to current_context instead of assign
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 20:22:33 +0000 (16:22 -0400)]
drm/amd/display: pull commit_surfaces out of atomic_commit into helper function
This should make things simpler when we try to rework this later when we
pass validate_context from atomic_check to atomic_commit.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 17 Apr 2017 15:39:19 +0000 (11:39 -0400)]
drm/amd/display: update dce8 & 10 bw programming
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 21:05:53 +0000 (17:05 -0400)]
drm/amd/display: Get rid of temp_flip_context
If we need to update our context we can allocate memory.
No need to keep temporary memory for this.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 20:48:48 +0000 (16:48 -0400)]
drm/amd/display: Remove unused scratch_val_ctx
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Wed, 12 Apr 2017 15:05:08 +0000 (11:05 -0400)]
drm/amd/display: FreeSync LFC MIN/MAX update on current frame
- Update BTR/LFC logic so that V_TOTAL_MIN/MAX will take affect on current frame
- Add in FreeSync update to MPO code path
Signed-off-by: Eric Cook <Eric.Cook@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Vitaly Prosyak [Fri, 31 Mar 2017 20:25:04 +0000 (15:25 -0500)]
drm/amd/display: Add support for programming stereo sync
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sylvia Tsai [Tue, 11 Apr 2017 19:15:28 +0000 (15:15 -0400)]
drm/amd/display: Parse scanline registers
They could differ between ASIC generations
Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 12 Apr 2017 02:24:44 +0000 (22:24 -0400)]
drm/amd/display: use full surface update when stream is NULL
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jordan Lazare [Tue, 11 Apr 2017 15:40:18 +0000 (11:40 -0400)]
drm/amd/display: Fix missing irq refactor causing potential i2c race
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Mon, 10 Apr 2017 18:02:23 +0000 (14:02 -0400)]
drm/amd/display: Fix for tile MST
- Set stream signal type to be SST when setting non-tile timing on MST
tiled display.
- Disable MST on sink after disabling MST link.
- Enable MST on sink before enabling MST link.
Signed-off-by: Ding Wang <Ding.Wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leon Elazar [Mon, 10 Apr 2017 13:37:11 +0000 (09:37 -0400)]
drm/amd/display: set NULL value during removal for remoteSink
In MST case during removal of remote sink its descriptor pointer wasn't freed corectly.
Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Thu, 6 Apr 2017 20:23:14 +0000 (16:23 -0400)]
drm/amd/display: change mpo surface update check condition.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Thu, 6 Apr 2017 20:21:58 +0000 (16:21 -0400)]
drm/amd/display: Add same check as reset pipes for programing backend regs.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sylvia Tsai [Tue, 4 Apr 2017 21:28:17 +0000 (17:28 -0400)]
drm/amd/display: Adding dm controlled signal type in dc_stream
- Adding dm controlled signal type in dc_stream
- Adding fallback to dvi signal when output signal is hdmi and the connector
type is not
Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Sylvia Tsai <Sylvia.Tsai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leon Elazar [Tue, 4 Apr 2017 14:01:07 +0000 (10:01 -0400)]
drm/amd/display: Memory was freed twice during disable
1. get_ss_info_from_atombios function was allocating the memory populating the provided pointer
but them freeing the memory.
Since the pointer was return as a valid value, we are trying to free the same memory during clock resource destruction
Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Mon, 3 Apr 2017 15:54:11 +0000 (11:54 -0400)]
drm/amd/display: Fix hotspot programming during set cursor position.
- Remove x,y hotspot from dc_cursor_attributes. Only program it
through setPosition.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Fri, 31 Mar 2017 21:40:15 +0000 (17:40 -0400)]
drm/amd/display: adding FCLK and DPPCLK clock types
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Kleiner [Mon, 24 Apr 2017 16:54:20 +0000 (18:54 +0200)]
drm/amd/display: Prevent premature pageflip when comitting in vblank. (v3)
Make sure we do not program a hw pageflip inside vblank 'n' iff the
atomic flip is comitted while inside the same vblank 'n'. We must
defer such a flip by one refresh cycle to vblank 'n+1', unless this
is a DRM_MODE_PAGE_FLIP_ASYNC async pageflip, which must always
execute as soon as possible.
Without this, pageflips programmed via X11 GLX_OML_sync_control extensions
glXSwapBuffersMscOML(..., target_msc, ...); call and/or via DRI3/Present
PresentPixmap(..., target_msc, ...); request will complete one vblank
too early whenever target_msc > current_msc + 1, ie. more than 1 vblank
in the future. In such a case, the call of the pageflip ioctl() would be
triggered by a queued drmWaitVblank() vblank event, which itself gets
dispatched inside the vblank one frame before the target_msc vblank.
Testing with this patch does no longer show any problems with
OML_sync_control swap scheduling or flip completion timestamps.
Tested on R9 380 Tonga.
v2: Add acked/r-b by Harry and Michel.
v3: Feedback from Andrey: Must not wait an extra frame for
DRM_MODE_PAGE_FLIP_ASYNC flips.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Harry Wentland <harry.wentland@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Harry Wentland <Harry.Wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mario Kleiner [Mon, 24 Apr 2017 09:46:44 +0000 (11:46 +0200)]
drm/amd/display: Fix race between vblank irq and pageflip irq. (v2)
Since DC now uses CRTC_VERTICAL_INTERRUPT0 as VBLANK irq trigger
and vblank interrupts actually happen earliest at start of vblank,
instead of a bit before vblank, we no longer need some of the
fudging logic to deal with too early vblank irq handling (grep for
lb_vblank_lead_lines). This itself fixes a pageflip scheduling
bug in DC, caused by uninitialized use of lb_vblank_lead_lines,
with a wrong startup value of 0. Thanks to the new vblank irq
trigger this value of zero is now actually correct for DC :).
A new problem is that vblank irq's race against pflip irq's,
and as both can fire at first line of vblank, it is no longer
guaranteed that vblank irq handling (therefore -> drm_handle_vblank()
-> drm_update_vblank_count()) executes before pflip irq handling
for a given vblank interval when a pageflip completes. Therefore
the vblank count and timestamps emitted to user-space as part of
the pageflip completion event will be often stale and cause new
timestamping and swap scheduling errors in user-space.
This was observed with large frequency on R9 380 Tonga Pro.
Fix this by enforcing a vblank count+timestamp update right
before emitting the pageflip completion event from the pflip
irq handler. The logic in core drm_update_vblank_count() makes
sure that no redundant or conflicting updates happen, iow. the
call turns into a no-op if it wasn't needed for that vblank,
burning a few microseconds of cpu time though.
Successfully tested on AMD R9 380 "Tonga Pro" (VI/DCE 10)
with DC enabled on the current DC staging branch. Independent
measurement of pageflip completion timing with special hardware
measurement equipment now confirms correct pageflip timestamps
and counts in the pageflip completion events.
v2: Review comments by Michel, drop outdated paragraph
about problem already fixed in 2nd patch of the series.
Add acked/r-b by Harry and Michel.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Harry Wentland <harry.wentland@amd.com> (v1)
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Pratik Vishwakarma [Thu, 6 Apr 2017 07:48:20 +0000 (13:18 +0530)]
drm/amd/display: get_atomic_property missing for drm_connector_funcs
DRM_IOCTL_MODE_GETCONNECTOR fails with EINVAL on enabling DRIVER_ATOMIC
With this DRM_IOCTL_MODE_GETCONNECTOR returns all the connector properties.
freesync_property and freesync_capable_property return 0 currently.
TESTS(On Chromium OS on Stoney Only)
* Builds without compilation errors.
* 'atomictest' proceeds after applying patch and fails with vblank event
timed out.
* Chromium OS ui comes up.
Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 27 Jan 2017 15:55:20 +0000 (10:55 -0500)]
drm/amd/display: Fallback on legacy properties in atomic_get_properties
We still rely on legacy properties. Fallback on legacy properties until
we get to pull these into some atomic state.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 10 Apr 2017 19:37:32 +0000 (15:37 -0400)]
drm/amd/display: Allow planes on all crtcs
4.9 kernel will always add the assigned crtc to possible_crtcs on a
plane. This is no longer the case on newer kernels. Make sure we allow
any plane on any crtc.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 15 Jun 2017 20:25:11 +0000 (16:25 -0400)]
drm/amd/display: fix nullptr on vega initialization
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Fri, 31 Mar 2017 18:15:31 +0000 (14:15 -0400)]
drm/amd/display: Fix s3 hang on resume.
Avoid enabling CRTC_VERTICAL_INTERRUPT0 twice on resume.
It's enabled once from within manage_dm_interrupts in mode set
and another explicitly from amdgpu_dm_irq_resume_late.
Seems it lead to CRTC hang.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jordan Lazare [Fri, 31 Mar 2017 21:14:20 +0000 (17:14 -0400)]
drm/amd/display: Log clock source in error condition
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 31 Mar 2017 17:53:42 +0000 (13:53 -0400)]
drm/amd/display: Ignore visible flag when check surface update type.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jordan Lazare [Thu, 30 Mar 2017 17:08:34 +0000 (13:08 -0400)]
drm/amd/display: Fill in vrefresh and min_vblank_time for dce8/dce10
PPLib is now calling into DC to get vrefresh and min_vblank_time, but
since full bandwidth calcs are missing for those generations, the pplib
structures were never being filled. This change fills the currently
required fields to prevent screen corruption.
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amy Zhang [Thu, 30 Mar 2017 15:39:47 +0000 (11:39 -0400)]
drm/amd/display: PSR Aux Channel and Static Screen Support Fix
- Correct the aux channel selection according to DAL3
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Tue, 28 Mar 2017 20:57:52 +0000 (16:57 -0400)]
drm/amd/display: Refactor edid read.
Allow Linux to use DRM provided EDID read functioality
by moving DAL edid implementation to module hence
removing this code from DC by this cleaning up DC
code for upstream.
v2: Removing ddc_service. No more need for it.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Sun, 5 Mar 2017 01:56:46 +0000 (20:56 -0500)]
drm/amd/display: Fix i2c write flag.
I2C_M_RD was translated to write instead of read.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Tue, 14 Feb 2017 20:47:24 +0000 (15:47 -0500)]
drm/amd/display: Remove get_connector_for_sink.
Keep 1:1 relation between MST sink and it's MST connector.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Tue, 14 Feb 2017 18:50:17 +0000 (13:50 -0500)]
drm/amd/display: Remove get_connector_for_link.
We can keep a 1:1 relation between a link and a physical
connector and hence skip the iteration. This function
is used in context of only physical connetors.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 29 Mar 2017 20:24:19 +0000 (16:24 -0400)]
drm/amd/display: fix dce_calc surface pitch setting for non underlay pipes
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Wed, 29 Mar 2017 21:21:56 +0000 (17:21 -0400)]
drm/amd/display: Temporary disable PSR for HBR2 & HBR3
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reza Amini [Wed, 29 Mar 2017 16:05:15 +0000 (12:05 -0400)]
drm/amd/display: refactor member referencing to improve readability
Signed-off-by: Reza Amini <reza.amini@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reza Amini [Fri, 17 Mar 2017 19:24:09 +0000 (15:24 -0400)]
drm/amd/display: remove surface validation against stream rect
Surface information is by default copied from old context in dc_commit_stream.
Thus unchange streams will not be affected. For new streams, we shouldn't
validate the new mode against the surface configuration of old_context.
Signed-off-by: Reza Amini <reza.amini@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 23 Mar 2017 09:24:40 +0000 (14:54 +0530)]
drm/amd/display: update plane functionalities
This patch introduces amdgpu_drm_plane_state
structure, which subclasses drm_plane_state and
holds data suitable for configuring hardware.
It switches reset(), atomic_duplicate_state()
& atomic_destroy_state() functions to new internal
implementation, earlier they were pointing to
drm core functions.
TESTS(On Chromium OS on Stoney Only)
* Builds without compilation errors.
* 'plane_test' passes for XR24 format
based Overlay plane.
* Chromium OS ui comes up.
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 3 Apr 2017 17:36:26 +0000 (13:36 -0400)]
drm/amd/display: Fix cleanup in amdgpu_dm_initialize_drm_device
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 15 Jun 2017 20:24:01 +0000 (16:24 -0400)]
drm/amd/display: decouple per-crtc-plane model
Current design has per-crtc-plane model.
As a result, for asic's that support underlay,
are unable to expose it to user space for modesetting.
To enable this, the drm driver intialisation now runs
for number of surfaces instead of stream/crtc.
This patch plumbs surface capabilities to drm framework
so that it can be effectively used by user space.
Tests: (On Chromium OS for Stoney Only)
* 'modetest -p' now shows additional plane
with YUV capabilities in case of CZ and ST.
* 'plane_test' fails with below error:
[drm:amdgpu_dm_connector_atomic_set_property [amdgpu]] *ERROR* Unsupported screen depth 0
as ther is no support for YUYV
* Checked multimonitor display works fine
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Mon, 27 Mar 2017 18:50:27 +0000 (14:50 -0400)]
drm/amd/display: obtain usHBR3En bit from BP 1
ASICs using bios parser 1 don't check HBR3 capability as there is no such
a bit usHBR3En in ATOM_ENCODER_CAP_RECORDER.
Therefore, will use ATOM_ENCODER_CAP_RECORDER_V2 and thus obtain the usHBR3En
bit.
Signed-off-by: Ding Wang <ding.wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Vitaly Prosyak [Mon, 27 Mar 2017 17:48:46 +0000 (12:48 -0500)]
drm/amd/display: stereo support
Frame sequential, top-bottom and side-by-side support.
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Mon, 27 Mar 2017 16:39:22 +0000 (12:39 -0400)]
drm/amd/display: use CP2520-3 for PHY compliance automation
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Mon, 27 Mar 2017 13:59:38 +0000 (09:59 -0400)]
drm/amd/display: Fix MPO exit and cursor issue.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Fri, 24 Mar 2017 20:26:09 +0000 (16:26 -0400)]
drm/amd/display: increase timeout for dmif dealloc
In some use-cases, e.g. multiple 4K displays,
exisitng wait time for reg update of 30msec timed out
during mode setiing that sometimes resulted in system bad state
as we continue without waiting for registry update complete.
Increasing timeout to 35msec fixes that problem.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Fri, 24 Mar 2017 20:54:02 +0000 (16:54 -0400)]
drm/amd/display: voltage request related change
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Thu, 23 Mar 2017 19:30:35 +0000 (15:30 -0400)]
drm/amd/display: use CRTC_VERTICAL_INTERRUPT0 as a trigger for VBLANK.
Register ISR hnadler on the new interrupt.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>