openwrt/staging/blogic.git
13 years agopowerpc+sparc64/mm: Remove hack in mmap randomize layout
Dan McGee [Mon, 17 Oct 2011 13:05:23 +0000 (13:05 +0000)]
powerpc+sparc64/mm: Remove hack in mmap randomize layout

Since commit 8a0a9bd4db63bc45e301, this comment in mmap_rnd() does not
hold true as the value returned by get_random_int() will in fact be

different every single call. Remove the comment and simplify the code
back to its original desired form.

This reverts commit a5adc91a4b44b5d1 which is no longer necessary and
also fixes the sparc code that copied this same adjustment.

Signed-off-by: Dan McGee <dpmcgee@gmail.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/xics: Harden xics hypervisor backend
Anton Blanchard [Thu, 24 Nov 2011 19:39:36 +0000 (19:39 +0000)]
powerpc/xics: Harden xics hypervisor backend

During kdump stress testing I sometimes see the kdump kernel panic
with:

  Interrupt 0x306 (real) is invalid, disabling it.
  Kernel panic - not syncing: bad return code EOI - rc = -4, value=ff000306

Instead of panicing print the error message, dump the stack the first
time it happens and continue on. Add some more information to the
debug messages as well.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc: Decode correct MSR bits in oops output
Anton Blanchard [Thu, 24 Nov 2011 19:35:57 +0000 (19:35 +0000)]
powerpc: Decode correct MSR bits in oops output

On a 64bit book3s machine I have an oops from a system reset that
claims the book3e CE bit was set:

MSR: 8000000000021032 <ME,CE,IR,DR>  CR: 24004082  XER: 00000010

On a book3s machine system reset sets IBM bit 46 and 47 depending on
the power saving mode. Separate the definitions by type and for
completeness add the rest of the bits in.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agoarch/powerpc: Remove duplicate/redundant Altivec entries
Matthew McClintock [Tue, 7 Sep 2010 08:56:55 +0000 (08:56 +0000)]
arch/powerpc: Remove duplicate/redundant Altivec entries

In lieu of having multiple similiar lines, we can just have one
generic cpu-as line for CONFIG_ALTIVEC

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/maple: Enable access to HT Host-Bridge on Maple
Dmitry Eremin-Solenikov [Wed, 29 Jun 2011 04:17:40 +0000 (04:17 +0000)]
powerpc/maple: Enable access to HT Host-Bridge on Maple

CPC925/CPC945 use special window to access host bridge functionality of
u3-ht. Provide a way to access this device.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc: Implement CONFIG_STRICT_DEVMEM
sukadev@linux.vnet.ibm.com [Tue, 30 Aug 2011 09:19:17 +0000 (09:19 +0000)]
powerpc: Implement CONFIG_STRICT_DEVMEM

As described in the help text in the patch, this token restricts general
access to /dev/mem as a way of increasing the security. Specifically, access
to exclusive IOMEM and kernel RAM is denied unless CONFIG_STRICT_DEVMEM is
set to 'n'.

Implement the 'devmem_is_allowed()' interface for Powerpc. It will be
called from range_is_allowed() when userpsace attempts to access /dev/mem.

This patch is based on an earlier patch from Steve Best and with input from
Paul Mackerras and Scott Wood.

[BenH] Fixed a typo or two and removed the generic change which should
       be submitted as a separate patch

Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agoMerge remote-tracking branch 'kumar/next' into next
Benjamin Herrenschmidt [Fri, 25 Nov 2011 04:25:39 +0000 (15:25 +1100)]
Merge remote-tracking branch 'kumar/next' into next

13 years agopowerpc/mpic: Remove extra semicolon.
Justin P. Mattock [Mon, 21 Nov 2011 06:43:26 +0000 (06:43 +0000)]
powerpc/mpic: Remove extra semicolon.

The patch below removes an extra semicolon.

Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
CC: linuxppc-dev@lists.ozlabs.org
CC: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc: Export PIR data through sysfs
Ananth N Mavinakayanahalli [Thu, 10 Nov 2011 19:58:53 +0000 (19:58 +0000)]
powerpc: Export PIR data through sysfs

On Fri, Nov 11, 2011 at 10:17:55AM +0530, Ananth N Mavinakayanahalli wrote:
> >
> > At this rate we're going to end up with no bits left for CPU features
> > way too quickly... Especially for something we only care about once at
> > boot time.
> >
> > Wouldn't CPU_FTR_PPCAS_ARCH_V2 be a good enough test ?
>
> /me checks Cell manuals... yes, that test would be good enough. I will
> cook up a patch to use this.

Here it is...

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/powernv: PCI support for p7IOC under OPAL v2
Benjamin Herrenschmidt [Tue, 15 Nov 2011 17:29:08 +0000 (17:29 +0000)]
powerpc/powernv: PCI support for p7IOC under OPAL v2

This adds support for p7IOC (and possibly other IODA v1 IO Hubs)
using OPAL v2 interfaces.

We completely take over resource assignment and assign them using an
algorithm that hands out device BARs in a way that makes them fit in
individual segments of the M32 window of the bridge, which enables us
to assign individual PEs to devices and functions.

The current implementation gives out a PE per functions on PCIe, and a
PE for the entire bridge for PCIe to PCI-X bridges.

This can be adjusted / fine tuned later.

We also setup DMA resources (32-bit only for now) and MSIs (both 32-bit
and 64-bit MSI are supported).

The DMA allocation tries to divide the available 256M segments of the
32-bit DMA address space "fairly" among PEs. This is done using a
"weight" heuristic which assigns less value to things like OHCI USB
controllers than, for example SCSI RAID controllers. This algorithm
will probably want some fine tuning for specific devices or device
types.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/powernv: Fixup p7ioc PCIe root complex class code
Benjamin Herrenschmidt [Sun, 6 Nov 2011 18:56:00 +0000 (18:56 +0000)]
powerpc/powernv: Fixup p7ioc PCIe root complex class code

It advertises "host bridge" instead of "PCI to PCI bridge" which confuses
the Linux probe code.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/powernv: Add TCE SW invalidation support
Benjamin Herrenschmidt [Sun, 6 Nov 2011 18:55:59 +0000 (18:55 +0000)]
powerpc/powernv: Add TCE SW invalidation support

This is used for newer IO Hubs such as p7IOC.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/pci: Change how re-assigning resouces work
Benjamin Herrenschmidt [Sun, 6 Nov 2011 18:55:58 +0000 (18:55 +0000)]
powerpc/pci: Change how re-assigning resouces work

When PCI_REASSIGN_ALL_RSRC is set, we used to clear all bus resources
at the beginning of survey and re-allocate them later.

This changes it so instead, during early fixup, we mark all resources
as IORESOURCE_UNSET and move them down to be 0-based.

Later, if bus resources are still unset at the beginning of the survey,
then we clear them.

This shouldn't impact the re-assignment case on 4xx, but will enable
us to have the platform do some custom resource assignment before the
survey, by clearing individual resources IORESOURCE_UNSET bit.

Also limits the clutter in the kernel log from fixup when re-assigning
since we don't care about the offset applied to the BAR values in this
case.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/pci: Add a platform hook after probe and before resource survey
Benjamin Herrenschmidt [Sun, 6 Nov 2011 18:55:57 +0000 (18:55 +0000)]
powerpc/pci: Add a platform hook after probe and before resource survey

Some platforms need to perform resource allocation using a custom algorithm
due to HW constraints, or may want to tweak things globally below a host
bridge. For example OPAL support for IODA will need to perform a
resource allocation pass that applies IODA specific segmentation
constraints to MMIO which cannot be done simply using the kernel generic
resource management code.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc: Add pgprot_cached_noncoherent()
Geoff Thorpe [Thu, 27 Oct 2011 02:58:45 +0000 (02:58 +0000)]
powerpc: Add pgprot_cached_noncoherent()

This adds a pgprot combination required by some cache-enabled IO device
mappings, such as Freescale datapath (QMan and BMan) portals.

Signed-off-by: Geoff Thorpe <geoff@geoffthorpe.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc: Allow irq threading
Thomas Gleixner [Wed, 5 Oct 2011 02:30:51 +0000 (02:30 +0000)]
powerpc: Allow irq threading

All interrupts which must be non threaded are marked
IRQF_NO_THREAD. So it's safe to allow force threaded handlers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc: Mark IPI interrupts IRQF_NO_THREAD
Thomas Gleixner [Wed, 5 Oct 2011 02:30:50 +0000 (02:30 +0000)]
powerpc: Mark IPI interrupts IRQF_NO_THREAD

IPI handlers cannot be threaded. Remove the obsolete IRQF_DISABLED
flag (see commit e58aa3d2) while at it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/wsp: Mark opb cascade handler IRQF_NO_THREAD
Thomas Gleixner [Wed, 5 Oct 2011 02:30:50 +0000 (02:30 +0000)]
powerpc/wsp: Mark opb cascade handler IRQF_NO_THREAD

Cascade handlers must run in hard interrupt context.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/85xx: Mark cascade irq IRQF_NO_THREAD
Thomas Gleixner [Wed, 5 Oct 2011 02:30:49 +0000 (02:30 +0000)]
powerpc/85xx: Mark cascade irq IRQF_NO_THREAD

Cascade interrupt must run in hard interrupt context.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/pseries: Cancel RTAS event scan before firmware flash
Ravi K. Nittala [Mon, 3 Oct 2011 21:49:53 +0000 (21:49 +0000)]
powerpc/pseries: Cancel RTAS event scan before firmware flash

The RTAS firmware flash update is conducted using an RTAS call that is
serialized by lock_rtas() which uses spin_lock. While the flash is in
progress, rtasd performs scan for any RTAS events that are generated by
the system. rtasd keeps scanning for the RTAS events generated on the
machine. This is performed via workqueue mechanism. The rtas_event_scan()
also uses an RTAS call to scan the events, eventually trying to acquire
the spin_lock before issuing the request.

The flash update takes a while to complete and during this time, any other
RTAS call has to wait. In this case, rtas_event_scan() waits for a long time
on the spin_lock resulting in a soft lockup.

Fix: Just before the flash update is performed, the queued rtas_event_scan()
work item is cancelled from the work queue so that there is no other RTAS
call issued while the flash is in progress. After the flash completes, the
system reboots and the rtas_event_scan() is rescheduled.

Signed-off-by: Suzuki Poulose <suzuki@in.ibm.com>
Signed-off-by: Ravi Nittala <ravi.nittala@in.ibm.com>
Reported-by: Divya Vikas <divya.vikas@in.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/book3e: Add Chroma as a new WSP/PowerEN platform.
Jimi Xenidis [Fri, 30 Sep 2011 04:26:13 +0000 (04:26 +0000)]
powerpc/book3e: Add Chroma as a new WSP/PowerEN platform.

This patch add the Chroma platform to WSP/PowerEN, which is a PCIe
card (a defconfig is included).

The card includes an H8 service processor that is used to manage the
card.  The H8 is connected over the second serial UART on the PowerEN
chip so this patch includes a simple 16550 driver to enable
communication, mostly for "power off" and "rebooting".

This patch also includes a, WSP specific, "halt" method that will shut
of all A2 cores but still leave power on at the chip level.  This is
desirable, especially if you wish to interrogate the chip with a
hardware probe after the halt.

Signed-off-by: Jimi Xenidis <jimix@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/xmon: Fix #if typo for systems without MSR[RI]
Jimi Xenidis [Thu, 29 Sep 2011 12:05:28 +0000 (12:05 +0000)]
powerpc/xmon: Fix #if typo for systems without MSR[RI]

Sorry, there was a typo in the #if

signed-off-by: Jimi Xenidis <jimix@pobox.com>

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/xmon: Fix the 'u' command description
Jimi Xenidis [Thu, 29 Sep 2011 11:25:10 +0000 (11:25 +0000)]
powerpc/xmon: Fix the 'u' command description

The 'u' command will print the TLB on book3e parts and the SLB on
Book3s parts, but the help system doesn't say that correctly.

Signed-off-by: Jimi Xenidis <jimix@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/icswx: Simple ACOP fault handler
Jimi Xenidis [Thu, 29 Sep 2011 10:55:14 +0000 (10:55 +0000)]
powerpc/icswx: Simple ACOP fault handler

This patch adds a fault handler that responds to illegal Coprocessor
types.  Currently all CTs are treated and illegal.  There are two ways
to report the fault back to the application.  If the application used
the record form ("icswx.") then the architected "reject" is emulated.
If the application did not used the record form ("icswx") then it is
selectable by config whether the failure is silent (as architected) or
a SIGILL is generated.

In all cases pr_warn() is used to log the bad CT.

Signed-off-by: Jimi Xenidis <jimix@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/book3e: Add ICSWX/ACOP support to Book3e cores like A2
Jimi Xenidis [Thu, 29 Sep 2011 10:55:13 +0000 (10:55 +0000)]
powerpc/book3e: Add ICSWX/ACOP support to Book3e cores like A2

ICSWX is also used by the A2 processor to access coprocessors,
although not all "chips" that contain A2s have coprocessors.

Signed-off-by: Jimi Xenidis <jimix@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc: Split ICSWX ACOP and PID processing
Jimi Xenidis [Thu, 29 Sep 2011 10:55:12 +0000 (10:55 +0000)]
powerpc: Split ICSWX ACOP and PID processing

Some processors, like embedded, that already have a PID register that
is managed by the system.  This patch separates the ACOP and PID
processing into separate files so that the ACOP code can be shared.

Signed-off-by: Jimi Xenidis <jimix@pobox.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agoperf/powerpc: Fix build for PowerPC with uclibc toolchains
Florian Fainelli [Tue, 23 Aug 2011 02:20:08 +0000 (02:20 +0000)]
perf/powerpc: Fix build for PowerPC with uclibc toolchains

libio.h is not provided by uClibc, in order to be able to test the
definition of __UCLIBC__ we need to include stdlib.h, which also
includes stddef.h, providing the definition of 'NULL'.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/powermac: Add missing of_node_put
Julia Lawall [Sun, 21 Aug 2011 06:10:01 +0000 (06:10 +0000)]
powerpc/powermac: Add missing of_node_put

np is initialized to the result of calling a function that calls
of_node_get, so of_node_put should be called before the pointer is dropped.

The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression e,e1,e2;
@@

* e = \(of_find_node_by_type\|of_find_node_by_name\)(...)
  ... when != of_node_put(e)
      when != true e == NULL
      when != e2 = e
  e = e1
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/cell/iommu: Add missing of_node_put
Julia Lawall [Sun, 21 Aug 2011 06:10:00 +0000 (06:10 +0000)]
powerpc/cell/iommu: Add missing of_node_put

np is initialized to the result of calling a function that calls
of_node_get, so of_node_put should be called before the pointer is dropped.

The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression e,e1,e2;
@@

* e = \(of_find_node_by_type\|of_find_node_by_name\)(...)
  ... when != of_node_put(e)
      when != true e == NULL
      when != e2 = e
  e = e1
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/pseries: Software invalidatation of TCEs
Milton Miller [Wed, 29 Jun 2011 20:58:33 +0000 (20:58 +0000)]
powerpc/pseries: Software invalidatation of TCEs

Some pseries IOMMUs cache TCEs but don't snoop when the TCEs are changed
in memory, hence we need manually invalidate in software.

This adds code to do the invalidate.  It keys off a device tree property
to say where the to do the MMIO for the invalidate and some information
on what the format of the invalidate including some magic routing info.

it_busno get overloaded with this magic routing info and it_index with
the MMIO address for the invalidate command.

This then gets hooked into the building and freeing of TCEs.

This is only useful on bare metal pseries.  pHyp takes care of this when
virtualised.

Based on patch from Milton with cleanups from Mikey.

Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/time: Optimise decrementer_check_overflow
Anton Blanchard [Wed, 23 Nov 2011 20:07:22 +0000 (20:07 +0000)]
powerpc/time: Optimise decrementer_check_overflow

decrementer_check_overflow is called from arch_local_irq_restore so
we want to make it as light weight as possible. As such, turn
decrementer_check_overflow into an inline function.

To avoid a circular mess of includes, separate out the two components
of struct decrementer_clock and keep the struct clock_event_device
part local to time.c.

The fast path improves from:

arch_local_irq_restore
     0:       mflr    r0
     4:       std     r0,16(r1)
     8:       stdu    r1,-112(r1)
     c:       stb     r3,578(r13)
    10:       cmpdi   cr7,r3,0
    14:       beq-    cr7,24 <.arch_local_irq_restore+0x24>
...
    24:       addi    r1,r1,112
    28:       ld      r0,16(r1)
    2c:       mtlr    r0
    30:       blr

to:

arch_local_irq_restore
    0:       std     r30,-16(r1)
    4:       ld      r30,0(r2)
    8:       stb     r3,578(r13)
    c:       cmpdi   cr7,r3,0
   10:       beq-    cr7,6c <.arch_local_irq_restore+0x6c>
...
   6c:       ld      r30,-16(r1)
   70:       blr

Unfortunately we still setup a local TOC (due to -mminimal-toc). Yet
another sign we should be moving to -mcmodel=medium.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/time: Fix some style issues
Anton Blanchard [Wed, 23 Nov 2011 20:07:21 +0000 (20:07 +0000)]
powerpc/time: Fix some style issues

Fix some formatting issues and use the DECREMENTER_MAX
define instead of 0x7fffffff.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/time: Remove unnecessary sanity check of decrementer expiration
Anton Blanchard [Wed, 23 Nov 2011 20:07:20 +0000 (20:07 +0000)]
powerpc/time: Remove unnecessary sanity check of decrementer expiration

The clockevents code uses max_delta_ns to avoid calling a
clockevent with too large a value.

Remove the redundant version of this in the timer_interrupt
code.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/time: Use clocksource_register_hz
Anton Blanchard [Wed, 23 Nov 2011 20:07:19 +0000 (20:07 +0000)]
powerpc/time: Use clocksource_register_hz

Use clocksource_register_hz which calculates the shift/mult
factors for us. Also remove the shift = 22 assumption in
vsyscall_update - thanks to Paul Mackerras and John Stultz for
catching that.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/time: Use clockevents_calc_mult_shift
Anton Blanchard [Wed, 23 Nov 2011 20:07:18 +0000 (20:07 +0000)]
powerpc/time: Use clockevents_calc_mult_shift

We can use clockevents_calc_mult_shift instead of doing all
the work ourselves.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agopowerpc/time: Handle wrapping of decrementer
Anton Blanchard [Wed, 23 Nov 2011 20:07:17 +0000 (20:07 +0000)]
powerpc/time: Handle wrapping of decrementer

When re-enabling interrupts we have code to handle edge sensitive
decrementers by resetting the decrementer to 1 whenever it is negative.
If interrupts were disabled long enough that the decrementer wrapped to
positive we do nothing. This means interrupts can be delayed for a long
time until it finally goes negative again.

While we hope interrupts are never be disabled long enough for the
decrementer to go positive, we have a very good test team that can
drive any kernel into the ground. The softlockup data we get back
from these fails could be seconds in the future, completely missing
the cause of the lockup.

We already keep track of the timebase of the next event so use that
to work out if we should trigger a decrementer exception.

Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: stable@kernel.org
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
13 years agodrivers/serial/ucc_uart.c: Add missing call to init UCC UART port timeout
Chuck Meade [Fri, 18 Jun 2010 13:22:26 +0000 (09:22 -0400)]
drivers/serial/ucc_uart.c: Add missing call to init UCC UART port timeout

The UCC UART driver is missing a call to uart_update_timeout().
Without this call, attempting to close the port after outputting large
amounts of data (i.e. using tty and uart buffering) results in long
timeouts before the port will actually be shut down.

For example, cat a large file to a UCC UART port.  With the current
driver, the port will stay open for 30 seconds after the last byte
of data is output.  But with this patch, the port is closed as
expected, just after the data has been output (tx fifos empty).

Signed-off-by: Chuck Meade <chuck@ThePTRGroup.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/fsl_msi: add support for the fsl, msi property in PCI nodes
Timur Tabi [Mon, 31 Oct 2011 22:06:35 +0000 (17:06 -0500)]
powerpc/fsl_msi: add support for the fsl, msi property in PCI nodes

On Freescale parts with multiple MSI controllers, the controllers are
combined into one "pool" of interrupts.  Whenever a device requests an MSI
interrupt, the next available interrupt from the pool is selected,
regardless of which MSI controller the interrupt is from.  This works
because each PCI bus has an ATMU to all of CCSR, so any PCI device can
access any MSI interrupt register.

The fsl,msi property is used to specify that a given PCI bus should only
use a specific MSI device.  This is necessary, for example, with the
Freescale hypervisor, because the MSI devices are assigned to specific
partitions.

Ideally, we'd like to be able to assign MSI devices to PCI busses within
the MSI or PCI layers.  However, there does not appear to be a mechanism
to do that.  Whenever the MSI layer wants to allocate an MSI interrupt to
a PCI device, it just calls arch_setup_msi_irqs().  It would be nice if we
could register an MSI device with a specific PCI bus.

So instead we remember the phandles of each MSI device, and we use that to
limit our search for an available interrupt.  Whenever we are asked to
allocate a new interrupt for a PCI device, we check the fsl,msi property
of the PCI bus for that device.  If it exists, then as we are looping over
all MSI devices, we skip the ones that don't have a matching phandle.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Renamed mpc85xx_common.c to common.c
Kumar Gala [Thu, 24 Nov 2011 07:07:08 +0000 (01:07 -0600)]
powerpc/85xx: Renamed mpc85xx_common.c to common.c

The file name is already scoped by the directory its in.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Additional consolidate of_platform_bus_probe calls
Kumar Gala [Thu, 24 Nov 2011 07:00:10 +0000 (01:00 -0600)]
powerpc/85xx: Additional consolidate of_platform_bus_probe calls

P1010RDB & P1023RDS can use the new mpc85xx_common_publish_devices().
Also move 'fsl,srio' into the list of standard buses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: consolidate of_platform_bus_probe calls
Dmitry Eremin-Solenikov [Thu, 17 Nov 2011 17:56:17 +0000 (21:56 +0400)]
powerpc/85xx: consolidate of_platform_bus_probe calls

85xx board files have a lot of duplication in *_publish_devices()/
*_declare_of_platform_devices() functions. Merge that into a single
function common to most of the boards.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: separate cpm2 pic init
Dmitry Eremin-Solenikov [Thu, 17 Nov 2011 17:56:16 +0000 (21:56 +0400)]
powerpc/85xx: separate cpm2 pic init

Separate handling of CPM2 PIC initialization to mpc85xx_cpm2_pic_init()
function.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/83xx: make mpc830x_rdb use mpc83xx_setup_pci
Dmitry Eremin-Solenikov [Thu, 17 Nov 2011 14:48:50 +0000 (18:48 +0400)]
powerpc/83xx: make mpc830x_rdb use mpc83xx_setup_pci

Traditionally mpc830x_rdb board file searched for mpc8308-pcie devices.
However both in-kernel dts from the beginning declared those pcie units
as compatible with mpc8314-pci, which is handled by mpc83xx_setup_pci().

Drop special handling for mpc8308 and use common function instead.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/83xx: merge PCI bridge additions
Dmitry Eremin-Solenikov [Thu, 17 Nov 2011 14:48:48 +0000 (18:48 +0400)]
powerpc/83xx: merge PCI bridge additions

Nearly all mpc83xx-based boards have a common piece of code - one that
loops over all pci/pcie bridges and registers them. Merge that code into
a special function common to all boards.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/83xx: consolidate of_platform_bus_probe calls
Dmitry Eremin-Solenikov [Thu, 17 Nov 2011 14:48:47 +0000 (18:48 +0400)]
powerpc/83xx: consolidate of_platform_bus_probe calls

83xx board files have a lot of duplication in
*_declare_of_platform_devices() functions. Merge that into a single
function common to most of the boards.

The only leftover is mpc834x_itx.c board file which explicitly asks for
fsl,pq2pro-localbus, as corresponding bindings don't provide
"simple-bus" compatibility in localbus node.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/83xx: consolidate init_IRQ functions
Dmitry Eremin-Solenikov [Fri, 22 Jul 2011 19:55:42 +0000 (23:55 +0400)]
powerpc/83xx: consolidate init_IRQ functions

On mpc83xx platform nearly all _init_IRQ functions look alike. They either
just setup ipic, or setup ipic and QE PIC. Separate this to special functions
to be either referenced from ppc_md, or called from board file.

Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: add pixis indirect mode device tree node
Timur Tabi [Fri, 18 Nov 2011 17:50:00 +0000 (11:50 -0600)]
powerpc/85xx: add pixis indirect mode device tree node

The Freescale P1022 has a unique pin muxing "feature" where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to memory-mapped devices like NOR flash and the pixis FPGA.

In this situation, the pixis supports "indirect mode", which allows access
to the pixis itself by reading/writing addresses on specific local bus
chip selects.  CS0 is used to select which pixis register to access, and
CS1 is used to read/write the value.

To support this, we introduce another board-control child node of the
localbus node that contains a 'reg' property for CS0 and CS1.  This will
produce the correct physical addresses for CS0 and CS1.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Add lbc suspend support for PM
Jia Hongtao [Mon, 21 Nov 2011 06:29:11 +0000 (14:29 +0800)]
powerpc/85xx: Add lbc suspend support for PM

Power supply for LBC registers is off when system go to deep-sleep state.
We save the values of registers before suspend and restore to registers
after resume.

We removed the last two reservation arrays from struct fsl_lbc_regs for
allocating less memory and minimizing the memcpy size.

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/fsl-pci: Don't hide resource for pci/e when configured as Agent/EP
Jason Jin [Fri, 28 Oct 2011 08:08:00 +0000 (16:08 +0800)]
powerpc/fsl-pci: Don't hide resource for pci/e when configured as Agent/EP

Current pci/pcie init code will hide the pci/pcie host resource.
But did not judge it is host/RC or agent/EP. If configured as
agent/EP, we should avoid hiding its resource in the host side.

In PCI system, the Programing Interface can be used to judge the
host/agent status:
Programing Interface = 0: host
Programing Interface = 1: Agent

In PCIE system, both the Programing Interface and Header type can
be used to judge the RC/EP status.
Header Type = 0: EP
Header Type = 1: RC

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Update SRIO device tree nodes
Kumar Gala [Thu, 17 Nov 2011 14:01:40 +0000 (08:01 -0600)]
powerpc/85xx: Update SRIO device tree nodes

Update all dts files that support SRIO controllers to match the new
fsl,srio device tree binding.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P5020DS device tree
Kumar Gala [Mon, 7 Nov 2011 16:22:36 +0000 (10:22 -0600)]
powerpc/85xx: Rework P5020DS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p5020-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P4080DS device trees
Kumar Gala [Fri, 4 Nov 2011 14:47:49 +0000 (09:47 -0500)]
powerpc/85xx: Rework P4080DS device trees

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p4080-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P3060QDS device tree
Kumar Gala [Wed, 9 Nov 2011 19:21:57 +0000 (13:21 -0600)]
powerpc/85xx: Rework P3060QDS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p3060-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Removed mpic interrupt-parent from sec nodes, just use top level
* Fixed l3-cache IRQs, we have 2 CPCs, so we should have IRQs for both

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P3041DS device tree
Kumar Gala [Mon, 7 Nov 2011 16:38:56 +0000 (10:38 -0600)]
powerpc/85xx: Rework P3041DS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p3041-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level
* Fixed some dcsr compatiable typo's from 'p43041' to 'p3041'

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P2041RDB device tree
Kumar Gala [Mon, 7 Nov 2011 16:58:28 +0000 (10:58 -0600)]
powerpc/85xx: Rework P2041RDB device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Adding of MPIC timer blocks
* Dropping "fsl,p2041-IP..." from compatibles for standard blocks
* Removed mpic interrupt-parent from dcsr-epu node, just use top level

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P2020RDB device tree
Kumar Gala [Fri, 4 Nov 2011 05:48:57 +0000 (00:48 -0500)]
powerpc/85xx: Rework P2020RDB device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and
  moved PCI device IRQs down to virtual bridge level
* Updated spi node to new espi binding specification
* Renamed 'sdhci' node to 'sdhc'
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
 'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Fixed wrong reg offsets for mdio nodes associated with etsec2 &
* etsec3
* Dropping "fsl,p2020-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P2020DS device tree
Kumar Gala [Wed, 26 Oct 2011 13:35:24 +0000 (08:35 -0500)]
powerpc/85xx: Rework P2020DS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Updated spi node to new espi binding specification
* Renamed 'sdhci' node to 'sdhc'
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
 'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Fixed wrong reg offsets for mdio nodes associated with etsec2 & etsec3
* Dropping "fsl,p2020-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P1023RDS device tree
Kumar Gala [Wed, 9 Nov 2011 20:53:33 +0000 (14:53 -0600)]
powerpc/85xx: Rework P1023RDS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Dropping "fsl,p1023-IP..." from compatibles for standard blocks
* Removed incorrect power/pmc node, there are no etsec on P1023

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P1022DS device tree
Kumar Gala [Wed, 26 Oct 2011 06:01:54 +0000 (01:01 -0500)]
powerpc/85xx: Rework P1022DS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
  'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Updated spi node to new espi binding specification
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Added usb node for 2nd usb controller
* Dropping "fsl,p1022-IP..." from compatibles for standard blocks
* Fixed bug in local bus range node for CS2, was maping to
  0x0 0x0xffa00000 instead of 0xf 0xffa00000
* Fixed localbus reg property should have been 0xf 0xffe05000

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Tested-by: Timur Tabi <timur@freescale.com>
13 years agopowerpc/85xx: Rework P1021MDS device tree
Kumar Gala [Wed, 2 Nov 2011 15:15:30 +0000 (10:15 -0500)]
powerpc/85xx: Rework P1021MDS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and
  moved PCI device IRQs down to virtual bridge level
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Added usb node for 2nd usb controller
* Dropping "fsl,p1021-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Add P1020RDB 36-bit address map device tree
Kumar Gala [Fri, 21 Oct 2011 04:46:12 +0000 (23:46 -0500)]
powerpc/85xx: Add P1020RDB 36-bit address map device tree

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P1020RDB device tree
Kumar Gala [Thu, 20 Oct 2011 07:21:09 +0000 (02:21 -0500)]
powerpc/85xx: Rework P1020RDB device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Dropping "fsl,p1020-IP..." from compatibles for standard blocks
* Fixed PCIe interrupt-maps to have proper number of cells
* Added mdio node for etsec@26000
* Added usb node for 2nd usb controller

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Add a P1010RDB 36-bit address map device tree
Kumar Gala [Wed, 26 Oct 2011 05:10:58 +0000 (00:10 -0500)]
powerpc/85xx: Add a P1010RDB 36-bit address map device tree

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Add crypto engine to P1010 SoC device tree
Kumar Gala [Wed, 26 Oct 2011 04:29:47 +0000 (23:29 -0500)]
powerpc/85xx: Add crypto engine to P1010 SoC device tree

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Add RTC to P1010RDB device tree
Kumar Gala [Wed, 26 Oct 2011 04:29:27 +0000 (23:29 -0500)]
powerpc/85xx: Add RTC to P1010RDB device tree

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework P1010RDB and P1010 device tree
Kumar Gala [Sat, 22 Oct 2011 21:58:40 +0000 (16:58 -0500)]
powerpc/85xx: Rework P1010RDB and P1010 device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Dropping "fsl,p1010-IP..." from compatibles for standard blocks
* PCI interrupt map - wrong IRQs for PCI-0 controller
* SDHC interrupt sense was wrong

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework MPC8572DS device tree
Kumar Gala [Thu, 3 Nov 2011 06:07:56 +0000 (01:07 -0500)]
powerpc/85xx: Rework MPC8572DS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Reworked PCIe nodes to allow supportin IRQs for controller (errors) and
  moved PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Added GPIO controller node to MPC8572 SoC template
* Dropping "fsl,mpc8572-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework MPC8569MDS device tree
Kumar Gala [Wed, 9 Nov 2011 22:26:13 +0000 (16:26 -0600)]
powerpc/85xx: Rework MPC8569MDS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Dropping "fsl,mpc8569-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework MPC8568MDS device tree
Kumar Gala [Thu, 10 Nov 2011 14:05:16 +0000 (08:05 -0600)]
powerpc/85xx: Rework MPC8568MDS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Dropping "fsl,mpc8568-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework MPC8548CDS device trees
Kumar Gala [Fri, 4 Nov 2011 05:26:10 +0000 (00:26 -0500)]
powerpc/85xx: Rework MPC8548CDS device trees

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Moved mdio nodes up one level instead of under tsec nodes
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Removed CPU properties setup by u-boot to match other .dts
* Added localbus node, but no chipselect details at this point
* Added MPIC / PCIe msi node
* Dropping "fsl,mpc8548-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework MPC8544DS device tree
Kumar Gala [Fri, 4 Nov 2011 04:24:12 +0000 (23:24 -0500)]
powerpc/85xx: Rework MPC8544DS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to a standard 2 #address-cells & #size-cells at top-level
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Removed CPU properties setup by u-boot to match other .dts
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Updated ethernet 'model' to 'eTSEC' as that's what on MPC8544
* Dropping "fsl,mpc8544-IP..." from compatibles for standard blocks

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework MPC8536DS device trees
Kumar Gala [Thu, 3 Nov 2011 21:16:07 +0000 (16:16 -0500)]
powerpc/85xx: Rework MPC8536DS device trees

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
* and moved
  PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Added GPIO controller node to MPC8536 SoC template
  [ marked as MPC8572 compatiable to get errata handling that applies ]
* Added missing cache-line-size & cache-size properties missing from
  L2-cache node
* Added IP level IEEE 1588 / ptp timer node

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: create dts components to build up an SoC
Kumar Gala [Thu, 20 Oct 2011 07:18:53 +0000 (02:18 -0500)]
powerpc/85xx: create dts components to build up an SoC

Introduce some common components that we can utilize to build up the
various PQ3/85xx device trees.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: p1020si.dtsi update interrupt handling
Kumar Gala [Wed, 19 Oct 2011 15:59:21 +0000 (10:59 -0500)]
powerpc/85xx: p1020si.dtsi update interrupt handling

* set interrupt-parent at root so its not duplicate in every node
* Add mpic timers
* Move to 4-prop cells for mpic timer

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Add ethernet magic packet property to P1020 device tree
Kumar Gala [Thu, 20 Oct 2011 04:44:06 +0000 (23:44 -0500)]
powerpc/85xx: Add ethernet magic packet property to P1020 device tree

All eTSEC2 controllers support waking on magic packet so fixup device
tree to report that.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Update P1020 SEC3.3 node to match actual SoC HW
Kumar Gala [Thu, 20 Oct 2011 04:36:14 +0000 (23:36 -0500)]
powerpc/85xx: Update P1020 SEC3.3 node to match actual SoC HW

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Update SPI binding to match binding spec for P1020RDB
Kumar Gala [Thu, 20 Oct 2011 04:16:01 +0000 (23:16 -0500)]
powerpc/85xx: Update SPI binding to match binding spec for P1020RDB

The SPI node is out of date with regards to the binding for fsl-espi and
driver support.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Rework PCI nodes on P1020RDB
Kumar Gala [Wed, 19 Oct 2011 15:58:05 +0000 (10:58 -0500)]
powerpc/85xx: Rework PCI nodes on P1020RDB

* Move SoC specific details like irq mapping to SoC dtsi
* Update interrupt property to cover both error interrupt and PCIe
  runtime interrupts

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Simplify P1020RDB CAMP dts using includes
Kumar Gala [Wed, 19 Oct 2011 15:53:44 +0000 (10:53 -0500)]
powerpc/85xx: Simplify P1020RDB CAMP dts using includes

If we include the p1020rdb.dts instead of p1020si.dts we greatly reduce
duplication and maintenance.  We can just list which devices are
disabled for the given core and mpic protected sources.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/8xxx: Update device tree bus probe for new RapidIO node binding
Kai Jiang [Sat, 12 Nov 2011 12:02:31 +0000 (20:02 +0800)]
powerpc/8xxx: Update device tree bus probe for new RapidIO node binding

Update of_platform_bus_probe() RapidIO node to be compitable with
new RapidIO dts compatible property.

Signed-off-by: Kai Jiang <Kai.Jiang@freescale.com>
Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agofsl-rio: Add two ports and rapidio message units support
Liu Gang [Sat, 12 Nov 2011 12:02:29 +0000 (20:02 +0800)]
fsl-rio: Add two ports and rapidio message units support

Usually, freescale rapidio endpoint can support one or two 1x or 4X
LP-Serial link interfaces, and rapidio message transactions can be
implemented by two message units. This adds the support of two
rapidio ports and initializes message unit 0 and message unit 1. And
these ports and message units can work simultaneously.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agofsl-rio: Split rio driver into two parts, RapidIO endpoint and message unit
Liu Gang [Sat, 12 Nov 2011 12:02:28 +0000 (20:02 +0800)]
fsl-rio: Split rio driver into two parts, RapidIO endpoint and message unit

The Freescale PowerPC RapidIO controller consists of a RapidIO endpoint and
a RapidIO message unit(RMU). Or use RapidIO message manager(RMan) to
replace the RMU in DPAA architecture. Therefore, we should split the code
into two function modules according to the hardware architecture. Add new
struct for RMU module, and new initialization function to set up RMU
module. This policy is very conducive to adding new module like RMan, or
adding multi-ports or message units support.

Signed-off-by: Lian Minghuan <Minghuan.Lian@freescale.com>
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/fsl: Document rapidio node binding-information
Liu Gang [Sat, 12 Nov 2011 12:02:32 +0000 (20:02 +0800)]
powerpc/fsl: Document rapidio node binding-information

This document is created for powerpc rapidio and rmu nodes in dts file.
These nodes can support two rapidio ports and message units. In addition,
It explicates the properties and gives examples about rapidio and rmu nodes.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agoarch/powerpc/sysdev/ehv_pic.c: add missing kfree
Julia Lawall [Mon, 8 Aug 2011 11:18:02 +0000 (13:18 +0200)]
arch/powerpc/sysdev/ehv_pic.c: add missing kfree

At this point, ehv_pic has been allocated but not stored anywhere, so it
should be freed before leaving the function.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@exists@
local idexpression x;
statement S,S1;
expression E;
identifier fl;
expression *ptr != NULL;
@@

x = \(kmalloc\|kzalloc\|kcalloc\)(...);
...
if (x == NULL) S
<... when != x
     when != if (...) { <+...kfree(x)...+> }
     when any
     when != true x == NULL
x->fl
...>
(
if (x == NULL) S1
|
if (...) { ... when != x
               when forall
(
 return \(0\|<+...x...+>\|ptr\);
|
* return ...;
)
}
)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/fsl-lbc: Fix for fsl_upm
Alexandre Rusev [Thu, 27 Oct 2011 14:18:37 +0000 (18:18 +0400)]
powerpc/fsl-lbc: Fix for fsl_upm

If Freescale LBC driver fails to initialise itself from device tree, then
internal structure is freed only but not NULL-fied.  As result functions
fsl_lbc_find() after checking the structure is not NULL are trying to
access device registers.

Signed-off-by: Alexandre Rusev <arusev@dev.rtsoft.ru>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agodrivers/edac/mpc85xx_edac.c: fix memory controller compatible for edac
Shaohui Xie [Tue, 15 Nov 2011 22:52:22 +0000 (14:52 -0800)]
drivers/edac/mpc85xx_edac.c: fix memory controller compatible for edac

compatible in dts has been changed, so the driver needs to be updated
accordingly.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/qe: Fixup QE_General4 errata
Joakim Tjernlund [Tue, 23 Aug 2011 12:30:05 +0000 (14:30 +0200)]
powerpc/qe: Fixup QE_General4 errata

QE_General4 should only round up the divisor iff divisor is > 3.
Rounding up lower divisors makes the error too big, causing USB
on MPC832x to fail.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/85xx: Fix compile error on p3060_qds.c
Kumar Gala [Sun, 20 Nov 2011 15:58:11 +0000 (09:58 -0600)]
powerpc/85xx: Fix compile error on p3060_qds.c

arch/powerpc/platforms/85xx/p3060_qds.c: In function '__machine_initcall_p3060_qds_declare_of_platform_devices':
arch/powerpc/platforms/85xx/p3060_qds.c:73:1: error: implicit declaration of function 'declare_of_platform_devices'

declare_of_platform_devices should have been corenet_ds_publish_devices.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/p3060qds: Fix select of 'MPC8xxx_GPIO'
Paul Bolle [Sat, 12 Nov 2011 23:50:30 +0000 (00:50 +0100)]
powerpc/p3060qds: Fix select of 'MPC8xxx_GPIO'

The driver for the Freescale P3060 QDS got added by commit 96cc017c5b
("[...] Add support for P3060QDS board"). Its Kconfig entry selects
MPC8xxx_GPIO. But at the time that driver got added MPC8xxx_GPIO was
already renamed to GPIO_MPC8XXX, by commit c68308dd50c ("gpio: move
mpc8xxx/512x gpio driver to drivers/gpio").

So make this driver select GPIO_MPC8XXX.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agopowerpc/p1023: set IRQ[4:6,11] to active-high level sensitive for PCIe
Roy Zang [Mon, 7 Nov 2011 08:32:58 +0000 (16:32 +0800)]
powerpc/p1023: set IRQ[4:6,11] to active-high level sensitive for PCIe

P1023 external IRQ[4:6, 11] are not pin out, but the interrupts are
utilized by the PCIe controllers.  As they are not exposed as pins we
need to set them as active-high (internal to the SoC these interrupts
are pulled down).

IRQs[0:3,7:10] are pulled up on the board so we have them set as
active-low.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
13 years agoLinux 3.2-rc3
Linus Torvalds [Thu, 24 Nov 2011 04:20:28 +0000 (20:20 -0800)]
Linux 3.2-rc3

13 years agoMerge git://github.com/rustyrussell/linux
Linus Torvalds [Thu, 24 Nov 2011 04:19:31 +0000 (20:19 -0800)]
Merge git://github.com/rustyrussell/linux

* git://github.com/rustyrussell/linux:
  virtio-pci: make reset operation safer
  virtio-mmio: Correct the name of the guest features selector
  virtio: add HAS_IOMEM dependency to MMIO platform bus driver

13 years agovirtio-pci: make reset operation safer
Michael S. Tsirkin [Thu, 17 Nov 2011 15:41:15 +0000 (17:41 +0200)]
virtio-pci: make reset operation safer

virtio pci device reset actually just does an I/O
write, which in PCI is really posted, that is it
can complete on CPU before the device has received it.

Further, interrupts might have been pending on
another CPU, so device callback might get invoked after reset.

This conflicts with how drivers use reset, which is typically:
reset
unregister
a callback running after reset completed can race with
unregister, potentially leading to use after free bugs.

Fix by flushing out the write, and flushing pending interrupts.

This assumes that device is never reset from
its vq/config callbacks, or in parallel with being
added/removed, document this assumption.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
13 years agovirtio-mmio: Correct the name of the guest features selector
Sasha Levin [Tue, 15 Nov 2011 14:17:18 +0000 (16:17 +0200)]
virtio-mmio: Correct the name of the guest features selector

Guest features selector spelling mistake.

Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: virtualization@lists.linux-foundation.org
Signed-off-by: Sasha Levin <levinsasha928@gmail.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
13 years agovirtio: add HAS_IOMEM dependency to MMIO platform bus driver
Heiko Carstens [Tue, 15 Nov 2011 09:13:24 +0000 (10:13 +0100)]
virtio: add HAS_IOMEM dependency to MMIO platform bus driver

Fix this compile error on s390:

  CC [M]  drivers/virtio/virtio_mmio.o
drivers/virtio/virtio_mmio.c: In function 'vm_get_features':
drivers/virtio/virtio_mmio.c:107:2: error: implicit declaration of function 'writel'

Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
13 years agoMerge branch 'upstream-linus' of git://github.com/jgarzik/libata-dev
Linus Torvalds [Thu, 24 Nov 2011 01:26:22 +0000 (17:26 -0800)]
Merge branch 'upstream-linus' of git://github.com/jgarzik/libata-dev

* 'upstream-linus' of git://github.com/jgarzik/libata-dev:
  libata: fix build without BMDMA
  [libata] ahci_platform: fix DT probing

13 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci
Linus Torvalds [Wed, 23 Nov 2011 22:58:46 +0000 (14:58 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/jbarnes/pci

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci:
  PCI hotplug: shpchp: don't blindly claim non-AMD 0x7450 device IDs
  PCI: pciehp: wait 100 ms after Link Training check
  PCI: pciehp: wait 1000 ms before Link Training check
  PCI: pciehp: Retrieve link speed after link is trained
  PCI: Let PCI_PRI depend on PCI
  PCI: Fix compile errors with PCI_ATS and !PCI_IOV
  PCI / ACPI: Make acpiphp ignore root bridges using PCIe native hotplug

13 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tyhicks...
Linus Torvalds [Wed, 23 Nov 2011 22:28:13 +0000 (14:28 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/tyhicks/ecryptfs

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tyhicks/ecryptfs:
  eCryptfs: Extend array bounds for all filename chars
  eCryptfs: Flush file in vma close
  eCryptfs: Prevent file create race condition

13 years agoeCryptfs: Extend array bounds for all filename chars
Tyler Hicks [Wed, 23 Nov 2011 17:31:24 +0000 (11:31 -0600)]
eCryptfs: Extend array bounds for all filename chars

From mhalcrow's original commit message:

    Characters with ASCII values greater than the size of
    filename_rev_map[] are valid filename characters.
    ecryptfs_decode_from_filename() will access kernel memory beyond
    that array, and ecryptfs_parse_tag_70_packet() will then decrypt
    those characters. The attacker, using the FNEK of the crafted file,
    can then re-encrypt the characters to reveal the kernel memory past
    the end of the filename_rev_map[] array. I expect low security
    impact since this array is statically allocated in the text area,
    and the amount of memory past the array that is accessible is
    limited by the largest possible ASCII filename character.

This patch solves the issue reported by mhalcrow but with an
implementation suggested by Linus to simply extend the length of
filename_rev_map[] to 256. Characters greater than 0x7A are mapped to
0x00, which is how invalid characters less than 0x7A were previously
being handled.

Signed-off-by: Tyler Hicks <tyhicks@canonical.com>
Reported-by: Michael Halcrow <mhalcrow@google.com>
Cc: stable@kernel.org
13 years agoeCryptfs: Flush file in vma close
Tyler Hicks [Mon, 21 Nov 2011 23:31:29 +0000 (17:31 -0600)]
eCryptfs: Flush file in vma close

Dirty pages weren't being written back when an mmap'ed eCryptfs file was
closed before the mapping was unmapped. Since f_ops->flush() is not
called by the munmap() path, the lower file was simply being released.
This patch flushes the eCryptfs file in the vm_ops->close() path.

https://launchpad.net/bugs/870326

Signed-off-by: Tyler Hicks <tyhicks@canonical.com>
Cc: stable@kernel.org [2.6.39+]