Igor Grinberg [Tue, 21 Oct 2014 13:39:47 +0000 (16:39 +0300)]
omap3: cm-t35: remove enable_gpmc_cs_config()
The gpmc_init() function already calls enable_gpmc_cs_config() for chip
select 0. Although the bus width is configured for 16 bit, it gets
reconfigured correctly in the omap_gpmc driver later.
Remove the enable_gpmc_cs_config() function call and the associated
gpmc_nand_config[] array.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Igor Grinberg [Tue, 21 Oct 2014 13:39:46 +0000 (16:39 +0300)]
omap3: cm-t35: use define for mmc wp gpio
Switch to using define for MMC WP GPIO instead of a magic number.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Igor Grinberg [Tue, 21 Oct 2014 13:39:45 +0000 (16:39 +0300)]
omap3: Kconfig: fix the cm-t35 board option prompt
The cm-t35 board support covers both cm-t3530 and cm-t3730 boards.
Mention both boards in the Kconfig option prompt.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tom Rini [Thu, 9 Oct 2014 15:01:16 +0000 (11:01 -0400)]
am335x_evm: Correct "raw" portions of DFU alt into
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Wed, 8 Oct 2014 21:10:27 +0000 (17:10 -0400)]
am335x_boneblack: Only modify NAND/NOR/MMC1 pinmux on BBB in boneblack builds.
In the case of Beaglebone Black we only want to set the NAND or NOR cape
pinmux when the config has been specifically modified by the user for
this non-default case. Make the default be to set the MMC1 (eMMC)
pinmux. We don't need similar changes for Beaglebone White as there is
nothing on MMC1 by default there.
Signed-off-by: Tom Rini <trini@ti.com>
Felipe Balbi [Tue, 23 Sep 2014 15:44:18 +0000 (10:44 -0500)]
arm: am43xx: switch over to CONFIG_ENV_IS_IN_FAT
By using CONFIG_ENV_IS_IN_FAT it's far easier
to have a private, minimal environment for e.g.
booting off of network or mounting rootfs on NFS
without having to modify the configuration header.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Felipe Balbi [Tue, 23 Sep 2014 15:44:17 +0000 (10:44 -0500)]
common: Makefile: allow for spl builds with env_fat
If CONFIG_SPL_BUILD and CONFIG_ENV_IS_IN_FAT are
defined, u-boot spl will fail to build. Fix that.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Stefan Herbrechtsmeier [Tue, 16 Sep 2014 15:51:09 +0000 (17:51 +0200)]
omap3: overo: Add usb host support
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Stefan Herbrechtsmeier [Tue, 16 Sep 2014 15:51:08 +0000 (17:51 +0200)]
omap3: overo: Separate module and expansion board MUX configuration
Separate overo module and expansion board MUX configuration. This allows
an foreign expansion board to use the boot loader without any adaption.
It only needs to save the expansion name in the EEPROM to load a
specific device tree.
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Stefan Herbrechtsmeier [Tue, 16 Sep 2014 15:51:07 +0000 (17:51 +0200)]
omap3: overo: Move ethernet setup to board_eth_init function
Move ethernet setup to the board_eth_init function and select
the available network devices via expansion id.
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Stefan Herbrechtsmeier [Tue, 16 Sep 2014 15:51:06 +0000 (17:51 +0200)]
omap3: overo: Call bootm only after successful nand read
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Hao Zhang [Wed, 22 Oct 2014 14:47:59 +0000 (17:47 +0300)]
ARM: keystone: cmd_ddr3: add ddr3 commands to test ddr
Add ddr3 commands:
test <start_addr in hex> <end_addr in hex> - test DDR from start\n
address to end address\n
ddr compare <start_addr in hex> <end_addr in hex> <size in hex> -\n
compare DDR data of (size) bytes from start address to end
address\n
ddr ecc_err <addr in hex> <bit_err in hex> - generate bit errors\n
in DDR data at <addr>, the command will read a 32-bit data\n
from <addr>, and write (data ^ bit_err) back to <addr>\n
Delete CONFIG_MAX_UBOOT_MEM_SIZE, as it was supposed to be used
for ddr3 commands and for now it's not needed any more.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Vitaly Andrianov [Wed, 22 Oct 2014 14:47:58 +0000 (17:47 +0300)]
keystone2: ecc: add ddr3 error detection and correction support
This patch adds the DDR3 ECC support to enable ECC in the DDR3
EMIF controller for Keystone II devices.
By default, ECC will only be enabled if RMW is supported in the
DDR EMIF controller. The entire DDR memory will be scrubbed to
zero using an EDMA channel after ECC is enabled and before
u-boot is re-located to DDR memory.
An ecc_test environment variable is added for ECC testing.
If ecc_test is set to 0, a detection of 2-bit error will reset
the device, if ecc_test is set to 1, 2-bit error detection
will not reset the device, user can still boot the kernel to
check the ECC error handling in kernel.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Vitaly Andrianov [Wed, 22 Oct 2014 14:47:57 +0000 (17:47 +0300)]
ARM: keystone: msmc: extend functionality of SES
Add functions to set/get SES PMAX values of Pivilege ID pair.
Also add msmc module definitions.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 22 Oct 2014 14:47:56 +0000 (17:47 +0300)]
dma: ti-edma3: introduce edma3 driver
The EDMA3 controller’s primary purpose is to service data transfers
that you program between two memory-mapped slave endpoints on the device.
Typical usage includes, but is not limited to the following:
- Servicing software-driven paging transfers (e.g., transfers from external
memory, such as SDRAM to internal device memory, such as DSP L2 SRAM)
- Servicing event-driven peripherals, such as a serial port
- Performing sorting or sub-frame extraction of various data structures
- Offloading data transfers from the main device DSP(s)
- See the device-specific data manual for specific peripherals that are
accessible via the EDMA3 controller
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Fri, 17 Oct 2014 18:01:17 +0000 (21:01 +0300)]
board: k2e_evm: add network support
This patch adds network support code and enables keystone_net
driver usage for k2e_evm evaluation board.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 18:01:16 +0000 (21:01 +0300)]
ARM: keystone: clock: add support for K2E SoCs
For K2E and K2L SoCs clock output from PASS PLL has to be enabled
after NETCP domain and PA module are enabled. So create new function
for that and call it after PA module is enabled.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 18:01:15 +0000 (21:01 +0300)]
net: keystone_net: increase PHY auto negotiate time
The new Marvel PHY (
88E1514) used on K2L/K2E EVM requires longer time
to auto negotiate with SoC's SGMII port.
It can take about 3 sec to up the PHY after reset, so add code to
expose sgmii auto negotiation waiting process.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 18:01:14 +0000 (21:01 +0300)]
net: keystone_net: add Keystone2 K2E SoC support
The Keystone2 Edison SoC uses the same keystone net driver.
This patch adds opportunity to use it by K2E SoCs.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 18:01:13 +0000 (21:01 +0300)]
net: keystone_serdes: add keystone K2E SoC support
Keystone2 Edison SoC uses the same keystone SerDes driver.
This patch adds support for K2E SoCs.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 18:01:12 +0000 (21:01 +0300)]
ARM: keystone2: keysonte_nav: add support for K2E SoC
Keystone2 Edison SoC uses the same keystone navigator, but
uses different NETCP PktDMA definitions. This patch adds
required definitions.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 17:44:36 +0000 (20:44 +0300)]
net: keystone_net: use general get link function
The phy framework has function to get link, so use it
instead of own implementation.
There is no reason to check SGMII link while sending each
packet, phy link is enough. Check SGMII link only while
ethernet open.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 17:44:35 +0000 (20:44 +0300)]
net: keystone_net: register eth PHYs on MDIO bus
As MDIO bus has been added we can register PHYs with it.
After registration, the PHY driver will be probed according to the
hardware on board.
Startup PHY at the ethernet open.
Use phy_startup() instead of keystone_get_link_status() when eth open,
as it verifies PHY link inside and SGMII link is checked before.
For K2HK evm PHY configuration at init was absent, so don't enable
phy config at init for k2hk evm.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 17:44:34 +0000 (20:44 +0300)]
net: keystone_net: register MDIO bus
Currently MDIO framework is not used to configure Ethernet PHY.
As result some of already implemented functions are duplicated.
So register MDIO bus in order to use it. On that stage it's just
registered, it'll be used as we start to use PHY framework.
Use mdio bus read/write/reset functions in the driver.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 17:44:33 +0000 (20:44 +0300)]
net: keystone_net: use mdio_reset function
Don't use mdio_enable twice while eth open. Also rename it to
keystone2_mdio_reset as more appropriate name.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 17 Oct 2014 17:44:32 +0000 (20:44 +0300)]
net: phy: print a number of phy that is not found
In case when several Ethernet ports are supported it's
convenient to see the number of phy that is not found.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 22 Oct 2014 14:18:24 +0000 (17:18 +0300)]
soc: keystone_serdes: generalize configuration mechanism
The cmu, comlane, lane configuration mechanism are similar for sub
systems as well such as PCI or sRIO, but they have different values
based on input clock and output bus rate. According to this compact
driver to simplify adding different configuration settings based
on clock and rate.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 14:18:23 +0000 (17:18 +0300)]
soc: keystone_serdes: generalize to be used by other sub systems
SerDes driver is used by other sub systems like PCI, sRIO etc.
So modify it to be more general. The SerDes driver provides common
API's that can also be extended for other peripherals SerDes
configurations.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 14:18:22 +0000 (17:18 +0300)]
soc: keystone_serdes: enhance to use cmu/comlane/lane specific configurations
Enhance the driver to use cmu/comlane/lane specific configurations
instead of 1 big array of configuration.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 22 Oct 2014 14:18:21 +0000 (17:18 +0300)]
soc: keystone_serdes: create a separate SGMII SerDes driver
This patch split the Keystone II SGMII SerDes related code from
Ethernet driver and create a separate SGMII SerDes driver.
The SerDes driver can be used by others keystone subsystems
like PCI, sRIO, so move it to driver/soc/keystone directory.
Add soc specific drivers directory like in the Linux kernel.
It is going to be used by keysotone soc specific drivers.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Mon, 29 Sep 2014 19:17:24 +0000 (22:17 +0300)]
net: keystone_net: remove redundant code from keystone_net.c
Remove unused tx_send_loop variable.
Removes duplicated get_link_status() call from the
keystone2_eth_send_packet().
The emac_gigabit_enable() is called at opening Ethernet and there is no
need to enable it on sending each packet. So remove that call
from keystone2_eth_send_packet() as well.
The calling of power/clock up functions are mostly the responsibility
of SoC/board code, so move these functions to appropriate place.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Vitaly Andrianov [Mon, 29 Sep 2014 19:17:23 +0000 (22:17 +0300)]
net: keystone_net: increase MDIO clock frequency
With MAC_PHY sgmii configuration, u-boot checks PHY link status before
sending each packet. Increasing MDIO frequency increases overall tftp
speed. We set it to maximum 2.5MHz.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Mon, 29 Sep 2014 19:17:22 +0000 (22:17 +0300)]
net: keystone_net: move header file from arch to ti-common
The header file for the driver should be in correct place.
So move it to "arch/arm/include/asm/ti-common/keystone_net.h"
and correct driver's external dependencies. At the same time
align and correct some definitions.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Mon, 29 Sep 2014 19:17:21 +0000 (22:17 +0300)]
net: keystone_net: add support for NETCP v1.5
Currently the network driver is used only by k2hk evm board.
The k2hk SoC contains NETCP v1.0, but Keystone2 SoCs, like k2e
contain NETCP v1.5. So driver should be able to work with such kind
of NETCP. This commit adds this opportunity. The main difference in
masks and some registers, the logic is the same, so only definitions
should be changed. To differentiate between versions add KS2_NETCP_V1_0
and KS2_NETCP_V1_5. Also remove unused and no more needed defines.
The port number is specific for each board so move this parameter to
configuration.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Mon, 29 Sep 2014 19:17:20 +0000 (22:17 +0300)]
net: keystone_net: remove SoC specific emac_regs structure
This patch removes K2HK SOC specifc emac_regs structure, it uses
soc specific register offset to keep the network driver common across
all the Keystone II EVMs.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 26 Sep 2014 12:42:30 +0000 (15:42 +0300)]
configs: ks2_evm: enable misc_init_r
Currently keystone has misc_init_r where all DSPS are turned off
by default. So enable this function.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 13:32:33 +0000 (16:32 +0300)]
keystone2: k2l-evm: add board support
This patch adds Keystone II Lammar (K2L) EVM board support.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 13:32:32 +0000 (16:32 +0300)]
keystone2: enable OSR clock domain for K2L SoC
This patches enables the On-chip Shared Ram clock domain for K2L SoC.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 13:32:31 +0000 (16:32 +0300)]
ARM: keystone2: spl: move board specific code
The initialization of PLLs is a part of board specific code, so
move it appropriate places.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 13:32:30 +0000 (16:32 +0300)]
keystone2: msmc: add MSMC cache coherency support for K2L SOC
This patch adds Keystone II Lamar (K2L) SoC specific definitions
to support MSMC cache coherency.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 13:32:29 +0000 (16:32 +0300)]
keystone2: clock: add K2L clock definitions and commands
This patch adds clock definitions and commands to support Keystone II
K2L SOC.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 22 Oct 2014 13:32:28 +0000 (16:32 +0300)]
ARM: keystone2: add K2L device hardware definitions
This patch adds hardware definitions specific to Keystone II
Lamar (K2L) SoC.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 22 Oct 2014 13:01:28 +0000 (16:01 +0300)]
ARM: cmd_clock: generalize command usage description
The usage description of commands refers to headers of sources,
that is not correct. This patch is intended to fix it.
Also generalize code in order to reduce SoC dependent #ifdefs.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
WingMan Kwok [Fri, 5 Sep 2014 19:26:23 +0000 (22:26 +0300)]
keystone: usb: add support of usb xhci
Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 5 Sep 2014 16:02:48 +0000 (19:02 +0300)]
dma: keystone_nav: generalize driver usage
The keystone_nav driver is general driver intended to be used for
working with queue manager and pktdma for different IPs like NETCP,
AIF, FFTC, etc. So the it's API shouldn't be named like it works only
with one of them, it should be general names. The names with prefix
like netcp_* rather do for drivers/net/keystone_net.c driver. So it's
good to generalize this driver to be used for different IP's and
delete confusion with real NETCP driver.
The current netcp_* functions of keystone navigator can be used for
other settings of pktdma, not only for NETCP. The API of this driver
is used by the keystone_net driver to work with NETCP, so net driver
also should be corrected. For convenience collect pkdma
configurations in drivers/dma/keystone_nav_cfg.c.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 5 Sep 2014 16:02:47 +0000 (19:02 +0300)]
dma: keystone_nav: move keystone_nav driver to driver/dma/
The keystone_nav is used by drivers/net/keystone_net.c driver to
send and receive packets, but currently it's placed at keystone
arch sources. So it should be in the drivers directory also.
It's separate driver that can be used for sending and receiving
pktdma packets by others drivers also.
This patch just move this driver to appropriate directory and
doesn't add any functional changes.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 5 Sep 2014 16:02:46 +0000 (19:02 +0300)]
keystone2: keystone_nav: don't use hard addresses in netcp_pktdma
Use definitions in netcp_pktdma instead direct addresses.
The definitions can be set specifically for SoC, so there
is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 5 Sep 2014 16:02:45 +0000 (19:02 +0300)]
keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically
for SoC, so there is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Tom Rini [Wed, 22 Oct 2014 17:51:45 +0000 (13:51 -0400)]
Merge git://git.denx.de/u-boot-dm
Simon Glass [Mon, 22 Sep 2014 23:30:58 +0000 (17:30 -0600)]
dm: serial: Support driver model in pl01x driver
Add driver model support in this driver, using platform data provided by
the board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Simon Glass [Mon, 22 Sep 2014 23:30:57 +0000 (17:30 -0600)]
dm: serial: Tidy up the pl01x driver
Adjust the driver so that leaf functions take a pointer to the serial port
register base. Put all the global configuration in the init function, and
use the same settings from then on.
This makes it much easier to move to driver model without duplicating the
code, since with driver model we use platform data rather than global
settings.
The driver is compiled with either the CONFIG_PL010_SERIAL or
CONFIG_PL011_SERIAL option and this determines the uart type. With driver
model this needs to come in from platform data, so create a new
CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the
driver to support both peripheral variants.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Simon Glass [Mon, 22 Sep 2014 23:30:56 +0000 (17:30 -0600)]
dm: rpi: Convert GPIO driver to driver model
Convert the BCM2835 GPIO driver to use driver model, and switch over
Raspberry Pi to use this, since it is the only board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Simon Glass [Sat, 4 Oct 2014 17:29:37 +0000 (11:29 -0600)]
dm: core: Add support for simple-bus
Add a driver for the simple-bus nodes, which allows devices within these
nodes to be bound.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 2 Oct 2014 01:57:28 +0000 (19:57 -0600)]
dm: imx: Move cm_fx6 to use driver model for serial and GPIO
Now that serial and GPIO are available for iMX.6, move cm_fx6 over as an
example.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
Simon Glass [Thu, 2 Oct 2014 01:57:27 +0000 (19:57 -0600)]
dm: imx: serial: Support driver model in the MXC serial driver
Add driver model support with this driver. Boards which use this driver
should define platform data in their board files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 2 Oct 2014 01:57:26 +0000 (19:57 -0600)]
dm: imx: gpio: Support driver model in MXC gpio driver
Add driver model support with this driver. In this case the platform data
is in the driver. It would be better to put this into an SOC-specific file,
but this is best attempted when more boards are moved over to use driver
model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Thu, 2 Oct 2014 14:17:24 +0000 (17:17 +0300)]
arm: mx6: cm_fx6: use gpio request
Use gpio_request for all the gpios that are utilized by various
subsystems in cm-fx6, and refactor the relevant init functions
so that all gpios are requested during board_init(), not during
subsystem init, thus avoiding the need to manage gpio ownership
each time a subsystem is initialized.
The new division of labor is:
During board_init() muxes are setup and gpios are requested.
During subsystem init gpios are toggled.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Simon Glass [Thu, 2 Oct 2014 14:17:23 +0000 (17:17 +0300)]
dm: imx: i2c: Use gpio_request() to request GPIOs
GPIOs should be requested before use. Without this, driver model will
not permit the GPIO to be used.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Simon Glass [Thu, 2 Oct 2014 01:57:24 +0000 (19:57 -0600)]
imx: Add error checking to setup_i2c()
Since this function can fail, check its return value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Simon Glass [Thu, 2 Oct 2014 01:57:23 +0000 (19:57 -0600)]
dm: serial: Put common code into separate functions
Avoid duplicating the code which deals with getc() and putc(). It is fairly
simple, but may expand later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 2 Oct 2014 01:57:22 +0000 (19:57 -0600)]
initcall: Display error number when an error occurs
Now that some initcall functions return a useful error number, display it
when something goes wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Simon Glass [Thu, 2 Oct 2014 01:57:21 +0000 (19:57 -0600)]
dm: core: Allow a list of devices to be declared in one step
The U_BOOT_DEVICE macro allows the declaration of a single U-Boot device.
Add an equivalent macro to declare an array of devices, for convenience.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 2 Oct 2014 01:57:20 +0000 (19:57 -0600)]
dm: linker_lists: Add a way to declare multiple objects
The existing ll_entry_declare() permits a single element of the list to
be added to a linker list. Sometimes we want to add several objects at
once. To avoid lots of messy declarations, add a macro to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 14 Oct 2014 05:42:16 +0000 (23:42 -0600)]
dm: exynos: cros_ec: Move cros_ec_spi to driver model
Adjust this driver to use driver model and move smdk5420 boards over to
use it.
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 14 Oct 2014 05:42:15 +0000 (23:42 -0600)]
dm: sandbox: cros_ec: Move sandbox cros_ec to driver module
Adjust the sandbox cros_ec emulation driver to work with driver model, and
switch over to driver model for sandbox cros_ec.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:14 +0000 (23:42 -0600)]
dm: cros_ec: Add support for driver model
Add support for driver model if enabled. This involves minimal changes
to the code, mostly just plumbing around the edges.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:13 +0000 (23:42 -0600)]
dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested
on:
- Tegra20 - trimslice
- Tegra30 - beaver
- Tegra124 - dalmore
(not tested on Tegra124)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 14 Oct 2014 05:42:12 +0000 (23:42 -0600)]
dm: tegra: dts: Add aliases for spi on tegra30 boards
All boards with a SPI interface have a suitable spi alias except the tegra30
boards. Add these missing aliases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:11 +0000 (23:42 -0600)]
dm: sf: Add tests for SPI flash
Add a simple test for SPI that uses SPI flash. It operates by creating a
SPI flash file and using the 'sf test' command to test that all
operations work correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:10 +0000 (23:42 -0600)]
dm: spi: Add tests
These tests use SPI flash (and the sandbox emulation) to operate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:09 +0000 (23:42 -0600)]
dm: exynos: config: Use driver model for SPI flash
Use driver model for exynos5 board SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:08 +0000 (23:42 -0600)]
dm: sf: sandbox: Convert SPI flash driver to driver model
Convert sandbox's spi flash emulation driver to use driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:07 +0000 (23:42 -0600)]
dm: Convert spi_flash_probe() and 'sf probe' to use driver model
We want the SPI flash probing feature to operate as a standard driver.
Add a driver for the basic probing feature used by most boards. This
will be activated by device_probe() as with any other driver.
The 'sf probe' command currently keeps track of the SPI slave that it
last used. This doesn't work with driver model, since some other driver
or system may have probed the device and have access to it too. On the
other hand, if we try to probe a device twice the second probe is a nop
with driver model.
Fix this by searching for the matching device, removing it, and then
probing it again. This should work as expected regardless of other device
activity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:06 +0000 (23:42 -0600)]
dm: sf: Add a uclass for SPI flash
Add a driver model uclass for SPI flash which supports the common
operations (read, write, erase). Since we must keep support for the
non-dm interface, some modification of the spi_flash header is required.
CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:05 +0000 (23:42 -0600)]
spi: Use error return value in sf_ops
Adjust spi_flash_probe_slave() to return an error value instead of a
pointer so we get the correct error return.
Have the caller allocate memory for spi_flash to simplify error handling,
and also so that driver model can use its existing allocated memory.
Add a spi.h include in the sf_params file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:04 +0000 (23:42 -0600)]
sf: Tidy up public and private header files
Since spi_flash.h is supposed to be the public API for SPI flash, move
private things to sf_internal.h. Also tidy up a few comment nits.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:03 +0000 (23:42 -0600)]
exynos: universal_c210: Move to driver model soft_spi
Adjust this board to use the driver model soft_spi implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:02 +0000 (23:42 -0600)]
dm: spi: Add documentation on how to convert over SPI drivers
This README is intended to help maintainers move their SPI drivers over to
driver model. It works through the required steps with an example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:01 +0000 (23:42 -0600)]
dm: exynos: Convert SPI to driver model
Move the exynos SPI driver over to driver model. This removes quite a bit
of boilerplate from the driver, although it adds some for driver model.
A few device tree additions are needed to make the SPI flash available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:42:00 +0000 (23:42 -0600)]
dm: spi: Add soft_spi implementation
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:59 +0000 (23:41 -0600)]
dm: spi: Remove SPI_INIT feature
This feature provides for init of a single SPI port for the soft SPI
feature. It is not really compatible with driver model since it assumes a
single SPI port. Also, inserting SPI init into the driver by means of
a #define is not very nice.
This feature is not used by any active boards, so let's remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:58 +0000 (23:41 -0600)]
dm: spi: Rename soft_spi.c to soft_spi_legacy.c
Reserve the 'normal' name for use by driver model, and rename the old
driver so that it is clear that it is for 'legacy' drivers only.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:57 +0000 (23:41 -0600)]
dm: sandbox: spi: Move to driver model
Adjust the sandbox SPI driver to support driver model and move sandbox over
to driver model for SPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:56 +0000 (23:41 -0600)]
dm: spi: Adjust cmd_spi to work with driver model
Driver model uses a different way to find the SPI bus and slave from the
numbered devices given on the command line. Adjust the code to suit.
We use a generic SPI device, and attach it to the SPI bus before performing
the transaction.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:55 +0000 (23:41 -0600)]
dm: Add spi.h header to a few files
Some files are using SPI functions but not explitly including the SPI
header file. Fix this, since driver model needs it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:54 +0000 (23:41 -0600)]
dm: Remove spi_init() from board_r.c when using driver model
Driver model does its own init, so we don't need this.
There is still a call in board_f.c but it is only enabled by CONFIG_HARD_SPI.
It is easy enough to disable that option when converting boards which use
it to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:53 +0000 (23:41 -0600)]
dm: sandbox: Add a SPI emulation uclass
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.
Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.
Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:52 +0000 (23:41 -0600)]
dm: spi: Add a uclass for SPI
Add a uclass which provides access to SPI buses and includes operations
required by SPI.
For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not available with
driver model.
Boards must define CONFIG_DM_SPI to use driver model for SPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
(Discussed some follow-up comments which will address in future add-ons)
Simon Glass [Tue, 14 Oct 2014 05:41:51 +0000 (23:41 -0600)]
dm: core: Add a clarifying comment on struct udevice's seq member
The sequence number is unique within the uclass, so state this clearly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:50 +0000 (23:41 -0600)]
dm: core: Allow parents to pass data to children during probe
Buses sometimes want to pass data to their children when they are probed.
For example, a SPI bus may want to tell the slave device about the chip
select it is connected to.
Add a new function to permit the parent data to be supplied to the child.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:49 +0000 (23:41 -0600)]
dm: core: Add functions for iterating through device children
Buses need to iterate through their children in some situations. Add a few
functions to make this easy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:48 +0000 (23:41 -0600)]
sandbox: dts: Add a SPI device and cros_ec device
Add a SPI device which can be used for testing SPI flash features in
sandbox.
Also add a cros_ec device since with driver model the Chrome OS EC
emulation will not otherwise be available.
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 22:36:17 +0000 (16:36 -0600)]
dm: exynos: Move serial to driver model
Change the Exynos serial driver to work with driver model and switch over
all relevant boards to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 22:36:16 +0000 (16:36 -0600)]
dm: exynos: Mark exynos5 console as pre-reloc
We will need the console before relocation, so mark it that way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:40 +0000 (19:48 -0600)]
dm: exynos: gpio: Convert to driver model
Convert the exynos GPIO driver to driver model. This implements the generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:39 +0000 (19:48 -0600)]
dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.
(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:38 +0000 (19:48 -0600)]
dm: exynos: Tidy up GPIO defines
The defines at the top of the GPIO driver use single-character names for
parameters which are not very descriptive.
Improve these to use descriptive parameter names.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:37 +0000 (19:48 -0600)]
dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:36 +0000 (19:48 -0600)]
dm: exynos: Move s5p_goni to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for s5p_goni.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:35 +0000 (19:48 -0600)]
dm: exynos: Move smdkc100 to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for smdkc100.
Signed-off-by: Simon Glass <sjg@chromium.org>