Yong Zhao [Sat, 28 Sep 2019 02:03:42 +0000 (22:03 -0400)]
drm/amdkfd: Use array to probe kfd2kgd_calls
This is the same idea as the kfd device info probe and move all the
probe control together for easy maintenance.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Sat, 28 Sep 2019 01:22:07 +0000 (21:22 -0400)]
drm/amdkfd: Delete unnecessary function declarations
Ajust the function sequences so that those function delcarations are not
needed any more.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Sat, 21 Sep 2019 19:51:19 +0000 (15:51 -0400)]
drm/amdgpu: Delete useless header file reference
Those header file includes are not needed.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jack Zhang [Thu, 26 Sep 2019 07:24:55 +0000 (15:24 +0800)]
drm/amd/amdgpu/sriov ip block setting of Arcturus
Add ip block setting for Arcturus SRIOV
1.PSP need to be initialized before IH.
2.SMU doesn't need to be initialized at kmd driver.
3.Arcturus doesn't support DCE hardware,it needs to skip
register access to DCE.
Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 24 Sep 2019 21:53:25 +0000 (17:53 -0400)]
drm/amdgpu: return tcc_disabled_mask to userspace
UMDs need this for correct programming of harvested chips.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lyude Paul [Thu, 26 Sep 2019 22:51:05 +0000 (18:51 -0400)]
drm/amdgpu/dm/mst: Use ->atomic_best_encoder
We are supposed to be atomic after all. We'll need this in a moment for
the next commit.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lyude Paul [Thu, 26 Sep 2019 22:51:03 +0000 (18:51 -0400)]
drm/amdgpu/dm/mst: Don't create MST topology managers for eDP ports
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lyude Paul [Thu, 26 Sep 2019 22:51:04 +0000 (18:51 -0400)]
drm/amdgpu/dm/mst: Remove unnecessary NULL check
kfree() checks this automatically.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lyude Paul [Tue, 3 Sep 2019 20:46:01 +0000 (16:46 -0400)]
drm/amdgpu: Iterate through DRM connectors correctly
Currently, every single piece of code in amdgpu that loops through
connectors does it incorrectly and doesn't use the proper list iteration
helpers, drm_connector_list_iter_begin() and
drm_connector_list_iter_end(). Yeesh.
So, do that.
Cc: Juston Li <juston.li@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lyude Paul [Wed, 25 Sep 2019 21:52:48 +0000 (17:52 -0400)]
drm/amdgpu/dm: Resume short HPD IRQs before resuming MST topology
Since we're going to be reprobing the entire topology state on resume
now using sideband transactions, we need to ensure that we actually have
short HPD irqs enabled before calling drm_dp_mst_topology_mgr_resume().
So, do that.
Changes since v4:
* Fix typo in comments
Cc: Juston Li <juston.li@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Fri, 27 Sep 2019 04:16:42 +0000 (12:16 +0800)]
drm/amdkfd: fix kgd2kfd_device_init() definition conflict error
The patch
c670707 drm/amd: Pass drm_device to kfd introduced this issue and
fix the following compiler error.
CC [M] drivers/gpu/drm/amd/amdgpu//../powerplay/smumgr/fiji_smumgr.o
drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.c:746:6: error: conflicting types for ‘kgd2kfd_device_init’
bool kgd2kfd_device_init(struct kfd_dev *kfd,
^
In file included from drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.c:23:0:
drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.h:253:6: note: previous declaration of ‘kgd2kfd_device_init’ was here
bool kgd2kfd_device_init(struct kfd_dev *kfd,
^
scripts/Makefile.build:273: recipe for target 'drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.o' failed
make[1]: *** [drivers/gpu/drm/amd/amdgpu//amdgpu_amdkfd.o] Error 1
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Fri, 27 Sep 2019 06:52:10 +0000 (14:52 +0800)]
drm/amd/powerplay: initlialize smu->is_apu is false by default
the member of is_apu in smu_context need to initlialize by default.
set default value is false (dGPU)
for patch:
drm/amd/powerplay: bypass dpm_context null pointer check guard
for some smu series
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Mon, 16 Sep 2019 02:05:09 +0000 (10:05 +0800)]
Revert "drm/amdgpu: disable stutter mode for renoir"
This reverts commit
5813f97a5969bf1e7e723397a74e00b5de7278d6.
Since SBIOS WCD9925N, NMI printing disappeared. Hence enable stutter
mode.
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Wed, 25 Sep 2019 09:48:56 +0000 (17:48 +0800)]
drm/amd/powerplay: update the interface for getting dpm full scale clock frequency
Update get_dpm_uclk_limited to get more clock type full scale dpm frequency.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Wed, 25 Sep 2019 06:11:41 +0000 (14:11 +0800)]
drm/amd/powerplay: implement the interface for setting sclk/uclk profile_peak level
Add the interface for setting sclk and uclk peak frequency.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Mon, 23 Sep 2019 07:52:12 +0000 (15:52 +0800)]
drm/amd/powerplay: implement interface set_power_profile_mode() (v2)
v1:
Add set_power_profile_mode() for none manual dpm level case setting power profile mode.
v2:
After input power profile update successfully need can update the smu profile mode.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Mon, 23 Sep 2019 07:29:07 +0000 (15:29 +0800)]
drm/amd/powerplay: add the interfaces for getting and setting profiling dpm clock level
implement get_profiling_clk_mask and force_clk_levels for forcing dpm clk to limit value.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Mon, 23 Sep 2019 06:42:36 +0000 (14:42 +0800)]
drm/amd/powerplay: add interface for getting workload type
The workload type was got from the input of power profile mode.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Mon, 23 Sep 2019 03:02:40 +0000 (11:02 +0800)]
drm/amd/powerplay: add interface for forcing and unforcing dpm limit value
That's base function for forcing and unforcing dpm limit value.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Tue, 24 Sep 2019 06:40:09 +0000 (14:40 +0800)]
drm/amd/powerplay: implement the interface for setting soft freq range
The APU soft freq range set by different way from DGPU, thus need implement
the function respectively base on each common SMU part.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Wed, 18 Sep 2019 07:11:34 +0000 (15:11 +0800)]
drm/amd/powerplay: bypass dpm_context null pointer check guard for some smu series
For now APU has no smu_dpm_context structure for containing default/current related dpm tables,
thus will needn't initialize smu_dpm_context to aviod APU null pointer issue.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Wed, 25 Sep 2019 05:41:35 +0000 (13:41 +0800)]
drm/amd/amdgpu: add IH cg support on soc15 project
enable/disable IH clock gating on soc15 projects.
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Thu, 26 Sep 2019 08:22:13 +0000 (16:22 +0800)]
drm/amd/powerplay: add sensor lock support for smu
when multithreading access sysfs of amdgpu_pm_info at the sametime.
the swsmu driver cause smu firmware hang.
eg:
single thread access:
Message A + Param A ==> right
Message B + Param B ==> right
Message C + Param C ==> right
multithreading access:
Message A + Param B ==> error
Message B + Param A ==> error
Message C + Param C ==> right
the patch will add sensor lock(mutex) to avoid this error.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Thu, 26 Sep 2019 08:16:41 +0000 (16:16 +0800)]
drm/amd/powerplay: change metrics update period from 1ms to 100ms
v2:
change period from 10ms to 100ms (typo error)
too high frequence to update mertrics table will cause smu firmware
error,so change mertrics table update period from 1ms to 100ms
(navi10, 12, 14)
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jay Cornwall [Wed, 25 Sep 2019 22:05:01 +0000 (17:05 -0500)]
drm/amdkfd: Fix race in gfx10 context restore handler
Missing synchronization with VGPR restore leads to intermittent
VGPR trashing in the user shader.
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Wed, 25 Sep 2019 18:01:24 +0000 (14:01 -0400)]
drm/amdkfd: Use setup_vm_pt_regs function from base driver in KFD
This was done on GFX9 previously, now do it for GFX10.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Tue, 24 Sep 2019 21:08:30 +0000 (17:08 -0400)]
drm/amdgpu: Export setup_vm_pt_regs() logic for gfxhub 2.0
The KFD code will call this function later.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Thu, 26 Sep 2019 03:57:30 +0000 (23:57 -0400)]
drm/amdkfd: Eliminate get_atc_vmid_pasid_mapping_valid
get_atc_vmid_pasid_mapping_valid() is very similar to
get_atc_vmid_pasid_mapping_pasid(), so they can be merged into a new
function get_atc_vmid_pasid_mapping_info() to reduce register access
times. More importantly, getting the PASID and the valid bit atomically
with a single read fixes some potential race conditions where the
mapping changes between the two reads.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Wed, 25 Sep 2019 21:06:12 +0000 (17:06 -0400)]
drm/amdkfd: Query vmid pasid mapping through stored info for non HWS
Because we record the mapping under non HWS mode in the software,
we can query pasid through vmid using the stored mapping instead of
reading from ATC registers.
This also prepares for the defeatured ATC block in future ASICs.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Thu, 26 Sep 2019 03:49:46 +0000 (23:49 -0400)]
drm/amdkfd: Record vmid pasid mapping in the driver for non HWS mode
This makes possible the vmid pasid mapping query through software.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Wed, 25 Sep 2019 21:00:59 +0000 (17:00 -0400)]
drm/amdkfd: Use hex print format for pasid
Since KFD pasid starts from 0x8000 (32768 in decimal), it is better
perceived as a hex number. Meanwhile, change the pasid type from
unsigned int to uint16_t to be consistent throughout the code.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Wed, 25 Sep 2019 20:45:18 +0000 (16:45 -0400)]
drm/amdkfd: Delete unused defines
They are not used anywhere.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Wed, 25 Sep 2019 18:07:26 +0000 (14:07 -0400)]
drm/amdkfd: Move the control stack on GFX10 to userspace buffer
The GFX10 does not require the control stack to be right after mqd
buffer any more, so move it back to usersapce allocated CSWR buffer.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Wed, 26 Sep 2018 20:09:37 +0000 (16:09 -0400)]
drm/amd: Pass drm_device to kfd
kfd needs drm_device to call into drm_cgroup functions
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Fri, 20 Jul 2018 19:40:14 +0000 (15:40 -0400)]
drm/amdkfd: Store kfd_dev in iolink and cache properties
This is required to check against cgroup permissions.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
shaoyunl [Wed, 25 Sep 2019 21:07:38 +0000 (17:07 -0400)]
drm/amdkfd: use navi12 specific family id for navi12 code path
Keep the same use of CHIP_IDs for navi12 in kfd
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kent Russell [Mon, 23 Sep 2019 01:20:14 +0000 (21:20 -0400)]
drm/amdgpu: Add SMUIO values for other I2C controller v2
These are the offsets for CKSVII2C1, and match up with the values
already added for CKSVII2C
v2: Don't remove some of the CSKVII2C values
Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Sat, 21 Sep 2019 21:46:03 +0000 (17:46 -0400)]
drm/amdkfd: Use better name for sdma queue non HWS path
The old name is prone to confusion. The register offset is for a RLC queue
rather than a SDMA engine. The value is not a base address, but a
register offset.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Sun, 22 Sep 2019 00:02:57 +0000 (20:02 -0400)]
drm/amdkfd: Delete useless SDMA register setting on non HWS path
HW folks have confirm that we should not touch RESUME_CTX of
SDMA*_GFX_CONTEXT_CNTL when manipulating RLC queues.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Navid Emamdoost [Wed, 25 Sep 2019 04:23:56 +0000 (23:23 -0500)]
drm/amd/display: prevent memory leak
In dcn*_create_resource_pool the allocated memory should be released if
construct pool fails.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
shaoyunl [Tue, 24 Sep 2019 22:11:12 +0000 (18:11 -0400)]
drm/amdkfd: Add NAVI12 support from kfd side
Add device info for both navi12 PF and VF
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 19 Sep 2019 13:16:49 +0000 (15:16 +0200)]
drm/amdgpu: restrict hotplug error message
We should print the error only when we are hotplugged and crash
basically all userspace applications.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 24 Sep 2019 11:29:27 +0000 (13:29 +0200)]
drm/amdgpu: once more fix amdgpu_bo_create_kernel_at
When CPU access is needed we should tell that to
amdgpu_bo_create_reserved() or otherwise the access is denied later on.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 24 Sep 2019 04:43:51 +0000 (12:43 +0800)]
drm/amd/powerplay: update arcturus smu-driver interaction header
To pair the latest SMU firmware.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Mon, 23 Sep 2019 11:10:19 +0000 (19:10 +0800)]
drm/amdgpu: add comments in ras interrupt callback
add comments to clarify why checking GFX IP BLOCK for each ras interrupt callback
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 18 Sep 2019 10:31:07 +0000 (18:31 +0800)]
drm/amdgpu: implement common gmc_ras_late_init
common gmc_ecc_late_init can be shared among all generations of gmc
v2: rename gmc_ecc_late_init to gmc_ras_late_init
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 18 Sep 2019 09:58:14 +0000 (17:58 +0800)]
drm/amdgpu: move xgmi ras fini to xgmi block
it's more suitable to put xgmi ras fini in xgmi block
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 18 Sep 2019 09:51:20 +0000 (17:51 +0800)]
drm/amdgpu: move mmhub ras fini to mmhub block
it's more suitable to put mmhub ras fini in mmhub block
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 18 Sep 2019 09:46:42 +0000 (17:46 +0800)]
drm/amdgpu: move umc ras fini to umc block
it's more suitable to put umc ras fini in umc block
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 18 Sep 2019 09:40:06 +0000 (17:40 +0800)]
drm/amdgpu: add ras fini for xgmi
add ras fini for xgmi to cleanup xgmi ras framework
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 18 Sep 2019 09:30:50 +0000 (17:30 +0800)]
drm/amdgpu: add ras fini for nbio
add a common nbio ras fini implementation to cleanup nbio ras framework
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 18 Sep 2019 07:26:23 +0000 (15:26 +0800)]
drm/amdgpu: simplify the access to eeprom_control struct
simplify the code of accessing to eeprom_control struct
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 19 Sep 2019 03:46:11 +0000 (11:46 +0800)]
drm/amdgpu: remove ih_info parameter of gfx_ras_late_init
gfx_ras_late_init can get the info by itself
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 10:54:33 +0000 (18:54 +0800)]
drm/amdgpu: remove ih_info parameter of umc_ras_late_init
umc_ras_late_init can get the info by itself
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 10:19:02 +0000 (18:19 +0800)]
drm/amdgpu: add common sdma_ras_fini function
sdma_ras_fini can be shared among all generations of sdma
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 09:44:49 +0000 (17:44 +0800)]
drm/amdgpu: add common gfx_ras_fini function
gfx_ras_fini can be shared among all generations of gfx
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 09:39:47 +0000 (17:39 +0800)]
drm/amdgpu: add common gmc_ras_fini function
gmc_ras_fini can be shared among all generations of gmc
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 09:21:46 +0000 (17:21 +0800)]
drm/amdgpu: move mmhub_ras_if from gmc to mmhub block
mmhub_ras_if is relevant to mmhub
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 09:12:21 +0000 (17:12 +0800)]
drm/amdgpu: replace mmhub_funcs with mmhub.funcs
remove mmhub_funcs in adev
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 09:03:14 +0000 (17:03 +0800)]
drm/amdgpu: add common mmhub member for adev
put mmhub_funcs and ras_if pointer into mmhub struct
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 08:34:08 +0000 (16:34 +0800)]
drm/amdgpu: move umc_ras_if from gmc to umc block
umc_ras_if is relevant to umc
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Tue, 17 Sep 2019 11:01:38 +0000 (19:01 +0800)]
drm/amdgpu: refine sdma4 ras_data_cb
simplify code logic and refine return value
v2: remove unused error source code
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 06:28:18 +0000 (14:28 +0800)]
drm/amdgpu: move sdma ecc functions to generic sdma file
sdma ras ecc functions can be reused among all sdma generations
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 06:06:35 +0000 (14:06 +0800)]
drm/amdgpu: move gfx ecc functions to generic gfx file
gfx ras ecc common functions could be reused among all gfx generations
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 03:11:25 +0000 (11:11 +0800)]
drm/amdgpu: move umc ras irq functions to umc block
move umc ras irq functions from gmc v9 to generic umc block, these
functions are relevant to umc and they can be shared among all
generations of umc
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 12 Sep 2019 05:38:44 +0000 (13:38 +0800)]
drm/amdgpu: update parameter of ras_ih_cb
change struct ras_err_data *err_data to void *err_data, align with
umc code and the callback's declaration in each ras block could
pay no attention to the structure type
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Tue, 24 Sep 2019 08:08:00 +0000 (16:08 +0800)]
drm/amdgpu: fix an UMC hw arbitrator bug(v3)
issue:
the UMC6 h/w bug is that when MCLK is doing the switch
in the middle of a page access being preempted by high
priority client (e.g. DISPLAY) then UMC and the mclk switch
would stuck there due to deadlock
how:
fixed by disabling auto PreChg for UMC to avoid high
priority client preempting other client's access on
the same page, thus the deadlock could be avoided
v2:
put the patch in callback of UMC6
v3:
rename the callback to "init_registers"
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 20 Sep 2019 02:04:43 +0000 (22:04 -0400)]
drm/amdgpu: remove gfx9 NGG
Never used.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 23 Sep 2019 20:12:46 +0000 (15:12 -0500)]
drm/amdgpu/atomfirmware: simplify the interface to get vram info
fetch both the vram type and width in one function call. This
avoids having to parse the same data table twice to get the two
pieces of data.
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 20 Sep 2019 19:43:44 +0000 (14:43 -0500)]
drm/amdgpu/atomfirmware: use proper index for querying vram type (v3)
The index is stored in scratch register 4 after asic init. Use
that index. No functional change since all asics in a family
use the same type of vram (G5, G6, HBM) and that is all we use
at the monent, but if we ever need to query other info, we will
now have the proper index.
v2: module array is variable sized, handle that.
v3: fix off by one in array handling
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 23 Sep 2019 20:56:25 +0000 (15:56 -0500)]
drm/amdgpu/display: include slab.h in dcn21_resource.c
It's apparently needed in some configurations.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Tue, 24 Sep 2019 09:15:54 +0000 (14:45 +0530)]
drm/amdgpu/psp: silence response status warning
log the response status related error to the driver's
debug log since psp response status is not 0 even though
there was no problem while the command was submitted.
This warning misleads, hence this change.
Signed-off-by: Shirish S <shirish.s@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Mon, 23 Sep 2019 07:36:11 +0000 (15:36 +0800)]
drm/amd/powerplay: remove duplicate macro of smu_get_uclk_dpm_states
remove duplicate macro of smu_get_uclk_dpm_states
fix commit:
drm/amd/powerplay: add the interface for getting ultimate frequency v3
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jesse Zhang [Tue, 30 Jul 2019 11:15:42 +0000 (19:15 +0800)]
drm/amd/amdgpu:Fix compute ring unable to detect hang.
When compute fence did not signal, compute ring cannot detect hardware hang
because its timeout value is set to be infinite by default.
In SR-IOV and passthrough mode, if user does not declare custome timeout
value for compute ring, then use gfx ring timeout value as default. So
that when there is a ture hardware hang, compute ring can detect it.
Signed-off-by: Jesse Zhang <zhexi.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
chen gong [Thu, 19 Sep 2019 07:02:40 +0000 (15:02 +0800)]
drm/amdgpu: Use mode2 mode to perform GPU RESET for Renoir
Renoir need to use mode2 mode to implement GPU RESET
Signed-off-by: chen gong <curry.gong@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
chen gong [Mon, 23 Sep 2019 07:02:56 +0000 (15:02 +0800)]
drm/amd/powerplay: A workaround to GPU RESET on APU
Changes to function "smu_suspend" in amdgpu_smu.c is a workaround.
We should get real information about if baco is enabled or not, while we
always consider APU SMU feature as enabled in current code.
I know APU do not support baco mode for GPU reset, so I use
"adev->flags" to skip function "smu_feature_is_enabled".
Signed-off-by: chen gong <curry.gong@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
chen gong [Mon, 23 Sep 2019 06:56:43 +0000 (14:56 +0800)]
drm/amd/powerplay: Add mode2 mode for GPU RESET in SMU
Renoir need to use mode2 mode to implement GPU RESET
Signed-off-by: chen gong <curry.gong@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Mon, 23 Sep 2019 19:53:13 +0000 (15:53 -0400)]
drm/amdkfd: Sync gfx10 kfd2kgd_calls function pointers
get_hive_id was not set. Also, adjust the function setting sequence.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Wed, 18 Sep 2019 22:17:57 +0000 (18:17 -0400)]
drm/amdkfd: Fix NULL pointer dereference for set_scratch_backing_va()
Currently this function pointer is missing for GFX10. Considering it is
a void function since GFX9, fix it by checking the function pointer
before dereferencing it.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Wed, 23 Jan 2019 01:09:17 +0000 (20:09 -0500)]
drm/amdkfd: Remove unnecessary pm_init() for non HWS mode
The packet manager is not needed for non HWS mode except Hawaii, so only
initialize it for Hawaii under non HWS mode. This will simplify debugging
under non HWS mode for all new asics, because it eliminates one variable
out of the equation in non HWS mode
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Sat, 21 Sep 2019 06:01:50 +0000 (02:01 -0400)]
drm/amdkfd: Remove excessive print when reserving doorbells
The dozens of printing messages are compressed into 2 lines.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Thu, 19 Sep 2019 16:42:34 +0000 (12:42 -0400)]
drm/amdkfd: Add an error print if SDMA RLC is not idle
The message will be useful when troubleshooting the issues.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 20 Sep 2019 20:13:24 +0000 (15:13 -0500)]
drm/amdgpu/display: fix 64 bit divide
Use proper helper for 32 bit.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Mon, 23 Sep 2019 13:09:38 +0000 (21:09 +0800)]
drm/amdgpu: correct condition check for psp rlc autoload
Otherwise non-autoload case will go into the wrong routine and fail.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 23 Sep 2019 12:41:04 +0000 (20:41 +0800)]
drm/amdgpu: add command id in psp response failure message
For better clarification of issue.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Mon, 23 Sep 2019 06:10:55 +0000 (14:10 +0800)]
drm/amdgpu: enable psp front door loading by default on Arcturus
Front door firmware loading is done via the psp rather than the
driver.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Mon, 23 Sep 2019 04:25:03 +0000 (12:25 +0800)]
drm/amdgpu: disable vcn ip block for front door loading on Arcturus
Needs more work to enable via front door loading.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tianci.Yin [Thu, 12 Sep 2019 09:40:22 +0000 (17:40 +0800)]
drm/amdgpu/gfx10: add support for wks firmware loading
load different cp firmware according to the DID and RID
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Allen Pais [Wed, 18 Sep 2019 16:30:31 +0000 (22:00 +0530)]
drm/amdkfd: fix a potential NULL pointer dereference (v2)
alloc_workqueue is not checked for errors and as a result,
a potential NULL dereference could occur.
v2 (Felix Kuehling):
* Fix compile error (kfifo_free instead of fifo_free)
* Return proper error code
Signed-off-by: Allen Pais <allen.pais@oracle.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 19 Sep 2019 20:09:56 +0000 (15:09 -0500)]
drm/amdgpu/ras: fix and update the documentation for RAS
Add new sections to amdgpu.rst, fix up formatting issues,
add additional documentation to each section.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 19 Sep 2019 20:03:27 +0000 (15:03 -0500)]
drm/amdgpu: fix documentation for amdgpu_pm.c
Fix DOC link name, clean up formatting in pp_dpm_* section.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 19 Sep 2019 19:40:57 +0000 (14:40 -0500)]
drm/amdgpu/ih: fix documentation in amdgpu_irq_dispatch
Fix parameters.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 19 Sep 2019 19:39:08 +0000 (14:39 -0500)]
drm/amdgpu/vm: fix up documentation in amdgpu_vm.c
Missing parameters, wrong comment type, etc.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 19 Sep 2019 19:24:11 +0000 (14:24 -0500)]
drm/amdgpu/mn: fix documentation for amdgpu_mn_read_lock
Document the new parameter.
Fixes: 93065ac753e4 ("mm, oom: distinguish blockable mode for mmu notifiers")
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 19 Sep 2019 19:18:10 +0000 (14:18 -0500)]
drm/amdgpu: fix documentation for amdgpu_gem_prime_export
Drop extra function parameter.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 18 Sep 2019 15:42:59 +0000 (11:42 -0400)]
drm/amd/display; Fix kernel doc warnings
We had a couple of missing definitions and formatting errors.
v2: Fix 'notifying' type
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
yu kuai [Thu, 19 Sep 2019 14:09:09 +0000 (22:09 +0800)]
drm/amdgpu: remove excess function parameter description
Fixes gcc warning:
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c:431: warning: Excess function
parameter 'sw' description in 'vcn_v2_5_disable_clock_gating'
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c:550: warning: Excess function
parameter 'sw' description in 'vcn_v2_5_enable_clock_gating'
Fixes: cbead2bdfcf1 ("drm/amdgpu: add VCN2.5 VCPU start and stop")
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Wed, 18 Sep 2019 19:53:58 +0000 (21:53 +0200)]
drm/amd/display: hide an unused variable
Without CONFIG_DEBUG_FS, we get a warning for an unused
variable:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6020:33: error: unused variable 'source' [-Werror,-Wunused-variable]
Hide the variable in an #ifdef like its only users.
Fixes: 14b2584636c6 ("drm/amd/display: add functionality to grab DPRX CRC entries.")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Guchun Chen [Thu, 19 Sep 2019 03:08:58 +0000 (11:08 +0800)]
drm/amdgpu: enable full ras by default
Enable full ras by default, user does not need to enable it by
boot parameter.
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jiange Zhao [Thu, 19 Sep 2019 18:22:59 +0000 (13:22 -0500)]
drm/amdgpu/SRIOV: add navi12 pci id for SRIOV (v2)
Add Navi12 PCI id support.
v2: flag as experimental for now (Alex)
Signed-off-by: Jiange Zhao <Jiange.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>