Xing Zheng [Fri, 24 Feb 2017 06:56:41 +0000 (14:56 +0800)]
rockchip: rk3399: Clean up and seprate secure parts from SoC codes
The goal is that make clear the secure and SoC codes. Now cleaning them
will help secure code extensions for RK3399 in the future.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Xing Zheng [Thu, 22 Dec 2016 10:34:14 +0000 (18:34 +0800)]
rockchip: rk3399: sperate the BL31 parameters for sharing
Maybe the coreboot will reference the BL31 parameters (e.g the TZRAM_BASE
and TZRAM_SIZE for DDR secure regions), we can split them and don't have
to hardcode the range in two places.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Xing Zheng [Fri, 24 Feb 2017 06:47:51 +0000 (14:47 +0800)]
rockchip: rk3399: configure the DDR secure region for BL31 image
Move the BL31 loaded base address 0x10000 to 0x1000, and configure
the the memory range 0~1MB is secure, the goal is that make sure
the BL31 image will be not modified.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Xing Zheng [Fri, 24 Feb 2017 08:26:11 +0000 (16:26 +0800)]
rockchip: Clean up header and referenced files
So far, there are more and more features are supported on the RK3399,
meanwhile, these features are increasingly being defined and intertwined.
It's time to clean up and make them clearer.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Derek Basehore [Mon, 9 Jan 2017 23:38:57 +0000 (15:38 -0800)]
rockchip: rk3399: Don't wait for vblank in M0 for ddrfreq
This removes waiting for vblank on the M0 during ddrfreq transitions.
That will now be done in the kernel to allow scheduling to be done on
the CPU core that changes the ddr frequency. Waiting for vblank in
the M0 would have the CPU core that waits on the M0 spin looping for
up to 16ms (1 frame for the display).
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Lin Huang [Fri, 30 Dec 2016 03:50:01 +0000 (11:50 +0800)]
rockchip: rk3399: restore PMU_CRU_GATEDIS_CON0 value after ddr dvfs
we will set PMU_CRU_GATEDIS_CON0 when idle port, it will enable
all clock, for save power consumption, we need to restore old value
when finish it.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Lin Huang [Fri, 30 Dec 2016 05:53:25 +0000 (13:53 +0800)]
rockchip: rk3399: fix PMU_CRU_GATEDIS_CON0 setting error
As rk3399 TRM1.1 document show, when set PMU_CRU_GATEDIS_CON0/1
register, it need set the write_mask bit (bit16 ~ bit31), but as
we test, it not need it. So need to correct the setting way, otherwise
it will set wrong value to this register.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Xing Zheng [Tue, 20 Dec 2016 12:44:41 +0000 (20:44 +0800)]
FIXUP: rockchip: rk3399: fix the incorrect bit during m0_init
We found that the DUT will be hanged if we don't set the bit_1 of the
PMUCRU_GATEDIS_CON0. But, from the TRM, there is weird that the bit_1
is set the clk_center1_gating_dis, not clk_pmum0_gating_dis. Is the
TRM incorrect? We need to check it with the IC team and re-clean the
commit message and explain it tomorrow.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Lin Huang [Mon, 12 Dec 2016 07:18:08 +0000 (15:18 +0800)]
rockchip: rk3399: improve the m0 enable flow
This patch do following things:
1. Request hresetn_cm0s_pmu_req first then request
poresetn_cm0s_pmu_req during M0 enable.
2. Do not diable M0 clock for ddr dvfs.
3. Correct the clk_pmum0_gating_dis bit, it is BIT0 not BIT1
4. do not set/clear hclk_noc_pmu_en in M0 code, it does not relate
to the M0 clock.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Lin Huang [Thu, 1 Dec 2016 08:55:05 +0000 (16:55 +0800)]
rockchip: rk3399: check vop status when we wait dma finish flag
When vop is disabled and we read the vop register the system will
hang, so check vop status when we wait for the DMA finish flag to
avoid this sitiuation. This is done by checking for standby, DMA stop
mode, and disabled window states. Any one of these will prevent the
DMA finish flag from triggering.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Lin Huang [Wed, 30 Nov 2016 08:57:08 +0000 (16:57 +0800)]
rockchip: rk3399: add stopwatch functions to m0
There is system timer in m0, we can use it to implement a set of
stopwatch functions for measuring timeouts.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Lin Huang [Thu, 15 Dec 2016 07:08:47 +0000 (15:08 +0800)]
rockchip: rk3399: dram: set all ddr frequency pll_postdiv values to 0
The phy pll needs to get 2X frequency to the DDR, so set the
pll_postdiv to 0.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Lin Huang [Fri, 16 Dec 2016 05:59:07 +0000 (13:59 +0800)]
rockchip: rk3399: enable CA training when do ddr dfs
For ddr dfs stable, We need to enable ddr CA training
when do ddr dfs.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Derek Basehore [Fri, 24 Feb 2017 06:33:03 +0000 (14:33 +0800)]
rockchip: rk3399: fix hang in ddr set rate
This fixes a hang with setting the DRAM rate based on a race condition
with the M0 which sets the DRAM rate. The AP can also starve the M0,
so this also delays the AP reads to the DONE parameter for the M0.
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Derek Basehore [Thu, 10 Nov 2016 02:28:19 +0000 (18:28 -0800)]
rockchip: rk3399: Enable per CS training at 666MHz
This enables per CS training at 666MHz and above for ddrfreq per
vendor recommendation. Since the threshold was used for latency was
the same value, this also adds a new value for that.
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Derek Basehore [Fri, 24 Feb 2017 06:31:36 +0000 (14:31 +0800)]
rockchip: rk3399: add support for ddrfreq suspend/resume
This patch sets the frequency configuration of the next DRAM DFS index
to the configuration of the current index. This does not perform a
frequency transition. It just configures registers so the training on
resume for both indices will be correct.
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Xing Zheng [Wed, 26 Oct 2016 13:25:26 +0000 (21:25 +0800)]
rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf
binary, it hard to maintain later, we have M0 compile flow in ATF,
and M0 can also work for ddr frequency scaling, so let's use it.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Derek Basehore [Thu, 20 Oct 2016 23:19:22 +0000 (16:19 -0700)]
rockchip/rk3399: Cleanup platform.mk file
This makes the file consistently use tabs instead of mixing in spaces.
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Xing Zheng [Mon, 24 Oct 2016 13:06:25 +0000 (21:06 +0800)]
rockchip: update the raw read/write APIs for M0
Since the ATF project, we usually use the mmio_read_32 and
mmio_write_32. And the mmio_write_32, the firse parameter
is ADDR, the second is VALUE. In order to style consistency:
1/ rename readl/writel to mmio_read_32/mmio_write_32
2/ for keeping the same with mmio_write_32 in the ATF project,
swap the order of the parameters for M0 mmio_write_32
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Derek Basehore [Fri, 21 Oct 2016 05:09:22 +0000 (22:09 -0700)]
rk3399: dram: making phy into dll bypass mode at low frequency
when dram frequency below 260MHz, phy master dll may unlock, so
let phy master dll working at dll bypass mode when frequency is
below 260MHz.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Derek Basehore [Fri, 21 Oct 2016 03:46:43 +0000 (20:46 -0700)]
rockchip: rk3399: dram: remove dram_init and dts_timing_receive function
we can reuse the dram config from loader, so we can remove dram_init()
and dts_timing_receive() funciton in dram.c, add the dram_set_odt_pd()
function to get the odt and auto power down parameter from kernel.
This also removes the dcf_code_init function to allow the system to
actually boot.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
danh-arm [Tue, 31 Jan 2017 15:40:20 +0000 (15:40 +0000)]
Merge pull request #821 from jeenu-arm/errata-printing
Errata printing infrastructure
danh-arm [Tue, 31 Jan 2017 15:39:19 +0000 (15:39 +0000)]
Merge pull request #799 from masahir0y/fiptool
fiptool: Alignment support + misc refactoring
danh-arm [Tue, 31 Jan 2017 15:38:19 +0000 (15:38 +0000)]
Merge pull request #825 from dp-arm/dp/simplify-cond
tbbr: Simplify conditional
danh-arm [Tue, 31 Jan 2017 15:37:26 +0000 (15:37 +0000)]
Merge pull request #823 from douglas-raillard-arm/dr/add_fno_builtin
Add -fno-builtin to CFLAGS
danh-arm [Tue, 31 Jan 2017 11:10:46 +0000 (11:10 +0000)]
Merge pull request #822 from jeenu-arm/fix-fvp-refs
user-guide.md: Fix FVP references
danh-arm [Tue, 31 Jan 2017 11:09:27 +0000 (11:09 +0000)]
Merge pull request #819 from davidcunado-arm/dc/build_with_gcc6.2
Resolve build errors flagged by GCC 6.2
dp-arm [Tue, 31 Jan 2017 10:54:39 +0000 (10:54 +0000)]
tbbr: Simplify conditional
These are equivalent so use the reduced form.
Change-Id: I40ca097411b9abab69985b8e4dbccf7582eae49e
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
Jeenu Viswambharan [Tue, 3 Jan 2017 11:01:51 +0000 (11:01 +0000)]
Report errata workaround status to console
The errata reporting policy is as follows:
- If an errata workaround is enabled:
- If it applies (i.e. the CPU is affected by the errata), an INFO
message is printed, confirming that the errata workaround has been
applied.
- If it does not apply, a VERBOSE message is printed, confirming
that the errata workaround has been skipped.
- If an errata workaround is not enabled, but would have applied had
it been, a WARN message is printed, alerting that errata workaround
is missing.
The CPU errata messages are printed by both BL1 (primary CPU only) and
runtime firmware on debug builds, once for each CPU/errata combination.
Relevant output from Juno r1 console when ARM Trusted Firmware is built
with PLAT=juno LOG_LEVEL=50 DEBUG=1:
VERBOSE: BL1: cortex_a57: errata workaround for 806969 was not applied
VERBOSE: BL1: cortex_a57: errata workaround for 813420 was not applied
INFO: BL1: cortex_a57: errata workaround for disable_ldnp_overread was applied
WARNING: BL1: cortex_a57: errata workaround for 826974 was missing!
WARNING: BL1: cortex_a57: errata workaround for 826977 was missing!
WARNING: BL1: cortex_a57: errata workaround for 828024 was missing!
WARNING: BL1: cortex_a57: errata workaround for 829520 was missing!
WARNING: BL1: cortex_a57: errata workaround for 833471 was missing!
...
VERBOSE: BL31: cortex_a57: errata workaround for 806969 was not applied
VERBOSE: BL31: cortex_a57: errata workaround for 813420 was not applied
INFO: BL31: cortex_a57: errata workaround for disable_ldnp_overread was applied
WARNING: BL31: cortex_a57: errata workaround for 826974 was missing!
WARNING: BL31: cortex_a57: errata workaround for 826977 was missing!
WARNING: BL31: cortex_a57: errata workaround for 828024 was missing!
WARNING: BL31: cortex_a57: errata workaround for 829520 was missing!
WARNING: BL31: cortex_a57: errata workaround for 833471 was missing!
...
VERBOSE: BL31: cortex_a53: errata workaround for 826319 was not applied
INFO: BL31: cortex_a53: errata workaround for disable_non_temporal_hint was applied
Also update documentation.
Change-Id: Iccf059d3348adb876ca121cdf5207bdbbacf2aba
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan [Thu, 19 Jan 2017 14:23:36 +0000 (14:23 +0000)]
Allow spin locks to be defined from assembly
At present, spin locks can only defined from C files. Add some macros
such that they can be defined from assembly files too.
Change-Id: I64f0c214062f5c15b3c8b412c7f25c908e87d970
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Douglas Raillard [Mon, 16 Jan 2017 11:32:28 +0000 (11:32 +0000)]
Add -fno-builtin to CFLAGS
Disable the automatic substitution of functions with builtins. The
existing -ffreestanding option should already do this but explicitly
adding -fno-builtin reduces the risk of compiler variation. With this
option, GCC is not supposed to be able to make assumptions on what the
function does, which could otherwise lead to security-sensitive code
removal.
This can lead to potentially less efficient code but improves
predictability of what code is actually compiled into the binary.
Change-Id: I06ad151c61318bd1b00d84976f051d2d94314acc
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Masahiro Yamada [Sun, 25 Dec 2016 04:52:22 +0000 (13:52 +0900)]
fiptool: support --align option to add desired alignment to image offset
The current fiptool packs all the images without any padding between
them. So, the offset to each image has no alignment. This is not
efficient, for example, when the FIP is read from a block-oriented
device.
For example, (e)MMC is accessed by block-addressing. The block size
is 512 byte. So, the best case is each image is aligned by 512 byte
since the DMA engine can transfer the whole of the image to its load
address directly. The worst case is the offset does not have even
DMA-capable alignment (this is where we stand now). In this case,
we need to transfer every block to a bounce buffer, then do memcpy()
from the bounce buffer to our final destination. At least, this
should work with the abstraction by the block I/O layer, but the
CPU-intervention for the whole data transfer makes it really slow.
This commit adds a new option --align to the fiptool. This option,
if given, requests the tool to align each component in the FIP file
by the specified byte. Also, add a new Make option FIP_ALIGN for
easier access to this feature; users can give something like
FIP_ALIGN=512 from the command line, or add "FIP_ALIGN := 512" to
their platform.mk file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Jan 2017 18:56:58 +0000 (03:56 +0900)]
fiptool: embed fip_toc_entry in struct image
The struct image has "uuid" and "size" to memorize the field values
they had in the TOC entry. So, parse_fip() copies them from struct
fip_toc_entry to struct image, then pack_images() copies them back
to struct fip_toc_entry.
The next commit (support --align option) will require to save the
"offset" field as well. This makes me realize that struct image
can embed struct fip_toc_entry.
This commit will allow the "flags" field to persevere the "update"
command. At this moment, the "flags" is not used in a useful way.
(Yet, platforms can save their own parameters in the flags field.)
It makes sense to save it unless users explicitly replace the image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 26 Jan 2017 18:54:02 +0000 (03:54 +0900)]
fiptool: add xfwrite() helper
We have same patterns for fwrite().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 12 Jan 2017 17:13:06 +0000 (02:13 +0900)]
fiptool: fix the global option in usage
The global option --verbose should come after the "fiptool".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 14 Jan 2017 02:04:36 +0000 (11:04 +0900)]
fiptool: simplify the top line of command usage
We need not mention like [--force], [--out <path>] because they are
included in [opts].
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 04:31:40 +0000 (13:31 +0900)]
fiptool: refactor remove_image()
We need not handle the image_head as a special case. Just use
a double-pointer to simplify the traverse.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 03:53:13 +0000 (12:53 +0900)]
fiptool: simplify assert() for add_image(_desc)
lookup_image(_desc)_from_uuid() traverses the linked list, so it
is not efficient. We just want to make sure *p points to NULL here.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 02:57:54 +0000 (11:57 +0900)]
fiptool: revive replace_image() to keep the image order by update command
Commit
e0f083a09b29 ("fiptool: Prepare ground for expanding the set
of images at runtime") introduced another side effect; the "update"
command now changes the image order in the FIP.
Let's say you have an FIP with BL2, BL31, BL32, BL33. If you update
for example, BL32 with the "update" command, you will get a new FIP
with BL2, BL31, BL33, BL32, in this order.
It happens like this; remove_image() removes the old image from the
linked list, add_image() adds the new image at the tail of the list,
then images are packed in the new order. Prior to that commit,
images were updated by replace_image(), but it was deleted by the
re-work. Revive replace_image() that is re-implemented to work with
the linked list.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 15 Jan 2017 14:20:00 +0000 (23:20 +0900)]
fiptool: remove always true conditional
The conditional
if (desc != NULL)
...
is always true here because we assert it 6 lines above:
assert(desc != NULL);
Remove the if-conditional and concatenate the printf() calls.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 25 Dec 2016 03:41:41 +0000 (12:41 +0900)]
fiptool: fix existence check of FIP input file for update command
This line should check the existence of the input file, but it is
actually checking the output file. When -o option is given to the
"update" command, the outfile is unlikely to exist, then parse_fip()
is skipped and an empty FIP file is output. This is wrong behavior.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
danh-arm [Thu, 26 Jan 2017 14:50:34 +0000 (14:50 +0000)]
Merge pull request #814 from freedomtan/patches-for-8173-crbook-osi-0110
Patches for 8173 crbook
Jeenu Viswambharan [Thu, 26 Jan 2017 13:08:17 +0000 (13:08 +0000)]
user-guide.md: Fix FVP references
The current user guide mentions that Foundation model doesn't support
debugger interface. Clarify that all FVPs support --cadi-server option
such that a CADI-compliant debugger can connect to and control model
execution.
Also fix broken URL to FVP home page.
Change-Id: Ia14d618a4e0abb4b228eb1616040f9b51fb3f6f9
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
David Cunado [Thu, 19 Jan 2017 10:26:16 +0000 (10:26 +0000)]
Resolve build errors flagged by GCC 6.2
With GCC 6.2 compiler, more C undefined behaviour is being flagged as
warnings, which result in build errors in ARM TF build.
The specific issue that this patch resolves is the use of (1 << 31),
which is predominantly used in case statements, where 1 is represented
as a signed int. When shifted to msb the behaviour is undefined.
The resolution is to specify 1 as an unsigned int using a convenience
macro ULL(). A duplicate macro MAKE_ULL() is replaced.
Fixes ARM-software/tf-issues#438
Change-Id: I08e3053bbcf4c022ee2be33a75bd0056da4073e1
Signed-off-by: David Cunado <david.cunado@arm.com>
danh-arm [Tue, 24 Jan 2017 16:30:56 +0000 (16:30 +0000)]
Merge pull request #817 from antonio-nino-diaz-arm/an/timingsafe
Import constant-time bcmp() and use it where necessary
Antonio Nino Diaz [Fri, 13 Jan 2017 13:53:32 +0000 (13:53 +0000)]
tbbr: Use constant-time bcmp() to compare hashes
To avoid timing side-channel attacks, it is needed to use a constant
time memory comparison function when comparing hashes. The affected
code only cheks for equality so it isn't needed to use any variant of
memcmp(), bcmp() is enough.
Also, timingsafe_bcmp() is as fast as memcmp() when the two compared
regions are equal, so this change incurrs no performance hit in said
case. In case they are unequal, the boot sequence wouldn't continue as
normal, so performance is not an issue.
Change-Id: I1c7c70ddfa4438e6031c8814411fef79fd3bb4df
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Mon, 16 Jan 2017 13:25:38 +0000 (13:25 +0000)]
stdlib: Import timingsafe_bcmp() from FreeBSD
Some side-channel attacks involve an attacker inferring something from
the time taken for a memory compare operation to complete, for example
when comparing hashes during image authentication. To mitigate this,
timingsafe_bcmp() must be used for such operations instead of the
standard memcmp().
This function executes in constant time and so doesn't leak any timing
information to the caller.
Change-Id: I470a723dc3626a0ee6d5e3f7fd48d0a57b8aa5fd
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
danh-arm [Tue, 24 Jan 2017 14:28:19 +0000 (14:28 +0000)]
Merge pull request #818 from sandrine-bailleux-arm/sb/strnlen
Add strnlen() to local C library
Sandrine Bailleux [Tue, 24 Jan 2017 10:18:01 +0000 (10:18 +0000)]
Add strnlen() to local C library
This code has been imported and slightly adapted from FreeBSD:
https://github.com/freebsd/freebsd/blob/
6253393ad8df55730481bf2aafd76bdd6182e2f5/lib/libc/string/strnlen.c
Change-Id: Ie5ef5f92e6e904adb88f8628077fdf1d27470eb3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Koan-Sin Tan [Mon, 18 Apr 2016 09:20:05 +0000 (17:20 +0800)]
Remove use of all deprecated APIs
Now it's possbile to build BL31 for MT8173 with ERROR_DEPRECATED=1.
Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
Koan-Sin Tan [Mon, 18 Apr 2016 07:17:57 +0000 (15:17 +0800)]
Get rid of use of old GIC APIs
Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
Koan-Sin Tan [Mon, 18 Apr 2016 06:28:03 +0000 (14:28 +0800)]
Add support of PSCI_EXTENDED_STATE_ID to MT8173
Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
Koan-Sin Tan [Thu, 19 Jan 2017 08:43:49 +0000 (16:43 +0800)]
Get rid of use of compatibility API
make 'make ARCH=aarch64 CROSS_COMPILE=aarch64-linux-gnu- PLAT=mt8173
ENABLE_PLAT_COMPAT=0' work.
Change-Id: I13f35d8aef23dfa0e65883fa0be43f1513c9fef5
Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
danh-arm [Mon, 23 Jan 2017 16:49:43 +0000 (16:49 +0000)]
Merge pull request #800 from masahir0y/ifdef
Correct preprocessor conditionals
danh-arm [Mon, 23 Jan 2017 16:47:55 +0000 (16:47 +0000)]
Merge pull request #815 from hzhuang1/dwmmc_v3.9
drivers: add designware emmc driver
Masahiro Yamada [Sun, 25 Dec 2016 15:22:47 +0000 (00:22 +0900)]
Use #ifdef for AARCH32 instead of #if
One nasty part of ATF is some of boolean macros are always defined
as 1 or 0, and the rest of them are only defined under certain
conditions.
For the former group, "#if FOO" or "#if !FOO" must be used because
"#ifdef FOO" is always true. (Options passed by $(call add_define,)
are the cases.)
For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because
checking the value of an undefined macro is strange.
For AARCH32/AARCH64, these macros are defined in the top-level
Makefile as follows:
ifeq (${ARCH},aarch32)
$(eval $(call add_define,AARCH32))
else
$(eval $(call add_define,AARCH64))
endif
This means only one of the two is defined. So, AARCH32/AARCH64
belongs to the latter group where we should use #ifdef or #ifndef.
The conditionals are mostly coded correctly, but I see some mistakes.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 25 Dec 2016 14:36:24 +0000 (23:36 +0900)]
Use #ifdef for IMAGE_BL* instead of #if
One nasty part of ATF is some of boolean macros are always defined
as 1 or 0, and the rest of them are only defined under certain
conditions.
For the former group, "#if FOO" or "#if !FOO" must be used because
"#ifdef FOO" is always true. (Options passed by $(call add_define,)
are the cases.)
For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because
checking the value of an undefined macro is strange.
Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like
follows:
$(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))
$(OBJ): $(2)
@echo " CC $$<"
$$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@
This means, IMAGE_BL* is defined when building the corresponding
image, but *undefined* for the other images.
So, IMAGE_BL* belongs to the latter group where we should use #ifdef
or #ifndef.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
danh-arm [Mon, 23 Jan 2017 14:44:27 +0000 (14:44 +0000)]
Merge pull request #808 from masahir0y/build_fix
Fix parallel building
Haojian Zhuang [Fri, 18 Mar 2016 14:14:16 +0000 (22:14 +0800)]
drivers: add designware emmc driver
Support Designware eMMC driver. It's based on both IO block
and eMMC driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
danh-arm [Mon, 23 Jan 2017 12:00:50 +0000 (12:00 +0000)]
Merge pull request #810 from masahir0y/fiptool_fix
Fix fiptool bug introduced by recent rework
danh-arm [Mon, 23 Jan 2017 11:42:46 +0000 (11:42 +0000)]
Merge pull request #813 from antonio-nino-diaz-arm/an/libfdt
Update libfdt to version 1.4.2
danh-arm [Mon, 23 Jan 2017 11:39:17 +0000 (11:39 +0000)]
Merge pull request #812 from antonio-nino-diaz-arm/an/clear-static-vars
Clear static variables in X509 parser on error
Masahiro Yamada [Thu, 19 Jan 2017 10:31:00 +0000 (19:31 +0900)]
Build: strip trailing slashes from directory paths more simply
Append . then strip /. seems clumsy. Just use $(patsubst %/,%, ).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 12 Jan 2017 01:48:22 +0000 (10:48 +0900)]
Build: Fix parallel building
Soren reports build fails if -j option is given:
$ make -j16 CROSS_COMPILE=aarch64-linux-gnu-
Building fvp
make: *** No rule to make target 'build/fvp/release/bl1/',
needed by 'build/fvp/release/bl1/bl1.ld'. Stop.
make: *** Waiting for unfinished jobs....
The cause of the failure is that $(dir ) leaves a trailing / on the
directory names. It must be ripped off to let Make create the
directory.
There are some ways to fix the issue. Here, I chose to make MAKE_LD
look like MAKE_C and MAKE_S because bl*_dirs seems the central place
of making directories.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Antonio Nino Diaz [Fri, 13 Jan 2017 15:03:19 +0000 (15:03 +0000)]
Clear static variables in X509 parser on error
In mbedtls_x509_parser.c there are some static arrays that are filled
during the integrity check and then read whenever an authentication
parameter is requested. However, they aren't cleared in case of an
integrity check failure, which can be problematic from a security
point of view. This patch clears these arrays in the case of failure.
Change-Id: I9d48f5bc71fa13e5a75d6c45b5e34796ef13aaa2
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 13 Jan 2017 15:03:07 +0000 (15:03 +0000)]
Fix declarations of cache maintenance functions
Fix the parameter type of the maintenance functions of data cache.
Add missing declarations for AArch32 versions of dcsw_op_louis and
dcsw_op_all to match the AAch64 ones.
Change-Id: I4226e8ea4f8b2b5bc2972992c83de659ee0da52c
davidcunado-arm [Wed, 18 Jan 2017 13:47:06 +0000 (13:47 +0000)]
Merge pull request #801 from masahir0y/cleanup
Macro cleanups
davidcunado-arm [Wed, 18 Jan 2017 11:42:42 +0000 (11:42 +0000)]
Merge pull request #811 from davidcunado-arm/dc/dc-scratch-pad
Correct system include order
danh-arm [Wed, 18 Jan 2017 10:55:01 +0000 (10:55 +0000)]
Merge pull request #809 from paulkocialkowski/integration
mt8173: Correct SPM MCDI firmware length
danh-arm [Wed, 18 Jan 2017 10:54:49 +0000 (10:54 +0000)]
Merge pull request #790 from masahir0y/utils
add utility macros to utils.h
Masahiro Yamada [Wed, 28 Dec 2016 09:32:02 +0000 (18:32 +0900)]
qemu: remove unused BL32_SIZE
I do not see any line that references BL32_SIZE.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 28 Dec 2016 07:11:41 +0000 (16:11 +0900)]
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too).
Move them to include/plat/common/common_def.h.
While we are here, suffix the end address with _END instead of
_LIMIT. The _END is a better fit to indicate the linker-derived
real end address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 17 Jan 2017 17:10:08 +0000 (02:10 +0900)]
Use *_END instead of *_LIMIT for linker derived end addresses
The usage of _LIMIT seems odd here, so rename as follows:
BL_CODE_LIMIT --> BL_CODE_END
BL_RO_DATA_LIMIT --> BL_RO_DATA_END
BL1_CODE_LIMIT --> BL1_CODE_END
BL1_RO_DATA_LIMIT --> BL1_RO_DATA_END
Basically, we want to use _LIMIT and _END properly as follows:
*_SIZE + *_MAX_SIZE = *_LIMIT
*_SIZE + *_SIZE = *_END
The _LIMIT is generally defined by platform_def.h to indicate the
platform-dependent memory constraint. So, its typical usage is
ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.")
in a linker script.
On the other hand, _END is used to indicate the end address of the
compiled image, i.e. we do not know it until the image is linked.
Here, all of these macros belong to the latter, so should be
suffixed with _END.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
David Cunado [Tue, 17 Jan 2017 14:40:15 +0000 (14:40 +0000)]
Correct system include order
NOTE - this is patch does not address all occurrences of system
includes not being in alphabetical order, just this one case.
Change-Id: I3cd23702d69b1f60a4a9dd7fd4ae27418f15b7a3
Antonio Nino Diaz [Mon, 16 Jan 2017 16:11:48 +0000 (16:11 +0000)]
libfdt: Replace v1.4.1 by v1.4.2
Delete old version of libfdt at lib/libfdt. Move new libfdt API
headers to include/lib/libfdt and all other files to lib/libfdt.
Change-Id: I32b7888f1f20d62205310e363accbef169ad7b1b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Mon, 16 Jan 2017 16:08:19 +0000 (16:08 +0000)]
libfdt: Minor changes to enable TF integration
* Add libfdt.mk helper makefile
* Remove unused libfdt files
* Minor changes to fdt.h and libfdt.h to make them C99 compliant
Adapted from
754d78b1b331b07456c6ea439e401402a186c626.
Change-Id: I0847f1c2e6e11f0c899b0b7ecc522c0ad7de210c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Mon, 16 Jan 2017 15:55:44 +0000 (15:55 +0000)]
libfdt: Import libfdt v1.4.2
Import libfdt code from https://git.kernel.org/cgit/utils/dtc/dtc.git
tag "v1.4.2" commit
ec02b34c05be04f249ffaaca4b666f5246877dea.
This version includes commit
d0b3ab0a0f46ac929b4713da46f7fdcd893dd3bd,
which fixes a buffer overflow in fdt_offset_ptr().
Change-Id: I05a30511ea68417ee7ff26477da3f99e0bd4e06b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Mon, 16 Jan 2017 17:20:45 +0000 (17:20 +0000)]
checkpatch: Fix regular expressions
When generating the list of files to check by checkpatch.pl, the list
generated by `git ls-files` is filtered by a regular expression with
grep. Due to a malformed regex, the dot of `.md` was considered a
wildcard instead of a dot. This patch fixes this so that it matches
only dots, thus allowing the two following files to be checked:
* tools/cert_create/include/cmd_opt.h
* tools/cert_create/src/cmd_opt.c
Also extended the list of library directories to check by checkpatch
to exclude any folder starting with libfdt.
Change-Id: Ie7bf18efe4df29e364e5d67ba1118515304ed9a4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Masahiro Yamada [Sat, 14 Jan 2017 14:22:02 +0000 (23:22 +0900)]
fiptool: fix add_image() and add_image_desc() implementation
The "make fip" shows the content of the generated FIP at the end of
the build. (This is shown by "fiptool info" command.)
Prior to commit
e0f083a09b29 ("fiptool: Prepare ground for expanding
the set of images at runtime"), the last part of the build log of
make CROSS_COMPILE=aarch64-linux-gnu- BL33=../u-boot/u-boot.bin fip
was like follows:
Trusted Boot Firmware BL2: offset=0xB0, size=0x4188, cmdline="--tb-fw"
EL3 Runtime Firmware BL31: offset=0x4238, size=0x6090, cmdline="--soc-fw"
Non-Trusted Firmware BL33: offset=0xA2C8, size=0x58B51, cmdline="--nt-fw"
With that commit, now it is displayed like follows:
Non-Trusted Firmware BL33: offset=0xB0, size=0x58B51, cmdline="--nt-fw"
EL3 Runtime Firmware BL31: offset=0x58C01, size=0x6090, cmdline="--soc-fw"
Trusted Boot Firmware BL2: offset=0x5EC91, size=0x4188, cmdline="--tb-fw"
You will notice two differences:
- the contents are displayed in BL33, BL31, BL2 order
- the offset values are wrong
The latter is more serious, and means "fiptool info" is broken.
Another interesting change is "fiptool update" every time reverses
the image order. For example, if you input FIP with BL2, BL31, BL33
in this order, the command will pack BL33, BL31, BL2 into FIP, in
this order. Of course, the order of components is not a big deal
except that users will have poor impression about this.
The root cause is in the implementation of add_image(); the
image_head points to the last added image. For example, if you call
add_image() for BL2, BL31, BL33 in this order, the resulted image
chain is:
image_head -> BL33 -> BL31 -> BL2
Then, they are processed from the image_head in "for" loops:
for (image = image_head; image != NULL; image = image->next) {
This means images are handled in Last-In First-Out manner.
Interestingly, "fiptool create" is still correct because
add_image_desc() also reverses the descriptor order and the command
works as before due to the double reverse.
The implementation of add_image() is efficient, but it made the
situation too complicated.
Let's make image_head point to the first added image. This will
add_image() inefficient because every call of add_image() follows
the ->next chain to get the tail. We can solve it by adopting a
nicer linked list structure, but I am not doing as far as that
because we handle only limited number of images anyway.
Do likewise for add_image_desc().
Fixes: e0f083a09b29 ("fiptool: Prepare ground for expanding the set of images at runtime")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Paul Kocialkowski [Sun, 8 Jan 2017 10:23:58 +0000 (11:23 +0100)]
mt8173: Correct SPM MCDI firmware length
The actual length of the firmware is 1001 32 bit words.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Masahiro Yamada [Sat, 14 Jan 2017 15:50:41 +0000 (00:50 +0900)]
fiptool: introduce xzalloc() helper function
We often want to zero out allocated memory.
My main motivation for this commit is to set image::next and
image_desc::next to NULL automatically in the next commit.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
davidcunado-arm [Fri, 13 Jan 2017 17:18:59 +0000 (17:18 +0000)]
Merge pull request #807 from nmenon/upstream/fix-16650-rx
uart: 16550: Fix getc
davidcunado-arm [Fri, 13 Jan 2017 15:52:49 +0000 (15:52 +0000)]
Merge pull request #797 from dp-arm/dp/fiptool-improvements
fiptool: Add support for operating on binary blobs using the UUID
Masahiro Yamada [Mon, 5 Dec 2016 05:28:59 +0000 (14:28 +0900)]
utils: move BIT(n) macro to utils.h
We are duplicating this macro define, and it is useful enough
to be placed in the common place.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
danh-arm [Wed, 11 Jan 2017 14:54:29 +0000 (14:54 +0000)]
Merge pull request #796 from masahir0y/build
Improve dependency file generation
Nishanth Menon [Tue, 10 Jan 2017 15:34:07 +0000 (09:34 -0600)]
uart: 16550: Fix getc
tbz check for RDR status is to check for a bit being zero.
Unfortunately, we are using a mask rather than the bit position.
Further as per http://www.ti.com/lit/ds/symlink/pc16550d.pdf (page 17),
LSR register bit 0 is Data ready status (RDR), not bit position 2.
Update the same to match the specification.
Reported-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
danh-arm [Tue, 10 Jan 2017 11:12:08 +0000 (11:12 +0000)]
Merge pull request #805 from Xilinx/zynqmp/addr_space_size
zynqmp: Migrate to new address space macros
danh-arm [Tue, 10 Jan 2017 11:11:54 +0000 (11:11 +0000)]
Merge pull request #803 from masahir0y/tbb
TBB: fix comment about MBEDTLS_KEY_ALG default
danh-arm [Tue, 10 Jan 2017 11:11:44 +0000 (11:11 +0000)]
Merge pull request #802 from pgeorgi/rk3399m0
rockchip: Build m0 firmware without standard libraries
Soren Brinkmann [Fri, 6 Jan 2017 19:07:00 +0000 (11:07 -0800)]
zynqmp: Migrate to new address space macros
Commit
0029624fe2d4c327ac885d04d5933f82f38e7071 ("Add
PLAT_xxx_ADDR_SPACE_SIZE definition") deprecates 'ADDR_SPACE_SIZE' in
favor of PLAT_(PHY|VIRT)_ADDRESS_SPACE_SIZE. Migrate the zynqmp platform
to use the new interface.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Masahiro Yamada [Fri, 6 Jan 2017 07:51:34 +0000 (16:51 +0900)]
TBB: fix comment about MBEDTLS_KEY_ALG default
This comment block says the default algorithm is ESDSA, while the
code obviously sets the default to RSA:
ifeq (${MBEDTLS_KEY_ALG},)
MBEDTLS_KEY_ALG := rsa
endif
The git log of commit
7d37aa171158 ("TBB: add mbedTLS authentication
related libraries") states available options are:
* 'rsa' (for RSA-2048) (default option)
* 'ecdsa' (for ECDSA-SECP256R1)
So, my best guess is the comment block is wrong.
The mismatch between the code and the comment is confusing. Fix it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 22 Dec 2016 06:23:05 +0000 (15:23 +0900)]
Build: add -MP option to add dummy rules to *.d files
This adds a phony target for each dependency other than the main
file, causing each to depend on nothing.
Without this, the incremental build will fail when a header file
is removed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 22 Dec 2016 05:02:27 +0000 (14:02 +0900)]
Build: generate .d file at the same time as object is created
Currently, .d files are generated before any objects are built.
So, IS_ANYTHING_TO_BUILD flag is needed to avoid such processing for
non-build targets.
There is a cleverer way; just create a .d file simultaneously when
the corresponding object is created. No need to have separate rules
for .d files.
This commit will also fix a bug; -D$(IMAGE) is defined for $(OBJ),
but not for $(PREREQUISITES). So, .d files are generated with
different macro sets from those for .o files, then wrong .d files
are generated.
For example, in lib/cpus/aarch64/cpu_helpers.S
#if IMAGE_BL31
#include <cpu_data.h>
#endif
<cpu_data.h> is parsed for the object when built for BL31, but the
.d file does not pick up that dependency.
With this commit, the compiler will generate .o and .d at the same
time, guaranteeing they are generated under the same circumstances.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 22 Dec 2016 03:51:53 +0000 (12:51 +0900)]
Build: use CPP just for pre-processing
Using AS for pre-processing looks a bit weird, and some assembly
specific options are given for nothing. Rather, use CPP.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 22 Dec 2016 03:39:55 +0000 (12:39 +0900)]
Build: exclude -c flag from TF_CFLAGS
The -c flag should not be included in the global variable TF_CFLAGS;
it should be specified in the build rule only when its target is a
*.o file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Patrick Georgi [Wed, 4 Jan 2017 18:06:14 +0000 (19:06 +0100)]
rockchip: Build m0 firmware without standard libraries
Depending on the compiler used, it might try to link in libc even though
it's not required. Stop it from doing that.
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
dp-arm [Fri, 30 Dec 2016 09:55:48 +0000 (09:55 +0000)]
fiptool: Factor out setting of image descriptor action
An image descriptor contains an action and an argument. The action
indicates the intended operation, as requested by the user. It can be
pack, unpack or remove. Factor out setting those fields to a separate
function to minimize code duplication across the various commands that
modify these fields.
Change-Id: I1682958e8e83c4884e435cff6d0833c67726461f
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
dp-arm [Fri, 30 Dec 2016 09:22:44 +0000 (09:22 +0000)]
fiptool: Remove unreferenced variable `toc_entries_len`
Change-Id: If279680a71e7fa1f801d79b8bc2cd47cd9905d33
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
dp-arm [Wed, 21 Dec 2016 14:59:30 +0000 (14:59 +0000)]
fiptool: Fix format specifier for malloc/strdup wrappers
Change-Id: Ife8f198b4c45961e85ed6f4d463daa59009dab1c
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
dp-arm [Thu, 3 Nov 2016 13:59:26 +0000 (13:59 +0000)]
fiptool: Add support for operating on binary blobs using the UUID
Previously, fiptool only understood a fixed set of images as
specified in tbbr_config.c. It preserved unknown images during
the update, unpack and remove operations but it was not possible to
explicitly refer to one of those unknown images.
Add a new --blob option to create/update/unpack/remove images that
are not known at compile time. This is accomplished by specifying
the UUID and filename pair as shown below:
$ ./fiptool create --blob uuid=
01234567-89ab-cdef-0123-
456789abcdef,file=foo.bin fip.bin
$ ./fiptool info fip.bin
01234567-89ab-cdef-0123-
456789abcdef: offset=0x60, size=0x1AA68
Fixes ARM-software/tf-issues#420
Change-Id: Iaac2504b9a4252289c09e73d29645cbe240f3a82
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>