Fabio Estevam [Sat, 2 Nov 2013 18:40:42 +0000 (16:40 -0200)]
net: phy: atheros: Fix masks for AR8035 and AR8021
The masks were ignoring the last 4 bits which didn't allow detection differences
between the ar8031 and ar8035.
Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Patch: 288018
Chunhe Lan [Fri, 1 Nov 2013 09:17:44 +0000 (17:17 +0800)]
net/phy: Fix the phy id mask of AR8031
The both AR8031 and AR8035 belong to Atheros 803x serial PHY.
So the phy id mask of AR8031 is the same to the phy id mask
of AR8035. The right mask value is 0x4fffff.
This patch has been tested on the P1010 and P1023.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 287748
Claudiu Manoil [Mon, 30 Sep 2013 09:44:47 +0000 (12:44 +0300)]
net: tsec: Fix mac addr setup portability, cleanup
Fix the 32-bit memory access that is not "endianess safe",
i.e. not giving the desired byte layout for LE cpus:
tempval = *((uint *) (tmpbuf + 4)), where 'char tmpbuf[]'.
Free the stack from rendundant local vars:
tmpbuf[] and i.
Use a portable type (u32) for the 32bit tsec register value
holder: tempval.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Claudiu Manoil [Mon, 30 Sep 2013 09:44:46 +0000 (12:44 +0300)]
net: tsec: Use portable regs type (uint->u32)
Use cross arch portable u32 instead of uint for the
tsec registers. Remove the typedefs for the register
struct definitions in the process. Fix long lines.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Claudiu Manoil [Fri, 4 Oct 2013 16:13:53 +0000 (19:13 +0300)]
net: tsec: Use portable types and accessors for BDs
Currently, the buffer descriptor (BD) fields cannot be
correctly accessed by a little endian processor. This
patch fixes the issue by making the access of BDs to be
portable among different cpu architectures.
Use portable data types for the Rx/Tx buffer descriptor
fields. Use portable I/O accessors to insure that the
big endian BDs are correctly accessed by little endian
cpus too, and to insure proper sync with the H/W.
Removed the redundant RTXBD "volatile" type, as proper
synchronization around BD data accesses is provided by
the I/O accessors now.
The "sparse" tool was also used to verify the correctness
of these changes.
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Claudiu Manoil [Mon, 30 Sep 2013 09:44:44 +0000 (12:44 +0300)]
net: tsec: Fix CamelCase issues around BD code
Fix bufPtr and the rxIdx/ txIdx occurrences to
solve the related checkpatch warnings for the
coming patches.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Claudiu Manoil [Mon, 30 Sep 2013 09:44:43 +0000 (12:44 +0300)]
net: fsl_mdio: Fix warnings for __iomem pointers
Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers with
__iomem pointers for tsec. E.g.:
fsl_mdio.c:34:19: warning: incorrect type in argument 1 (different
address spaces)
fsl_mdio.c:34:19: expected unsigned int volatile [noderef]
<asn:2>*addr
fsl_mdio.c:34:19: got unsigned int *<noident>
[...]
tsec.c:91:35: warning: incorrect type in argument 1 (different address
spaces)
tsec.c:91:35: expected struct tsec_mii_mng *phyregs
tsec.c:91:35: got struct tsec_mii_mng [noderef] <asn:2>*phyregs_sgmii
[...]
tsec.c:680:19: warning: incorrect type in assignment (different address
spaces)
tsec.c:680:19: expected struct tsec_mii_mng *regs
tsec.c:680:19: got struct tsec_mii_mng [noderef] <asn:2>*<noident>
[...]
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Claudiu Manoil [Mon, 30 Sep 2013 09:44:42 +0000 (12:44 +0300)]
net: tsec: Cleanup tsec regs init and fix __iomem warns
Remove tsec_t typedef. Define macros as getters of
tsec and mdio register memory regions, for consistent
initialization of various 'regs' fields and also to
manage overly long initialization lines.
Use the __iomem address space marker to address sparse
warnings in tsec.c where IO accessors are used, like:
tsec.c:394:19: warning: incorrect type in argument 1 (different
address spaces)
tsec.c:394:19: expected unsigned int volatile [noderef]
<asn:2>*addr
tsec.c:394:19: got unsigned int *<noident>
[...]
Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers
with __iomem pointers for tsec.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Claudiu Manoil [Mon, 30 Sep 2013 09:44:41 +0000 (12:44 +0300)]
net: tsec: Fix priv pointer in tsec_mcast_addr()
Access to privlist[1] (hardcoded referece to the 2nd tsec's
priv area) is neither correct nor does it make sense in the
current context. Each tsec dev has access to its own priv
instance only, and hence to its own set of group address
registers (GADDR) to filter multicast addresses.
This fix leads to removal of the unused (faulty) privlist[]
and related global static vars. Note that mcast() can be
called only after eth_device allocation and init, and hence
after priv area allocation, so dev->priv is correctly
initialized upon mcast() call.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 278990
Claudiu Manoil [Mon, 30 Sep 2013 09:44:40 +0000 (12:44 +0300)]
net: tsec: Fix and cleanup tsec_mcast_addr()
There are several implementation issues for tsec_mcast_addr()
addressed by this patch:
* unmanaged, not portable r/w access to registers; fixed with
setbits_be32()/ clrbits_be32()
* use of volatile pointers
* unnecessary forced cast to u8 for the ether_crc() result
* removed redundant parens
* corrected some comment slips
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 279000
Claudiu Manoil [Mon, 30 Sep 2013 09:44:39 +0000 (12:44 +0300)]
net: Fix mcast function pointer prototype
This fixes the following compiler warnings when activating
CONFIG_MCAST_TFTP:
tsec.c: In function 'tsec_mcast_addr':
tsec.c:130:2: warning: passing argument 2 of 'ether_crc' makes pointer
from integer without a cast [enabled by default]
In file included from /work/u-boot-net/include/common.h:874:0,
from tsec.c:15:
/work/u-boot-net/include/net.h:189:5: note: expected 'const unsigned
char *' but argument is of type 'u8'
tsec.c: In function 'tsec_initialize':
tsec.c:646:13: warning: assignment from incompatible pointer type
[enabled by default]
eth.c: In function 'eth_mcast_join':
eth.c:358:2: warning: passing argument 2 of 'eth_current->mcast' makes
integer from pointer without a cast [enabled by default]
eth.c:358:2: note: expected 'u32' but argument is of type 'u8 *'
In the eth_mcast_join() implementation, eth_current->mcast()
takes a u8 pointer to the multicast mac address and not a ip
address value as implied by its prototype.
Fix parameter type mismatch for tsec_macst_addr() (tsec.c):
ether_crc() takes a u8 pointer not a u8 value.
mcast() is given a u8 pointer to the multicats mac address.
Update parameter type for the rest of mcast() instances.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 278989
Alexey Brodkin [Wed, 25 Sep 2013 15:27:48 +0000 (19:27 +0400)]
net: designware: Fix alignment of buffer descriptors
It's important that buffer descriptors are aligned in accordance to GMAC
data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
for every bus width type.
If buffer descriptor is improperly aligned GMAC discards lower bits of
provided address and as a result reads from improper location that
doesn't match expected fields.
Commit
ef76025a99247cdb8f927a2c9f15400678dfb599 "net: Multiple
updates/enhancements to designware.c" introduced another structure
member "link_printed" right before buffer descriptors while "padding"
member was left untouched. This together with alignment of structure
itself to 16-byte boundary forces buffer descriptoprs always to be
4-byte aligned that causes driver complete disfunction if GMAC bus width
is 64 or 128-bit.
Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
aligned.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Patch: 277902
Alexey Brodkin [Wed, 25 Sep 2013 13:33:10 +0000 (17:33 +0400)]
net: designware: Respect "bus mode" register contents on SW reset
"bus mode" register contains lots of fields and some of them don't
expect to be written with 0 (zero). So since we're only interested in
resetting MAC (which is done with setting the least significant bit of
this register with "0") I believe it's better to modify only 1 bit of
the register.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Vipin Kumar <vipin.kumar@st.com>
Patch: 277864
Nobuhiro Iwamatsu [Tue, 24 Sep 2013 06:38:33 +0000 (15:38 +0900)]
net: sh-eth: Add support R8A7791
R8A7791 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7791.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Joe Hershberger <joe.hershberger@gmail.com>
Heiko Schocher [Sun, 22 Sep 2013 07:55:49 +0000 (09:55 +0200)]
net, phy: fix AR8031 phy_mask
AR8035 driver will be never applied because of wrong mask for
AR8031 driver. Fix this.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reported-by: Pavel Nakonechny <pavel.nakonechny@skitlab.ru>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 276944
Thierry Reding [Fri, 20 Sep 2013 14:03:44 +0000 (16:03 +0200)]
net: rtl8169: Add support for RTL8168evl/8111evl
This chip is compatible with other RTL8168 chips and can be found on the
NVIDIA Cardhu and Beaver boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276475
Thierry Reding [Fri, 20 Sep 2013 14:03:41 +0000 (16:03 +0200)]
net: rtl8169: Fix format string
currticks() is defined as get_timer(0), which returns an unsigned long,
so use %lu instead of %d to print the result.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276473
Stefano Babic [Mon, 2 Sep 2013 13:42:32 +0000 (15:42 +0200)]
net: add support for extended registers to mdio command
Some phys (Micrel) have additional registers that can
be accessed using a special sequence. This patch allows
to use standard "mdio" command to accesss these registers.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Mon, 2 Sep 2013 13:42:31 +0000 (15:42 +0200)]
net: add function to read/write extended registers in Micrel Phy
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Mon, 2 Sep 2013 13:42:30 +0000 (15:42 +0200)]
net: add extended function to phy API
Some phys (Micrel) has extended registers that must be
accessed in a special way. Add pointers to the phy driver
structure to allow to use these functions with mdio command.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Mon, 2 Sep 2013 13:42:29 +0000 (15:42 +0200)]
net: fix mask for phy Micrel KSZ9031
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Mon, 2 Sep 2013 13:42:28 +0000 (15:42 +0200)]
phy: add missing constants for Micrel KSZ9031
Signed-off-by: Stefano Babic <sbabic@denx.de>
Bhupesh Sharma [Sat, 31 Aug 2013 23:10:52 +0000 (04:40 +0530)]
net/phy: realtek: Fix the PHY ID mask to ensure the correct Realtek PHY is detected
The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following
method to determine which driver is to be loaded for a particular PHY
module:
list_for_each(entry, &phy_drivers) {
drv = list_entry(entry, struct phy_driver, list);
if ((drv->uid & drv->mask) == (phy_id & drv->mask))
return drv;
}
This means that a drv->mask of 0xfffff0 will return incorrect phy driver
for the logic above, even if the drv->uid is anything other than
something ending with a 0x0.
For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.
This patch fixes this issue.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Arpit Goel [Fri, 23 Aug 2013 14:48:05 +0000 (20:18 +0530)]
net: phy/vitesse: Add support for VSC8514 phy module
This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.
Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Nobuhiro Iwamatsu [Thu, 22 Aug 2013 04:22:04 +0000 (13:22 +0900)]
net: sh-eth: Add support R8A7790
R8A7790 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7790.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Thu, 22 Aug 2013 04:22:03 +0000 (13:22 +0900)]
net: sh-eth: Add invalidate cache control for rmobile (ARM SoC)
The sh-eth of rmobile needs to use invalidate_cache* function.
This patch adds invalidate_cache* function.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Patch: 268948
Nobuhiro Iwamatsu [Thu, 22 Aug 2013 04:22:02 +0000 (13:22 +0900)]
net: sh-eth: Add control for padding size of packet descriptor
sh-eth can change the alignment size of a packet descriptor according to BUS
size. This patch adds this function.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Thu, 22 Aug 2013 04:22:01 +0000 (13:22 +0900)]
net: sh-eth: Change cache API of SH
The cache API of SH was changed from dcache_wback_range to flush_dcache_range.
sh-eth uses dcache_wback_range. This patch changes to flush_dcache_range.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Sascha Silbe [Sun, 11 Aug 2013 15:08:23 +0000 (17:08 +0200)]
NET: mvgbe: avoid unused variable warning when used without phylib support
Avoid a recently introduced unused variable warning for boards that
use mvgbe but not phylib.
Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Patch: 266334
Stephan Bauroth [Thu, 8 Aug 2013 11:44:41 +0000 (13:44 +0200)]
net: trivial: Fix typos in mii field descriptions
Signed-off-by: Stephan Bauroth <stephan.bauroth@iav.de>
Patch: 265707
Shengzhou Liu [Thu, 8 Aug 2013 08:33:35 +0000 (16:33 +0800)]
phylib: update atheros ar803x phy
As AR8031 and AR8033 have same PHY ID 0x4dd074, they use the
common driver. Currently AR8031_driver didn't work for AR8033,
hence updated it to have it work on AR8031/AR8033.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
rockly [Sat, 3 Aug 2013 10:09:05 +0000 (18:09 +0800)]
net: tftp: Make sure timeout will not effect wrap offset
When the block 0 store to the memory of client and timeout at this
moment. Because of no ACK packet, the server will send block 0 again,
if this client reconnect to the server at this time,
TftpBlockWrapOffset will become larger than it should be.
Signed-off-by: Rockly <rocklygnome@gmail.com>
Patch: 264417
Tom Rini [Sun, 17 Nov 2013 01:23:22 +0000 (20:23 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Masahiro Yamada [Mon, 11 Nov 2013 05:36:10 +0000 (14:36 +0900)]
fs: descend into sub directories when it is necessary
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:09 +0000 (14:36 +0900)]
Makefile: move fs/fat/ entry to drivers/Makefile
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:08 +0000 (14:36 +0900)]
arm: rmobile: Do not create a symbolic link to sh timer
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:07 +0000 (14:36 +0900)]
powerpc: mpc824x: Do not create a symbolic link to bedbug_603e.c
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:06 +0000 (14:36 +0900)]
powerpc: mpc83xx: Do not create a symbolic link to ddr-gen2.c
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:05 +0000 (14:36 +0900)]
powerpc: mpc83xx: delete unused rules
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:04 +0000 (14:36 +0900)]
Makefile: delete unused lines
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:03 +0000 (14:36 +0900)]
tools: Makefile: delete redundant lines
HOSTOS is defined and exported at the top Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:02 +0000 (14:36 +0900)]
config.mk: delete unnecessary lines
SPL_BIN is already defined in spl/Makefile
and it is used only in spl/Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:01 +0000 (14:36 +0900)]
Makefile: refactor a little
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:36:00 +0000 (14:36 +0900)]
Makefile: rename all libraries to built-in.o
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:59 +0000 (14:35 +0900)]
drivers/net/npe: descend only when CONFIG_IXP4XX_NPE=y
CONFIG_IXP4XX_NPE is defined only for CPU ixp.
It is not necessary to filter by CPU ixp.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:58 +0000 (14:35 +0900)]
drivers/net/fm: descend only when CONFIG_FMAN_ENET=y
CONFIG_FMAN_ENET is defined only for CPU mpc85xx.
We do not need to filter by CPU mpc85xx.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:57 +0000 (14:35 +0900)]
drivers/qe: move the entry to drivers/Makefile
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:56 +0000 (14:35 +0900)]
powerpc: move mpc8xxx entry under arch/powerpc/cpu/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:55 +0000 (14:35 +0900)]
Makefile: merge $(LIBBOARD) into $(LIBS)
We do not need to handle $(LIBBOARD) and $(LIBS) separately.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:54 +0000 (14:35 +0900)]
Makefile: make directories by Makefile.build
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:53 +0000 (14:35 +0900)]
drivers: tpm: clean up unused code
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:52 +0000 (14:35 +0900)]
lib: descend into sub directories only when it is necessary
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:51 +0000 (14:35 +0900)]
drivers: descend into sub directories only when it is necessary
- Descend into drivers/fpga/ only when CONFIG_FPGA=y
- Descend into drivers/bios_emulator only when CONFIG_BIOSEMU=y
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:50 +0000 (14:35 +0900)]
Makefile: specifiy an explicite object name rather than $(BOARD).o
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:35:49 +0000 (14:35 +0900)]
Makefile: abolish COBJS, SOBJS, etc.
The support for COBJS, COBJS-y, SOBJS, SOBJS-y, GLCOBJS, GLSOBJS
from scripts/Makefile.build.
Going forward we need to use Kbuild style consistently.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 05:13:33 +0000 (14:13 +0900)]
board: Do not add -DCONFIG_SYS_TEXT_BASE in board config.mk
Board config.mk do not need to add -DCONFIG_SYS_TEXT_BASE
to CPPFLAGS because the top level config.mk does instead.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 03:45:40 +0000 (12:45 +0900)]
examples: remove the remainders of dead board
Commit
309a292e deleted OXC board, but
missed to remove the standalone example specific to OXC board.
eepro100_eeprom.c has been an orphan file for a long term.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 03:15:58 +0000 (12:15 +0900)]
cosmetic: README.scrapyard: Add eNET board
Commit
7e8c53d7 removed eNET board but missed to
add eNET to README.scrapyard.
This commit adds it for the record.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Graeme Russ <graeme.russ@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Mon, 11 Nov 2013 03:11:12 +0000 (12:11 +0900)]
nios2: remove unnecessary header include path
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Masahiro Yamada [Mon, 11 Nov 2013 01:30:20 +0000 (10:30 +0900)]
board: cogent: include header files in a more natural way
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Mon, 11 Nov 2013 00:49:36 +0000 (09:49 +0900)]
configs: clean up unused macro CONFIG_L2_OFF
Since commit
c2dd0d455 and
45bf05854 introduced
the new cache maintainance framework to ARM,
CONFIG_L2_OFF has not been used at all.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tom Rini [Fri, 15 Nov 2013 17:20:33 +0000 (12:20 -0500)]
TI:omap: Update u-boot-spl.lds for i2c multibus/multiadapter update
In
6789e84 we update u-boot-spl.lds for OMAP to ensure we include
adapter information, as we use i2c during SPL. However, the regex used
also means we included commands that may have been built. On omap5_uevm
this leads to a failure as we include the command from the do_tca642x
command, and fail to link. The fix is to restrict our regex to only the
i2c list parts.
Signed-off-by: Tom Rini <trini@ti.com>
Gabor Juhos [Tue, 12 Nov 2013 15:47:32 +0000 (16:47 +0100)]
malta: use unmapped flash base address
The physical base address of the NOR flash is 0x1e000000
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc00000-0x1fffffff range.
Currently, U-Boot uses the mapped address to access the
flash, which does not work in recent qemu versions.
Since commit
a427338b222b43197c2776cbc996936df0302f51
(mips_malta: correct reading MIPS revision at 0x1fc00010)
writing to the mapped address space causes a CPU exception.
Due to the exception, U-Boot hangs during boot when it tries
to detect the CFI flash chip.
Use the correct physical address for the MALTA_FLASH_BASE
constant to fix the problem. In order to avoid relocation
problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE
constants.
The change makes it possible to start U-Boot on a Malta
board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also
works on older versions (tested with 1.1.1, 1.2.2, 1.4.2,
1.5.3).
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Tom Rini [Thu, 14 Nov 2013 16:48:15 +0000 (11:48 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Laurentiu TUDOR [Wed, 23 Oct 2013 12:20:45 +0000 (15:20 +0300)]
powerpc/85xx: fix broken cpu "clock-frequency" property
When indexing freqProcessor[] we use the first
value in the cpu's "reg" property, which on
new e6500 cores IDs the threads.
But freqProcessor[] should be indexed with a
core index so, when fixing "the clock-frequency"
cpu node property, access the freqProcessor[]
with the core index derived from the "reg' property.
If we don't do this, last half of the "cpu" nodes
will have broken "clock-frequency" values.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Laurentiu TUDOR [Wed, 23 Oct 2013 12:20:27 +0000 (15:20 +0300)]
powerpc/t4240: fix per pci endpoint liodn offsets
Update the code that builds the pci endpoint liodn
offset list so that it doesn't overlap with other
liodns and doesn't generate negative offsets like:
fsl,liodn-offset-list = <0 0xffffffcd 0xffffffcf
0xffffffd1 0xffffffd3
0xffffffd5 0xffffffd7
0xffffffd9 0xffffffdb>;
The update consists in adding a parameter to the
function that builds the list to specify the base
liodn.
On PCI v2.4 use the old base = 256 and, on PCI 3.0
where some of the PCIE liodns are larger than 256,
use a base = 1024. The version check is based on
the PCI controller's version register.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Laurentiu TUDOR [Wed, 23 Oct 2013 12:20:16 +0000 (15:20 +0300)]
powerpc/t4240: set pcie liodn in the correct register
The liodn for the T4240's PCIE controller is no longer set
through a register in the guts register block but with one
in the PCIE register block itself.
Use the already existing SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: York Sun <yorksun@freescale.com>
ramneek mehresh [Sat, 19 Oct 2013 14:03:04 +0000 (19:33 +0530)]
powerpc/83xx: Define USB1 and USB2 base addr for MPC834x
Define base addresse for both MPH(USB1) and DR(USB2) controllers
for MPC834x socs
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Priyanka Jain [Fri, 18 Oct 2013 11:49:23 +0000 (17:19 +0530)]
powerpc/t104xrdb: Add T1042RDB_PI board support
T1042RDB_PI is Freescale Reference Design Board supporting the T1042
QorIQ Power Architecture™ processor. T1042 is a reduced personality
of T1040 SoC without Integrated 8-port Gigabit. The board is designed
with low power features targeted for Printing Image Market.
T1042RDB_PI is similar to T1040RDB board with few differences like
it has video interface, supports T1042 personality
T1042RDB_PI board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Two on-board RGMII 10/100/1G ethernet ports.
- SERDES Connections, 8 lanes supporting:
— PCI
— SATA 2.0
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 1GB 8-bit NAND flash
- NOR: 128MB 16-bit NOR Flash
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- CPLD
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Video
- DIU supports video at up to 1280x1024x32bpp
- HDMI connector
- Power Supplies
- USB
- Supports two USB 2.0 ports with integrated PHYs
- Two type A ports with 5V@1.5A per port.
- SDHC
- SDHC/SDXC connector
- SPI
- On-board 64MB SPI flash
- I2C
- Device connected: EEPROM, thermal monitor, VID controller, RTC
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Priyanka Jain [Fri, 18 Oct 2013 11:49:06 +0000 (17:19 +0530)]
powerpc/t104xrdb: Add T1040RDB board support
T1040RDB is Freescale Reference Design Board supporting
the T1040 QorIQ Power Architecture™ processor.
T1040RDB board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
- PCI
- SGMII
- QSGMII
- SATA 2.0
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 1GB 8-bit NAND flash
- NOR: 128MB 16-bit NOR Flash
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- CPLD
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- USB
- Supports two USB 2.0 ports with integrated PHYs
- Two type A ports with 5V@1.5A per port.
- SDHC
- SDHC/SDXC connector
- SPI
- On-board 64MB SPI flash
- I2C
- Devices connected: EEPROM, thermal monitor, VID controller
- Other IO
- Two Serial ports
- ProfiBus port
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: fixed Makefile]
Acked-by: York Sun <yorksun@freescale.com>
Priyanka Jain [Fri, 18 Oct 2013 07:00:21 +0000 (12:30 +0530)]
powerpc/t1040: Update defines to support T1040SoC personalities
T1040 Soc has four personalities:
-T1040 (4 cores with L2 switch)
-T1042:Reduced personality of T1040 without L2 switch
-T1020:Reduced personality of T1040 with less cores(2 cores)
-T1022:Reduced personality of T1040 with 2 cores and without L2 switch
Update defines in arch/powerpc header files, Makefiles and in
driver/net/fm/Makefile to support all T1040 personalities
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: fixed Makefiles]
Acked-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Fri, 11 Oct 2013 15:02:38 +0000 (23:02 +0800)]
powerpc/p1010rdb: update readme for p1010rdb-pa and p1010rdb-pb
- Remove duplicate doc/README.p1010rdb
- Rename README to README.P1010RDB-PA
- Add new README.P1010RDB-PB
P1010RDB-PB is a variation of previous P1010RDB-PA board.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Prabhakar Kushwaha [Tue, 1 Oct 2013 08:26:43 +0000 (13:56 +0530)]
powerpc/t1040: enable PBL tool for T1040
Use a default RCW of protocol 0x66.
A PBI configure file which uses CPC as 256KB SRAM. It can be used by
PBL tool on T1040 to build a pbl boot image.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Alexey Brodkin [Thu, 7 Nov 2013 13:52:33 +0000 (17:52 +0400)]
designware_i2c: remove 10msec delay in i2c_xfer_finish
This delay applies to any data transfer on I2C bus.
For example 1kB data read with per-byte access (which happens if
environment is stored in I2C EEPROM) takes more than 10 seconds.
Moreover data bus driver has to care about bus state and data transfer,
but not about internal states of attached devices.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Vipin KUMAR <vipin.kumar@st.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Alexey Brodkin [Thu, 7 Nov 2013 13:52:18 +0000 (17:52 +0400)]
designware_i2c: disable i2c controller during target address setup
As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4)
register succeed only when IC_ENABLE[0] is set to 0.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Vipin KUMAR <vipin.kumar@st.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Alexey Brodkin [Thu, 7 Nov 2013 13:51:43 +0000 (17:51 +0400)]
cmd_eeprom: fix i2c_{read|write} usage if env is in I2C EEPROM
Data "offset" is not used directly in case of I2C EEPROM. Istead it is
split into "block number" and "offset within mentioned block". Which are
"addr[0]" and "addr[1]" respectively.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Heiko Schocher [Fri, 8 Nov 2013 07:33:22 +0000 (08:33 +0100)]
i2c, omap1510: remove i2c driver
remove omap1510 i2c driver, as there is no board which uses it
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Jian Zhang <jzhang@ti.com>
Heiko Schocher [Fri, 8 Nov 2013 06:30:53 +0000 (07:30 +0100)]
i2c, zynq: convert zynq i2c driver to new multibus/multiadapter framework
- add zync i2c driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Heiko Schocher [Tue, 22 Oct 2013 09:03:18 +0000 (11:03 +0200)]
i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework
- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tom Rini <trini@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Michael Jones <michael.jones@matrix-vision.de>
Cc: Raphael Assenat <raph@8d.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Mon, 4 Nov 2013 13:29:12 +0000 (14:29 +0100)]
i2c: mxs_i2c: Squash endless loop
The endless waiting for a bit to be set can cause a hang, add a timeout
so we prevent such situation. A testcase for such a hang is below. The
testcase assumes a device to be present at address 0x50 and a device to
NOT be present at address 0x42 . Also note that the "sleep 1" induced
delays are imperative for this bug to manifest .
i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \
i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \
i2c read 0x42 0x0.2 0x10 0x42000000
The expected result of the above command is:
Error reading the chip.
Error reading the chip.
While without this patch, we observe a hang in the last read from 0x42
precisely when waiting for this bit to be set.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Nobuhiro Iwamatsu [Tue, 29 Oct 2013 04:33:51 +0000 (13:33 +0900)]
i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework
This updates to new I2C framwwork on sh_i2c.
And this also updates boards(kzm9g and ecovec) that using sh_i2c.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nikita Kiryanov [Wed, 16 Oct 2013 14:23:29 +0000 (17:23 +0300)]
cm_t35: use scf0403 driver
Use scf0403 driver to add scf0403x LCD support for cm-t35 and cm-t3730
boards.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Wed, 16 Oct 2013 14:23:28 +0000 (17:23 +0300)]
omap3_dss: define DSS_ONOFF
Add DSS_ONOFF to polarity defines
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Anatolij Gustschin <agust@denx.de>
Nikita Kiryanov [Wed, 16 Oct 2013 14:23:27 +0000 (17:23 +0300)]
lcd: add DataImage SCF0403x LCD panel support
Add SPI-based driver for DataImage SCF0403852GGU04 and SCF0403526GGU20
LCD panels.
Cc: Tom Rini <trini@ti.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Nikita Kiryanov [Wed, 16 Oct 2013 14:23:26 +0000 (17:23 +0300)]
spi: define SPI_XFER_ONCE
The flag combination "SPI_XFER_BEGIN | SPI_XFER_END" is a common use
case of spi_xfer, and it can easily cause an already long line (spi_xfer
takes 5 parameters) to go over the 80 character limit.
define SPI_XFER_ONCE to be a shorter version of the above flag combination.
Cc: Tom Rini <trini@ti.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Wed, 16 Oct 2013 14:23:25 +0000 (17:23 +0300)]
spi: omap3: add support for more word lengths
Current implementation only supports 8 bit word lengths, even though
omap3 can handle anything between 4 and 32.
Update the spi interface to support changing the SPI word length,
and implement it in omap3_spi driver to support the full range of
possible word lengths.
This implementation is backwards compatible by defaulting to the old
behavior of 8 bit word lengths.
Also, it required a change to the omap3_spi non static I/O functions,
but since they are not used anywhere else, no collateral changes are required.
Cc: Tom Rini <trini@ti.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Wed, 16 Oct 2013 14:23:24 +0000 (17:23 +0300)]
spi: omap3: remove semicolon from #define
Remove unnecessary semicolon from #define SPI_WAIT_TIMEOUT
Cc: Tom Rini <trini@ti.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Andre Heider [Sat, 9 Nov 2013 10:07:53 +0000 (11:07 +0100)]
video: bcm2835: respect the pitch value
Depending on the firmware's video options [1] the active SDTV or
HDTV mode can yield a framebuffer with noncontiguous horizontal lines,
giving a messed up display, for both, u-boot and the loaded kernel.
Fix this by setting lcd_line_length to the pitch value of the configured
framebuffer.
[1] http://elinux.org/RPiconfig#Video_mode_options
Signed-off-by: Andre Heider <a.heider@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Anatolij Gustschin [Sat, 9 Nov 2013 10:00:09 +0000 (11:00 +0100)]
lcd: allow overriding lcd_get_size()
Remove the redundant lcd_line_length initialisation which
sneaked in when an earlier version of the patch of commit
6d330719 has been rebased.
Some lcd drivers need to setup lcd_line_length not from the
panel_info parameters but by different means. Make the
lcd_get_size() weak to allow setting lcd_line_length in
a driver specific way.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Andre Heider [Tue, 22 Oct 2013 20:27:20 +0000 (22:27 +0200)]
ARM: bcm2835: add missing mbox overscan response field
Add the missing "right" field to struct bcm2835_mbox_tag_overscan.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Wolfgang Denk [Mon, 11 Nov 2013 19:12:19 +0000 (20:12 +0100)]
MPC824x: remove obsolete "PN62" board
The MPC824x processors have long reached EOL, and the PN62 board has
not seen any board-specific updates for more than a decade. It is now
causing build issues. Instead of wasting time on things nobody is
interested in any more, we rather drop this board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@grandegger.com>
cc: Tom Rini <trini@ti.com>
Daniel Schwierzeck [Fri, 8 Nov 2013 23:30:14 +0000 (00:30 +0100)]
time: fix gcc warnings on MIPS64
Commit
8dfafdde88eb3e71d5569846396ae67a91017232 introduced
new gcc warnings on MIPS64:
time.c: In function 'tick_to_time':
time.c:59:2: warning: comparison of distinct pointer types lacks a cast [enabled by default]
time.c:59:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default]
In file included from time.c:10:0:
./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *'
time.c: In function 'usec_to_tick':
time.c:76:2: warning: comparison of distinct pointer types lacks a cast [enabled by default]
time.c:76:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default]
In file included from time.c:10:0:
./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *'
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tom Rini [Mon, 11 Nov 2013 14:40:34 +0000 (09:40 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Paul Burton [Mon, 11 Nov 2013 11:03:26 +0000 (11:03 +0000)]
malta: arch/mips/include/asm/malta.h SPDX license tag
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent changes.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Albert ARIBAUD [Sat, 9 Nov 2013 11:51:47 +0000 (12:51 +0100)]
Merge branch 'iu-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
board/compulab/cm_t35/Makefile
board/corscience/tricorder/Makefile
board/ppcag/bg0900/Makefile
drivers/bootcount/Makefile
include/configs/omap4_common.h
include/configs/pdnb3.h
Makefile conflicts are due to additions/removals of
object files on the ARM branch vs KBuild introduction
on the main branch. Resolution consists in adjusting
the list of object files in the main branch version.
This also applies to two files which are not listed
as conflicting but had to be modified:
board/compulab/common/Makefile
board/udoo/Makefile
include/configs/omap4_common.h conflicts are due to
the OMAP4 conversion to ti_armv7_common.h on the ARM
side, and CONFIG_SYS_HZ removal on the main side.
Resolution is to convert as this icludes removal of
CONFIG_SYS_HZ.
include/configs/pdnb3.h is due to a removal on ARM side.
Trivial resolution is to remove the file.
Note: 'git show' will also list two files just because
they are new:
include/configs/am335x_igep0033.h
include/configs/omap3_igep00x0.h
Gabor Juhos [Thu, 24 Oct 2013 12:32:00 +0000 (14:32 +0200)]
malta: define CONFIG_MEMSIZE_IN_BYTES
The memsize environment variable must contain the
memory size in bytes on the Malta board. Otherwise
Linux will use wrong memory size which causes a kernel
panic.
Define CONFIG_MEMSIZE_IN_BYTES in malta.h to avoid
that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Fri, 8 Nov 2013 11:18:59 +0000 (11:18 +0000)]
malta: add myself to maintainers
This patch adds me as a maintainer of the malta(el) board(s). I have
access to physical Malta boards and the desire for U-boot to run well on
them.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Fri, 8 Nov 2013 11:18:58 +0000 (11:18 +0000)]
malta: add script & instructions to flash U-boot
This patch adds a script which may be used with MIPS Navigator Console
and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta
development board.
Please see the newly added doc/README.malta for usage instructions.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Fri, 8 Nov 2013 11:18:57 +0000 (11:18 +0000)]
malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.
This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
This matches the setup used by YAMON.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Fri, 8 Nov 2013 11:18:56 +0000 (11:18 +0000)]
malta: store environment in flash
Allow the environment to be stored in the monitor flash of a Malta
board. The environment is stored in the final 128KB of the flash, which
both leaves the majority of the flash available for U-boot code and also
matches the location which YAMON uses.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
projects / project / bcm63xx / u-boot.git / log