openwrt/staging/blogic.git
5 years agodrm/amd/powerplay: vega20: fix uninitialized variable use
Arnd Bergmann [Mon, 8 Jul 2019 14:07:59 +0000 (16:07 +0200)]
drm/amd/powerplay: vega20: fix uninitialized variable use

If smu_get_current_rpm() fails, we can't use the output,
as that may be uninitialized:

drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: error: variable 'current_rpm' is used uninitialized whenever '?:' condition is false [-Werror,-Wsometimes-uninitialized]
        ret = smu_get_current_rpm(smu, &current_rpm);
              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:735:3: note: expanded from macro 'smu_get_current_rpm'
        ((smu)->funcs->get_current_rpm ? (smu)->funcs->get_current_rpm((smu), (speed)) : 0)
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3024:12: note: uninitialized use occurs here
        percent = current_rpm * 100 / pptable->FanMaximumRpm;
                  ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: note: remove the '?:' if its condition is always true
        ret = smu_get_current_rpm(smu, &current_rpm);
              ^
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:735:3: note: expanded from macro 'smu_get_current_rpm'
        ((smu)->funcs->get_current_rpm ? (smu)->funcs->get_current_rpm((smu), (speed)) : 0)
         ^
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3020:22: note: initialize the variable 'current_rpm' to silence this warning
        uint32_t current_rpm;

Propagate the error code in that case.

Fixes: ee0db82027ee ("drm/amd/powerplay: move PPTable_t uses into asic level")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: dcn20: include linux/delay.h
Arnd Bergmann [Mon, 8 Jul 2019 13:53:18 +0000 (15:53 +0200)]
drm/amd/display: dcn20: include linux/delay.h

Without this header, we get a compiler error in some configurations:

.../dc/dcn20/dcn20_hwseq.c: In function 'dcn20_hwss_wait_for_blank_complete':
.../dc/dcn20/dcn20_hwseq.c:1493:3: error: implicit declaration of function 'udelay' [-Werror=implicit-function-declaration]

Note: the use of udelay itself may be problematic, as can occupy
the CPU for 200ms in a busy-loop here.

Fixes: 7ed4e6352c16 ("drm/amd/display: Add DCN2 HW Sequencer and Resource")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoamdgpu: make pmu support optional
Arnd Bergmann [Mon, 8 Jul 2019 14:41:43 +0000 (16:41 +0200)]
amdgpu: make pmu support optional

When CONFIG_PERF_EVENTS is disabled, we cannot compile the pmu
portion of the amdgpu driver:

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:48:38: error: no member named 'hw' in 'struct perf_event'
        struct hw_perf_event *hwc = &event->hw;
                                     ~~~~~  ^
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:51:13: error: no member named 'attr' in 'struct perf_event'
        if (event->attr.type != event->pmu->type)
            ~~~~~  ^
...

Use conditional compilation for this file.

Fixes: 9c7c85f7ea1f ("drm/amdgpu: add pmu counters")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percent
Nathan Chancellor [Thu, 4 Jul 2019 05:52:18 +0000 (22:52 -0700)]
drm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percent

clang warns (trimmed for brevity):

drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: warning:
variable 'current_rpm' is used uninitialized whenever '?:' condition is
false [-Wsometimes-uninitialized]
        ret = smu_get_current_rpm(smu, &current_rpm);
              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

smu_get_current_rpm expands to a ternary operator conditional on
smu->funcs->get_current_rpm being not NULL. When this is false,
current_rpm will be uninitialized. Zero initialize current_rpm to
avoid using random stack values if that ever happens.

Fixes: ee0db82027ee ("drm/amd/powerplay: move PPTable_t uses into asic level")
Link: https://github.com/ClangBuiltLinux/linux/issues/588
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freq
Nathan Chancellor [Thu, 4 Jul 2019 05:52:15 +0000 (22:52 -0700)]
drm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freq

clang warns (trimmed for brevity):

drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:1098:10: warning:
variable 'freq' is used uninitialized whenever '?:' condition is false
[-Wsometimes-uninitialized]
                ret =  smu_get_current_clk_freq_by_table(smu, clk_id, &freq);
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

If get_current_clk_freq_by_table is ever NULL, freq will fail to be
properly initialized. Zero initialize it to avoid using uninitialized
stack values.

smu_get_current_clk_freq_by_table expands to a ternary operator
conditional on smu->funcs->get_current_clk_freq_by_table being not NULL.
When this is false, freq will be uninitialized. Zero initialize freq to
avoid using random stack values if that ever happens.

Fixes: e36182490dec ("drm/amd/powerplay: fix dpm freq unit error (10KHz -> Mhz)")
Link: https://github.com/ClangBuiltLinux/linux/issues/585
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Use memset to initialize metrics structs
Nathan Chancellor [Thu, 4 Jul 2019 05:52:13 +0000 (22:52 -0700)]
drm/amd/powerplay: Use memset to initialize metrics structs

clang warns:

drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:601:33: warning:
suggest braces around initialization of subobject [-Wmissing-braces]
        static SmuMetrics_t metrics = {0};
                                       ^
                                       {}
drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:905:26: warning:
suggest braces around initialization of subobject [-Wmissing-braces]
        SmuMetrics_t metrics = {0};
                                ^
                                {}
2 warnings generated.

One way to fix these warnings is to add additional braces like clang
suggests; however, there has been a bit of push back from some
maintainers[1][2], who just prefer memset as it is unambiguous, doesn't
depend on a particular compiler version[3], and properly initializes all
subobjects. Do that here so there are no more warnings.

[1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/
[2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/
[3]: https://lore.kernel.org/lkml/20181116150432.2408a075@redhat.com/

Fixes: 98e1a543c7b1 ("drm/amd/powerplay: add function get current clock freq interface for navi10")
Fixes: ab43c4bf1cc8 ("drm/amd/powerplay: fix fan speed show error (for hwmon pwm)")
Link: https://github.com/ClangBuiltLinux/linux/issues/583
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/mes10.1: Fix header guard
Nathan Chancellor [Thu, 4 Jul 2019 05:52:12 +0000 (22:52 -0700)]
drm/amdgpu/mes10.1: Fix header guard

clang warns:

 In file included from drivers/gpu/drm/amd/amdgpu/nv.c:53:
 drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:24:9: warning:
 '__MES_V10_1_H__' is used as a header guard here, followed by #define of
 a different macro [-Wheader-guard]
 #ifndef __MES_V10_1_H__
         ^~~~~~~~~~~~~~~
 drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:25:9: note:
 '__MES_v10_1_H__' is defined here; did you mean '__MES_V10_1_H__'?
 #define __MES_v10_1_H__
         ^~~~~~~~~~~~~~~
         __MES_V10_1_H__
 1 warning generated.

Capitalize the V.

Fixes: 886f82aa7a1d ("drm/amdgpu/mes10.1: add ip block mes10.1 (v2)")
Link: https://github.com/ClangBuiltLinux/linux/issues/582
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add temperature sensor support for navi10
Kevin Wang [Thu, 4 Jul 2019 02:56:18 +0000 (10:56 +0800)]
drm/amd/powerplay: add temperature sensor support for navi10

the hwmon interface need temperature sensor type support.
1. SENSOR_HOTSPOT_TEMP
2. SENSOR_EDGE_TEMP(SENSOR_GPU_TEMP)
3. SENSOR_MEM_TEMP

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix scheduler timeout calc
Flora Cui [Mon, 24 Jun 2019 08:48:33 +0000 (16:48 +0800)]
drm/amdgpu: fix scheduler timeout calc

scheduler timeout is in jiffies
v2: move timeout check to amdgpu_device_get_job_timeout_settings after
parsing the value
v3: add lockup_timeout param check. 0: keep default value. negative:
infinity timeout.
v4: refactor codes.

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Prepare for hmm_range_register API change (v2)
Philip Yang [Tue, 2 Jul 2019 22:39:45 +0000 (18:39 -0400)]
drm/amdgpu: Prepare for hmm_range_register API change (v2)

An upcoming change in the hmm_range_register API requires passing in
a pointer to an hmm_mirror instead of mm_struct. To access the
hmm_mirror we need pass bo instead of ttm to amdgpu_ttm_tt_get_user_pages
because mirror is part of amdgpu_mn structure, which is accessible from bo.

v2: fix building without CONFIG_HMM_MIRROR (Arnd)

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add mode1 (psp) reset for navi asic
Kevin Wang [Fri, 5 Jul 2019 04:51:45 +0000 (12:51 +0800)]
drm/amdgpu: add mode1 (psp) reset for navi asic

add mode1 (by psp) reset for navi asic.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Disable ras features on all IPs before gpu reset
xinhui pan [Thu, 4 Jul 2019 02:54:58 +0000 (10:54 +0800)]
drm/amdgpu: Disable ras features on all IPs before gpu reset

Perform a ras_suspend to disable ras on all IPs to workaround
some ROCm stability issue.

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add baco smu reset function for smu11
Kevin Wang [Fri, 5 Jul 2019 20:58:46 +0000 (15:58 -0500)]
drm/amd/powerplay: add baco smu reset function for smu11

add baco reset support for smu11.
it can help gpu do asic reset when gpu recovery.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: increase waiting time for smu response
Jack Xiao [Wed, 3 Jul 2019 03:56:07 +0000 (11:56 +0800)]
drm/amd/powerplay: increase waiting time for smu response

We observed some SMU commands take more time for execution,
so increase waiting time for response.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay/smu7_hwmgr: replace blocking delay with non-blocking
Yrjan Skrimstad [Thu, 30 May 2019 00:08:21 +0000 (02:08 +0200)]
drm/amd/powerplay/smu7_hwmgr: replace blocking delay with non-blocking

This driver currently contains a repeated 500ms blocking delay call
which causes frequent major buffer underruns in PulseAudio. This patch
fixes this issue by replacing the blocking delay with a non-blocking
sleep call.

Signed-off-by: Yrjan Skrimstad <yrjan@skrimstad.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Use kmemdup rather than duplicating its implementation
Fuqian Huang [Wed, 3 Jul 2019 16:27:18 +0000 (00:27 +0800)]
drm/amdgpu: Use kmemdup rather than duplicating its implementation

kmemdup is introduced to duplicate a region of memory in a neat way.
Rather than kmalloc/kzalloc + memcpy, which the programmer needs to
write the size twice (sometimes lead to mistakes), kmemdup improves
readability, leads to smaller code and also reduce the chances of mistakes.
Suggestion to use kmemdup rather than using kmalloc/kzalloc + memcpy.

Reviewed-by: Christian König <Christian.Koenig@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Disable idle optimization for chained runlist
Felix Kuehling [Thu, 20 Jun 2019 18:54:35 +0000 (14:54 -0400)]
drm/amdkfd: Disable idle optimization for chained runlist

This works around difficult-to-reproduce soft hangs on oversubscribed
runlists.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Add chained_runlist_idle_disable flag to pm4_mes_runlist
Felix Kuehling [Thu, 20 Jun 2019 18:50:52 +0000 (14:50 -0400)]
drm/amdkfd: Add chained_runlist_idle_disable flag to pm4_mes_runlist

New flag to disable an idle runlist optimization that is causing soft
hangs with some diffult-to-reproduce customer workloads. This will
serve as a workaround until the problem can be reproduced and the
root-cause determined.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Fix tracking of invalid userptrs
Felix Kuehling [Sat, 29 Jun 2019 05:50:35 +0000 (01:50 -0400)]
drm/amdgpu: Fix tracking of invalid userptrs

Restore the code that resets mem->invalid. Othewise so mapping
userptrs after they got an MMU notifiers would always be skipped.

This also avoids unnecessarily calling get_user_pages on BOs that
have not been invalidated since the last try.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Use FENCE_OWNER_KFD in process_sync_pds_resv
Felix Kuehling [Fri, 7 Jun 2019 15:33:21 +0000 (11:33 -0400)]
drm/amdgpu: Use FENCE_OWNER_KFD in process_sync_pds_resv

We don't want eviction fences to trigger when waiting for page table
updates to complete during restore. In theory there shouldn't be any
unsignaled eviction fences in the PD reservation object, but I'm
seeing them in instrumented code for reasons not fully understood.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Print a warning when the runlist becomes oversubscribed
Felix Kuehling [Thu, 20 Jun 2019 19:37:37 +0000 (15:37 -0400)]
drm/amdkfd: Print a warning when the runlist becomes oversubscribed

Oversubscription of queues or processes results in poor performance
mostly because HWS blinbly schedules busy and idle queues, resulting
in poor occupancy if many queues are idle.

Let users know with a warning message when transitioning from a
non-oversubscribed to an oversubscribed runlist.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: remove an unused variable
Jack Xiao [Tue, 2 Jul 2019 06:58:22 +0000 (06:58 +0000)]
drm/amdkfd: remove an unused variable

Just for cleanup.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/display: fix interrupt client id for navi
Alex Deucher [Tue, 2 Jul 2019 16:39:50 +0000 (11:39 -0500)]
drm/amdgpu/display: fix interrupt client id for navi

All asics newer than vega10 use client ids, so simplify the
check.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: remove duplicated PCIE atomics request
Jack Xiao [Wed, 29 May 2019 05:52:17 +0000 (13:52 +0800)]
drm/amdkfd: remove duplicated PCIE atomics request

Since amdgpu has always requested PCIE atomics, kfd don't
need duplicated PCIE atomics enablement. Referring to amdgpu
request result is enough.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: enable PCIE atomics ops support
Jack Xiao [Thu, 23 May 2019 16:13:14 +0000 (00:13 +0800)]
drm/amdgpu: enable PCIE atomics ops support

GPU atomics operation depends on PCIE atomics support.
Always enable PCIE atomics ops support in case that
it hasn't been enabled.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add field indicating if has PCIE atomics support
Jack Xiao [Wed, 29 May 2019 05:24:22 +0000 (13:24 +0800)]
drm/amdgpu: add field indicating if has PCIE atomics support

The new field in amdgpu device is used to record whether the
system has PCIE atomics support. The field can be exposed to
UMD or kfd whether PCIE atomics have supported.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: use hardware fan control if no powerplay fan table
Evan Quan [Thu, 27 Jun 2019 03:01:04 +0000 (11:01 +0800)]
drm/amd/powerplay: use hardware fan control if no powerplay fan table

Otherwise, you may get divided-by-zero error or corrput the SMU fan
control feature.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Slava Abramov <slava.abramov@amd.com>
Acked-by: Slava Abramov <slava.abramov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix MGPU fan boost enablement for XGMI reset
Evan Quan [Wed, 26 Jun 2019 02:53:39 +0000 (10:53 +0800)]
drm/amdgpu: fix MGPU fan boost enablement for XGMI reset

MGPU fan boost feature should not be enabled until all the
devices from the same hive are all back from reset.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: handle AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID on gfx10
Marek Olšák [Wed, 19 Jun 2019 23:26:59 +0000 (19:26 -0400)]
drm/amdgpu: handle AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID on gfx10

Add the gfx10 equivalent of the gfx9 code.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)
Marek Olšák [Wed, 19 Jun 2019 23:26:24 +0000 (19:26 -0400)]
drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)

v2: update emit_ib_size
(though it's still wrong because it was wrong before)

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx10: use reset default for PA_SC_FIFO_SIZE
Alex Deucher [Mon, 1 Jul 2019 13:39:19 +0000 (08:39 -0500)]
drm/amdgpu/gfx10: use reset default for PA_SC_FIFO_SIZE

Recommended by the hw team.

Reviewed-and-Tested-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZE
Alex Deucher [Mon, 1 Jul 2019 13:38:12 +0000 (08:38 -0500)]
drm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZE

Recommended by the hw team.

Reviewed-and-Tested-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Don't skip display settings in hwmgr_resume()
Lyude Paul [Thu, 20 Jun 2019 23:21:26 +0000 (19:21 -0400)]
drm/amdgpu: Don't skip display settings in hwmgr_resume()

I'm not entirely sure why this is, but for some reason:

921935dc6404 ("drm/amd/powerplay: enforce display related settings only on needed")

Breaks runtime PM resume on the Radeon PRO WX 3100 (Lexa) in one the
pre-production laptops I have. The issue manifests as the following
messages in dmesg:

[drm] UVD and UVD ENC initialized successfully.
amdgpu 0000:3b:00.0: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring vce1 test failed (-110)
[drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <vce_v3_0> failed -110
[drm:amdgpu_device_resume [amdgpu]] *ERROR* amdgpu_device_ip_resume failed (-110).

And happens after about 6-10 runtime PM suspend/resume cycles (sometimes
sooner, if you're lucky!). Unfortunately I can't seem to pin down
precisely which part in psm_adjust_power_state_dynamic that is causing
the issue, but not skipping the display setting setup seems to fix it.
Hopefully if there is a better fix for this, this patch will spark
discussion around it.

Fixes: 921935dc6404 ("drm/amd/powerplay: enforce display related settings only on needed")
Cc: Evan Quan <evan.quan@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Huang Rui <ray.huang@amd.com>
Cc: Rex Zhu <Rex.Zhu@amd.com>
Cc: Likun Gao <Likun.Gao@amd.com>
Cc: <stable@vger.kernel.org> # v5.1+
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: update smu11_driver_if_navi10.h
tiancyin [Thu, 27 Jun 2019 06:19:37 +0000 (14:19 +0800)]
drm/amd/powerplay: update smu11_driver_if_navi10.h

update the smu11_driver_if_navi10.h since navi10 smu fw
update to 42.28

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix a couple of spelling mistakes
Colin Ian King [Wed, 26 Jun 2019 13:24:27 +0000 (14:24 +0100)]
drm/amd/display: fix a couple of spelling mistakes

There are a couple of spelling mistakes in dm_error messages and
a comment. Fix these.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: no memory activity support on Vega10
Evan Quan [Fri, 21 Jun 2019 01:46:14 +0000 (09:46 +0800)]
drm/amd/powerplay: no memory activity support on Vega10

Make mem_busy_percent sysfs interface invisible on Vega10.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: remove unnecessary warning message on gpu reset
shaoyunl [Wed, 26 Jun 2019 17:42:24 +0000 (13:42 -0400)]
drm/amdkfd: remove unnecessary warning message on gpu reset

In XGMI configuration, more than one asic can be reset at same time,
kfd is able to handle this and no need to trigger the warning

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Set queue_preemption_timeout_ms default value
Oak Zeng [Wed, 26 Jun 2019 15:16:56 +0000 (10:16 -0500)]
drm/amdgpu: Set queue_preemption_timeout_ms default value

Set default value of this kernel parameter to 9000

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add missing smu_get_clk_info_from_vbios() call
Evan Quan [Tue, 25 Jun 2019 15:03:00 +0000 (23:03 +0800)]
drm/amd/powerplay: add missing smu_get_clk_info_from_vbios() call

This seems a merge error.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: support runtime ppfeatures setting on Navi10
Evan Quan [Tue, 25 Jun 2019 03:06:08 +0000 (11:06 +0800)]
drm/amd/powerplay: support runtime ppfeatures setting on Navi10

Implement Navi10 backend for runtime ppfeatures status retrieving
and setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: check prerequisite for VCN power gating
Evan Quan [Mon, 17 Jun 2019 09:27:49 +0000 (17:27 +0800)]
drm/amd/powerplay: check prerequisite for VCN power gating

VCN DPM is a necessary prerequisite for VCN power gating.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/ttm: return -EBUSY if waiting for busy BO fails
Felix Kuehling [Wed, 26 Jun 2019 06:32:43 +0000 (02:32 -0400)]
drm/ttm: return -EBUSY if waiting for busy BO fails

Returning -EAGAIN prevents ttm_bo_mem_space from trying alternate
placements and can lead to live-locks in amdgpu_cs, retrying
indefinitely and never succeeding.

Fixes: d367bd2a5e2b12 ("drm/ttm: fix busy memory to fail other user v10")
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: drop copy/paste leftover to fix big endian
Alex Deucher [Thu, 27 Jun 2019 14:13:41 +0000 (09:13 -0500)]
drm/amdgpu: drop copy/paste leftover to fix big endian

The buf swap field doesn't exist on RB1.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix warning on 32 bit
Alex Deucher [Thu, 27 Jun 2019 13:48:19 +0000 (08:48 -0500)]
drm/amdgpu: fix warning on 32 bit

Properly cast pointer to int.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoMerge tag 'drm-next-5.3-2019-06-25' of git://people.freedesktop.org/~agd5f/linux...
Dave Airlie [Thu, 27 Jun 2019 02:33:56 +0000 (12:33 +1000)]
Merge tag 'drm-next-5.3-2019-06-25' of git://people.freedesktop.org/~agd5f/linux into drm-next

drm-next-5.3-2019-06-25:

Merge drm-next

amdgpu:
- SR-IOV L1 policy fixes
- Removed no longer needed vram_page_split module parameter
- Add module parameter to override default ABM level
- Gamma fixes
- No need to check return values for debugfs
- Improve HMM error handling
- Avoid possible OOM situations when lots of thread are submitting with
  memory contention
- Improve hw i2c access abritration
- DSC (Display Stream Compression) support in DC
- Initial navi10 support
  * DC support
  * GFX/Compute support
  * SDMA support
  * Power Management support
  * VCN support
- Static checker fixes
- Misc cleanups
- fix long udelay on arm

amdkfd:
- Implement priority controls for gfx9
- Enable VEGAM
- Rework mqd allocation and init
- Circular locking fix
- Fix SDMA queue allocation race condition
- No need to check return values for debugfs
- Add proc style process information
- Initial navi10 support

radeon:
- No need to check return values for debugfs

UAPI changes:
- GDDR6 added to vram type query
- New Navi10 details added gpu info query
- Navi family added to asic family query

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625195520.3817-1-alexander.deucher@amd.com
5 years agoMerge tag 'for-airlie-tda998x' of git://git.armlinux.org.uk/~rmk/linux-arm into drm...
Dave Airlie [Thu, 27 Jun 2019 01:48:02 +0000 (11:48 +1000)]
Merge tag 'for-airlie-tda998x' of git://git.armlinux.org.uk/~rmk/linux-arm into drm-next

TDA998x updates:
- improve the driver's approach to audio, adding support for more I2S
  based formats, particularly other justifications, and preparing the
  driver to support other bclk ratios.

- add support for pixel repeated modes, tested with a Panasonic TV.

- correct the quantisation range handling; in particular, do not send
  full range RGB to the sink when the sink does not support full range
  RGB.

- Send the HDMI vendor info frame when required.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Russell King <rmk@armlinux.org.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625125005.GA31503@rmk-PC.armlinux.org.uk
5 years agodrm/amd/powerplay: make athub pg bit configured by pg_flags
Huang Rui [Fri, 14 Jun 2019 08:19:36 +0000 (16:19 +0800)]
drm/amd/powerplay: make athub pg bit configured by pg_flags

The athub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: make mmhub pg bit configured by pg_flags
Huang Rui [Fri, 14 Jun 2019 08:12:51 +0000 (16:12 +0800)]
drm/amd/powerplay: make mmhub pg bit configured by pg_flags

The mmhub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add feature check in unforce_dpm_levels function (v2)
Kevin Wang [Mon, 17 Jun 2019 05:05:00 +0000 (13:05 +0800)]
drm/amd/powerplay: add feature check in unforce_dpm_levels function (v2)

if not check dpm feature is enabled, it will cause show smc send message
failed log in dmesg log.
eg:
echo "auto" > power_dpm_force_performance_level

v2: whitespace fix (Alex)

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rui Teng <rui.teng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: check gfxclk dpm enablement before proceeding
Evan Quan [Fri, 14 Jun 2019 09:04:36 +0000 (17:04 +0800)]
drm/amd/powerplay: check gfxclk dpm enablement before proceeding

Support gfxclk dpm disablement.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: print smu versions only if version mismatch
Kevin Wang [Tue, 11 Jun 2019 07:21:06 +0000 (15:21 +0800)]
drm/amd/powerplay: print smu versions only if version mismatch

only printf smu version when if version not matched.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: fix fan speed show error (for hwmon pwm)
Kevin Wang [Thu, 6 Jun 2019 09:12:34 +0000 (17:12 +0800)]
drm/amd/powerplay: fix fan speed show error (for hwmon pwm)

the navi asic can't get current rpm by MSG_GetCurrentRpm,
it will cause show fan rpm error, use Metrics_t to replace it.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: update infoframe after dig fe is turned on (v2)
Nicholas Kazlauskas [Mon, 24 Jun 2019 17:14:14 +0000 (13:14 -0400)]
drm/amd/display: update infoframe after dig fe is turned on (v2)

[Why]
The AVI infoframe is incorrectly programmed on DCN1/2 when enabling a
stream - causing the wrong pixel encoding to be used for display.

This is because the AVI infoframe is programmed before the DIG BE is
connected to the FE and turned on, so enabling the AFMT block doesn't
actually work and the registers subsequently can't be written to.

[How]
Program the infoframe *after* turning on the DIG FE. This was the
behavior previously used but it was incorrectly reverted
when adding the DCN2 HW sequencer code.

v2: Don't call update_info_frame twice

Fixes: 7ed4e6352c16fe01 ("drm/amd/display: Add DCN2 HW Sequencer and Resource")
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay:clean up the residual mutex for smu_hw_init
Prike Liang [Mon, 24 Jun 2019 09:25:26 +0000 (17:25 +0800)]
drm/amd/powerplay:clean up the residual mutex for smu_hw_init

The mutex for procting SMU during hw_init was removed as system
will be deadlock when smu_populate_umd_state_clk try get SMU mutex.
Therefore need remove the residual mutex from failed path.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: sdma_v4_0_start: initialize r
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:44 +0000 (17:15 +0200)]
drm/amd/amdgpu: sdma_v4_0_start: initialize r

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c:1167 sdma_v4_0_start() error: uninitialized symbol 'r'.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Fix style issues in dcn20_resource.c
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:43 +0000 (17:15 +0200)]
drm/amd/amdgpu: Fix style issues in dcn20_resource.c

Inconsistent indentation and mixed use of brackets.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Check stream in amdgpu_dm_commit_planes
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:42 +0000 (17:15 +0200)]
drm/amd/amdgpu: Check stream in amdgpu_dm_commit_planes

Reported by smatch:
amdgpu_dm.c:5637 amdgpu_dm_commit_planes() error: we previously assumed 'acrtc_state->stream' could be null
This seems to be checked for null pretty consistently elsewhere.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: amdgpu_hwmon_show_temp: initialize temp
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:41 +0000 (17:15 +0200)]
drm/amd/amdgpu: amdgpu_hwmon_show_temp: initialize temp

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:1496 amdgpu_hwmon_show_temp() error: uninitialized symbol 'temp'.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Fix amdgpu_set_pp_od_clk_voltage error check
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:40 +0000 (17:15 +0200)]
drm/amd/amdgpu: Fix amdgpu_set_pp_od_clk_voltage error check

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:693 amdgpu_set_pp_od_clk_voltage() error: uninitialized symbol 'ret'.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Indent AMD_IS_APU properly
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:39 +0000 (17:15 +0200)]
drm/amd/amdgpu: Indent AMD_IS_APU properly

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/soc15.c:715 soc15_get_pcie_usage() warn: inconsistent indenting
And a similar one in si.c.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/display: drop ifdefs around comments
Alex Deucher [Mon, 24 Jun 2019 15:13:56 +0000 (10:13 -0500)]
drm/amdgpu/display: drop ifdefs around comments

No need to protect the comments.  The DCN1_01 config
was dopped anyway.  Got accidently brought back with the
navi merge.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/display: switch udelay to msleep
Alex Deucher [Tue, 25 Jun 2019 13:54:21 +0000 (08:54 -0500)]
drm/amdgpu/display: switch udelay to msleep

We may need to sleep for up to 80ms
(8ms per each of up to 10 loop iterations):

/* First DPCD read after VDD ON can fail if the particular board
 * does not have HPD pin wired correctly. So if DPCD read fails,
 * which it should never happen, retry a few times. Target worst
 * case scenario of 80 ms.
 */

Switch udelay to msleep to avoid limits on arm.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/powerplay: FEATURE_MASK is 64 bit so use ULL
Alex Deucher [Tue, 25 Jun 2019 13:48:15 +0000 (08:48 -0500)]
drm/amdgpu/powerplay: FEATURE_MASK is 64 bit so use ULL

ULL is needed for 32 bit arches.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoMerge branch 'drm-next' into drm-next-5.3
Alex Deucher [Tue, 25 Jun 2019 13:42:25 +0000 (08:42 -0500)]
Merge branch 'drm-next' into drm-next-5.3

Backmerge drm-next and fix up conflicts due to drmP.h removal.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/edid: use for_each_displayid_db where applicable
Andres Rodriguez [Wed, 19 Jun 2019 18:30:33 +0000 (14:30 -0400)]
drm/edid: use for_each_displayid_db where applicable

Replace the duplicated versions of the while loop with the new macro.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190619183033.6922-1-andresx7@gmail.com
5 years agodrm/edid: parse CEA blocks embedded in DisplayID
Andres Rodriguez [Wed, 19 Jun 2019 18:09:01 +0000 (14:09 -0400)]
drm/edid: parse CEA blocks embedded in DisplayID

DisplayID blocks allow embedding of CEA blocks. The payloads are
identical to traditional top level CEA extension blocks, but the header
is slightly different.

This change allows the CEA parser to find a CEA block inside a DisplayID
block. Additionally, it adds support for parsing the embedded CTA
header. No further changes are necessary due to payload parity.

This change fixes audio support for the Valve Index HMD.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.15
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190619180901.17901-1-andresx7@gmail.com
5 years agoMerge tag 'drm/tegra/for-5.3-rc1' of git://anongit.freedesktop.org/tegra/linux into...
Dave Airlie [Tue, 25 Jun 2019 02:59:35 +0000 (12:59 +1000)]
Merge tag 'drm/tegra/for-5.3-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v5.3-rc1

This contains a couple of small improvements and cleanups for the Tegra
DRM driver.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621150753.19550-1-thierry.reding@gmail.com
5 years agoMerge commit 'refs/for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm...
Dave Airlie [Tue, 25 Jun 2019 02:49:08 +0000 (12:49 +1000)]
Merge commit 'refs/for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next

Picking up pace on the upstreaming of Komeda driver, with quite a lot
of new features added this time. On top of that we have the small
cleanups and improved usage of the debugfs functions. Please pull!

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Liviu Dudau <Liviu.Dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621095349.GI17204@e110455-lin.cambridge.arm.com
5 years agodrm/amdgpu: disable gfxoff on navi10
tiancyin [Thu, 20 Jun 2019 06:56:17 +0000 (14:56 +0800)]
drm/amdgpu: disable gfxoff on navi10

The gfxoff brings unstability, disable it by default

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix modprobe failure for uvd_4/5/6
Hawking Zhang [Mon, 24 Jun 2019 11:26:00 +0000 (19:26 +0800)]
drm/amdgpu: fix modprobe failure for uvd_4/5/6

For uvd_4/5/6, amdgpu driver will only power on them when
there are jobs assigned to decode/enc rings.uvd_4/5/6 dpm was broken
since amdgpu_dpm_set_powergating_by_smu only covers gfx block.

The change would add more IP block support in amdgpu_dpm_set_powergating_by_smu
For GFX/UVD/VCN/VCE, if the new SMU driver is supported, invoke new
power gate helper function smu_dpm_set_power_gate, otherwise, fallback to
legacy powerplay helper function pp_set_powergating_by_smu. For other IP blocks
always invoke legacy powerplay helper function.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tianci Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: drop unused df init callback
Alex Deucher [Fri, 21 Jun 2019 21:32:25 +0000 (16:32 -0500)]
drm/amdgpu: drop unused df init callback

It was replaced with the sw_init callback so is no longer
needed.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add sw_init to df_v1_7
Jonathan Kim [Fri, 21 Jun 2019 02:23:35 +0000 (22:23 -0400)]
drm/amdgpu:  add sw_init to df_v1_7

change df_init to df_sw_init df 1.7 to prevent regression issues on pre-vega20
products when callback is called in sw_common_sw_init.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Set gws_mask to 64 bit 1s
Oak Zeng [Fri, 14 Jun 2019 15:55:50 +0000 (10:55 -0500)]
drm/amdkfd: Set gws_mask to 64 bit 1s

Previous kfd doesn't use gws so this mask was set to 0.
Set it to 64 bit 1s because now kfd can use all 64 gws
resources.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display/dc: set num-dwb = 1 as navi10 asic cap
hersen wu [Thu, 23 May 2019 22:49:39 +0000 (18:49 -0400)]
drm/amd/display/dc: set num-dwb = 1 as navi10 asic cap

during navi10 bring up, dwb causes system hang.
to continue debug major issue, disable dwb by
set num-dwb = 0. the hang issue is not reproduced now
by enable num-dwb =1. dc source is shared by all os.
win needs num-dwb = 1.

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: make clk_mgr call enable_pme_wa
Su Sung Chung [Thu, 30 May 2019 18:59:03 +0000 (14:59 -0400)]
drm/amd/display: make clk_mgr call enable_pme_wa

[why]
Before for raven and navi we are calling pp_smu functions for pme

[how]
refactor a code so we will call clk_mgr's enable_pme_wa function so we
can use pme_wa for future asics. This way we don't need to worry about
different ASIC since clk_mgr already have that information

Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: expose dentist_get_did_from_divider
Charlene Liu [Tue, 28 May 2019 23:44:32 +0000 (19:44 -0400)]
drm/amd/display: expose dentist_get_did_from_divider

for future use

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add missing mod_vmid destructor
Dmytro Laktyushkin [Wed, 29 May 2019 15:24:35 +0000 (11:24 -0400)]
drm/amd/display: add missing mod_vmid destructor

mod_vmid is missing a destructor.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add Underflow Asserts to dc
Thomas Lim [Mon, 29 Apr 2019 20:05:42 +0000 (16:05 -0400)]
drm/amd/display: Add Underflow Asserts to dc

[Why]
For debugging underflow issues it can be useful to have asserts when the
underflow initially occurs.

[How]
Read the underflow status registers after actions that have a high risk
of causing underflow and assert that no underflow occurred. If underflow
occurred, clear the bit.

Signed-off-by: Thomas Lim <Thomas.Lim@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: move vmid determination logic to a module
Dmytro Laktyushkin [Wed, 22 May 2019 22:05:41 +0000 (18:05 -0400)]
drm/amd/display: move vmid determination logic to a module

Currently vmid is decided internally inside dc. With the introduction
of new asics we are required to coordinate vmid use with external
components.

This change converts vmid logic to a DAL module allowing vmid to be
passed in as a parameter to DC.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: dcn2 use fixed clocks.
Charlene Liu [Tue, 28 May 2019 17:52:09 +0000 (13:52 -0400)]
drm/amd/display: dcn2 use fixed clocks.

[Description]
dcn2 use fixed clocks and not program DPP CLK or Disp_CLK.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add p010 and ayuv plane caps
Charlene Liu [Wed, 22 May 2019 22:25:33 +0000 (18:25 -0400)]
drm/amd/display: add p010 and ayuv plane caps

for future use

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: update DCN2 uclk switch time
Jun Lei [Mon, 27 May 2019 18:15:27 +0000 (14:15 -0400)]
drm/amd/display: update DCN2 uclk switch time

[why]
value commited to by HW team is going to be higher
than pre-silicon, and will cause underflow if driver not
updated

[how]
update hardcoded value, update pstate switching logic
to fix case where with long uclk time we won't allow switch
even when we should

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Rework CRTC color management
Nicholas Kazlauskas [Thu, 9 May 2019 16:14:58 +0000 (12:14 -0400)]
drm/amd/display: Rework CRTC color management

[Why]
To prepare for the upcoming DRM plane color management properties
we need to correct a lot of wrong behavior and assumptions made for
CRTC color management.

The documentation added by this commit in amdgpu_dm_color explains
how the HW color pipeline works and its limitations with the DRM
interface.

The current implementation does the following wrong:
- Implicit sRGB DGM when no CRTC DGM is set
- Implicit sRGB RGM when no CRTC RGM is set
- No way to specify a non-linear DGM matrix that produces correct output
- No way to specify a correct RGM when a linear DGM is used

We had workarounds for passing kms_color tests but not all of the
behavior we had wrong was covered by these tests (especially when
it comes to non-linear DGM). Testing both DGM and RGM at the same time
isn't something kms_color tests well either.

[How]
The specifics for how color management works in AMDGPU and the new
behavior can be found by reading the documentation added to
amdgpu_dm_color.c from this patch.

All of the incorrect cases from the old implementation have been
addressed for the atomic interface, but there still a few TODOs for
the legacy one.

Note: this does cause regressions for kms_color@pipe-a-ctm-* over HDMI.

The result looks correct from visual inspection but the CRC no longer
matches. For reference, the test was previously doing the following:

linear degamma -> CTM -> sRGB regamma -> RGB to YUV (709) -> ...

Now the test is doing:

linear degamma -> CTM -> linear regamma -> RGB to YUV (709) -> ...

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Use macro for invalid OPP ID
Wesley Chalmers [Thu, 23 May 2019 15:54:12 +0000 (11:54 -0400)]
drm/amd/display: Use macro for invalid OPP ID

[WHY]
This is meant to make it clearer that 0xf is not a valid OPP ID, and
that code making use of OPP IDs should not accept this value.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: expose enable dp output functions
Eric Bernstein [Thu, 16 May 2019 22:00:05 +0000 (18:00 -0400)]
drm/amd/display: expose enable dp output functions

expose this function for future use

Implementation of DCN3 DIO Link Encoder including
dpcs register headers.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add dwb stere caps and version
Charlene Liu [Tue, 21 May 2019 17:32:02 +0000 (13:32 -0400)]
drm/amd/display: add dwb stere caps and version

add dwb stereo caps and ver for future use

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Alpha plane type
Eric Bernstein [Wed, 22 May 2019 15:30:41 +0000 (11:30 -0400)]
drm/amd/display: Alpha plane type

Add Alpha surface type for future use

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: making DCN20 WM table non-overlapping
Jun Lei [Wed, 22 May 2019 17:20:34 +0000 (13:20 -0400)]
drm/amd/display: making DCN20 WM table non-overlapping

[why]
Existing behavior has overlapping ranges resulting in path
dependent SMU selection

[how]
Make ranges non-overlapping, resulting in non-path dependent
selection

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: update dsc max_target_bpp to 16 bpp
Wenjing Liu [Wed, 22 May 2019 15:50:20 +0000 (11:50 -0400)]
drm/amd/display: update dsc max_target_bpp to 16 bpp

[why]
According to the latest specs, the max_target bpp sink
can support is 16 bpp.

[how]
update dsc max_target_bpp to 16

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add some parameters to validate bandwidth functions
Charlene Liu [Mon, 3 Jun 2019 14:53:44 +0000 (10:53 -0400)]
drm/amd/display: add some parameters to validate bandwidth functions

required for new checks.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: update DSC MST DP virtual DPCD peer device enumeration policy
Wenjing Liu [Thu, 16 May 2019 17:01:51 +0000 (13:01 -0400)]
drm/amd/display: update DSC MST DP virtual DPCD peer device enumeration policy

[why]
Current policy assumes virtual DPCD peer device as
an individual MST branch device with 1 input and 1 output.
However this is only true for virtual DP-to-DP peer device.
In general there are three types of virtual DP peer devices.
1. Sink peer device with virtual DPCD.
2. Virtual DP-to-DP Peer device with virtual DPCD.
3. Virtual DP-to-HDMI Protocol Converter Peer Device with
Virtual DPCD.
So we should break the assumption and handle all three types.

[how]
DP-to-DP peer device will have virtual DPCD cap upstream.
Sink peer device will have virtual DPCD on the logical port.
Dp to HDMI protocol converter peer device will have virtual DPCD
on its converter port.
For DSC capable Synaptics non VGA port we workaround by enumerating
a virutal DPCD peer device on its upstream
even if it doesn't have one.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add support for forcing DCFCLK without affecting watermarks
Jun Lei [Fri, 17 May 2019 15:08:02 +0000 (11:08 -0400)]
drm/amd/display: add support for forcing DCFCLK without affecting watermarks

[why]
useful for debugging

[how]
plumb a debug option in dc

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Copy stream updates onto streams
Nicholas Kazlauskas [Tue, 14 May 2019 13:19:01 +0000 (09:19 -0400)]
drm/amd/display: Copy stream updates onto streams

[Why]
Almost every function in DC that works with stream state expects that
the current state on the stream is the one that it should be writing
out. These functions are typically triggered by specifying a particular
stream update - but the actual contents of the stream update itself
are ignored, leaving it to the DM to actually update the stream state
itself.

The problem with doing this in DM is a matter of timing. On Linux
most of this is incorrectly done in atomic check, when we actually want
it to be done during atomic commit tail while access to DC is locked.

To give an example, a commit requesting to modify color management
state for DM could come in, be rejected, but still have modified
the actual system state for the stream since it's shared memory. The
next time color management gets programmed it'll use the rejected
color management info - which might not even still be around if it's
a custom transfer function.

So a reasonable place to perform this is within DC itself and this is
the model that's currently in use for surface updates. DC can even
compare the current system state to the incoming surface update to
determine update level, something that can't currnetly be done with the
framework for stream updates.

[How]
Duplicate the framework used for surface updates for stream updates
as well. Copy all the updates after checking the update type.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix incorrect vba type
Ilya Bakoulin [Thu, 16 May 2019 18:33:14 +0000 (14:33 -0400)]
drm/amd/display: Fix incorrect vba type

SwathWidthCThisState is expected to be an unsigned int array.

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: removing MODULO change for dcn2
Martin Leung [Wed, 15 May 2019 19:50:51 +0000 (15:50 -0400)]
drm/amd/display: removing MODULO change for dcn2

[why]
when resetting pipes from 480p to dual-pipe 8k, modulo reg write for
video optimized rate updated one pipe without changing the other, causing
sync error

[how]
removed code from dcn2

Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix incorrect DML output_bpp value
Ilya Bakoulin [Fri, 3 May 2019 21:22:32 +0000 (17:22 -0400)]
drm/amd/display: Fix incorrect DML output_bpp value

[Why]
The output_bpp pipe parameter was assigned an incorrect value
(color depth enum), and subsequently used to overwrite
the OutputBpp parameter calculated by DML. Seems like this had no
effect except with DSC enabled, which would make DML produce
bad outputs.

[How]
Removed assignment to OutputBpp, fixed output_bpp assignment,
and properly set ForcedOutputLinkBPP instead of OutputBpp.
Also removed condition in DML that prevented forcing of
Output BPP with DSC enabled.

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add missing VM conversion from hw values
Jun Lei [Mon, 13 May 2019 19:09:13 +0000 (15:09 -0400)]
drm/amd/display: Add missing VM conversion from hw values

[why]
VM implemenation is missing conversion from HW values in hubbub
DM not passing actual PTB during flip

[how]
add proper HW conversion from logical values
fix cases where we programmed VA even though we are in PA
plumb in PTB from DM

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Drive-by fixes for display_mode_vba
Ilya Bakoulin [Fri, 3 May 2019 16:59:35 +0000 (12:59 -0400)]
drm/amd/display: Drive-by fixes for display_mode_vba

Fixes for the following:
- Incorrect pointer type (unsigned int instead of double)
- Incorrect DSC number of slices setting

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Enable DSC power-gating for DSC streams
Nikola Cornij [Wed, 8 May 2019 18:36:03 +0000 (14:36 -0400)]
drm/amd/display: Enable DSC power-gating for DSC streams

[why]
Currently DSC power gating is disabled by default because the power
transition doesn't happen, causing a crash on some systems

[how]
Fix the lack of power state transition and enable DSC power gating
by default.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Return UPDATE_TYPE_FULL on writeback update
Charlene Liu [Wed, 8 May 2019 17:29:09 +0000 (13:29 -0400)]
drm/amd/display: Return UPDATE_TYPE_FULL on writeback update

Should do full update when display writeback is updated.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Duke Du <Duke.Du@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>