Justin Chadwell [Wed, 3 Jul 2019 13:14:22 +0000 (14:14 +0100)]
Update imx platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: Ia0a10b4a30e63c0cbf1d0f8dfe5768e0a93ae1c7
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Justin Chadwell [Wed, 3 Jul 2019 13:13:55 +0000 (14:13 +0100)]
Update mediatek platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: If5a88e1b880bcb2be2278398cf5109a6d877e632
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Justin Chadwell [Wed, 3 Jul 2019 13:13:34 +0000 (14:13 +0100)]
Update layerscape platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: Ib63ef6e2e4616dd56828bfd3800d5fe2df109934
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Justin Chadwell [Wed, 3 Jul 2019 13:12:25 +0000 (14:12 +0100)]
Update intel platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: I4c7a315cb18b3bbe623e7a7a998d2dac869638a7
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Justin Chadwell [Wed, 3 Jul 2019 13:11:28 +0000 (14:11 +0100)]
Update rockchip platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: Ib7fc54e4141cc4f1952a18241bc18671b36e2168
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Justin Chadwell [Wed, 3 Jul 2019 13:11:06 +0000 (14:11 +0100)]
Update renesas platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: I51278beacbe6da79853c3f0f0f94cd806fc9652c
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Justin Chadwell [Wed, 3 Jul 2019 13:10:31 +0000 (14:10 +0100)]
Update meson platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: Ib7ec8ed3423e9b9b32be2388520bc27ee28f6370
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Justin Chadwell [Wed, 3 Jul 2019 13:04:33 +0000 (14:04 +0100)]
Update marvell platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: I78f386f5ac171d6e52383a3e42003e6fb3e96b57
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
Sandrine Bailleux [Tue, 9 Jul 2019 12:33:31 +0000 (12:33 +0000)]
Merge "plat: imx8m: Add caam module init on imx8m" into integration
Sandrine Bailleux [Tue, 9 Jul 2019 12:24:28 +0000 (12:24 +0000)]
Merge changes from topic "jts/reword" into integration
* changes:
docs: removing references to GitHub
Change checkpatch.conf after migration to tf.org
Sandrine Bailleux [Mon, 8 Jul 2019 16:21:01 +0000 (16:21 +0000)]
Merge "rpi3: Fix compilation error when stack protector is enabled" into integration
Madhukar Pappireddy [Fri, 5 Jul 2019 17:04:49 +0000 (12:04 -0500)]
rpi3: Fix compilation error when stack protector is enabled
Include necessary header file to use ARRAY_SIZE() macro
Change-Id: I5b7caccd02c14c598b7944cf4f347606c1e7a8e7
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
John Tsichritzis [Fri, 5 Jul 2019 13:14:40 +0000 (14:14 +0100)]
docs: removing references to GitHub
Change-Id: Ibdee91ad337ee362872924d93e82f5b5e47e63d9
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
John Tsichritzis [Fri, 5 Jul 2019 13:13:42 +0000 (14:13 +0100)]
Change checkpatch.conf after migration to tf.org
A specific checkpatch setting was used because of GitHub. This necessity
doesn't exist anymore.
Change-Id: Ie2225a5cb88654f3b7407e43e0a48fafa9a9165c
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Sandrine Bailleux [Fri, 5 Jul 2019 11:25:17 +0000 (11:25 +0000)]
Merge "tools/fiptool: Add Makefile.msvc to build on Windows." into integration
Sandrine Bailleux [Fri, 5 Jul 2019 11:22:09 +0000 (11:22 +0000)]
Merge "uniphier: support console based on multi-console" into integration
Masahiro Yamada [Tue, 2 Jul 2019 13:03:16 +0000 (22:03 +0900)]
uniphier: support console based on multi-console
The legacy console is gone. Re-add the console support based on the
multi-console framework.
I am still keeping the putc, getc, and flush callbacks in
uniphier_console.S to use plat/common/aarch64/crash_console_helpers.S
The console registration code already relies on that C environment
has been set up. So, I just filled the struct console fields with the
callback pointers, then called console_register() directly. I also
re-implemented the init function in C to improve the readability.
Removing the custom crash console implementation has one disadvantage;
we cannot use the crash console on very early crashes because
crash_console_helpers.S works only after the console is registered.
I can live with this limitation.
Tested on my boards, and confirmed this worked like before.
Change-Id: Ieab9c849853ff6c525c15ea894a85944f257db59
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Sandrine Bailleux [Fri, 5 Jul 2019 08:05:45 +0000 (08:05 +0000)]
Merge "ti: k3: common: Trap all asynchronous bus errors to EL3" into integration
Andrew F. Davis [Tue, 14 May 2019 20:38:11 +0000 (15:38 -0500)]
ti: k3: common: Trap all asynchronous bus errors to EL3
These errors are asynchronous and cannot be directly correlated with the
exact current running software, so handling them in the same EL is not
critical. Handling them in TF-A allows for more platform specific
decoding of the implementation defined exception registers
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Iee7a38c9fc9c698fa0ad42dafa598bcbed6a4fda
Jacky Bai [Wed, 12 Jun 2019 09:41:47 +0000 (17:41 +0800)]
plat: imx8m: Add caam module init on imx8m
CAAM module must be initialized in secure world
before it can be used in non-secure world.
Change-Id: I042893667ddef99d8b6fc3902847d516d8591996
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Sandrine Bailleux [Thu, 4 Jul 2019 06:58:51 +0000 (06:58 +0000)]
Merge changes from topic "lw/n1_errata_fixes" into integration
* changes:
Removing redundant ISB instructions
Workaround for Neoverse N1 erratum
1275112
Workaround for Neoverse N1 erratum
1262888
Workaround for Neoverse N1 erratum
1262606
Workaround for Neoverse N1 erratum
1257314
Workaround for Neoverse N1 erratum
1220197
Workaround for Neoverse N1 erratum
1207823
Workaround for Neoverse N1 erratum
1165347
Workaround for Neoverse N1 erratum
1130799
Workaround for Neoverse N1 erratum
1073348
lauwal01 [Thu, 27 Jun 2019 16:03:25 +0000 (11:03 -0500)]
Removing redundant ISB instructions
Replacing ISB instructions in each Errata workaround with a single ISB
instruction before the RET in the reset handler.
Change-Id: I08afabc5b98986a6fe81664cd13822b36cab786f
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:49:01 +0000 (11:49 -0500)]
Workaround for Neoverse N1 erratum
1275112
Neoverse N1 erratum
1275112 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which delays instruction fetch after
branch misprediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: If7fe55fe92e656fa6aea12327ab297f2e6119833
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:47:30 +0000 (11:47 -0500)]
Workaround for Neoverse N1 erratum
1262888
Neoverse N1 erratum
1262888 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUECTLR_EL1 system register, which disables the MMU hardware prefetcher.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: Ib733d748e32a7ea6a2783f3d5a9c5e13eee01105
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:44:58 +0000 (11:44 -0500)]
Workaround for Neoverse N1 erratum
1262606
Neoverse N1 erratum
1262606 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which delays instruction fetch after
branch misprediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: Idd980e9d5310232d38f0ce272862e1fb0f02ce9a
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:42:02 +0000 (11:42 -0500)]
Workaround for Neoverse N1 erratum
1257314
Neoverse N1 erratum
1257314 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR3_EL1 system register, which prevents parallel
execution of divide and square root instructions.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: I54f0f40ff9043efee40d51e796b92ed85b394cbb
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:38:53 +0000 (11:38 -0500)]
Workaround for Neoverse N1 erratum
1220197
Neoverse N1 erratum
1220197 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set two bits in the implementation defined
CPUECTLR_EL1 system register, which disables write streaming to the L2.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: I9c3373f1b6d67d21ee71b2b80aec5e96826818e8
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:35:37 +0000 (11:35 -0500)]
Workaround for Neoverse N1 erratum
1207823
Neoverse N1 erratum
1207823 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR2_EL1 system register.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: Ia932337821f1ef0d644db3612480462a8d924d21
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:32:40 +0000 (11:32 -0500)]
Workaround for Neoverse N1 erratum
1165347
Neoverse N1 erratum
1165347 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set two bits in the implementation defined
CPUACTLR2_EL1 system register.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: I163d0ea00578245c1323d2340314cdc3088c450d
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:28:34 +0000 (11:28 -0500)]
Workaround for Neoverse N1 erratum
1130799
Neoverse N1 erratum
1130799 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR2_EL1 system register.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: I252bc45f9733443ba0503fefe62f50fdea61da6d
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
lauwal01 [Mon, 24 Jun 2019 16:23:50 +0000 (11:23 -0500)]
Workaround for Neoverse N1 erratum
1073348
Neoverse N1 erratum
1073348 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUACTLR_EL1 system register, which disables static prediction.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-
466751330-10325/index.html
Change-Id: I674126c0af6e068eecb379a190bcf7c75dcbca8e
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Girish Pathak [Fri, 22 Mar 2019 14:30:18 +0000 (14:30 +0000)]
tools/fiptool: Add Makefile.msvc to build on Windows.
This change adds nmake compatible Makefile.msvc file for
building (nmake /FMakefile.msvc) fiptool on the Windows.
Change-Id: Iccd1fe8da072edd09eb04b8622f27b3c4693b281
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Sandrine Bailleux [Tue, 2 Jul 2019 09:58:51 +0000 (09:58 +0000)]
Merge "zynqmp: add support for multi console interface" into integration
Soby Mathew [Mon, 1 Jul 2019 13:21:23 +0000 (13:21 +0000)]
Merge changes from topic "banned_api_list" into integration
* changes:
Fix the License header template in imx_aipstz.c
docs: Add the list of banned/use with caution APIs
Soby Mathew [Thu, 20 Jun 2019 12:56:04 +0000 (13:56 +0100)]
Fix the License header template in imx_aipstz.c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: I2281b3c1b8a0f2caa751c746b7835f998183e0af
Soby Mathew [Thu, 20 Jun 2019 11:46:11 +0000 (12:46 +0100)]
docs: Add the list of banned/use with caution APIs
Credit to sam.ellis@arm.com for the input to create the list.
Change-Id: Id70a8eddc5f2490811bebb278482c61950f10cce
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Ambroise Vincent [Wed, 29 May 2019 10:46:08 +0000 (11:46 +0100)]
zynqmp: add support for multi console interface
This patch addds multi console interface for ZynqMP
platform
Change-Id: I508a61412df2b71d04bca6a1139c8f32cbd7dccd
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Paul Beesley [Fri, 28 Jun 2019 11:04:02 +0000 (11:04 +0000)]
Merge changes from topic "av/console-port" into integration
* changes:
qemu: use new console interface in aarch32
warp7: remove old console from makefile
Remove MULTI_CONSOLE_API flag and references to it
Console: removed legacy console API
Ambroise Vincent [Tue, 28 May 2019 13:35:41 +0000 (14:35 +0100)]
qemu: use new console interface in aarch32
Change-Id: Iab788e3e7cb2f83144255c4eb830712fd5cb6240
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent [Wed, 29 May 2019 13:14:03 +0000 (14:14 +0100)]
warp7: remove old console from makefile
Change-Id: I87818b220568cc34838726b32ddf29ee6cf31ed7
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Ambroise Vincent [Thu, 4 Apr 2019 08:13:28 +0000 (09:13 +0100)]
Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Paul Beesley [Thu, 27 Jun 2019 09:12:27 +0000 (09:12 +0000)]
Merge "Tegra: Fix typo in comment" into integration
Paul Beesley [Thu, 27 Jun 2019 09:11:16 +0000 (09:11 +0000)]
Merge "Tegra: Extend NS address check error output" into integration
Paul Beesley [Thu, 27 Jun 2019 09:07:12 +0000 (09:07 +0000)]
Merge "n1sdp: add code for DDR ECC enablement and BL33 copy to DDR" into integration
Manoj Kumar [Fri, 21 Jun 2019 16:07:13 +0000 (17:07 +0100)]
n1sdp: add code for DDR ECC enablement and BL33 copy to DDR
N1SDP platform supports RDIMMs with ECC capability. To use the ECC
capability, the entire DDR memory space has to be zeroed out before
enabling the ECC bits in DMC620. Zeroing out several gigabytes of
memory from SCP is quite time consuming so functions are added that
zeros out the DDR memory from application processor which is
much faster compared to SCP. BL33 binary cannot be copied to DDR memory
before enabling ECC so this is also done by TF-A from IOFPGA-DDR3
memory to main DDR4 memory after ECC is enabled.
Original PLAT_PHY_ADDR_SPACE_SIZE was limited to 36-bits with which
the entire DDR space cannot be accessed as DRAM2 starts in base
0x8080000000. So these macros are redefined for all ARM platforms.
Change-Id: If09524fb65b421b7a368b1b9fc52c49f2ddb7846
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Paul Beesley [Wed, 26 Jun 2019 12:08:19 +0000 (12:08 +0000)]
Merge changes from topic "pull-out-drivers" into integration
* changes:
intel: Add ncore ccu driver
intel: Fix watchdog driver structure
intel: Fix qspi driver write config
intel: Pull out common drivers into platform common
Paul Beesley [Wed, 26 Jun 2019 11:21:51 +0000 (11:21 +0000)]
Merge "rcar_gen3: drivers: pfc: E3: Replace REVERCED with REVERSED" into integration
Hadi Asyrafi [Mon, 17 Jun 2019 04:30:22 +0000 (12:30 +0800)]
intel: Add ncore ccu driver
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I0544315986ee28b23157fdfec3fe5aebae6b860f
Hadi Asyrafi [Mon, 17 Jun 2019 04:02:18 +0000 (12:02 +0800)]
intel: Fix watchdog driver structure
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I0ffccca7ea83bff35c9f149d7054cd610a59ec01
Hadi Asyrafi [Mon, 17 Jun 2019 03:48:58 +0000 (11:48 +0800)]
intel: Fix qspi driver write config
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I5241ed97697b0280b590b47b9173d102d23f305a
Hadi Asyrafi [Wed, 12 Jun 2019 03:24:12 +0000 (11:24 +0800)]
intel: Pull out common drivers into platform common
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib79e2c6fe6e66dec5004701133ad6a5f4c78f2fa
Ambroise Vincent [Wed, 27 Mar 2019 10:22:10 +0000 (10:22 +0000)]
Console: removed legacy console API
This interface has been deprecated in favour of MULTI_CONSOLE_API.
Change-Id: I6170c1c8c74a890e5bd6d05396743fe62024a08a
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Marek Vasut [Tue, 25 Jun 2019 15:57:22 +0000 (17:57 +0200)]
rcar_gen3: drivers: pfc: E3: Replace REVERCED with REVERSED
Fix a typo, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Id6abb4c192729f55b3500505860c7f7718944c62
Paul Beesley [Tue, 25 Jun 2019 13:49:15 +0000 (13:49 +0000)]
Merge changes Ie594b535,Ifa444dd5,Ie93e7fcc,I302cff20,I0f6c1cad, ... into integration
* changes:
rcar_gen3: drivers: pfc: Move PFC drivers out of staging
rcar_gen3: drivers: pfc: Checkpatch cleanup
rcar_gen3: drivers: pfc: V3M: Fix camel case
rcar_gen3: drivers: pfc: V3M: Drop forward declarations
rcar_gen3: drivers: pfc: V3M: Switch to BIT() macro
rcar_gen3: drivers: pfc: V3M: Checkpatch cleanup
rcar_gen3: drivers: pfc: V3M: Switch to common register header file
rcar_gen3: drivers: pfc: E3: Drop pfc_reg_write() forward declaration
rcar_gen3: drivers: pfc: E3: Switch to BIT() macro
rcar_gen3: drivers: pfc: E3: Checkpatch cleanup
rcar_gen3: drivers: pfc: E3: Switch to common register header file
rcar_gen3: drivers: pfc: D3: Switch to BIT() macro
rcar_gen3: drivers: pfc: D3: Drop unused macros
rcar_gen3: drivers: pfc: D3: Checkpatch cleanup
rcar_gen3: drivers: pfc: D3: Switch to common register header file
rcar_gen3: drivers: pfc: M3N: Drop forward declarations
rcar_gen3: drivers: pfc: M3N: Switch to BIT() macro
rcar_gen3: drivers: pfc: M3N: Checkpatch cleanup
rcar_gen3: drivers: pfc: M3N: Switch to common register header file
rcar_gen3: drivers: pfc: M3W: Fix camel case
rcar_gen3: drivers: pfc: M3W: Drop forward declarations
rcar_gen3: drivers: pfc: M3W: Switch to BIT() macro
rcar_gen3: drivers: pfc: M3W: Checkpatch cleanup
rcar_gen3: drivers: pfc: M3W: Switch to common register header file
rcar_gen3: drivers: pfc: H3: Drop pfc_reg_write() forward declaration
rcar_gen3: drivers: pfc: H3: Switch to BIT() macro
rcar_gen3: drivers: pfc: H3: Drop unused macros
rcar_gen3: drivers: pfc: H3: Checkpatch cleanup
rcar_gen3: drivers: pfc: H3: Switch to common register header file
rcar_gen3: drivers: pfc: Introduce common register header file
rcar_gen3: drivers: pfc: D3: Drop unused M3W check
John Tsichritzis [Tue, 25 Jun 2019 11:33:52 +0000 (11:33 +0000)]
Merge "doc: Fix typo in file interrupt-framework-design.rst" into integration
John Tsichritzis [Tue, 25 Jun 2019 09:52:16 +0000 (09:52 +0000)]
Merge "Fix links in documentation" into integration
John Tsichritzis [Mon, 24 Jun 2019 12:22:30 +0000 (13:22 +0100)]
Fix links in documentation
Change-Id: Ifef4d634b4a34d23f42f61df5e326a1cc05d3844
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Marek Vasut [Mon, 17 Jun 2019 17:29:03 +0000 (19:29 +0200)]
rcar_gen3: drivers: pfc: Move PFC drivers out of staging
Now that PFC drivers are cleaned up , move them out of staging.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie594b53558c2bfb8e5d88e5b0354752c17a2487e
Marek Vasut [Mon, 17 Jun 2019 17:28:12 +0000 (19:28 +0200)]
rcar_gen3: drivers: pfc: Checkpatch cleanup
Checkpatch cleanups of the PFC common init code macros.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ifa444dd506387dba92b550729e56598198faeb49
Marek Vasut [Mon, 17 Jun 2019 17:20:36 +0000 (19:20 +0200)]
rcar_gen3: drivers: pfc: V3M: Fix camel case
Replace function name with non-camel-case one. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie93e7fccdc81a3ffa5c371d49846fcf6c840f145
Marek Vasut [Mon, 17 Jun 2019 17:20:22 +0000 (19:20 +0200)]
rcar_gen3: drivers: pfc: V3M: Drop forward declarations
There's no point in having forward declaration just before the function
itself, drop it. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I302cff2014bb6e513b6fb48fcf6df7ade684039e
Marek Vasut [Mon, 17 Jun 2019 17:16:18 +0000 (19:16 +0200)]
rcar_gen3: drivers: pfc: V3M: Switch to BIT() macro
Utilise existing BIT() macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I0f6c1cadf51cfe49322ec5408e6661287747e0ae
Marek Vasut [Mon, 17 Jun 2019 17:15:33 +0000 (19:15 +0200)]
rcar_gen3: drivers: pfc: V3M: Checkpatch cleanup
Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I3a9527db01afa909f61efd9556cc291e254a5e33
Marek Vasut [Mon, 17 Jun 2019 17:10:05 +0000 (19:10 +0200)]
rcar_gen3: drivers: pfc: V3M: Switch to common register header file
Drop local copy of register macros and switch to common header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I9d14180a7ae63a97d4bd1c87e717db71a852525e
Marek Vasut [Mon, 17 Jun 2019 16:46:03 +0000 (18:46 +0200)]
rcar_gen3: drivers: pfc: E3: Drop pfc_reg_write() forward declaration
There's no point in having forward declaration just before the function
itself, drop it. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I3cf5bbc388431144c8bbc53ae9f9338276674eee
Marek Vasut [Mon, 17 Jun 2019 16:44:39 +0000 (18:44 +0200)]
rcar_gen3: drivers: pfc: E3: Switch to BIT() macro
Utilise existing BIT() macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ibf5f242cad70cdd51ca6415b1c7c56b35317ea52
Marek Vasut [Mon, 17 Jun 2019 16:44:23 +0000 (18:44 +0200)]
rcar_gen3: drivers: pfc: E3: Checkpatch cleanup
Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I6b026f5b333ee8008510604b9f51a0aa8e60b6fc
Marek Vasut [Mon, 17 Jun 2019 16:29:13 +0000 (18:29 +0200)]
rcar_gen3: drivers: pfc: E3: Switch to common register header file
Drop local copy of register macros and switch to common header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ic41a5a01e8d803e116bf02d66735ede6f47e343a
Marek Vasut [Mon, 17 Jun 2019 16:42:41 +0000 (18:42 +0200)]
rcar_gen3: drivers: pfc: D3: Switch to BIT() macro
Utilise existing BIT() macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I1ff9fe8fb2f1644e4ee3b877ed5979cdf99d3d85
Marek Vasut [Mon, 17 Jun 2019 16:32:49 +0000 (18:32 +0200)]
rcar_gen3: drivers: pfc: D3: Drop unused macros
Remove unused and irrelevant macros. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Idcc34db77cb04db885ae5532689c83c0e8ddfd0b
Marek Vasut [Mon, 17 Jun 2019 16:31:12 +0000 (18:31 +0200)]
rcar_gen3: drivers: pfc: D3: Checkpatch cleanup
Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I5bbb585c3762374bb713d4b9fe25495658d89e65
Marek Vasut [Mon, 17 Jun 2019 16:19:09 +0000 (18:19 +0200)]
rcar_gen3: drivers: pfc: D3: Switch to common register header file
Drop local copy of register macros and switch to common header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I26cd58706d7fc9fc92de280bfd77ae162924533d
Marek Vasut [Mon, 17 Jun 2019 17:05:51 +0000 (19:05 +0200)]
rcar_gen3: drivers: pfc: M3N: Drop forward declarations
There's no point in having forward declaration just before the function
itself, drop it. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I374c4e90729cd13aa4c5878bb3d0917071fa19f1
Marek Vasut [Mon, 17 Jun 2019 17:05:37 +0000 (19:05 +0200)]
rcar_gen3: drivers: pfc: M3N: Switch to BIT() macro
Utilise existing BIT() macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I4cd541f6485a454bd32bd34a3c95d50fd183052f
Marek Vasut [Mon, 17 Jun 2019 17:05:26 +0000 (19:05 +0200)]
rcar_gen3: drivers: pfc: M3N: Checkpatch cleanup
Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Iea1f0625ecc461168342e591e30947b543501bac
Marek Vasut [Mon, 17 Jun 2019 17:04:36 +0000 (19:04 +0200)]
rcar_gen3: drivers: pfc: M3N: Switch to common register header file
Drop local copy of register macros and switch to common header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If39ba51685ef0bb993010658d98be6981253dce0
Marek Vasut [Mon, 17 Jun 2019 17:02:58 +0000 (19:02 +0200)]
rcar_gen3: drivers: pfc: M3W: Fix camel case
Replace function name with non-camel-case one. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I98317def6640aebe559aa2edc4304029acf80505
Marek Vasut [Mon, 17 Jun 2019 17:01:39 +0000 (19:01 +0200)]
rcar_gen3: drivers: pfc: M3W: Drop forward declarations
There's no point in having forward declaration just before the function
itself, drop it. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I936232205adbfc834fffdfa015ec5c5d4e3480ea
Marek Vasut [Mon, 17 Jun 2019 16:58:23 +0000 (18:58 +0200)]
rcar_gen3: drivers: pfc: M3W: Switch to BIT() macro
Utilise existing BIT() macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Idea2afc11fb5dcfc39fb319b703ee8ee9dcc3ea6
Marek Vasut [Mon, 17 Jun 2019 16:57:37 +0000 (18:57 +0200)]
rcar_gen3: drivers: pfc: M3W: Checkpatch cleanup
Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I6d48af4b1d56ef487744f4a58126140bbad28132
Marek Vasut [Mon, 17 Jun 2019 16:57:11 +0000 (18:57 +0200)]
rcar_gen3: drivers: pfc: M3W: Switch to common register header file
Drop local copy of register macros and switch to common header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I8374340961d5465698183fdbc30143a70ebcbde4
Marek Vasut [Mon, 17 Jun 2019 16:51:40 +0000 (18:51 +0200)]
rcar_gen3: drivers: pfc: H3: Drop pfc_reg_write() forward declaration
There's no point in having forward declaration just before the function
itself, drop it. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I56125389fa6fe3ae169cacdb0e4b60376f0a6489
Marek Vasut [Mon, 17 Jun 2019 16:52:06 +0000 (18:52 +0200)]
rcar_gen3: drivers: pfc: H3: Switch to BIT() macro
Utilise existing BIT() macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I339dbd8c8579dffc9bf454d34e3ba9f142a07fa7
Peng Donglin [Sat, 22 Jun 2019 04:23:41 +0000 (12:23 +0800)]
doc: Fix typo in file interrupt-framework-design.rst
Signed-off-by: Peng Donglin <dolinux.peng@gmail.com>
Change-Id: I459e7d056735222f6f34e275dbdaf9a389d193fc
Marek Vasut [Mon, 17 Jun 2019 16:51:29 +0000 (18:51 +0200)]
rcar_gen3: drivers: pfc: H3: Drop unused macros
Remove unused and irrelevant macros. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I0f251cd838f1d5879ccfd0738dc8ead355b3b74f
Marek Vasut [Mon, 17 Jun 2019 16:51:19 +0000 (18:51 +0200)]
rcar_gen3: drivers: pfc: H3: Checkpatch cleanup
Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I31293e70a362f713261ac588f563c687449c5f6c
Marek Vasut [Mon, 17 Jun 2019 16:49:35 +0000 (18:49 +0200)]
rcar_gen3: drivers: pfc: H3: Switch to common register header file
Drop local copy of register macros and switch to common header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I85d6855f329771f698d84348ce11ce31548512db
Marek Vasut [Mon, 17 Jun 2019 16:18:56 +0000 (18:18 +0200)]
rcar_gen3: drivers: pfc: Introduce common register header file
Introduce header file which contains the shared registers and bits
between the different SoCs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I5f41d39347b9d57e3efdea24ae61a16d5c7efb80
Marek Vasut [Mon, 17 Jun 2019 16:27:07 +0000 (18:27 +0200)]
rcar_gen3: drivers: pfc: D3: Drop unused M3W check
Drop check for SoC being M3W ES1.0 , this check is clearly bogus,
as this code can never be executed on M3W ES 1.0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If6087f1c217393dc65d20f6591eca40188563710
John Tsichritzis [Thu, 20 Jun 2019 12:15:31 +0000 (12:15 +0000)]
Merge "libc: fix memchr implementation" into integration
John Tsichritzis [Thu, 20 Jun 2019 09:54:53 +0000 (09:54 +0000)]
Merge "doc: Isolate security-related build options" into integration
Andreas Färber [Sun, 16 Jun 2019 22:06:43 +0000 (00:06 +0200)]
Tegra: Fix typo in comment
initilise -> initialise
Signed-off-by: Andreas Färber <afaerber@suse.de>
Change-Id: Ib129e6bd48623b6565b669bc674208893a2f7668
Andreas Färber [Sun, 16 Jun 2019 21:32:20 +0000 (23:32 +0200)]
Tegra: Extend NS address check error output
Let bl31_check_ns_address() print the address it doesn't like.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Change-Id: I29a4fb33c24e9f7464ccd2ea44a4608f5cfe5be6
Ambroise Vincent [Fri, 7 Jun 2019 10:19:45 +0000 (11:19 +0100)]
libc: fix memchr implementation
The previous implementation could behave incorrectly because of the sign
extension of the char when compared to the int.
Change-Id: I397838b0ec87a6f1af6972d022a8c19a5184b447
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Soby Mathew [Thu, 20 Jun 2019 07:42:23 +0000 (07:42 +0000)]
Merge "bl2_el3: clean up linker script" into integration
John Tsichritzis [Wed, 19 Jun 2019 15:06:00 +0000 (15:06 +0000)]
Merge changes from topic "yg/clk_syscfg_dt" into integration
* changes:
fdts: stm32mp1: realign device tree files with internal devs
stm32mp1: increase device tree size to 20kB
stm32mp1: make dt_get_stdout_node_offset() static
stm32mp1: use unsigned values for SDMMC defines
stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES
stm32mp1: update doc for U-Boot compilation
stm32mp1: add general SYSCFG management
stm32mp1: move stm32_get_gpio_bank_clock() to private file
clk: stm32mp1: correctly handle Clock Spreading Generator
clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
clk: stm32mp1: move oscillator functions to generic file
arch: add some defines for generic timer registers
John Tsichritzis [Mon, 17 Jun 2019 13:40:05 +0000 (13:40 +0000)]
Merge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration
* changes:
rcar_gen3: drivers: qos: Move QoS drivers out of staging
rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table
rcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table
rcar_gen3: drivers: qos: Fix checkpatch issues
rcar_gen3: drivers: qos: V3M: Drop useless comments
rcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: V3M: Use common register definition
rcar_gen3: drivers: qos: E3: Drop extra level of nesting
rcar_gen3: drivers: qos: E3: Use common register definition
rcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros
rcar_gen3: drivers: qos: D3: Drop MD pin check
rcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting()
rcar_gen3: drivers: qos: D3: Drop useless comments
rcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: D3: Use common register definition
rcar_gen3: drivers: qos: M3N: Fix checkpatch issues
rcar_gen3: drivers: qos: M3N: Drop MD pin check
rcar_gen3: drivers: qos: M3N: Drop useless comments
rcar_gen3: drivers: qos: M3N: Drop extra level of nesting
rcar_gen3: drivers: qos: M3N: Use common register definition
rcar_gen3: drivers: qos: M3W: Fix checkpatch issues
rcar_gen3: drivers: qos: M3W: Drop MD pin check
rcar_gen3: drivers: qos: M3W: Drop useless comments
rcar_gen3: drivers: qos: M3W: Drop extra level of nesting
rcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: M3W: Use common register definition
rcar_gen3: drivers: qos: H3: Fix checkpatch issues
rcar_gen3: drivers: qos: H3: Drop MD pin check
rcar_gen3: drivers: qos: H3: Drop useless comments
rcar_gen3: drivers: qos: H3: Drop extra level of nesting
rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
rcar_gen3: drivers: qos: H3: Use common register definition
rcar_gen3: console: Convert to multi-console API
Marek Vasut [Sat, 15 Jun 2019 13:01:04 +0000 (15:01 +0200)]
rcar_gen3: drivers: qos: Move QoS drivers out of staging
Now that QoS drivers are cleaned up , move them out of staging.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8
Marek Vasut [Fri, 14 Jun 2019 14:10:09 +0000 (16:10 +0200)]
rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table
Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I3e8b0251099b57581ebdcfce5670bff5579dc505
Marek Vasut [Fri, 14 Jun 2019 13:50:57 +0000 (15:50 +0200)]
rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table
Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I1757eee9a209c368d0e8fba9809e56b8090ee43f
projects / project / bcm63xx / atf.git / log