openwrt/staging/blogic.git
5 years agodrm/etnaviv: fix missing unlock on error in etnaviv_iommuv1_context_alloc()
Wei Yongjun [Mon, 19 Aug 2019 06:17:33 +0000 (06:17 +0000)]
drm/etnaviv: fix missing unlock on error in etnaviv_iommuv1_context_alloc()

Add the missing unlock before return from function etnaviv_iommuv1_context_alloc()
in the error handling case.

Fixes: 27b67278e007 ("drm/etnaviv: rework MMU handling")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
5 years agoMerge tag 'drm-next-5.4-2019-08-23' of git://people.freedesktop.org/~agd5f/linux...
Dave Airlie [Tue, 27 Aug 2019 07:22:15 +0000 (17:22 +1000)]
Merge tag 'drm-next-5.4-2019-08-23' of git://people.freedesktop.org/~agd5f/linux into drm-next

drm-next-5.4-2019-08-23:

amdgpu:
- Enable power features on Navi12
- Enable power features on Arcturus
- RAS updates
- Initial Renoir APU support
- Enable power featyres on Renoir
- DC gamma fixes
- DCN2 fixes
- GPU reset support for Picasso
- Misc cleanups and fixes

scheduler:
- Possible race fix

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823202620.3870-1-alexander.deucher@amd.com
5 years agoMerge tag 'drm-misc-next-2019-08-23' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Tue, 27 Aug 2019 07:10:30 +0000 (17:10 +1000)]
Merge tag 'drm-misc-next-2019-08-23' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 5.4:

UAPI Changes:

Cross-subsystem Changes:

Core Changes:
  - dma-buf: dma-fence selftests

Driver Changes:
  - kirin: Various cleanups and reworks
  - komeda: Add support for DT memory-regions
  - meson: Rely on the compatible to detect vpu features
  - omap: Implement alpha and pixel blend mode properties
  - panfrost: Implement per-fd address spaces, various fixes
  - rockchip: DSI DT binding rework
  - fbdev: Various cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823083509.c7mduqdqjnxc7ubb@flea
5 years agoMerge tag 'drm-hisilicon-hibmc-next-2019-08-26' of https://github.com/xin3liang/linux...
Dave Airlie [Tue, 27 Aug 2019 07:06:55 +0000 (17:06 +1000)]
Merge tag 'drm-hisilicon-hibmc-next-2019-08-26' of https://github.com/xin3liang/linux into drm-next

Three small cleanup and fix patches for 5.4 hisilicon hibmc driver.
I have tested and verified on taishan 2280v1/v2 machines.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: xinliang <z.liuxinliang@hisilicon.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5D63A271.7080400@hisilicon.com
5 years agoMerge tag 'imx-drm-next-2019-08-23' of git://git.pengutronix.de/pza/linux into drm...
Dave Airlie [Tue, 27 Aug 2019 06:52:06 +0000 (16:52 +1000)]
Merge tag 'imx-drm-next-2019-08-23' of git://git.pengutronix.de/pza/linux into drm-next

drm/imx: IPUv3 image converter fixes and improvements

Fix image converter seam handling for 1024x1024 pixel hardware
limitation at the main processing section input, improve error
handling, and slightly optimize for 1:1 conversions.
Add support for newly defined 32-bit RGB V4L2 pixel formats.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1566573659.23587.2.camel@pengutronix.de
5 years agoMerge tag 'drm-intel-next-2019-08-22' of git://anongit.freedesktop.org/drm/drm-intel...
Dave Airlie [Tue, 27 Aug 2019 06:36:41 +0000 (16:36 +1000)]
Merge tag 'drm-intel-next-2019-08-22' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

- More TGL enabling work (Michel, Jose, Lucas)
- Fixes on DP MST (Ville)
- More GTT and Execlists fixes and improvements (Chris)
- Code style clean-up on hdmi and dp side (Jani)
- Fix null pointer dereferrence (Xiong)
- Fix a couple of missing serialization on selftests (Chris)
- More vm locking rework (Chris)

drm-intel-next-2019-08-20:
- GuC and HuC related fixes and improvements (Daniele, Michal)
- Improve debug with more engine information and rework on debugfs files (Chris, Stuart)
- Simplify appearture address handling (Chris)
- Other fixes and cleanups around engines and execlists (Chris)
- Selftests fixes (Matt, Chris)
- Gen11 cache flush related fixes and improvements (Mika)
- More work around requests, timelines and locks to allow removal of struct_mutex (Chris)
- Add missing CML PCI ID (Anusha)
- More work on the new i915 buddy allocator (Matt)
- More headers, files and directories reorg (Daniele)
- Improvements on ggtt’s get pdp (Mika)
- Fix GPU reset (Chris)
- Fix GPIO pins on gen11 (Matt)
- Fix HW readout for crtc_clock in HDMI mode (Imre)
- Sanitize display Phy during unitit to workaround messages of HW state change during suspend (Imre)
- Be defensive when starting vma activity (Chris)
- More Tiger Lake enabling work (Michel, Daniele, Lucas)
- Relax pd_used assertion (Chris)

drm-intel-next-2019-08-13:
- More Tiger Lake enabling work (Lucas, Jose, Tomasz, Michel, Jordan, Anusha, Vandita)
- More selftest organization reworks, fixes and improvements (Lucas, Chris)
- Simplifications on GEM code like context and cleanup_early (Chris, Daniele)
- GuC and HuC related fixes and improvements (Daniele, Michal, Chris)
- Some clean up and fixes on headers, Makefile, and generated files (Lucas, Jani)
- MOCS setup clean up (Tvrtko)
- More Elkhartlake enabling work (Jose, Matt)
- Fix engine reset by clearing in flight execlists requests (Chris)
- Fix possible memory leak on intel_hdcp_auth_downstream (Wei)
- Introduce intel_gt_runtime_suspend/resume (Daniele)
- PMU improvements (Tvrtko)
- Flush extra hard after writing relocations through the GTT (Chris)
- Documentations fixes (Michal, Chris)
- Report dma_reserv allocation failure (Chris)
- Improvements around shrinker (Chris)
- More improvements around engine handling (Chris)
- Also more s/dev_priv/i915 (Chris)
- Abstract display suspend/resume operations (Rodrigo/Jani)
- Drop VM_IO from GTT mappings (Chris)
- Fix some NULL vs IS_ERR conditions (Dan)
- General improvements on error state (Chris)
- Isolate i915_getparam_iocrtl to its own file (Chris)
- Perf OA object refactor (Umesh)
- Ignore central i915->kernel_context and allocate it directly (Chris)
- More fixes and improvements around wakerefs (Chris)
- Clean-up and improvements around debugfs (Chris)
- Free the imported shmemfs file for phys objects (Chris)
- Many other fix and cleanups around engines and execlists (Chris)
- Split out uncore_mmio_debug (Daniele)
- Memory management fixes for blk and gtt (Matt)
- Introduction of buddy allocator to handle huge-pages for GTT (Matt)
- Fix ICL and TGL PG3 power domains (Anshuman)
- Extract GT IRQ to gt/ (Andi)
- Drop last_fence tracking in favor of whole vma->active (Chris)
- Make overlay to use i915_active instead of i915_active_request (Chris)
- Move misc display IRQ handling to its own function (Jose)
- Introduce new _TRANS2() macro in preparation for some coming PSR related work (Jose)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823051435.GA23885@intel.com
5 years agodrm/hisilicon/hibmc: Make CONFIG_DRM_HISI_HIBMC depend on ARM64
Matthew Ruffell [Thu, 15 Aug 2019 04:26:40 +0000 (16:26 +1200)]
drm/hisilicon/hibmc: Make CONFIG_DRM_HISI_HIBMC depend on ARM64

Hisilicon developed hibmc_drm for their arm64 based soc and did not
intend for this driver to be used on any other architecture than arm64.

Using it on amd64 leads to incorrect video modes being used, making
the screen unreadable, forcing users to manually blacklist the module
on the kernel command line to use the d-i server installer or any
graphical sessions.

Make CONFIG_DRM_HISI_HIBMC firmly depend on ARM64 to ensure it is not
built for other architectures.

Signed-off-by: Matthew Ruffell <matthew.ruffell@canonical.com>
Signed-off-by: Xinliang Liu <z.liuxinliang@hisilicon.com>
5 years agodrm/hisilicon: Use dev_get_drvdata
Chuhong Yuan [Tue, 23 Jul 2019 10:38:53 +0000 (18:38 +0800)]
drm/hisilicon: Use dev_get_drvdata

Instead of using to_pci_dev + pci_get_drvdata,
use dev_get_drvdata to make code simpler.

Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Signed-off-by: Xinliang Liu <z.liuxinliang@hisilicon.com>
5 years agodrm/hisilicon/hibmc: Using module_pci_driver.
YueHaibing [Sat, 21 Apr 2018 09:51:48 +0000 (17:51 +0800)]
drm/hisilicon/hibmc: Using module_pci_driver.

Remove boilerplate code by using macro module_pci_driver.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Xinliang Liu <z.liuxinliang@hisilicon.com>
Signed-off-by: Xinliang Liu <z.liuxinliang@hisilicon.com>
5 years agodrm/amd/display: 3.2.48
Anthony Koo [Mon, 12 Aug 2019 14:05:39 +0000 (10:05 -0400)]
drm/amd/display: 3.2.48

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: flicking observed while installing driver on Navi10 CF
hersen wu [Fri, 2 Aug 2019 20:01:37 +0000 (16:01 -0400)]
drm/amd/display: flicking observed while installing driver on Navi10 CF

[WHY] value of dchub_ref_clock is decided by dchubbub global timer
settings which is programmed by vbios command table disp_init.
for multi-GPU case, vbios is posted only for primary GPU. without
vbios posted for the secondary GPU, value of dchub_ref_clock is not
set properly. this value will affect dcn bandwidth calcuation and
cause underflow. user will see screen flicking during driver
installation for dual GPU case.

[HOW] dc init_hw always call vbios command table disp_init to
make sure dchubbub global timer is configured and enable.

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Properly read LVTMA_PWRSEQ_CNTL
Joshua Aberback [Thu, 8 Aug 2019 17:22:36 +0000 (13:22 -0400)]
drm/amd/display: Properly read LVTMA_PWRSEQ_CNTL

[Why]
The register LVTMA_PWRSEQ_CNTL is used to determine the power state of the
embedded display. Currently we do not actually read this register's values,
so during power down we think that this display is already off, so we skip
calling into VBIOS to actually turn it off.

[How]
 - add relevant fields to shift / mask initialization

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: revert wait in pipelock
Jun Lei [Tue, 23 Jul 2019 20:56:03 +0000 (16:56 -0400)]
drm/amd/display: revert wait in pipelock

[why]
Previous workaround to prevent a vsync flip to be converted
to immediate flip is no longer needed, and is risky because
there are cases where it can result in infinite loop.

[how]
Remove wait loop (which is potentially infinite) before locking
pipe

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Use res_cap to acquire i2c instead of pipe count
Derek Lai [Fri, 23 Aug 2019 16:44:53 +0000 (11:44 -0500)]
drm/amd/display: Use res_cap to acquire i2c instead of pipe count

[Why]
We should be using the ddc_num from res_caps. As the
pipe count != number of i2c resources.

[How]
Use ddc_num from res_cap instead of pipe count.

Signed-off-by: Derek Lai <Derek.Lai@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Expose OTG_V_TOTAL_MID for HW Diags
Bayan Zabihiyan [Thu, 8 Aug 2019 15:08:52 +0000 (11:08 -0400)]
drm/amd/display: Expose OTG_V_TOTAL_MID for HW Diags

[Why]
Existing HW Features, HW Diags test requested that the
registers be exposed.

[How]
Add V_TOTAL_MID to existing DC structures.
Make sure values are passed down throughout DC
Add Register definition.
Program the additional registers
Add additional Logic for V_TOTAL_CONTROL.

Signed-off-by: Bayan Zabihiyan <bayan.zabihiyan@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix DML not calculating delivery time
Jun Lei [Wed, 7 Aug 2019 20:24:46 +0000 (16:24 -0400)]
drm/amd/display: fix DML not calculating delivery time

[why]
Calculating DCFCLK DS time requires calculating
delivery time for luma/chroma, but this value is
not calculated in DMLv2, it was inadvertently
removed when porting DMLv2

[how]
Add the calculation back

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: MST topology debugfs
David Francis [Thu, 25 Jul 2019 19:22:16 +0000 (15:22 -0400)]
drm/amd/display: MST topology debugfs

DRM provides drm_dp_mst_dump_topology, which prints
useful information about MST devices

Hook this up to a debugfs file named amdgpu_mst_topology

Signed-off-by: David Francis <David.Francis@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: set av_mute in hw_init for HDMI
Charlene Liu [Wed, 7 Aug 2019 21:25:49 +0000 (17:25 -0400)]
drm/amd/display: set av_mute in hw_init for HDMI

[Description]
OS will reserve HW state in UEFI mode.
Driver init_hw reset to RGB which caused HDMI green in YCbCr mode.
read HW blank_color based on acc_mode.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add Logging for Gamma Related information
Wyatt Wood [Wed, 7 Aug 2019 17:48:24 +0000 (13:48 -0400)]
drm/amd/display: Add Logging for Gamma Related information

[Why]
A recent bug showed that logging would be useful in debugging
various gamma issues.

[How]
Add logging in dc.
Fix formatting for easier graphing.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Enable HW rotation
Jaehyun Chung [Wed, 7 Aug 2019 15:20:16 +0000 (11:20 -0400)]
drm/amd/display: Enable HW rotation

[Why] HW rotation is not enabled. Calculations for cursor rotation
are wrong for the values passed to set_cursor_position.

[How] Swap Src rect and height and vertically mirror surface for
the correct surface rotation direction. Cursor position is rotated
according to angle. Offset calculations are tweaked for non-rotated
cursor hotspot and width/height.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add Cursor Degamma logic for DCN2
Bayan Zabihiyan [Fri, 26 Jul 2019 15:10:11 +0000 (11:10 -0400)]
drm/amd/display: add Cursor Degamma logic for DCN2

[Why]
We need to have the ability to to tell us set degamma on the cursor.

[How]
Pass a flag down to register programming that tells us if the
current surface format needs cursor degamma.

Signed-off-by: Bayan Zabihiyan <bayan.zabihiyan@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix odm validation
Dmytro Laktyushkin [Tue, 6 Aug 2019 16:17:57 +0000 (12:17 -0400)]
drm/amd/display: fix odm validation

Update bw validation to use prev and next odm pipe pointers
for populating dml inputs.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix odm stream release
Dmytro Laktyushkin [Tue, 6 Aug 2019 20:09:07 +0000 (16:09 -0400)]
drm/amd/display: fix odm stream release

Need to memset all odm pipes when calling dc_remove_stream_from_ctx

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix dcn20 odm dpp programming
Dmytro Laktyushkin [Tue, 6 Aug 2019 19:10:33 +0000 (15:10 -0400)]
drm/amd/display: fix dcn20 odm dpp programming

dcn20 requires special casing for odm.
This change treats odm as alternative to mpc tree on dcn20.

This is planned to be fixed in a future refactor

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix number of slices not being checked for dsc
Nikola Cornij [Tue, 6 Aug 2019 17:23:17 +0000 (13:23 -0400)]
drm/amd/display: Fix number of slices not being checked for dsc

[why]
num_slices_h was not being checked

[How]
Fix the typo and check num_slices_h

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix odm pipe copy
Dmytro Laktyushkin [Fri, 2 Aug 2019 20:32:13 +0000 (16:32 -0400)]
drm/amd/display: fix odm pipe copy

ODM next and prev pipe were missing from dc_copy_state

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix trigger not generated for freesync
Yogesh Mohan Marimuthu [Fri, 2 Aug 2019 05:22:49 +0000 (10:52 +0530)]
drm/amd/display: fix trigger not generated for freesync

[Why]
In newer hardware MANUAL_FLOW_CONTROL is not a trigger bit. Due to this
front porch is fixed and in these hardware freesync does not work.

[How]
Change the programming to generate a pulse so that the event will be
triggered, front porch will be cut short and freesync will work.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix stuck test pattern on right half of display
Zi Yu Liao [Tue, 6 Aug 2019 15:58:09 +0000 (11:58 -0400)]
drm/amd/display: fix stuck test pattern on right half of display

[why]
With visual confirm enabled, displays where ODM combine is enabled
has a test pattern stuck on the right half of the display even
though the display is unblanked.

[how]
Add a condition to not show the colour ramp test pattern when the
display is unblanked.

Signed-off-by: Zi Yu Liao <ziyu.liao@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: support spdif
Charlene Liu [Fri, 2 Aug 2019 18:49:58 +0000 (14:49 -0400)]
drm/amd/display: support spdif

[Description]
port spdif fix to staging:
 spdif hardwired to afmt inst 1.
 spdif func pointer
 spdif resource allocation (reserve last audio endpoint for spdif only)

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Refactoring VTEM
Ahmad Othman [Thu, 1 Aug 2019 19:05:27 +0000 (15:05 -0400)]
drm/amd/display: Refactoring VTEM

[Why]
Video Timing Extended Metadata packet (VTEM) is not
specific to freesync. So move it out of freesync module

[How]
- Moved VTEM from freesync module to info_packet module
- Created new structure for VTEM parameters that can be used for VRR
and FVA

Signed-off-by: Ahmad Othman <ahmad.othman@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Ahmad Othman <Ahmad.Othman@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: 3.2.47
Anthony Koo [Tue, 6 Aug 2019 04:48:04 +0000 (00:48 -0400)]
drm/amd/display: 3.2.47

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: remove unused function
Qingqing Zhuo [Fri, 2 Aug 2019 18:10:33 +0000 (14:10 -0400)]
drm/amd/display: remove unused function

[Why]
This function is not being used, it was left in
when introducing DCN2

[How]
Remove the function

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: cleaned up coding error in init_hw
Martin Leung [Fri, 2 Aug 2019 15:01:05 +0000 (11:01 -0400)]
drm/amd/display: cleaned up coding error in init_hw

[why]
during a refactor a redundant code that has unknown behaviour was added.

[how]
removed old bad code

Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot")
Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add VM page fault handle implementation
Jaehyun Chung [Mon, 29 Jul 2019 18:48:32 +0000 (14:48 -0400)]
drm/amd/display: Add VM page fault handle implementation

[How] Allocate memory for default page and program memory block addr
into default page addr register.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: refactor Device ID for external chips
Qingqing Zhuo [Wed, 31 Jul 2019 22:11:16 +0000 (18:11 -0400)]
drm/amd/display: refactor Device ID for external chips

IEEE OUI will now be used while referring to certain vendors.
instead of normal index

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Zero-out dsc init regs
Nikola Cornij [Thu, 1 Aug 2019 19:52:58 +0000 (15:52 -0400)]
drm/amd/display: Zero-out dsc init regs

[why]
Before a statically allocated PPS data structure, that did
get zeroed-out at startup, had been re-used for making packed PPS
SDP. With S3 fix, using a non-initialized PPS data structure was
introduced, while wrongly assuming it'd get initialized before it's
populated. As a consequence 'vbr_enable' and perhaps some other
fields are left uninitialized when making packed PPS SDP. This can
affect 'simple_422' as well because of the way PPS SDP packing is
done (the fields are not masked first, only shifted). The behavior
will be different, depending on the content of uninitialized data.

[how]
Zero-out PPS data structure at initialization time before it's
populated

Fixes: 1a9e3d4569fc ("drm/amd/display: Set DSC before DIG front-end is connected to its back-end")
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Implement voltage limitation stub
Joseph Gravenor [Tue, 30 Jul 2019 20:37:35 +0000 (16:37 -0400)]
drm/amd/display: Implement voltage limitation stub

add new function to get the voltage at the end of
dcn_validate_bandwidth, to check against the
highest voltage we allow.

Created a stub to allow for optimizations

Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Sun peng Li <Sunpeng.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add null checks before logging
Wyatt Wood [Wed, 31 Jul 2019 19:52:46 +0000 (15:52 -0400)]
drm/amd/display: add null checks before logging

Adding NULL checks to various parameters in log_tf, to avoid
nullptr errors

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Nikola Cornij <Nikola.Cornij@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: set Hratio and VRatio in dml
Ilya Bakoulin [Tue, 30 Jul 2019 22:30:40 +0000 (18:30 -0400)]
drm/amd/display: set Hratio and VRatio in dml

Set the writeback Hratio and Vratio in dml.

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix dp stream enable
Dmytro Laktyushkin [Wed, 31 Jul 2019 18:08:45 +0000 (14:08 -0400)]
drm/amd/display: fix dp stream enable

A previous odm change broke stream enable by always setting
n_multiply as if odm was on.

This fixes the check for odm by making sure opp count is >1
rather than not 0.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: load iram for abm 2.3
Josip Pavic [Tue, 30 Jul 2019 20:56:14 +0000 (16:56 -0400)]
drm/amd/display: load iram for abm 2.3

[Why]
ABM 2.3 firmware expects information in iRAM that differs from previous
versions of ABM, so a mechanism is required to provide it with that
information.

[How]
Extend the existing iRAM definition to include parameters added by
ABM 2.3, and load it if DMCU is running ABM 2.3.

Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix MPO HUBP underflow with Scatter Gather
Zi Yu Liao [Tue, 30 Jul 2019 19:36:53 +0000 (15:36 -0400)]
drm/amd/display: fix MPO HUBP underflow with Scatter Gather

[why]
With Scatter Gather enabled, HUBP underflows during MPO enabled video
playback. hubp_init has a register write that fixes this problem, but
the register is cleared when HUBP gets power gated.

[how]
Make a call to hubp_init during enable_plane, so that the fix can
be applied after HUBP powers back on again.

Signed-off-by: Zi Yu Liao <ziyu.liao@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix audio endpoint not getting disabled issue
Su Sung Chung [Thu, 25 Jul 2019 18:43:55 +0000 (14:43 -0400)]
drm/amd/display: fix audio endpoint not getting disabled issue

[Why]
Disable_audio_stream gets enum option as a paramenter which will decide
if we free acquired resources or not. However checks for the option is
guarded by the other condition which check if audio stream is getting
diabled more than once. With both conditions combined, if we attempt to
disable audio stream twice in a row, first with keep and second with
free as an option, we will never free any resources, which will make
system think there is audio endpoint connected even after we plug out
the device

[How]
Get rid of option as parameter to disable_audio_stream and move the part
of the code that free acquired resources to outside where to keep or to
free resources is actually determined

Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Delete dead code in command_table_helper
Julian Parkin [Fri, 26 Jul 2019 21:13:46 +0000 (17:13 -0400)]
drm/amd/display: Delete dead code in command_table_helper

[Why]
dig_encoder_sel_to_atom will always return zero on any ASIC version
past DCE80 since programming of the FE selection is handled by
driver, but the translation code was left in the function, making
it look like a coding error.

[How]
Remove code that has no effect, and replace with a comment describing
why it returns zero.

Signed-off-by: Julian Parkin <julian.parkin@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: re structure odm to allow 4 to 1 support
Dmytro Laktyushkin [Tue, 6 Aug 2019 21:17:28 +0000 (17:17 -0400)]
drm/amd/display: re structure odm to allow 4 to 1 support

Currently odm is handled using top_bottom pipe by special casing
the differing opps to differentiate from mpc combine.

Since top/bottom pipe list was made to track mpc muxing this creates
difficulties in adding a 4 pipe odm case support.

Rather than continue using mpc combine list, this change reworks odm
to use it's own linked list to keep track of odm combine pipes. This
also opens up options for using mpo with odm, if a practical use case
is ever found.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: set adev->num_vmhubs for gmc6,7,8
Alex Deucher [Fri, 23 Aug 2019 14:42:33 +0000 (09:42 -0500)]
drm/amdgpu: set adev->num_vmhubs for gmc6,7,8

So that we properly handle them on older asics.

Fixes: 3ff985485b29 ("drm/amdgpu: Export function to flush TLB of specific vm hub")
Tested-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/display: add flag for multi-display mclk switching
Alex Deucher [Thu, 22 Aug 2019 19:17:57 +0000 (14:17 -0500)]
drm/amdgpu/display: add flag for multi-display mclk switching

Add a dcfeaturemask flag for mclk switching.  Disable by default;
enable once the feature has seen more testing.

Set amdgpu.dcfeaturemask=2 on the kernel command line in grub
to enable this.

Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: update bw_calcs to take pipe sync into account (v3)
Alex Deucher [Fri, 23 Aug 2019 16:32:37 +0000 (11:32 -0500)]
drm/amd/display: update bw_calcs to take pipe sync into account (v3)

Properly set all_displays_in_sync so that when the data is
propagated to powerplay, it's set properly and we can enable
mclk switching when all monitors are in sync.

v2: fix logic, clean up
v3: check for blending chains, simplify logic

Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/powerplay/vega10: enable mclk switching if monitors are synced
Alex Deucher [Thu, 8 Aug 2019 05:48:58 +0000 (00:48 -0500)]
drm/amdgpu/powerplay/vega10: enable mclk switching if monitors are synced

If DC has synced the displays, we can enable mclk switching to
save power.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/powerplay/smu7: enable mclk switching if monitors are synced
Alex Deucher [Thu, 8 Aug 2019 05:47:49 +0000 (00:47 -0500)]
drm/amdgpu/powerplay/smu7: enable mclk switching if monitors are synced

If DC has synced the displays, we can enable mclk switching to
save power.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/powerplay: Fix Vega20 power reading again
Kent Russell [Fri, 23 Aug 2019 13:13:18 +0000 (09:13 -0400)]
drm/powerplay: Fix Vega20 power reading again

For the 40.46 SMU release, they changed CurrSocketPower to
AverageSocketPower, but this was changed back in 40.47 so just check if
it's 40.46 and make the appropriate change

Tested with 40.45, 40.46 and 40.47 successfully

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoamd/amdkfd: add Arcturus vf DID support
Frank.Min [Fri, 16 Aug 2019 07:08:31 +0000 (15:08 +0800)]
amd/amdkfd: add Arcturus vf DID support

Add the virtual function PCI device id.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Frank.Min <Frank.Min@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerpaly: fix navi series custom peak level value error
Kevin Wang [Wed, 21 Aug 2019 02:58:19 +0000 (10:58 +0800)]
drm/amd/powerpaly: fix navi series custom peak level value error

fix other navi asic set peak performance level error.
because the navi10_ppt.c will handle navi12 14 asic,
it will use navi10 peak value to set other asic, it is not correct.

after patch:
only navi10 use custom peak value, other asic will used default value.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: correct ras error count type
Guchun Chen [Fri, 16 Aug 2019 07:06:52 +0000 (15:06 +0800)]
drm/amdgpu: correct ras error count type

Use unsigned long type for the same ras count variable.
This will avoid overflow on 64 bit system.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoomapdrm: no need to check return value of debugfs_create functions
Greg Kroah-Hartman [Thu, 13 Jun 2019 11:57:49 +0000 (13:57 +0200)]
omapdrm: no need to check return value of debugfs_create functions

When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Sebastian Reichel <sebastian.reichel@collabora.com>
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: zhong jiang <zhongjiang@huawei.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190613115749.GC26335@kroah.com
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190704023557.4551-1-huangfq.daxian@gmail.com
5 years agodrm/omap: Add 'alpha' and 'pixel blend mode' plane properties
Jean-Jacques Hiblot [Thu, 11 Jul 2019 13:52:19 +0000 (15:52 +0200)]
drm/omap: Add 'alpha' and 'pixel blend mode' plane properties

Add the following properties for planes:
* alpha
* pixel blend mode. Only "Pre-multiplied" and "Coverage" are supported

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190711135219.23402-1-jjhiblot@ti.com
5 years agoMerge branch 'linux-5.4' of git://github.com/skeggsb/linux into drm-next
Dave Airlie [Fri, 23 Aug 2019 03:23:38 +0000 (13:23 +1000)]
Merge branch 'linux-5.4' of git://github.com/skeggsb/linux into drm-next

This is mostly just the stuff I missed last round.  Various cleanup
patches + fixes, improvements to display colour management, and some
code to avoid loading when power cables aren't properly attached.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Ben Skeggs <skeggsb@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv7hqj9_VHq+YiGL8Z8XsU2vPbqbNPC=LeN1Rb0XxMQypQ@mail.gmail.com
5 years agodrm/nouveau/volt: Fix for some cards having 0 maximum voltage
Mark Menzynski [Fri, 2 Aug 2019 09:21:00 +0000 (11:21 +0200)]
drm/nouveau/volt: Fix for some cards having 0 maximum voltage

Some, mostly Fermi, vbioses appear to have zero max voltage. That causes Nouveau to not parse voltage entries, thus users not being able to set higher clocks.

When changing this value Nvidia driver still appeared to ignore it, and I wasn't able to find out why, thus the code is ignoring the value if it is zero.

CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/dispnv50: Fix runtime PM ref tracking for non-blocking modesets
Lyude Paul [Wed, 7 Aug 2019 23:47:06 +0000 (19:47 -0400)]
drm/nouveau/dispnv50: Fix runtime PM ref tracking for non-blocking modesets

This is something that got noticed a while ago back when I was fixing a
large number of runtime PM related issues in nouveau, but never got
fixed:

https://patchwork.freedesktop.org/series/46815/#rev7

It's not safe to iterate the entire list of CRTCs in
nv50_disp_atomic_commit(), as we could be doing a non-blocking modeset
on one CRTC in parallel with one or more other CRTCs. Likewise, this
means it's also not safe to do so in order to track runtime PM state.
While this code is certainly wrong, so far the only issues I've seen
this cause in the wild is the occasional PM ref unbalance after an
atomic check failure + module reloading (since the PCI device will
outlive nouveau in such scenarios).

So, do this far more elegantly: grab a runtime PM ref across the modeset
and commit tail, then grab/put references for each CRTC enable/disable.
This also ends up being much simpler then the previous broken solution
we had.

Finally, since we've removed all it's users: get rid of
nouveau_drm->have_disp_power_ref.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/dispnv04: Remove runtime PM
Lyude Paul [Wed, 7 Aug 2019 23:47:05 +0000 (19:47 -0400)]
drm/nouveau/dispnv04: Remove runtime PM

Originally when trying to fix the issue of runtime PM references with
non-blocking CRTCs on nv50, I ended up stumbling on this code when
trying to remove nouveau_drm->have_disp_power_ref, and attempted to fix
it to remove the dependency on have_disp_power_ref. However, Ilia Mirkin
pointed out that this code is actually completely useless, as pre-nv50
never had runtime PM support in the first place! Go figure.

So, since it's useless just get rid of it. Note that since the only
thing nouveau_crtc_set_config() was doing was grabbing a runtime PM ref,
calling drm_crtc_helper_set_config() then dropping the ref; we can just
remove the function entirely and just call drm_crtc_helper_set_config()
directly.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/gpio: check function 76 in the power check as well
Mark Menzynski [Thu, 18 Jul 2019 08:07:41 +0000 (10:07 +0200)]
drm/nouveau/gpio: check function 76 in the power check as well

Added GPIO is "Power Alert". It's uncertain if this
GPIO is set on GPU initialization or only if a change is detected by the
GPU at runtime.

This GPIO can be found on Tesla and sometimes on Fermi GPUs.

Untested, wrote according to documentation.

Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/gpio: check the gpio function 16 in the power check as well
Mark Menzynski [Thu, 18 Jul 2019 08:07:40 +0000 (10:07 +0200)]
drm/nouveau/gpio: check the gpio function 16 in the power check as well

Added GPIO is "Thermal and External Power Detect". It's uncertain if this
GPIO is set on GPU initialization or only if a change is detected by the
GPU at runtime.

This GPIO can be found in Rankine and Curie and rarely on Tesla GPUs
VBIOS.

Untested, wrote according to documentation.

Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/gpio: fail if gpu external power is missing
Mark Menzynski [Thu, 18 Jul 2019 08:07:39 +0000 (10:07 +0200)]
drm/nouveau/gpio: fail if gpu external power is missing

Currently, nouveau doesn't check if GPU is missing power. This
patch makes nouveau fail when this happens on latest GPUs.

It checks GPIO function 121 (External Power Emergency), which
should detect power problems on GPU initialization.

This can be disabled with nouveau.config=NvPowerChecks=1

Tested on TU104, GP106 and GF100.

v3:
*  Add config override for disabling power checks

Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/bios/gpio: sort gpios by values
Mark Menzynski [Thu, 18 Jul 2019 08:07:38 +0000 (10:07 +0200)]
drm/nouveau/bios/gpio: sort gpios by values

One gpio was in wrong place, moved it for better readability.

Signed-off-by: Mark Menzynski <mmenzyns@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/therm: don't attempt fan control where PMU is already managing it
Ben Skeggs [Tue, 2 Jul 2019 04:19:12 +0000 (14:19 +1000)]
drm/nouveau/therm: don't attempt fan control where PMU is already managing it

There's already a condition in place which attempts to detect this, but
since we've begun to require a PMU subdev even on boards where we don't
load a custom FW, it's become inaccurate.

This will prevent unnecessarily running a periodic fan update thread on
GP100 and newer, where we don't yet override the default PMU FW.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/therm: skip probing for devices not specified in thermal tables
Ben Skeggs [Tue, 2 Jul 2019 02:52:11 +0000 (12:52 +1000)]
drm/nouveau/therm: skip probing for devices not specified in thermal tables

Saves some time during driver load, as described by the relevant section[1]
of the DCB 4.x specification.

[1] https://nvidia.github.io/open-gpu-doc/DCB/DCB-4.x-Specification.html#_i2c_device_table

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/gv100-: attach pixel blend mode property to planes
Ben Skeggs [Wed, 12 Jun 2019 07:37:23 +0000 (17:37 +1000)]
drm/nouveau/kms/gv100-: attach pixel blend mode property to planes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/gv100-: attach alpha property to planes
Ben Skeggs [Tue, 11 Jun 2019 07:13:04 +0000 (17:13 +1000)]
drm/nouveau/kms/gv100-: attach alpha property to planes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/gv100-: add support for plane zpos property
Ben Skeggs [Tue, 11 Jun 2019 06:46:13 +0000 (16:46 +1000)]
drm/nouveau/kms/gv100-: add support for plane zpos property

Has a nice side-effect that we only update HW for this when it changes now,
rather than every time we do a page flip.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/nv50-: attach immutable zpos property to planes
Ben Skeggs [Tue, 11 Jun 2019 06:40:31 +0000 (16:40 +1000)]
drm/nouveau/kms/nv50-: attach immutable zpos property to planes

Defaulting to the fixed layout enforced in HW by EVO, and that we
currently use by default on NVD.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/nv50-: create primary plane before overlay planes
Ben Skeggs [Tue, 11 Jun 2019 07:03:21 +0000 (17:03 +1000)]
drm/nouveau/kms/nv50-: create primary plane before overlay planes

zpos normalisation uses plane id to determine ordering for duplicate zpos
values, and we likely want to keep primary plane on the bottom here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/nv50-: use __drm_atomic_helper_plane_reset()
Ben Skeggs [Tue, 11 Jun 2019 08:04:42 +0000 (18:04 +1000)]
drm/nouveau/kms/nv50-: use __drm_atomic_helper_plane_reset()

We have some of this open-coded already, use the helper to prevent problems
when adding (for example) support for the alpha property.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/gv100-: implement csc + enable modern colour managment properties
Ben Skeggs [Tue, 11 Jun 2019 07:46:39 +0000 (17:46 +1000)]
drm/nouveau/kms/gv100-: implement csc + enable modern colour managment properties

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/gv100-: use premultiplied alpha blending between planes
Ben Skeggs [Tue, 11 Jun 2019 04:54:32 +0000 (14:54 +1000)]
drm/nouveau/kms/gv100-: use premultiplied alpha blending between planes

This is apparently the assumed default behaviour when blend properties
are absent.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/nv50-: enable modern color management properties
Ilia Mirkin [Tue, 11 Jun 2019 02:32:45 +0000 (22:32 -0400)]
drm/nouveau/kms/nv50-: enable modern color management properties

For GF119:GV100, we can enable DEGAMMA/CTM/GAMMA. For earlier GPUs, as
there is no CTM, having both degamma and gamma is a bit pointless. Later
GPUs currently lack an implementation.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/gf119-: add ctm property support
Ilia Mirkin [Wed, 12 Jun 2019 02:40:36 +0000 (22:40 -0400)]
drm/nouveau/kms/gf119-: add ctm property support

This adds support on GF119:GV100 (exclusive) for CTM (aka CSC).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agodrm/nouveau/kms/nv50-: remove overlay alpha formats
Ilia Mirkin [Mon, 3 Jun 2019 05:59:42 +0000 (01:59 -0400)]
drm/nouveau/kms/nv50-: remove overlay alpha formats

The overlay logic can only do colorkey-based selection, not
alpha-blending.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/fifo/gk104-: fix parsing of mmu fault data
Ben Skeggs [Thu, 13 Jun 2019 04:23:04 +0000 (14:23 +1000)]
drm/nouveau/fifo/gk104-: fix parsing of mmu fault data

Pascal was particularly incorrect, as the register changed to be more in the
same format as the MMU fault buffers are.

Shouldn't have impacted much more than confusing MMU fault log messages.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/fifo/gf1xx: convert to using nvkm_fault_data
Ben Skeggs [Thu, 13 Jun 2019 03:58:50 +0000 (13:58 +1000)]
drm/nouveau/fifo/gf1xx: convert to using nvkm_fault_data

Would like to be able to reuse gf100_fifo_intr_fault() for (some of) the
later chipsets too, as it's identical.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/bios/init: handle INIT_RESET_END devinit opcode
Rhys Kidd [Sun, 2 Jun 2019 14:13:15 +0000 (00:13 +1000)]
drm/nouveau/bios/init: handle INIT_RESET_END devinit opcode

Signal that the reset sequence has completed.

This opcode signals that the software reset sequence has completed.
Ordinarily, no actual operations are performed by the opcode.
However it allows for possible software work arounds by devinit
engines in software agents other than the VBIOS, such as the resman,
FCODE, and EFI driver.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/bios/init: handle INIT_RESET_BEGUN devinit opcode
Rhys Kidd [Sun, 2 Jun 2019 14:13:14 +0000 (00:13 +1000)]
drm/nouveau/bios/init: handle INIT_RESET_BEGUN devinit opcode

Signal that the reset sequence has begun.

This opcode signals that the software reset sequence has begun.
Ordinarily, no actual operations are performed by the opcode.
However it allows for possible software work arounds by devinit
engines in software agents other than the VBIOS, such as the resman,
FCODE, and EFI driver.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/bios: downgrade absence of tmds table to info from an error
Rhys Kidd [Sun, 2 Jun 2019 12:07:27 +0000 (22:07 +1000)]
drm/nouveau/bios: downgrade absence of tmds table to info from an error

Absence of a TMDS Info Table is common on Optimus setups where the NVIDIA
gpu is not connected directly to any outputs.

Reporting an error in this scenario is too harsh. Accordingly, change the
error message to an info message.

By default the error message also causes a boot flicker for these sytems.

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau: Disable atomic support on a per-device basis
Ville Syrjälä [Thu, 13 Sep 2018 16:31:46 +0000 (19:31 +0300)]
drm/nouveau: Disable atomic support on a per-device basis

We now have per-device driver_features, so let's use that
to disable atomic only for pre-nv50.

Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: nouveau@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/nv50-: add fp16 scanout support
Ilia Mirkin [Tue, 28 May 2019 02:58:37 +0000 (22:58 -0400)]
drm/nouveau/kms/nv50-: add fp16 scanout support

Older hardware seems to want 0..1024 values, while new hardware takes
0..1 values. We set the gain to 1024 for the earlier display classes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/nv50-: disable input lut harder
Ben Skeggs [Wed, 29 May 2019 06:39:53 +0000 (16:39 +1000)]
drm/nouveau/kms/nv50-: disable input lut harder

Under some circumstances, it could be left enabled when it shouldn't be.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/tu102-: disable input lut when input is already FP16
Ben Skeggs [Wed, 29 May 2019 05:44:57 +0000 (15:44 +1000)]
drm/nouveau/kms/tu102-: disable input lut when input is already FP16

On Turing, an input LUT is required to transform inputs in fixed-point
formats to FP16 for the internal display pipe.  We provide an identity
mapping whenever a window is enabled for this reason.

HW has error checks to ensure when the input is already FP16, that the
input LUT is also disabled.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/kms/gv100: allow windows to use PACKED8BPP formats
Ben Skeggs [Tue, 28 May 2019 06:33:59 +0000 (16:33 +1000)]
drm/nouveau/kms/gv100: allow windows to use PACKED8BPP formats

Required for upcoming FP16 scanout support.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau: fix nvif/device.h is included more than once
Hariprasad Kelam [Sun, 26 May 2019 11:06:25 +0000 (16:36 +0530)]
drm/nouveau: fix nvif/device.h is included more than once

remove duplicate inclusion of nvif/device.h

Issue identified by includecheck

Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/dispnv04: subdev/bios.h is included more than once
Hariprasad Kelam [Sun, 26 May 2019 10:59:36 +0000 (16:29 +0530)]
drm/nouveau/dispnv04: subdev/bios.h is included more than once

remove duplicate inclusion of subdev/bios.h

Issue identified by includecheck

Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/mmu: use struct_size() helper
Gustavo A. R. Silva [Fri, 24 May 2019 17:15:36 +0000 (12:15 -0500)]
drm/nouveau/mmu: use struct_size() helper

Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes, in particular in the
context in which this code is being used.

So, replace the following form:

sizeof(*kind) + sizeof(*kind->data) * mmu->kind_nr;

with:

struct_size(kind, data, mmu->kind_nr)

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau: drop use of drmp.h
Sam Ravnborg [Sun, 19 May 2019 14:00:44 +0000 (16:00 +0200)]
drm/nouveau: drop use of drmp.h

Drop use of the deprecated drmP.h file from drm/nouveau.

Build tested using allyesconfig and allmodconfig.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau: drop drmP.h from all header files
Sam Ravnborg [Sun, 19 May 2019 14:00:43 +0000 (16:00 +0200)]
drm/nouveau: drop drmP.h from all header files

Drop include of the deprecated drmP.h from all nouveau heder files.
This allows us to remove drmP.h from all .c files without any
side-effects in a follow-up commit.

Build tested using allyeyconfig and allmodconfig

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau: drop drmP.h from nouveau_drv.h
Sam Ravnborg [Sun, 19 May 2019 14:00:42 +0000 (16:00 +0200)]
drm/nouveau: drop drmP.h from nouveau_drv.h

Drop the deprecated drmP.h header from nouveau_drv.h.
Fix fallout in other parts of the driver.

Build tested using allmodconfig and allyesconfig.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau: drop use of DRM_UDELAY
Sam Ravnborg [Sun, 19 May 2019 14:00:41 +0000 (16:00 +0200)]
drm/nouveau: drop use of DRM_UDELAY

The DRM_UDELAY is a simple wrapper for udealy() and to be consistent
call udelay() direct like in may other places.
This avoids the need to pull in drm_os_linux.h when we later
drop drmP.h uses in nouveau.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/bios/init: fix spelling mistake "CONDITON" -> "CONDITION"
Colin Ian King [Tue, 14 May 2019 20:57:01 +0000 (21:57 +0100)]
drm/nouveau/bios/init: fix spelling mistake "CONDITON" -> "CONDITION"

There is a spelling mistake in a warning message. Fix it.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/nouveau/secboot: Make acr_r352_ls_gpccs_func static
YueHaibing [Wed, 17 Jul 2019 06:56:26 +0000 (14:56 +0800)]
drm/nouveau/secboot: Make acr_r352_ls_gpccs_func static

Fix sparse warning:

drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c:1092:1:
 warning: symbol 'acr_r352_ls_gpccs_func' was not declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agodrm/panfrost: Fix sleeping while atomic in panfrost_gem_open
Rob Herring [Mon, 19 Aug 2019 16:12:04 +0000 (11:12 -0500)]
drm/panfrost: Fix sleeping while atomic in panfrost_gem_open

We can't hold the mm_lock spinlock as panfrost_mmu_map() can sleep:

BUG: sleeping function called from invalid context at kernel/locking/mutex.c:909
in_atomic(): 1, irqs_disabled(): 0, pid: 974, name: glmark2-es2-drm
1 lock held by glmark2-es2-drm/974:
CPU: 5 PID: 974 Comm: glmark2-es2-drm Tainted: G        W    L    5.3.0-rc1+ #94
Hardware name: 96boards Rock960 (DT)
Call trace:
 dump_backtrace+0x0/0x130
 show_stack+0x14/0x20
 dump_stack+0xc4/0x10c
 ___might_sleep+0x158/0x228
 __might_sleep+0x50/0x88
 __mutex_lock+0x58/0x800
 mutex_lock_interruptible_nested+0x1c/0x28
 drm_gem_shmem_get_pages+0x24/0xa0
 drm_gem_shmem_get_pages_sgt+0x48/0xd0
 panfrost_mmu_map+0x38/0xf8 [panfrost]
 panfrost_gem_open+0xc0/0xd8 [panfrost]
 drm_gem_handle_create_tail+0xe8/0x198
 drm_gem_handle_create+0x3c/0x50
 panfrost_gem_create_with_handle+0x70/0xa0 [panfrost]
 panfrost_ioctl_create_bo+0x48/0x80 [panfrost]
 drm_ioctl_kernel+0xb8/0x110
 drm_ioctl+0x244/0x3f0
 do_vfs_ioctl+0xbc/0x910
 ksys_ioctl+0x78/0xa8
 __arm64_sys_ioctl+0x1c/0x28
 el0_svc_common.constprop.0+0x90/0x168
 el0_svc_handler+0x28/0x78
 el0_svc+0x8/0xc

Fixes: a5efb4c9a562 ("drm/panfrost: Restructure the GEM object creation")
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190819161204.3106-5-robh@kernel.org
5 years agodrm/amd/display: fix calc_pll_max_vco_construct
Dmytro Laktyushkin [Thu, 15 Aug 2019 16:35:39 +0000 (12:35 -0400)]
drm/amd/display: fix calc_pll_max_vco_construct

This was broken by a previous change switching to cached fw_info.
Fixed by inverting a valid bool check.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111432
Fixes: 9adc8050bf3c ("drm/amd/display: make firmware info only load once during dc_bios create")
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: enable VCN DPG for Renoir
Thong Thai [Thu, 15 Aug 2019 18:00:30 +0000 (14:00 -0400)]
drm/amdgpu: enable VCN DPG for Renoir

This will enable indirect SRAM loading for VCN DPG mode initialization.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amdgpu: use direct loading on renoir vcn for the moment"
Thong Thai [Thu, 22 Aug 2019 22:42:53 +0000 (17:42 -0500)]
Revert "drm/amdgpu: use direct loading on renoir vcn for the moment"

This reverts commit 444a0fea5107e9ad7e3cbbafed78678489e31713.

We are ready to enable it now.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>