Dmytro Laktyushkin [Thu, 18 May 2017 20:56:45 +0000 (16:56 -0400)]
drm/amd/display: fix flip register write sequence
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Thu, 18 May 2017 21:02:43 +0000 (17:02 -0400)]
drm/amd/display: remove GRPH_SURFACE_UPDATE_IMMEDIATE_EN field programming
This is causing asserts for dce 8 and 10 since they do not contain this
field. It is also unnecessary for later DCEs as it is left in it's
default state of 0
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 18 May 2017 23:03:15 +0000 (19:03 -0400)]
drm/amd/display: fix YUV surface address programming sequence
need to program DCSURF_PRIMARY_SURFACE_ADDRESS last as HW automatically
latch rest of addr regs on write when SURFACE_UPDATE_LOCK is not used
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Thu, 18 May 2017 17:35:22 +0000 (13:35 -0400)]
drm/amd/display: Remove redundant condition.
You cannot have modeset and flip in the same call for
same CRTC, in such case it will be set mode and set plane,
not a flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Thu, 18 May 2017 15:03:17 +0000 (11:03 -0400)]
drm/amd/display: Query for update plane type.
Use DC interface to query for plane update type
so in case of FULL update you flush any outstanding
commits.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:05 +0000 (10:22 -0400)]
drm/amd/display: Tidy up mem_input_program_surface_flip_and_addr()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:04 +0000 (10:22 -0400)]
drm/amd/display: Tidy up dce120_clock_source_create()
Also change sizeof to be automatic based on type declaration.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:03 +0000 (10:22 -0400)]
drm/amd/display: Clean up indentation in dce120_tg_set_blank()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:02 +0000 (10:22 -0400)]
drm/amd/display: Make dce120_tg_is_blanked() more legible
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:01 +0000 (10:22 -0400)]
drm/amd/display: Fix indentation in dce120_tg_program_timing()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 16 May 2017 14:22:00 +0000 (10:22 -0400)]
drm/amd/display: Tidy up dce120_timing_generator_enable_advanced_request()
Simplify the function by removing identical looking code blocks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ayyappa Chandolu [Fri, 12 May 2017 11:35:55 +0000 (17:05 +0530)]
drm/amd/display: Fix ASSR enablement on DP to EDP converter
ASSR mode is not enable when we connect eDP panel via DP to eDP converter.
connector_signal is coming as SIGNAL_TYPE_DISPLAY_PORT. Present code
ignoring panel_mode_edp for SIGNAL_TYPE_DISPLAY_PORT. Added checking
panel_mode_edp for all signals.
Signed-off-by: Ayyappa Chandolu <Ayyappa.Chandolu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Wed, 17 May 2017 22:05:36 +0000 (18:05 -0400)]
drm/amd/display: Add missed wait_for_prev_commits.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 20:07:30 +0000 (16:07 -0400)]
drm/amd/display: Implement input gamma LUT
1. Implemented dcn10_ipp_program_input_lut(), following the existing
interface.
2. Added missing registers as needed
3. Change to REG_GET for *ram_select() funcs.
4. Removed gamma table init from DiagsDM::make_surface() for resolving
CRC errors. Reason: Legacy LUT will be deprecated soon for Raven in
favor of degamma/regamma.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 17:52:28 +0000 (13:52 -0400)]
drm/amd/display: Refactor use_lut() from dce110 to dce
use_lut() checks if the input surface's pixel format is compatible with
a 256 entry LUT. This function can be used across different versions and
not just dce11.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 17 May 2017 20:56:56 +0000 (16:56 -0400)]
drm/amd/display: revert dc_get_validate_context re-entrancy fix
Apply dc_get_validate_context re-entrancy fix to dc_validate_resources instead
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 17 May 2017 20:05:40 +0000 (16:05 -0400)]
drm/amd/display: make dc_get_validate_context re-entrant
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 17 May 2017 16:07:30 +0000 (12:07 -0400)]
drm/amd/display: Fix 5th display lightup on Vega10
- fixing bug in calculation of reg offset for D5VGA_CONTROL
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 17 May 2017 01:27:01 +0000 (21:27 -0400)]
drm/amd/display: read VM settings from MMHUB
instead of GC, as after GFX off, GC can be power gated any time
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Mon, 15 May 2017 22:55:38 +0000 (18:55 -0400)]
drm/amd/display: Unify loop for surface update and page flip.
Remove extra loop we have for page flips and do flips in same loop we do
for surface create/update.
Add documentation for synchronization between commits on different crtcs.
Rename function to have DM prefix.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 17 May 2017 14:59:53 +0000 (10:59 -0400)]
drm/amd/display: add missing GRPH_UPDATE_LOCK field macro for dce_mem_input
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 16 May 2017 13:55:20 +0000 (09:55 -0400)]
drm/amd/display: Fix dcn10 cursor set position hang
Calling dcn10_cursor_set_position() before dcn10_cursor_set_attributes()
with invalid (0-value) attributes can cause the ASIC to hang. This fix
checks that address.quadpart is non-zero within set_position before calling
set_attributes.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Mon, 15 May 2017 18:47:02 +0000 (14:47 -0400)]
drm/amd/display: Clean unused interface.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Mon, 15 May 2017 17:59:31 +0000 (13:59 -0400)]
drm/amd/display: Use dc_update_surfaces_for_stream for flip.
Today we use special interface for flip because of fear of cuncurency issues
over dc->current_ctx. This should be no longer an issue when flipping on
multiple CRTCs concurently since for fast update (as flip is) no new context
is created and the exsisitng is not destroyed. For full updates case when
removing or adding streams on once CRTC while flipping on another
Adding all current active CRTC's states to the atomic commit in
amdgpu_dm_atomic_check will garntee that any such full update commit
will wait for completion of any outstanding flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 15 May 2017 12:31:51 +0000 (08:31 -0400)]
drm/amd/display: dce 8 - 12 mem_input refactor to new style
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amy Zhang [Fri, 12 May 2017 19:54:29 +0000 (15:54 -0400)]
drm/amd/display: Disable ABM when eDP is disabled
- Add immediate ABM disable when eDP is disabled
- Fix purple screen when ABM is mistakenly enabled
on non eDP display
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Fri, 12 May 2017 20:19:15 +0000 (16:19 -0400)]
drm/amd/display: Fix slow FPS.
Typo in expresion.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Thu, 11 May 2017 21:15:14 +0000 (17:15 -0400)]
drm/amd/display: fix mpo blanking out on one of planes being set not visible
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amy Zhang [Thu, 11 May 2017 21:13:20 +0000 (17:13 -0400)]
drm/amd/display: Program CSC Mode For BT2020
- Add BT2020 color space in the set output csc default
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 15 May 2017 18:23:09 +0000 (14:23 -0400)]
drm/amd/display: Remove duplicate entry from log_mask
As pointed out by kbuild test robot and Julia Lawall.
CC: Julia Lawall <julia.lawall@lip6.fr>
CC: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 10 May 2017 22:24:24 +0000 (18:24 -0400)]
drm/amd/display: add explanation for surface_update_type
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 10 May 2017 22:05:02 +0000 (18:05 -0400)]
drm/amd/display: fix scaling info based surface update type check
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 10 May 2017 15:35:07 +0000 (11:35 -0400)]
drm/amd/display: add yuv pixel formats to pixel_format_to_bpp()
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 9 May 2017 20:39:26 +0000 (16:39 -0400)]
drm/amd/display: fix scaling calculation for proper surface input format
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 5 May 2017 18:57:12 +0000 (14:57 -0400)]
drm/amd/display: DCE12 num_timing_generators should be 6
We should also use it to determine pipe count.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amy Zhang [Tue, 9 May 2017 18:45:54 +0000 (14:45 -0400)]
drm/amd/display: Move output transfer function to stream updates
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Corbin McElhanney [Tue, 9 May 2017 16:00:24 +0000 (12:00 -0400)]
drm/amd/display: fix freesync not working on raven
Signed-off-by: Corbin McElhanney <corbin.mcelhanney@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 8 May 2017 15:26:43 +0000 (11:26 -0400)]
drm/amd/display: enable watermark range reporting to pplib
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Mon, 8 May 2017 21:46:57 +0000 (17:46 -0400)]
drm/amd/display: single channel bandwidth verses dual channel bandwidth
DPM0, FCLK=MCLK, single channel bandwidth = dual channel bandwidth
for the rest of the DPM levels, single channel bandwidth = 1/2 dual channel bandwidth
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 27 Apr 2017 21:13:34 +0000 (17:13 -0400)]
drm/amd/display: Use MED update type if clip position changes
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 5 May 2017 20:33:11 +0000 (16:33 -0400)]
drm/amd/display: Add 64KB_S_T and 64KB_D_T swizzle mode.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 3 May 2017 15:40:40 +0000 (11:40 -0400)]
drm/amd/display: switch to using calc_clk and cur_clk for dcn bw setting
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 2 May 2017 21:29:48 +0000 (17:29 -0400)]
drm/amd/display: refactor bw related variable structure in val_ctx
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Fri, 5 May 2017 19:07:55 +0000 (15:07 -0400)]
drm/amd/display: prevent assert on error of 1 in calc_freesync_range
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Fri, 5 May 2017 15:30:06 +0000 (11:30 -0400)]
drm/amd/display: Fix race.
Problem :
A race between two adjecent page flips makes the earlier one
to release an alocated frame buffer for the subsequent one -
since there are 2 frambuffer swapped back and forth between flips,
the 'new' fb of the later flip is actually the 'previous' fb for the earlier flip.
Fix:
Don't set fb->address = 0 in cleanup hook, this is unnecessery and
erases the newly cached adress that was set in prepare_fb of the second
flip.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 3 May 2017 18:21:37 +0000 (14:21 -0400)]
drm/amd/display: ifdef some code only needed for DCN
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Thu, 4 May 2017 18:09:09 +0000 (14:09 -0400)]
drm/amd/display: Implement support for backlight optimization
- Add functionality to get real hw backlight level as opposed to user
level, meaning the level that takes into account backlight ramping
over time and backlight reduction due to Varibright
- Add backlight optimization which allows for a second OS state
that is able to control ABM
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Chalmers [Thu, 4 May 2017 17:34:55 +0000 (13:34 -0400)]
drm/amd/display: Continue with stream enable if DP link training fails.
Not necessarily a fatal problem - some monitors will recover and show
the stream anyway if link training fails.
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Tue, 2 May 2017 21:01:10 +0000 (17:01 -0400)]
drm/amd/display: do not set_mpc_tree if tree is already setup
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Wed, 3 May 2017 19:19:07 +0000 (15:19 -0400)]
drm/amd/display: use signal type to decide whether to set backlight
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leon Elazar [Fri, 24 Mar 2017 19:46:24 +0000 (15:46 -0400)]
drm/amd/display: Allow MPO on Raven
Signed-off-by: Leon Elazar <leon.elazar@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Wed, 3 May 2017 14:25:51 +0000 (10:25 -0400)]
drm/amd/display: Only apply ctx for specific surface.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 2 May 2017 20:58:39 +0000 (16:58 -0400)]
drm/amd/display: bw debug options now apply to dml as well
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 9 May 2017 14:41:42 +0000 (10:41 -0400)]
drm/amd/display: Keep DVI_SINGLE_LINK signal if low clk
If user is using DVI->HDMI dongle dual link signal might pose a
problem. Keep single link signal type if clk is lower than
max tmds clk.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Sun, 30 Apr 2017 13:20:55 +0000 (09:20 -0400)]
drm/amd/display: i2c/aux Remove link index.
Link index is an unnecessery level of inderection when
calling from kernel i2c/aux transfer into DAL.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 10 May 2017 19:56:17 +0000 (15:56 -0400)]
drm/amd/display: Don't call PSR func if DMCU is off
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
kbuild test robot [Thu, 11 May 2017 01:48:31 +0000 (09:48 +0800)]
drm/amdgpu/display: fix semicolon.cocci warnings
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_resource.c:1085:2-3: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
CC: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
kbuild test robot [Thu, 11 May 2017 01:48:31 +0000 (09:48 +0800)]
drm/amdgpu/display: fix semicolon.cocci warnings
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.c:411:23-24: Unneeded semicolon
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.c:420:39-40: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
CC: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Mon, 6 Mar 2017 06:01:11 +0000 (14:01 +0800)]
drm/amdgpu: enable dcn1.0 dc support on raven
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 15 Jun 2017 20:27:42 +0000 (16:27 -0400)]
drm/amdgpu/display: Enable DCN in DC
Enable DCN in DC.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:28:56 +0000 (15:28 -0400)]
drm/amdgpu/display: Add irq support for DCN
DCN code for display interrupts.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:26:37 +0000 (15:26 -0400)]
drm/amdgpu/display: Add i2c/aux support for DCN
Implement support for i2c and aux on DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:21:44 +0000 (15:21 -0400)]
drm/amdgpu/display: Add gpio support for DCN
GPIOs are used for i2c and other things.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:20:38 +0000 (15:20 -0400)]
drm/amdgpu/display: Add dml support for DCN
Display mode lib handles clock, watermark, and bandwidth
calculations for DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:19:06 +0000 (15:19 -0400)]
drm/amdgpu/display: Add core dc support for DCN
Core display support for DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 8 May 2017 19:17:39 +0000 (15:17 -0400)]
drm/amdgpu/display: Add calcs code for DCN
Bandwidth and scaling calculations for DCN.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Wed, 26 Apr 2017 12:09:56 +0000 (17:39 +0530)]
drm/amd/display: fix resume hang because of DP short pulse
There is a hard hang observed during resume from S3 when
the system receives a DP short pulse interrupt. This is
because there are two code paths contending for GPIO
access for AUX channel transactions. One such path is
through amdgpu_dm_display_resume() function which is
invoked from the regular system resume code path. The
other path is through handle_hpd_rx_irq(), which is
invoked in response to system receiving DP short pulse
interrupt. handle_hpd_rx_irq() guards against conflicting
GPIO access using hpd_lock, but the GPIO access from
amdgpu_dm_display_resume() remains unguarded.
This patch makes sure we use hpd_lock inside
amdgpu_dm_display_resume() to avoid race conditions
for GPIO access.
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 3 May 2017 17:58:45 +0000 (13:58 -0400)]
drm/amd/display: Assign stream to map before we need it
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hersen Wu [Fri, 28 Apr 2017 20:21:38 +0000 (16:21 -0400)]
drm/amd/display: Get dprefclk ss percentage from vbios
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Fri, 28 Apr 2017 11:54:34 +0000 (07:54 -0400)]
drm/amd/display: move drr_params definition to TG
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 28 Apr 2017 13:56:08 +0000 (09:56 -0400)]
drm/amd/display: Disable cursor on video surface.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Thu, 27 Apr 2017 16:20:34 +0000 (12:20 -0400)]
drm/amd/display: Add support for FreeSync on eDP to module
Signed-off-by: Eric <eric.cook@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Tue, 25 Apr 2017 14:03:27 +0000 (10:03 -0400)]
drm/amd/display: Add function to set dither option
Signed-off-by: Ding Wang <Ding.Wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Wed, 26 Apr 2017 15:51:38 +0000 (11:51 -0400)]
drm/amd/display: Check for Zero Range in FreeSync Calc
-check for min/max range in freesync calculation and handle it accordingly
Signed-off-by: Eric <eric.cook@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Wed, 26 Apr 2017 14:54:45 +0000 (10:54 -0400)]
drm/amd/display: fix crash caused by incorrect index being used for array
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ding Wang [Wed, 12 Apr 2017 19:29:13 +0000 (15:29 -0400)]
drm/amd/display: Define dithering options
Signed-off-by: Ding Wang <Ding.Wang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sat, 22 Apr 2017 18:17:51 +0000 (14:17 -0400)]
drm/amd/display: decouple resource_pool from resource_context
to avoid null access in case res_ctx is used to access res_pool before it's fully constructed
also make it clear which function has dependency on resource_pool
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Cook [Tue, 18 Apr 2017 19:24:50 +0000 (15:24 -0400)]
drm/amd/display: FreeSync Auto Sweep Support
Implement core support to allow for FreeSync Auto Sweep to work
Signed-off-by: Eric Cook <Eric.Cook@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 24 Apr 2017 21:42:22 +0000 (17:42 -0400)]
drm/amd/display: no need for return value from ipp_program_degamma_pwl
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 24 Apr 2017 20:30:58 +0000 (16:30 -0400)]
drm/amd/display: dce80, 100, 110 and 112 to dce ipp refactor
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Mon, 24 Apr 2017 19:20:24 +0000 (15:20 -0400)]
drm/amd/display: dce120 to dce ipp refactor
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Mon, 24 Apr 2017 03:33:26 +0000 (23:33 -0400)]
drm/amd/display: clarify delay param for REG_WAIT
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sun, 23 Apr 2017 14:46:02 +0000 (10:46 -0400)]
drm/amd/display: move tg_color to dc_hw_types
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sylvia Tsai [Fri, 21 Apr 2017 19:29:55 +0000 (15:29 -0400)]
drm/amd/display: PSR Refactor
- Refacotr PSR to follow correct module pattern
- fix eDP only working on sink index 0.
Signed-off-by: Sylvia Tsai <sylvia.tsai@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Fri, 21 Apr 2017 14:55:01 +0000 (10:55 -0400)]
drm/amd/display: Make dc_link param const in set_drive_settings
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Fri, 21 Apr 2017 13:34:09 +0000 (09:34 -0400)]
drm/amd/display: improve cursor programming reliability
This change will cache cursor attributes and reprogram them
when enabling cursor after power gating if the attributes were not
yet reprogrammed
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Fri, 21 Apr 2017 21:15:40 +0000 (17:15 -0400)]
drm/amd/display: USB-c DP-HDMI dongle shows garbage on Sony TV
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 21 Apr 2017 15:00:43 +0000 (11:00 -0400)]
drm/amd/display: Make sure v_total_min and max not less than v_total.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Amy Zhang [Tue, 18 Apr 2017 21:43:09 +0000 (17:43 -0400)]
drm/amd/display: always retrieve PSR cap
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 18 Apr 2017 21:31:46 +0000 (17:31 -0400)]
drm/amd/display: fix memory leak
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 18 Apr 2017 19:35:27 +0000 (15:35 -0400)]
drm/amd/display: set correct v_total_min and v_total_max for dce.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Tue, 18 Apr 2017 20:51:39 +0000 (16:51 -0400)]
drm/amd/display: remove unnecessary allocation for regamma_params inside opp
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 18 Apr 2017 19:43:22 +0000 (15:43 -0400)]
drm/amd/display: Fix memory leak in post_update_surfaces
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Mon, 17 Apr 2017 23:02:19 +0000 (19:02 -0400)]
drm/amd/display: Block YCbCr formats for eDP. Revert previous change.
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Wed, 12 Apr 2017 10:53:25 +0000 (16:23 +0530)]
drm/amd/display: make dc_commit_surfaces_to_stream() re-entrant
dc_commit_surfaces_to_stream() function currently
is handle's only one plane at a time.
This will not work if multiple planes have to be set to a crtc.
The functionality of dc_commit_surfaces_to_stream() with this patch
is slit into
1. Accumulate and initialise all the surfaces that needs to be
set to a crtc.
2. Update the intialised set of surfaces to the steam in one go.
Hence dc_commit_surfaces_to_stream() is renamed to init_surfaces().
Once all the planes requested by user space are initialised,
dc_commit_surfaces_to_stream() shall sequentially populates *updates,
*flip_addr, *plane_info and *scaling_info for all surfaces.
BUG: SWDEV-119421
TEST: (On Chromium OS for Stoney Only)
* Chromium UI comes up, on both eDP & DP.
* 'new_surface_count' now changes as per user input for e.g for
all below run tests its 2, without this patch for the below
tests it used to be 1
* Executed below tests to see YUV(underlay) & RGB planes on eDP
plane_test --format XR24 --size 500x100 -p --format YV12 --size 500x500
plane_test --format AR24 --size 500x50 -p --format YV12 --size 150x150
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768
Signed-off-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Tue, 25 Apr 2017 06:56:57 +0000 (12:26 +0530)]
drm/amd/display: update the YUV plane offsets
This patch updates the planes default offsets to
the appropriate ones, and aligns the pitch to 64 bits.
BUG=SWDEV-119421
TEST=Boots to UI on jadeite
TEST=
plane_test --format AR24 --size 500x50 -p --format YV12 --size 500x500
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1280x720
plane_test --format AR24 --size 500x50 -p --format YV12 --size 1366x768
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 27 Apr 2017 02:36:01 +0000 (22:36 -0400)]
drm/amd/display: initialize YUV plane capabilities
This patch populates the YUV surface configurations.
Tests: (On Chromium OS for Stoney Only)
builds without any errors.
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Mar 2017 15:22:05 +0000 (11:22 -0400)]
drm/amd/display: Return context from validate_context
This will allow us to carry it from check to commit
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Mar 2017 15:15:14 +0000 (11:15 -0400)]
drm/amd/display: Move resource_validate_ctx_destruct to dc.h
This will be needed to clean up context once we add it to private
atomic state.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 6 Apr 2017 22:57:05 +0000 (18:57 -0400)]
drm/amd/display: Copy ctx to current_context instead of assign
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / openwrt / staging / blogic.git / log