Andre Przywara [Mon, 5 Nov 2018 00:52:06 +0000 (00:52 +0000)]
allwinner: power: fix DRIVEVBUS pin setup
The DRIVEVBUS pin setup was broken in two ways:
- To configure this pin as an output pin, one has to *clear* the bit in
register 0x8f. It is 0 by default, but rebooting from Linux might have
left this bit set.
- Doing this just configures the pin as an output pin, but doesn't
actually drive power to it. This is done via bit 2 in register 0x30.
Fix the routine to both properly configure the pin and drive power to
it. Add an axp_clrsetbits() helper on the way.
Now this isn't really perfect, still:
We only need to setup the PMIC power rails that are needed for U-Boot.
DRIVEVBUS typically controls the VBUS voltage for the host function of
an USB-OTG port, something we typically don't want in U-Boot (fastboot,
using the USB *device* functionality, is much more common). The
BananaPi-M64 uses the regulator in this way, but the Remix Mini PC
actually controls the power of both its USB ports via this line.
Technically we should differentiate here: if DRIVEVBUS controls a
microUSB-B socket, the power should stay off, any host-type A sockets
should be supplied, though.
For now just always enable the power, that shouldn't really hurt the
USB-OTG functionality anyway.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Sun, 4 Nov 2018 23:37:48 +0000 (23:37 +0000)]
allwinner: A64/H5: setup missing bus clocks
The legacy Allwinner ATF port used to setup some clocks, and U-Boot is
still relying on this. We don't need to setup the full set, as the SPL
is doing most of it, but it misses one clock (AHB2) and programs another
(AHB1) to quite conservative values.
Fix this up during the platform setup to improve USB and Ethernet
performance, iperf values go up by 31% in my setup with that patch.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Antonio Nino Diaz [Tue, 13 Nov 2018 13:27:41 +0000 (13:27 +0000)]
Merge pull request #1676 from Yann-lms/static_analysis
Correct some issues found with static analysis tools
Antonio Niño Díaz [Tue, 13 Nov 2018 11:26:28 +0000 (12:26 +0100)]
Merge pull request #1677 from acolinisi/PR--drivers-cadence-uart-prototype
cadence: uart: comply to console_register prototype
Alexei Colin [Fri, 9 Nov 2018 22:36:55 +0000 (17:36 -0500)]
cadence: uart: comply to console_register prototype
Signed-off-by: Alexei Colin <acolin@isi.edu>
Antonio Niño Díaz [Mon, 12 Nov 2018 10:40:11 +0000 (11:40 +0100)]
Merge pull request #1674 from jforissier/hisi-multi-console
hikey, hikey960, poplar: use new console APIs
Antonio Niño Díaz [Mon, 12 Nov 2018 09:56:41 +0000 (10:56 +0100)]
Merge pull request #1605 from sivadur/integration
Add support new Xilinx Versal ACAP platform
Yann Gautier [Fri, 9 Nov 2018 16:47:34 +0000 (17:47 +0100)]
stm32mp1: remove duplicate function declaration
It is already in include/drivers/st/stm32mp1_ddr_helpers.h.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier [Fri, 9 Nov 2018 14:57:18 +0000 (15:57 +0100)]
stm32mp1: correct some static analysis tools issues
These issues wer found by sparse:
drivers/st/clk/stm32mp1_clk.c:1524:19:
warning: incorrect type in assignment (different base types)
expected restricted fdt32_t const [usertype] *pkcs_cell
got unsigned int const [usertype] *
plat/st/stm32mp1/plat_image_load.c:13:6:
warning: symbol 'plat_flush_next_bl_params' was not declared.
Should it be static?
plat/st/stm32mp1/plat_image_load.c:21:16:
warning: symbol 'plat_get_bl_image_load_info' was not declared.
Should it be static?
plat/st/stm32mp1/plat_image_load.c:29:13:
warning: symbol 'plat_get_next_bl_params' was not declared.
Should it be static?
plat/st/stm32mp1/bl2_io_storage.c:40:10:
warning: symbol 'block_buffer' was not declared. Should it be static?
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier [Fri, 9 Nov 2018 17:21:04 +0000 (18:21 +0100)]
drivers: partition: correct some static analysis tools issues
cppcheck:
[drivers/partition/gpt.c:19] -> [drivers/partition/gpt.c:19]:
(warning) Either the condition 'str_in!=((void*)0)' is redundant
or there is possible null pointer dereference: name.
sparse:
drivers/partition/gpt.c:39:9:
warning: Using plain integer as NULL pointer
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier [Fri, 9 Nov 2018 17:21:51 +0000 (18:21 +0100)]
psci: put __dead2 attribute after void in plat_psci_ops
These warnings were issued by sparse:
plat/st/stm32mp1/stm32mp1_pm.c:365:36:
warning: incorrect type in initializer (different modifiers)
expected void ( *[noreturn] pwr_domain_pwr_down_wfi )( ... )
got void ( [noreturn] *<noident> )( ... )
plat/st/stm32mp1/stm32mp1_pm.c:366:23:
warning: incorrect type in initializer (different modifiers)
expected void ( *[noreturn] system_off )( ... )
got void ( [noreturn] *<noident> )( ... )
plat/st/stm32mp1/stm32mp1_pm.c:367:25:
warning: incorrect type in initializer (different modifiers)
expected void ( *[noreturn] system_reset )( ... )
got void ( [noreturn] *<noident> )( ... )
This cannot be changed the other way in all platforms pm drivers
or else there is a compilation error:
plat/st/stm32mp1/stm32mp1_pm.c:234:1: error: attributes should be specified
before the declarator in a function definition
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Siva Durga Prasad Paladugu [Tue, 25 Sep 2018 13:14:58 +0000 (18:44 +0530)]
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar
Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with
leading-edge memory and interfacing technologies to deliver powerful
heterogeneous acceleration for any application. The Versal AI Core series has
five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm
Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time
processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines
optimized for high-precision floating point with low latency.
This patch adds Virtual QEMU platform support for
this SoC "versal_virt".
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Jerome Forissier [Thu, 8 Nov 2018 11:57:30 +0000 (11:57 +0000)]
poplar: Use new console APIs
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1.
Enables building with ERROR_DEPRECATED=1.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Jerome Forissier [Thu, 8 Nov 2018 08:59:29 +0000 (09:59 +0100)]
hikey960: Use new console APIs
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1.
Enables building with ERROR_DEPRECATED=1.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Jerome Forissier [Thu, 8 Nov 2018 10:17:47 +0000 (10:17 +0000)]
hikey: Use new console APIs
Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1.
Enables building with ERROR_DEPRECATED=1.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Antonio Niño Díaz [Thu, 8 Nov 2018 11:22:42 +0000 (12:22 +0100)]
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
Antonio Nino Diaz [Thu, 8 Nov 2018 10:20:19 +0000 (10:20 +0000)]
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver
- dt-bindings folders
- zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Soby Mathew [Wed, 7 Nov 2018 17:03:45 +0000 (17:03 +0000)]
Merge pull request #1672 from sandrine-bailleux-arm/sb/fix-dram-constants
Arm platforms: Fix DRAM address macros
Soby Mathew [Wed, 7 Nov 2018 17:00:49 +0000 (17:00 +0000)]
Merge pull request #1668 from ldts/rcar_gen3/e3_build
rcar_gen3: E3 target: fix compilation issues
Soby Mathew [Wed, 7 Nov 2018 16:58:03 +0000 (16:58 +0000)]
Merge pull request #1670 from antonio-nino-diaz-arm/an/misra-arm
plat/arm: Fix MISRA defects in common code
Soby Mathew [Wed, 7 Nov 2018 16:56:03 +0000 (16:56 +0000)]
Merge pull request #1669 from sandrine-bailleux-arm/sb/rm-tzc-top-fn
Remove unneeded _tzc_get_max_top_addr() function
Soby Mathew [Wed, 7 Nov 2018 16:54:17 +0000 (16:54 +0000)]
Merge pull request #1666 from pmanish87/mp2/manish_local
plat/arm: Support direct Linux kernel boot in AArch32
Sandrine Bailleux [Wed, 31 Oct 2018 13:28:17 +0000 (14:28 +0100)]
Arm platforms: Fix DRAM address macros
On AArch32, ARM_DRAM1_BASE and ARM_DRAM1_SIZE constants are currently
32-bit values (because they are suffixed with UL and the value
0x80000000 fits in a unsigned long int, i.e. a 32-bit value). When
summing them up, the result overflows the maximum value that can be
encoded in a 32-bit value so it wraps around and does not result in
the expected value.
This patch changes the suffix of these constants into ULL so that they
always are 64-bit values.
Change-Id: I3b19b1805e35cc7e43050458df379081b1e882d5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Sandrine Bailleux [Wed, 31 Oct 2018 12:41:47 +0000 (13:41 +0100)]
Remove _tzc_get_max_top_addr() function
This function was needed at the time where we didn't have the
compiler_rt lib. An AArch32-specific variant was provided to handle
the 64-bit shift operation in 32-bit. This is no longer needed.
Change-Id: Ibab709a95e3a723ae2eeaddf873dba70ff2012b3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Sandrine Bailleux [Wed, 31 Oct 2018 12:37:42 +0000 (13:37 +0100)]
compiler_rt: Import lshrdi3.c file
Imported from the LLVM compiler_rt library on master branch as of
30 Oct 2018 (SVN revision: r345645).
This is to get the __aeabi_llsr() builtin, which is required by a
subsequent patch that uses a logical right shift operator in AArch32.
Change-Id: I9884139a12855a8a87206fb572aaa7dd35582b09
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Sandrine Bailleux [Wed, 31 Oct 2018 12:35:01 +0000 (13:35 +0100)]
compiler_rt: Import latest changes on int_lib.h
Imported from the LLVM compiler_rt library on master branch as of
30 Oct 2018 (SVN revision: r345645).
Change-Id: I058cfb5894daf1d12e1ef971c0ba36b0aa089be5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Antonio Nino Diaz [Tue, 6 Nov 2018 13:14:21 +0000 (13:14 +0000)]
plat/arm: Fix MISRA defects in common code
Change-Id: I2419416fadfcdf64da8b7690a348007591c4edf3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Niño Díaz [Tue, 6 Nov 2018 11:45:09 +0000 (12:45 +0100)]
Merge pull request #1665 from antonio-nino-diaz-arm/an/fdt-helpers
Introduce new fdt helpers
ldts [Tue, 6 Nov 2018 09:17:12 +0000 (10:17 +0100)]
rcar_gen3: E3 target: fix compilation issues
Target builds but has not been tested.
Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com>
ldts [Tue, 6 Nov 2018 10:01:19 +0000 (11:01 +0100)]
plat: rcar: support plat_crash_console_flush
Signed-off-by: ldts <jorge.ramirez.ortiz@gmail.com>
Soby Mathew [Tue, 6 Nov 2018 06:53:48 +0000 (06:53 +0000)]
Merge pull request #1661 from hzhuang1/emmc_delay
hikey: add delay after eMMC initialized
Manish Pandey [Fri, 2 Nov 2018 13:28:25 +0000 (13:28 +0000)]
plat/arm: Support direct Linux kernel boot in AArch32
This option allows the Trusted Firmware to directly jump to Linux
kernel for aarch32 without the need of an intermediate loader such
as U-Boot.
Similar to AArch64 ARM_LINUX_KERNEL_AS_BL33 only available with
RESET_TO_SP_MIN=1 as well as BL33 and DTB are preloaded in memory.
Change-Id: I908bc1633696be1caad0ce2f099c34215c8e0633
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Antonio Nino Diaz [Tue, 26 Jun 2018 09:34:10 +0000 (10:34 +0100)]
Introduce fdtw_read_array() helper
fdtw_read_cells() can only read one or two cells, sometimes it may be
needed to read more cells from one property.
Change-Id: Ie70dc76d1540cd6a04787cde7cccb4d1bafc7282
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 26 Jun 2018 09:34:07 +0000 (10:34 +0100)]
Introduce new fdt helper to read string properties
Introduced fdtw_read_string() to read string properties.
Change-Id: I854eef0390632cf2eaddd2dce60cdb98c117de43
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 27 Sep 2018 08:22:19 +0000 (09:22 +0100)]
libc: Adapt strlcpy to this codebase
Change-Id: I2f5f64aaf90caae936510e1179392a8835f493e0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 27 Sep 2018 08:18:57 +0000 (09:18 +0100)]
libc: Import strlcpy from FreeBSD
From commit
aafd1cf4235d78ce85b76d7da63e9589039344b3:
- lib/libc/strlcpy.c
Change-Id: Iaa7028fcc26706bdd6ee3f1e4bd55dd5873a30c6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Niño Díaz [Fri, 2 Nov 2018 10:15:56 +0000 (11:15 +0100)]
Merge pull request #1663 from sudeep-holla/scpi_build_fix
plat: juno: fix build for !CSS_USE_SCMI_DRIVER
Antonio Niño Díaz [Fri, 2 Nov 2018 10:14:54 +0000 (11:14 +0100)]
Merge pull request #1660 from antonio-nino-diaz-arm/an/misra
Several MISRA defect fixes
Sudeep Holla [Thu, 1 Nov 2018 16:17:30 +0000 (16:17 +0000)]
plat: juno: fix build for !CSS_USE_SCMI_DRIVER
When CSS_USE_SCMI_DRIVER is not defined or set to 0, we get the
following build error.
plat/arm/board/juno/juno_topology.c:16:19: error: ‘CSS_SCMI_PAYLOAD_BASE’ undeclared here (not in a function)
.scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
^~~~~~~~~~~~~~~~~~~~~
plat/arm/board/juno/juno_topology.c:17:38: error: ‘CSS_SCMI_MHU_DB_REG_OFF’ undeclared here (not in a function)
.db_reg_addr = PLAT_CSS_MHU_BASE + CSS_SCMI_MHU_DB_REG_OFF,
^~~~~~~~~~~~~~~~~~~~~~~
CSS_CPU_PWR_STATE_OFF
Fix the error in order to get function legacy SCPI support functional.
Change-Id: I00cb80db9968aa0be546e33a3a682a2db87719be
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Antonio Nino Diaz [Wed, 31 Oct 2018 15:55:57 +0000 (15:55 +0000)]
bakery: Fix MISRA defects
Change-Id: I600bc13522ae977db355b6dc5a1695bce39ec130
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 30 Oct 2018 16:32:48 +0000 (16:32 +0000)]
plat/arm: Fix MISRA defects in dyn config
Change-Id: Iae6758ca6395560131d1e1a69a1ecfe50ca8bf83
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 30 Oct 2018 16:12:32 +0000 (16:12 +0000)]
plat/arm: Fix types of constants in headers
Change-Id: I33eaee8e7c983b3042635a448cb8d689ea4e3a12
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 31 Oct 2018 15:25:35 +0000 (15:25 +0000)]
context_mgmt: Fix MISRA defects
The macro EL_IMPLEMENTED() has been deprecated in favour of the new
function el_implemented().
Change-Id: Ic9b1b81480b5e019b50a050e8c1a199991bf0ca9
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Niño Díaz [Thu, 1 Nov 2018 11:46:24 +0000 (12:46 +0100)]
Merge pull request #1658 from glneo/plat-arm-remove
ti: k3: common: Remove use of ARM platform code
Antonio Niño Díaz [Thu, 1 Nov 2018 11:45:32 +0000 (12:45 +0100)]
Merge pull request #1657 from antonio-nino-diaz-arm/an/libfdt
libfdt: Downgrade to version 1.4.6-9
Antonio Niño Díaz [Thu, 1 Nov 2018 11:45:22 +0000 (12:45 +0100)]
Merge pull request #1656 from masahir0y/uniphier
uniphier: clean-up and improve SCP handling code
Antonio Niño Díaz [Thu, 1 Nov 2018 11:44:24 +0000 (12:44 +0100)]
Merge pull request #1623 from MISL-EBU-System-SW/a3700-support
Add support for Armada 3700 and COMPHY porting layer
Konstantin Porotchkin [Mon, 8 Oct 2018 13:53:09 +0000 (16:53 +0300)]
plat: marvell: Add support for Armada-37xx SoC platform
Add supprot for Marvell platforms based on Armada-37xx SoC.
This includes support for the official Armada-3720 modular
development board and EspressoBin community board.
The Armada-37xx SoC contains dual Cortex-A53 Application CPU,
single secure CPU (Cortex-M3) and the following interfaces:
- SATA 3.0
- USB 3.0 and USB 2.0
- PCIe
- SDIO (supports boot from eMMC)
- SPI
- UART
- I2c
- Gigabit Ethernet
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Antonio Niño Díaz [Wed, 31 Oct 2018 14:47:21 +0000 (15:47 +0100)]
Merge pull request #1650 from chandnich/sgiclark-ares-support
Sgiclark ares support
Antonio Niño Díaz [Wed, 31 Oct 2018 14:32:58 +0000 (15:32 +0100)]
Merge pull request #1655 from deepan02/deepak-arm/introduce-n1sdp
plat/arm: Introduce the N1SDP.
Antonio Niño Díaz [Wed, 31 Oct 2018 14:31:32 +0000 (15:31 +0100)]
Merge pull request #1659 from vwadekar/sdei-fix-compilation
sdei: include "context.h" to fix compilation errors
Antonio Niño Díaz [Wed, 31 Oct 2018 11:02:22 +0000 (12:02 +0100)]
Merge pull request #1646 from Andre-ARM/allwinner/pmic-v2
Allwinner/pmic v2
Haojian Zhuang [Wed, 31 Oct 2018 09:41:35 +0000 (17:41 +0800)]
hikey: add delay after eMMC initialized
It boots failure on CircuitCo HiKey board. The delay could fix the
hang issue.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Varun Wadekar [Wed, 31 Oct 2018 00:05:59 +0000 (17:05 -0700)]
sdei: include "context.h" to fix compilation errors
This patch includes context.h from sdei_private.h to fix the
following compilation errors:
<snip>
In file included from services/std_svc/sdei/sdei_event.c:9:0:
services/std_svc/sdei/sdei_private.h: In function 'sdei_client_el':
services/std_svc/sdei/sdei_private.h:164:2: error: unknown type name 'cpu_context_t'
cpu_context_t *ns_ctx = cm_get_context(NON_SECURE);
^
services/std_svc/sdei/sdei_private.h:165:2: error: unknown type name 'el3_state_t'
el3_state_t *el3_ctx = get_el3state_ctx(ns_ctx);
^
services/std_svc/sdei/sdei_private.h:165:2: error: implicit declaration of function 'get_el3state_ctx' [-Werror=implicit-function-declaration]
services/std_svc/sdei/sdei_private.h:165:25: error: initialization makes pointer from integer without a cast [-Werror]
el3_state_t *el3_ctx = get_el3state_ctx(ns_ctx);
^
services/std_svc/sdei/sdei_private.h:167:2: error: implicit declaration of function 'read_ctx_reg' [-Werror=implicit-function-declaration]
return ((read_ctx_reg(el3_ctx, CTX_SCR_EL3) & SCR_HCE_BIT) != 0U) ?
^
services/std_svc/sdei/sdei_private.h:167:33: error: 'CTX_SCR_EL3' undeclared (first use in this function)
return ((read_ctx_reg(el3_ctx, CTX_SCR_EL3) & SCR_HCE_BIT) != 0U) ?
^
services/std_svc/sdei/sdei_private.h:167:33: note: each undeclared identifier is reported only once for each function it appears in
cc1: all warnings being treated as errors
<snip>
Change-Id: Id0cad56accf81b19cb0d301784f3f086dd052722
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Andrew F. Davis [Mon, 29 Oct 2018 15:41:28 +0000 (10:41 -0500)]
ti: k3: common: Remove use of ARM platform code
A recent patch[0] has made setting up page tables into generic
code, complete the conversion for TI platforms by removing the
use of plat_arm_get_mmap() and using the mmap table directly.
[0]
0916c38deca4 ("Convert arm_setup_page_tables into a generic helper")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Antonio Niño Díaz [Tue, 30 Oct 2018 15:06:41 +0000 (16:06 +0100)]
Merge pull request #1652 from antonio-nino-diaz-arm/an/decouple-arm
poplar, warp7, ls1043: Decouple from plat/arm files
Antonio Niño Díaz [Tue, 30 Oct 2018 14:48:02 +0000 (15:48 +0100)]
Merge pull request #1651 from antonio-nino-diaz-arm/an/rand-misra
Fix some MISRA defects
Antonio Niño Díaz [Tue, 30 Oct 2018 14:47:48 +0000 (15:47 +0100)]
Merge pull request #1649 from Yann-lms/stm32mp1_doc_update
docs: stm32mp1: complete compilation and flashing steps
Antonio Nino Diaz [Mon, 29 Oct 2018 15:08:50 +0000 (15:08 +0000)]
libfdt: Downgrade to version 1.4.6-9
Version 1.4.7 introduces a big performance hit to functions that access
the FDT. Downgrade the library to version 1.4.6-9, before the changes
that introduce the problem. Version 1.4.6 isn't used because one of the
libfdt files (fdt_overlay.c) is missing the license header. This
problem is also fixed in 1.4.6-9.
This version corresponds to commit <
aadd0b65c987> checks: centralize
printing of property names in failure messages.
Fixes ARM-software/tf-issues#643
Change-Id: I73c05f2b1f994bcdcc4366131ce0647553cdcfb8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 26 Oct 2018 10:13:23 +0000 (11:13 +0100)]
warp7, ls1043: Remove unneeded include paths
include/plat/arm/common isn't needed by them, and is removed to avoid
dependency on Arm platform code.
Change-Id: Id9fccba33326fd075b3d1029bf1e4b012dfa0483
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 26 Oct 2018 10:12:31 +0000 (11:12 +0100)]
poplar: Decouple from plat/arm files
plat/arm files should only be used by Arm platforms. If other platforms
use them, they create dependencies that can introduce problems when
updating Arm platforms.
This patch copies the needed code from Arm platforms so that poplar can
be independent from them.
Change-Id: I0b194f5bdb0377b8ccacbd400e021614c026c7fe
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Dai Okamura [Thu, 4 Oct 2018 23:56:24 +0000 (08:56 +0900)]
uniphier: revise SCP protocol handshake
When the SoC issues a command IRQ to SCP, SCP sets STMTOBEIRQ as ACK.
The SoC must wait for it before issuing the next command.
This commit makes sure to meet the requirement.
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 4 Oct 2018 05:54:49 +0000 (14:54 +0900)]
uniphier: terminate boot if SCP_BL2 image is missing in SCP boot mode
Skipping SCP_BL2 image is just a temporary workaround. If on-chip SCP
needs to work, BL2 should load the SCP_BL2 image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Antonio Nino Diaz [Thu, 25 Oct 2018 16:38:23 +0000 (17:38 +0100)]
Fix MISRA defects in PMF
No functional changes.
Change-Id: I64abd72026082218a40b1a4b8f7dc26ff2478ba6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 25 Oct 2018 16:11:02 +0000 (17:11 +0100)]
Fix MISRA defects in workaround and errata framework
No functional changes.
Change-Id: Iaab0310848be587b635ce5339726e92a50f534e0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 25 Oct 2018 15:53:04 +0000 (16:53 +0100)]
plat/arm: Fix MISRA defects in SiP SVC handler
No functional changes.
Change-Id: I9b9f8d3dfde08d57706ad5450de6ff858a55ac01
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 25 Oct 2018 15:52:26 +0000 (16:52 +0100)]
Fix MISRA defects in extension libs
No functional changes.
Change-Id: I2f28f20944f552447ac4e9e755493cd7c0ea1192
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Deepak Pandey [Wed, 8 Aug 2018 05:02:51 +0000 (10:32 +0530)]
plat/arm: Introduce the N1SDP.
This patch adds support for the N1SDP (NeoVerse N1 System Development
Platform). It is an initial port and additional features are expected
to be added later.
The port includes only BL31 support as the System Control Processor
(SCP) is expected to take the role of primary boatloader
Change-Id: Ife17d8215a7bfcc1420204a72205e7ef920d0c10
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
Soby Mathew [Mon, 29 Oct 2018 11:45:10 +0000 (11:45 +0000)]
Merge pull request #1654 from antonio-nino-diaz-arm/an/meson-console
meson: console: Add missing define to fix build
Antonio Nino Diaz [Mon, 29 Oct 2018 11:35:34 +0000 (11:35 +0000)]
meson: console: Add missing define to fix build
It isn't possible to build this driver without adding this define.
Change-Id: Iba2ced411cd8ce438787871fa01b414d32b9aa42
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Soby Mathew [Mon, 29 Oct 2018 10:56:30 +0000 (10:56 +0000)]
Merge pull request #1644 from soby-mathew/sm/pie_proto
Position Indepedent Executable (PIE) Support
Soby Mathew [Mon, 29 Oct 2018 10:27:22 +0000 (10:27 +0000)]
Merge pull request #1616 from antonio-nino-diaz-arm/an/gxbb
Initial port of Amlogic Meson S905 (GXBB)
Soby Mathew [Sun, 14 Oct 2018 07:13:44 +0000 (08:13 +0100)]
FVP: Enable PIE for RESET_TO_BL31=1
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references
to BL31_BASE are replaced by BL31_START as being a symbol exported by
the linker, will create a dynamic relocation entry in .rela.dyn and
hence will be fixed up by dynamic linker at runtime. Also, we disable
RECLAIM_INIT_CODE when PIE is enabled as the init section overlay
creates some static relocations which cannot be handled by the
dynamic linker currently.
Change-Id: I86df1b0a8b2a8bbbe7c3f3c0b9a08c86c2963ec0
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Fri, 12 Oct 2018 16:08:28 +0000 (17:08 +0100)]
plat/arm: Use `mov_imm` macro to load immediate values
This patch makes use of mov_imm macro where possible to load
immediate values within ARM platform layer.
Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Sun, 14 Oct 2018 07:09:22 +0000 (08:09 +0100)]
PIE: Position Independant Executable support for BL31
This patch introduces Position Independant Executable(PIE) support
in TF-A. As a initial prototype, only BL31 can support PIE. A trivial
dynamic linker is implemented which supports fixing up Global Offset
Table(GOT) and Dynamic relocations(.rela.dyn). The fixup_gdt_reloc()
helper function implements this linker and this needs to be called
early in the boot sequence prior to invoking C functions. The GOT is
placed in the RO section of BL31 binary for improved security and the
BL31 linker script is modified to export the appropriate symbols
required for the dynamic linker.
The C compiler always generates PC relative addresses to linker symbols
and hence referencing symbols exporting constants are a problem when
relocating the binary. Hence the reference to the
`__PERCPU_TIMESTAMP_SIZE__` symbol in PMF is removed and is now calculated
at runtime based on start and end addresses.
Change-Id: I1228583ff92cf432963b7cef052e95d995cca93d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Mon, 17 Sep 2018 03:34:35 +0000 (04:34 +0100)]
Make errata reporting mandatory for CPU files
Previously the errata reporting was optional for CPU operation
files and this was achieved by making use of weak reference to
resolve to 0 if the symbol is not defined. This is error prone
when adding new CPU operation files and weak references are
problematic when fixing up dynamic relocations. Hence this patch
removes the weak reference and makes it mandatory for the CPU
operation files to define the errata reporting function.
Change-Id: I8af192e19b85b7cd8c7579e52f8f05a4294e5396
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Fri, 12 Oct 2018 15:40:28 +0000 (16:40 +0100)]
PIE: Use PC relative adrp/adr for symbol reference
This patch fixes up the AArch64 assembly code to use
adrp/adr instructions instead of ldr instruction for
reference to symbols. This allows these assembly
sequences to be Position Independant. Note that the
the reference to sizes have been replaced with
calculation of size at runtime. This is because size
is a constant value and does not depend on execution
address and using PC relative instructions for loading
them makes them relative to execution address. Also
we cannot use `ldr` instruction to load size as it
generates a dynamic relocation entry which must *not*
be fixed up and it is difficult for a dynamic loader
to differentiate which entries need to be skipped.
Change-Id: I8bf4ed5c58a9703629e5498a27624500ef40a836
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Tue, 28 Aug 2018 10:13:55 +0000 (11:13 +0100)]
Basic Makefile changes for PIE
Change-Id: I0b8ccba15024c55bb03927cdb50370913eb8010c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Fri, 12 Oct 2018 15:26:20 +0000 (16:26 +0100)]
Add helper to return reference to a symbol
This patch adds a utility function to return
the address of a symbol. By default, the compiler
generates adr/adrp instruction pair to return
the reference and this utility is used to override
this compiler generated to code and use `ldr`
instruction.
This is needed for Position Independent Executable
when it needs to reference a symbol which is constant
and does not depend on the execute address of the
binary.
For example, on the FVP, the GICv3 register context is
stored in a secure carveout (arm_el3_tzc_dram) within
DDR and does not relocate with the BL image. Now if
BL31 is executing at a different address other than
the compiled address, using adrp/adr instructions to
reference this memory will not work as they generate an
address that is PC relative. The way to get around this
problem is to reference it as non-PC relative (i.e
non-relocatable location) via `ldr` instruction.
Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Antonio Niño Díaz [Fri, 26 Oct 2018 14:18:03 +0000 (16:18 +0200)]
Merge pull request #1647 from antonio-nino-diaz-arm/an/setup-xlat
Improvements to setup page tables code
Roberto Vargas [Fri, 19 Oct 2018 15:44:18 +0000 (16:44 +0100)]
Convert arm_setup_page_tables into a generic helper
This function is not related to Arm platforms and can be reused by other
platforms if needed.
Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8
Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 19 Oct 2018 15:52:22 +0000 (16:52 +0100)]
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is
supposed to be Arm platform only. This creates several dependency
problems between platforms.
This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib
v2 makefile. This way it is possible to detect from C code which version
is being used and include the correct header.
The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and
moved to a common folder. This way, when in doubt, this header can be
used to guarantee compatibility, as it includes the correct header based
on XLAT_TABLES_LIB_V2.
This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so
that is now locked in xlat lib v2) and ZynqMP (where it was added as a
workaround).
Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 10 Oct 2018 22:52:39 +0000 (23:52 +0100)]
docs: gxbb: Add documentation
Change-Id: Ie2465c1ccc482bd8eb5e5a71c580543095e4ba94
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 10 Oct 2018 22:50:35 +0000 (23:50 +0100)]
gxbb: Workaround for PSCI_CPU_OFF
There seems to be a problem where SCP can't turn CPU0 off. Instead of
returning PSCI_E_DENIED or crashing make CPU0 wait in a WFE loop. This
way all CPUs have a consistent behaviour from the point of view of the
caller.
Change-Id: I5c8c266ca3b69c9e7a4f5ae70afeea5dd36a0825
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 5 Oct 2018 19:42:42 +0000 (20:42 +0100)]
gxbb: Implement PSCI_CPU_OFF
This works fine for CPU1-3, but it fails for CPU0, where it is simply
ignored and leaves CPU0 in a WFI loop.
Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 18 Sep 2018 00:36:00 +0000 (01:36 +0100)]
gxbb: Initial port of Amlogic Meson S905 (GXBB)
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running
at 1.5Ghz. It also contains a Cortex-M3 used as SCP.
This port is a minimal implementation of BL31 capable of booting
mainline U-Boot and Linux:
- Partial SCPI support.
- Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF).
- GICv2 driver set up.
- Basic SIP services (read efuse data, enable/disable JTAG).
This port has been tested in an ODROID-C2.
Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da
Tested-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 15 Aug 2018 21:07:35 +0000 (22:07 +0100)]
meson: console: Introduce console driver
It has only been tested with a system clock of 24 MHz.
It has only been implemented for the multi console API.
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Chandni Cherukuri [Sun, 16 Sep 2018 15:36:29 +0000 (21:06 +0530)]
plat/arm/sgi: add support for SGI-Clark.Ares platform
SGI-Clark.Ares platform is a variant of the SGI-Clark platform. It has
two clusters of four Ares CPUs each. Though very similar to the SGI575
platform, there are subtle differences. HW_CONFIG and TB_FW_CONFIG dts
files have been added.
Change-Id: I740a33cbd1c3b1f1984cb56243b46ad379bab3e6
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Thu, 4 Oct 2018 11:02:03 +0000 (16:32 +0530)]
plat/arm/sgi: add support for SGI-Clark platform
SGI-Clark platform is the next version in the Arm's SGI platform
series. One of the primary difference between the SGI-575 platform and
the SGI-Clark platform is the MHU version (MHUv2 in case of SGI-Clark).
Add the required base support for SGI-Clark platform.
Change-Id: If396e5279fdf801d586662dad0b55195e81371e4
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Sun, 16 Sep 2018 15:35:49 +0000 (21:05 +0530)]
plat/arm/css: Add SID registers for SGx platforms
Some of the SGx platforms use System Identification (SID) registers
for platform identification. Add support for these registers in css.
Change-Id: If00b18744a31ff2cf14338f18c8c680eb69c9027
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Tue, 7 Aug 2018 09:22:55 +0000 (14:52 +0530)]
plat/arm/sgi: disable Ares cpu power down bit in reset handler
On SGI platforms that include Ares CPUs, the 'CORE_PWRDN_EN' bit of
'CPUPWRCTLR_EL1' register requires an explicit write to clear it to
enable hotplug and idle to function correctly.
The reset value of the CORE_PWRDN_EN bit is zero but it still requires
this explicit clear to zero. This indicates that this could be a model
related issue but for now this issue can be fixed be clearing the
CORE_PWRDN_EN bit in the platform specific reset handler function.
Change-Id: I8b9884ae27a2986d789bfec2e9ae792ef930944e
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Antonio Niño Díaz [Thu, 25 Oct 2018 13:00:38 +0000 (15:00 +0200)]
Merge pull request #1638 from chandnich/sgi575-update
Sgi575 update
Antonio Niño Díaz [Thu, 25 Oct 2018 09:54:57 +0000 (11:54 +0200)]
Merge pull request #1636 from antonio-nino-diaz-arm/an/console
Deprecate weak crash console functions
Antonio Niño Díaz [Thu, 25 Oct 2018 09:54:22 +0000 (11:54 +0200)]
Merge pull request #1640 from soby-mathew/sm/fin_con_reg
Multi-console: Deprecate the `finish_console_register` macro
Antonio Nino Diaz [Wed, 17 Oct 2018 15:49:26 +0000 (16:49 +0100)]
Deprecate weak crash console functions
The default behaviour of the plat_crash_console_xxx functions isn't
obvious to someone that hasn't read all the documentation. As they are
not mandatory, it is unlikely that the code will be checked when doing a
platform port, which may mean that some platforms may not have crash
console support at all.
The idea of this patch is to force platform maintainers to decide how
the crash console has to behave so that the final behaviour isn't
unexpected.
Change-Id: I40b2a7b56c5530c1dcd63eace5bd37ae6335056e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 16 Oct 2018 15:39:12 +0000 (16:39 +0100)]
rockchip: Use common crash console functions
This platform depends on weak functions defined in
``plat/common/aarch64/platform_helpers.S`` that are going to be removed.
Change-Id: I5104d091c32271d77ed9690e9dc257c061289def
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 16 Oct 2018 13:32:34 +0000 (14:32 +0100)]
Add sample crash console functions
Platforms that wish to use the sample functions have to add the file to
their Makefile. It is not included by default.
Change-Id: I713617bb58dc218967199248f68da86241d7ec40
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 16 Oct 2018 13:10:15 +0000 (14:10 +0100)]
plat/arm: Make crash console functions strong
In Arm platforms the crash console doesn't print anything if the crash
happens early enough. This happens in all images, not only BL1. The
reason is that they the files ``plat/common/aarch64/platform_helpers.S``
and ``plat/arm/common/aarch64/arm_helpers.S``, and the crash console
functions are defined as weak in both files. In practice, the linker
can pick the one in ``plat/common``, which simply switches the multi
console to crash mode when it wants to initialize the crash console.
In the case of Arm platforms, there are no console drivers registered
at that point, so nothing is printed.
This patch makes the functions in plat/arm strong so that they override
the weak functions in plat/common.
Change-Id: Id358db7d2567d7df0951790a695636cf6c9ac57f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 17 Oct 2018 14:29:34 +0000 (15:29 +0100)]
Add plat_crash_console_flush to platforms without it
Even though at this point plat_crash_console_flush is optional, it will
stop being optional in a following patch.
The console driver of warp7 doesn't support flush, so the implementation
is a placeholder.
TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but
they weren't global so they weren't actually used. Also, they were
calling the wrong functions.
imx8_helpers.S only has placeholders for all of the functions.
Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 17 Oct 2018 15:46:41 +0000 (16:46 +0100)]
zynqmp: Remove dependency on arm_helpers.S
Non-Arm platforms shouldn't use Arm platform code. This patch copies the
implementation of the functions in arm_helpers.S to zynqmp_helpers.S to
remove this dependency of zynqmp on Arm platforms.
Change-Id: Ia85f303c4c63bcf0ffa57c7f3ef9d88376729b6b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>