Olof Johansson [Tue, 25 Jun 2019 11:45:45 +0000 (04:45 -0700)]
Merge tag 'renesas-arm64-dt-for-v5.3' of https://git./linux/kernel/git/horms/renesas into arm/dt
Renesas ARM64 Based SoC DT Updates for v5.3
* Renesas SoCs
- Revise usb2_phy nodes and phys properties according to updated bindings
- Use ip=on for bootargs
* R-Car Gen 3 and RZ/G2M (r8a774a1) SoCs
- Add dynamic power coefficient
- Create thermal zone to support IPA
* R-Car E3 (r8a77990) and D3 (r8a77995) SoCs
- Point LVDS0 to its companion LVDS1
* R-Car E3 (r8a77990) SoC
- Corresct register range of DU
* R-Car E3 (r8a77990) based Ebisu board
- Remove renesas, no-ether-link property
* R-Car D3 (r8a77995) based Draak board:
- Remove unnecessary index from vin4 port
* RZ/G2M (r8a774a1) based HiHope main and sub-boards:
- Initial support
- Describe CPU capacity and topoligy
- Enable CMT, HDMI, LEDs, PCIe RWDT, SCIF, SDHI, TMU, and USB 2.0 and 3.0
* RZ/G2E (r8a774c0) SoC based EK874 board:
- Clean up CPU compatible strings
- Enable: Bluetooth, HDMI audio and video, TPU, USB 3.0 and WLAN
* tag 'renesas-arm64-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (53 commits)
arm64: dts: renesas: hihope-common: Remove "label" from LEDs
arm64: dts: renesas: hihope-common: Add HDMI support
arm64: dts: renesas: r8a774a1: Add HDMI encoder instance
arm64: dts: renesas: r8a774a1: Add dynamic power coefficient
arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
arm64: dts: renesas: hihope-common: Add LEDs support
arm64: dts: renesas: hihope-common: Enable USB3.0
arm64: dts: renesas: hihope-common: Add USB 2.0 support
arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocks
arm64: dts: renesas: r8a774a1: Add TMU device nodes
arm64: dts: renesas: r8a774a1: Add CMT device nodes
arm64: dts: renesas: hihope-common: Add uSD and eMMC
arm64: dts: renesas: r8a77990: Fix register range of display node
arm64: dts: renesas: cat874: Enable usb role switch support
arm64: dts: renesas: cat874: Enable USB3.0 host/peripheral device node
arm64: dts: renesas: r8a7799[05]: Point LVDS0 to its companion LVDS1
arm64: dts: renesas: hihope-common: Add RWDT support
arm64: dts: renesas: hihope-rzg2-ex: Enable PCIe support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:44:18 +0000 (04:44 -0700)]
Merge tag 'renesas-arm-dt-for-v5.3' of https://git./linux/kernel/git/horms/renesas into arm/dt
Renesas ARM Based SoC DT Updates for v5.3
* Renesas SoC based boards
- Use ip=on for bootargs
* Renesas R-Car Gen 2 SOC based boards
- Configure PMIC IRQ pinmux
* R-Car V2H (r8a7792) SoC
- Describe CMT devices in DT
* RZ/G1C (r8a77470) based iWave SBC (iwg23s-sbc) and
RZ/G1N (r8a7744) based boards:
- Correct SDHI2 VccQ regulator to fix SDR50 mode
* RZ/A2M (r7s9210) based rza2mevb EVB
RZ/A1H (r7s72100) based rskrza1 board
- Describe input switch in DT
* RZ/A2M (r7s9210) based rza2mevb EVB
- Sort nodes to ease future maintenance
- Add USB host, Ethernet and SDHI support
* RZ/A2M (r7s9210) and RZ/A1H (r7s72100) SoCs
- Describe IRQC device in DT
* tag 'renesas-arm-dt-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
ARM: dts: r8a7792: Add CMT0 and CMT1 to r8a7792
ARM: dts: iwg23s-sbc: Fix SDHI2 VccQ regulator
ARM: dts: iwg20d-q7-common: Fix SDHI1 VccQ regularor
ARM: dts: rza2mevb: Add input switch
ARM: dts: r7s9210: Add IRQC device node
ARM: dts: rza2mevb: sort nodes of rza2mevb board
ARM: dts: renesas: Use ip=on for bootargs
ARM: dts: rza2mevb: Add USB Host support
ARM: dts: r7s9210: Add USB Device support
ARM: dts: r7s9210: Add USB Host support
ARM: dts: rskrza1: Add input switches
ARM: dts: r7s72100: Add IRQC device node
ARM: dts: r8a779x: Configure PMIC IRQ pinmux
ARM: dts: rza2mevb: Add 48MHz USB clock
ARM: dts: r7s9210: Add USB clock
ARM: dts: rza2mevb: add ethernet aliases
ARM: dts: rza2mevb: Add SDHI support
ARM: dts: rza2mevb: Add Ethernet support
ARM: dts: r7s9210: Add SDHI support
ARM: dts: r7s9210: Add RIIC support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:43:29 +0000 (04:43 -0700)]
Merge tag 'renesas-dt-bindings-for-v5.3' of https://git./linux/kernel/git/horms/renesas into arm/dt
Renesas ARM Based SoC DT Bindings Updates for v5.3
* Renesas Gen3 DWC HDMI TX Encoder
- Add RZ/G2M (r8a774a1) support
* Renesas R-Car Compare Match Timer (CMT)
- Add R-Car H3 (r8a7795), M3-N (r8a77965) and E3 (r8a77990) support
* Renesas R-Car CAN FD Controller
- Add R-Car M3-N (r8a77965) and E3 (r8a77990), and RZ/G2E (r8a774c0) support
* Renesas R-Car CAN Controller
- Add RZ/G2M (r8a774a1) support
- Correct RZ/G2 clocks
* Vendor prefixes: Add vendor prefix for HopeRun
* Renesas SoCs and boards: Add HopeRun RZ/G2[M] boards
* tag 'renesas-dt-bindings-for-v5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
dt-bindings: display: renesas: Add r8a774a1 support
dt-bindings: timer: renesas, cmt: Document r8a779{5|65|90} CMT support
dt-bindings: can: rcar_canfd: document r8a774c0 support
dt-bindings: can: rcar_canfd: document r8a77990 support
dt-bindings: can: rcar_canfd: document r8a77965 support
dt-bindings: can: rcar_can: Add r8a774c0 support
dt-bindings: can: rcar_can: Fix RZ/G2 CAN clocks
dt-bindings: Add vendor prefix for HopeRun
dt-bindings: arm: renesas: Add HopeRun RZ/G2[M] boards
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:42:05 +0000 (04:42 -0700)]
Merge tag 'sunxi-h3-h5-for-5.3-
201906210812' of https://git./linux/kernel/git/sunxi/linux into arm/dt
This time we only have a single patch for our command branch between
arm and arm64, a fix for the array syntax raised by our DT schemas.
* tag 'sunxi-h3-h5-for-5.3-
201906210812' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sunxi: h3/h5: Fix GPIO regulator state array
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:41:39 +0000 (04:41 -0700)]
Merge tag 'sunxi-dt64-for-5.3-
201906210808' of https://git./linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of arm64 DT changes, this time with:
- Some fixes for the DT schemas that were added during this release
- Wifi support for the H6
- LRADC suppport for the A64
- Some background work on A64 boards, to enable various devices such
as touchscreens, PMIC, audio, wifi, etc.
* tag 'sunxi-dt64-for-5.3-
201906210808' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h6: Add DMA node
arm64: dts: allwinner: a64: Add lradc node
dt-bindings: input: sun4i-lradc-keys: Add A64 compatible
arm64: dts: allwinner: h6: add r_watchog node
arm64: dts: allwinner: h6: add watchdog node
dt-bindings: watchdog: add Allwinner H6 watchdog
arm64: dts: allwinner: a64: Enable audio on Teres-I
arm64: dts: allwinner: a64: bananapi-m64: Enable PMIC USB power supply
arm64: dts: allwinner: axp803: add USB power supply node
arm64: dts: allwinner: a64: Add pinmux for RGB666 LCD
arm64: dts: allwinner: a64: orangepi-win: Add wifi and bluetooth nodes
arm64: dts: allwinner: h6: add PIO VCC bank supplies for Pine H64
arm64: dts: allwinner: a64-oceanic-5205-5inmfd: Enable GT911 CTP
arm64: dts: allwinner: a64-amarula-relic: Add GT5663 CTP node
arm64: dts: allwinner: a64: move I2C pinctrl to dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:40:52 +0000 (04:40 -0700)]
Merge tag 'sunxi-dt-for-5.3-
201906210807' of https://git./linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of patches:
- Some work on the BPi M2-Berry to support various devices
- Convert some bindings to a schema, and a lot of fixes reported by
the schemas we introduced.
- A few other fixes here and there
* tag 'sunxi-dt-for-5.3-
201906210807' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
dt-bindings: pwm: Convert Allwinner PWM to a schema
ARM: dts: sun8i: r40: Change the RTC compatible
ARM: dts: sun8i: v3s: Add external crystals accuracy
ARM: dts: sun8i: v3s: Fix the RTC node
ARM: dts: sun6i: Add external crystals accuracy
ARM: dts: sun6i: Fix RTC node
ARM: dts: sun8i: a83t: Add device node for CSI (Camera Sensor Interface)
ARM: dts: gr8-evb: Fix RTC vendor
ARM: dts: sun7i: icnova-swac: Fix the model vendor
ARM: dts: sun8i: a711: Change LRADC node names to avoid warnings
ARM: dts: sun7i: olimex-lime2: Enable ac and power supplies
ARM: dts: sun6i: Add default address and size cells for SPI
ARM: dts: sun8i-h3: Fix wifi in Beelink X2 DT
dt-bindings: bus: Convert Allwinner RSB to a schema
ARM: dts: sun8i: r40: bananapi-m2-ultra: Remove regulator-always-on
ARM: dts: sun8i: v40: bananapi-m2-berry: Add Bluetooth device node
ARM: dts: sun8i: v40: bananapi-m2-berry: Enable AHCI
ARM: dts: sun8i: v40: bananapi-m2-berry: Enable HDMI output
ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC ethernet controller
ARM: dts: sun8i: v40: bananapi-m2-berry: Add GPIO pin-bank regulator supplies
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:38:23 +0000 (04:38 -0700)]
Merge tag 'amlogic-dt' of https://git./linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.3
- SPDX updates
- switch to generic ethernet PHY reset bindings
- add the canvas module
- mxiii-plus board: add regulators
* tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson: switch to the generic Ethernet PHY reset bindings
ARM: dts: meson8b: update with SPDX Licence identifier
ARM: dts: meson8b-odroidc1: update with SPDX Licence identifier
ARM: dts: meson8b-mxq: update with SPDX Licence identifier
ARM: dts: meson8: update with SPDX Licence identifier
ARM: dts: meson8-minix-neo-x8: update with SPDX Licence identifier
ARM: dts: meson6: update with SPDX Licence identifier
ARM: dts: meson6-atv1200: update with SPDX Licence identifier
ARM: dts: meson: update with SPDX Licence identifier
ARM: dts: meson8b: mxq: improve support for the TRONFY MXQ S805
ARM: dts: meson8m2: mxiii-plus: add the supply for the Mali GPU
ARM: dts: meson8m2: mxiii-plus: rename the DCDC2 regulator
ARM: dts: meson8b: add the canvas module
ARM: dts: meson8m2: update the offset of the canvas module
ARM: dts: meson8: add the canvas module
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:37:18 +0000 (04:37 -0700)]
Merge tag 'davinci-for-v5.3/dt' of git://git./linux/kernel/git/nsekhar/linux-davinci into arm/dt
This pull request adds CPUFreq support for DA850 boards in device-tree
boot using the generic CPUFREQ_DT driver.
* tag 'davinci-for-v5.3/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: Enable CPUFREQ_DT
ARM: dts: da850-evm: enable cpufreq
ARM: dts: da850-lcdk: enable cpufreq
ARM: dts: da850-lego-ev3: enable cpufreq
ARM: dts: da850: add cpu node and operating points to DT
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:35:02 +0000 (04:35 -0700)]
Merge tag 'aspeed-5.3-devicetree' of git://git./linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.3
We have various device tree updates from the OpenBMC project to enable
bits and pieces in existing systems, notably updates to Google's Zaius.
There are some AST2500 machines under development:
* Lenovo Hr630
* IBM Swift
* Facebook YAMP
And some AST2400 machines that have been around but out of tree and have
now joined the party:
* YADRO VESNIN
* Microsoft Olympus
* tag 'aspeed-5.3-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Enable video engine on romulus and wtherspoon
ARM: dts: aspeed: Add Inspur fp5280g2 BMC machine
ARM: dts: aspeed: Add YADRO VESNIN BMC
ARM: dts: aspeed: Add Microsoft Olympus BMC
ARM: dts: aspeed: Adding Lenovo Hr630 BMC
ARM: dts: aspeed: Add Facebook YAMP BMC
ARM: dts: aspeed: swift: Add pca9539 devices
ARM: dts: aspeed: Add Swift BMC machine
ARM: dts: aspeed: cmm: enable ehci host controllers
ARM: dts: aspeed: zaius: fixed I2C bus numbers for pcie slots
ARM: dts: aspeed: zaius: update 12V brick I2C address
ARM: dts: aspeed: zaius: add Infineon and Intersil regulators
ARM: dts: aspeed: quanta-q71: Enable p2a node
ARM: dts: aspeed: Add aspeed-p2a-ctrl node
ARM: dts: aspeed: Add Power9 and Power9 CFAM description
ARM: dts: aspeed: Rename flash-controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:32:08 +0000 (04:32 -0700)]
Merge tag 'qcom-dts-for-5.3' of git://git./linux/kernel/git/qcom/linux into arm/dt
Qualcomm Device Tree Changes for v5.3
* Add display support to MSM8974
* Add display, backlight, and touchscreen support to MSM8974 Hammerhead
* Update coresight bindings for MSM8974 and APQ8064
* tag 'qcom-dts-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: msm8974-hammerhead: add support for display
ARM: dts: msm8974: add display support
ARM: dts: qcom: msm8974-hammerhead: add support for backlight
ARM: dts: qcom: msm8974-hammerhead: add touchscreen support
ARM: dts: qcom-msm8974: Update coresight DT bindings
ARM: dts: qcom-apq8064: Update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:31:37 +0000 (04:31 -0700)]
Merge tag 'qcom-arm64-for-5.3' of git://git./linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 Updates for v5.3
* Switch to use second gen PON on PM8998
* Add PSCI cupidle states for MSM8996, MSM8998,and SDM845
* Add MSM8996 UFS phy reset controller
* Add propre cpu capacity scaling on MSM8996
* Fixups for APR domain, legacy clocks, and PSCI entry latency on MSM8996
* Enable SMMUs on MSM8996
* Add Dragonboard 845C
* Add Q6V5, GPU, GMU, and AOSS QMP node on SDM845
* Fixup CPU topology on SDM845
* Change USB1 to be peripheral on SDM845 MTP
* Add PCIe Phy, RC nodes, ANOC1 SMMU, and RPMPD node on MSM8998
* Update coresight bindings for MSM8916
* Update idle state names and entry-method on MSM8916
* Add PCIe, RPMPD, LPASS, Q6, TCSR, TuringCC, PSCI cpuidle states,
and CDSP on QCS404
* Add reset-cells property to QCS404 GCC node
* Fixup s3 max voltage, l3 min voltage, drive strength typo, and
s3 supply definition on QCS404-evb
* Fixup ADC outputs and VADC calibration on PMS405
* tag 'qcom-arm64-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (39 commits)
arm64: dts: qcom: qcs404-evb: fix vdd_apc supply
arm64: dts: qcom: pm8998: Use qcom,pm8998-pon binding for second gen pon
arm64: dts: qcom: msm8996: Enable SMMUs
arm64: dts: qcom: msm8996: Correct apr-domain property
arm64: dts: qcom: Add Dragonboard 845c
arm64: dts: qcom: qcs404-evb: Enable PCIe
arm64: dts: qcom: qcs404: Add PCIe related nodes
arm64: dts: qcom: msm8998: Add PCIe PHY and RC nodes
arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
arm64: dts: qcom: msm8996: Stop using legacy clock names
arm64: dts: msm8996: fix PSCI entry-latency-us
arm64: dts: qcom: msm8998: Add PSCI cpuidle low power states
arm64: dts: qcom: sdm845: Add Q6V5 MSS node
arm64: dts: qcom: Add AOSS QMP node
arm64: dts: qcom-qcs404: Add reset-cells to GCC node
arm64: dts: qcom-msm8916: Update coresight DT bindings
arm64: dts: qcom: msm8998: Add rpmpd node
arm64: dts: qcom: qcs404: Add rpmpd node
arm64: dts: qcom: qcs404: Move lpass and q6 into soc
arm64: dts: qcom: qcs404: Fully describe the CDSP
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:30:50 +0000 (04:30 -0700)]
Merge tag 'hisi-arm32-dt-for-5.3' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 SoCs updates for v5.3
- Updated CoreSight funnel and replicator using new bindings to fix warning
for the hip04.
* tag 'hisi-arm32-dt-for-5.3' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hip04: Update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:30:13 +0000 (04:30 -0700)]
Merge tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for v5.3
* Hi3660 SoC and related boards:
- Added CoreSight trace components
* Hi6220 SoC and related boards:
- Updated CoreSight funnel and replicator using new bindings to fix warning
* tag 'hisi-arm64-dt-for-5.3' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hi3660: Add CoreSight support
arm64: dts: hi6220: Update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 25 Jun 2019 11:15:53 +0000 (04:15 -0700)]
Merge tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contain Broadcom ARM-based SoCs Device Tree changes
for 5.3 please pull the following:
- Lukas enables DMA support for the BCM2835 (Raspberry Pi) SPI
controller
- Florian fixes a number of dtc W=1 warnings in the Broadcom DTS files
and provides a fix for devices failing to boot after the removal of
skelton.dtsi (that commit has been submitted as a separate fix)
* tag 'arm-soc/for-5.3/devicetree-v2' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Fix most DTC W=1 warnings
ARM: dts: NSP: Fix the bulk of W=1 DTC warnings
ARM: dts: BCM63xx: Fix DTC W=1 warnings
ARM: dts: BCM53573: Fix DTC W=1 warnings
ARM: dts: bcm-mobile: Fix most DTC W=1 warnings
ARM: dts: Cygnus: Fix most DTC W=1 warnings
ARM: dts: Fix BCM7445 DTC warnings
ARM: bcm283x: Enable DMA support for SPI controller
ARM: dts: bcm: Add missing device_type = "memory" property
Signed-off-by: Olof Johansson <olof@lixom.net>
Florian Fainelli [Tue, 28 May 2019 23:01:33 +0000 (16:01 -0700)]
ARM: dts: BCM5301X: Fix most DTC W=1 warnings
Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Tue, 28 May 2019 23:01:34 +0000 (16:01 -0700)]
ARM: dts: NSP: Fix the bulk of W=1 DTC warnings
Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Tue, 28 May 2019 23:01:32 +0000 (16:01 -0700)]
ARM: dts: BCM63xx: Fix DTC W=1 warnings
Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Tue, 28 May 2019 23:01:31 +0000 (16:01 -0700)]
ARM: dts: BCM53573: Fix DTC W=1 warnings
Fix the the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
warnings.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Tue, 28 May 2019 23:01:30 +0000 (16:01 -0700)]
ARM: dts: bcm-mobile: Fix most DTC W=1 warnings
Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Tue, 28 May 2019 23:01:29 +0000 (16:01 -0700)]
ARM: dts: Cygnus: Fix most DTC W=1 warnings
Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Tue, 28 May 2019 23:01:28 +0000 (16:01 -0700)]
ARM: dts: Fix BCM7445 DTC warnings
Fixes a number of unit_address_vs_reg warnings:
DTC arch/arm/boot/dts/bcm7445-bcm97445svmb.dtb
arch/arm/boot/dts/bcm7445.dtsi:66.6-225.4: Warning (unit_address_vs_reg): /rdb: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/bcm7445.dtsi:227.21-298.4: Warning (unit_address_vs_reg): /memory_controllers: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/bcm7445-bcm97445svmb.dts:9.9-14.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/bcm7445.dtsi:255.10-275.5: Warning (simple_bus_reg): /memory_controllers/memc@1: simple-bus unit address format error, expected "80000"
arch/arm/boot/dts/bcm7445.dtsi:277.10-297.5: Warning (simple_bus_reg): /memory_controllers/memc@2: simple-bus unit address format error, expected "100000"
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Florian Fainelli [Mon, 3 Jun 2019 18:59:51 +0000 (11:59 -0700)]
Merge tag 'tags/bcm2835-dt-next-2019-06-01' into devicetree/next
This pull requests enables DMA support for the main SPI controller
on all Raspberry Pis.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Lukas Wunner [Thu, 9 May 2019 17:03:00 +0000 (19:03 +0200)]
ARM: bcm283x: Enable DMA support for SPI controller
Without this, the driver for the BCM2835 SPI controller uses interrupt
mode instead of DMA mode, incurring a significant performance penalty.
The Foundation's device tree has had these attributes for years, but for
some reason they were never upstreamed.
They were originally contributed by Noralf Trønnes and Martin Sperl:
https://github.com/raspberrypi/linux/commit/
25f3e064afc8
https://github.com/raspberrypi/linux/commit/
e0edb52b47e6
The DREQ numbers 6 and 7 are documented in section 4.2.1.3 of:
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Cc: Martin Sperl <kernel@martin.sperl.org>
Cc: Noralf Trønnes <noralf@tronnes.org>
Maxime Ripard [Thu, 16 May 2019 12:08:48 +0000 (14:08 +0200)]
dt-bindings: pwm: Convert Allwinner PWM to a schema
The Allwinner SoCs have a PWM controller supported in Linux, with a
matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Magnus Damm [Mon, 17 Jun 2019 09:17:08 +0000 (18:17 +0900)]
ARM: dts: r8a7792: Add CMT0 and CMT1 to r8a7792
Add CMT0 and CMT1 to the R-Car Gen2 V2H (r8a7792) SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Mon, 3 Jun 2019 09:53:52 +0000 (10:53 +0100)]
ARM: dts: iwg23s-sbc: Fix SDHI2 VccQ regulator
SDR50 isn't working anymore because the GPIO regulator
driver is using descriptors since
commit
d6cd33ad7102 ("regulator: gpio: Convert to use descriptors")
which in turn causes the system to use the polarity of the
GPIOs (as specified in the DT) for selecting the states,
but the polarity specified in the DT is wrong.
This patch fixes the regulator DT definition, and that fixes
SDR50.
Fixes: 9eb36b945b5c ("ARM: dts: iwg23s-sbc: Add uSD and eMMC support")
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Mon, 3 Jun 2019 09:53:51 +0000 (10:53 +0100)]
ARM: dts: iwg20d-q7-common: Fix SDHI1 VccQ regularor
SDR50 isn't working anymore because the GPIO regulator
driver is using descriptors since
commit
d6cd33ad7102 ("regulator: gpio: Convert to use descriptors")
which in turn causes the system to use the polarity of the
GPIOs (as specified in the DT) for selecting the states,
but the polarity specified in the DT is wrong.
This patch fixes the regulator DT definition, and that fixes
SDR50.
Fixes: 029efb3a03c5 ("ARM: dts: iwg20d-q7: Add SDHI1 support")
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chris Brandt [Tue, 4 Jun 2019 20:09:14 +0000 (15:09 -0500)]
ARM: dts: rza2mevb: Add input switch
Add support for input switch SW3 on the Renesas RZ/A2M EVB
development board.
Note that this uses the IRQ interrupt, as the RZ/A2 GPIO controller
does not include interrupt support
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chris Brandt [Tue, 4 Jun 2019 20:09:13 +0000 (15:09 -0500)]
ARM: dts: r7s9210: Add IRQC device node
Enable support for the IRQC on RZ/A2M, which is a small front-end to the
GIC. This allows to use up to 8 external interrupts with configurable
sense select.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Yoshihiro Kaneko [Fri, 17 May 2019 14:43:07 +0000 (23:43 +0900)]
ARM: dts: rza2mevb: sort nodes of rza2mevb board
This patch sorts the nodes of arch/arm/boot/dts/r7s9210-rza2mevb.dts.
* Sort subnodes of root ("/") node alphabetically
* Sort following top-level nodes alphabetically
* Sort subnodes of pinctrl alphabetically
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
[simon: rebase and sort new ehci nodes]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Sat, 18 May 2019 10:03:57 +0000 (19:03 +0900)]
ARM: dts: renesas: Use ip=on for bootargs
Convert bootargs from ip=dhcp to ip=on
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Martin Blumenstingl [Sat, 15 Jun 2019 10:38:30 +0000 (12:38 +0200)]
ARM: dts: meson: switch to the generic Ethernet PHY reset bindings
The snps,reset-gpio bindings are deprecated in favour of the generic
"Ethernet PHY reset" bindings.
Replace snps,reset-gpio from the ðmac node with reset-gpios in the
ethernet-phy node. The old snps,reset-active-low property is now encoded
directly as GPIO flag inside the reset-gpios property.
snps,reset-delays-us is converted to reset-assert-us and
reset-deassert-us. reset-assert-us is the second cell from
snps,reset-delays-us while reset-deassert-us was the third cell.
Instead of blindly copying the old values (which seems strange since
they gave the PHY one second to come out of reset) over this also
updates the delays based on the datasheets:
- RTL8211F PHY on the Odroid-C1 and MXIII-Plus needs a 10ms assert
delay (the datasheet mentions: "For a complete PHY reset, this pin
must be asserted low for at least 10ms") and a 30ms deassert delay
(the datasheet mentions: "Wait for a further 30ms (for internal
circuits settling time) before accessing the PHY register"). The
old settings used 10ms for assert and 1000ms for deassert.
- IP101GR PHY on the EC-100 and MXQ needs a 10ms assert delay (the
datasheet mentions: "Trst | Reset period | 10ms") and a 10ms deassert
delay as well (the datasheet mentions: "Tclk_MII_rdy | MII/RMII clock
output ready after reset released | 10ms")). The old settings used
10ms for assert and 1000ms for deassert.
No functional changes intended.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Eddie James [Tue, 2 Apr 2019 02:42:29 +0000 (02:42 +0000)]
ARM: dts: aspeed: Enable video engine on romulus and wtherspoon
Enable the video engine and add it's optional reserved memory region.
Use 32MB for the reserved memory since the video engine could need up to
two 1920x1200@32bpp source buffers.
Source buffers: 2 * 1920 * 1200 * 4 =
18432000 bytes
In addition, the V4L2 subsystem will allocate any number of compression
buffers, each at most 1/8th the size of the source buffer.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
John Wang [Thu, 13 Jun 2019 07:00:02 +0000 (15:00 +0800)]
ARM: dts: aspeed: Add Inspur fp5280g2 BMC machine
The fp5280g2 is an OpenPower server platform with an ASPEED AST2500 BMC.
Signed-off-by: John Wang <wangzqbj@inspur.com>
Reviewed-by: Lei YU <mine260309@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Jorge Ramirez-Ortiz [Wed, 19 Jun 2019 18:16:53 +0000 (20:16 +0200)]
arm64: dts: qcom: qcs404-evb: fix vdd_apc supply
The invalid definition in the supply causes the Qualcomm's EVB-1000
and EVB-4000 not to boot.
Fix the boot issue by correctly defining the supply: vdd_s3 (namely
"vdd_apc") is actually connected to vph_pwr.
Reported-by: Niklas Cassel <niklas.cassel@linaro.org>
Tested-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
Olof Johansson [Wed, 19 Jun 2019 16:03:38 +0000 (09:03 -0700)]
Merge tag 'ti-k3-soc-for-v5.3' of git://git./linux/kernel/git/kristo/linux into arm/dt
Texas Instruments K3 SoC family changes for 5.3
- Add support for the new J721e SoC, includes basic peripherals needed for
booting up the device
- New peripheral support added for AM654x:
* TI SCI irqchip
* GPIO
* MCU SRAM
* R5Fs
* MSMC RAM
* SERDES and PCIe
* tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: (26 commits)
arm64: dts: ti: k3-j721e: Add the MCU SRAM node
arm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain
arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain
arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node
arm64: defconfig: Enable TI's J721E SoC platform
arm64: dts: ti: Add support for J721E Common Processor Board
soc: ti: Add Support for J721E SoC config option
arm64: dts: ti: Add Support for J721E SoC
dt-bindings: serial: 8250_omap: Add compatible for J721E UART controller
dt-bindings: arm: ti: Add bindings for J721E SoC
arm64: dts: ti: am654-base-board: Disable SERDES and PCIe
arm64: dts: k3-am6: Add PCIe Endpoint DT node
arm64: dts: k3-am6: Add PCIe Root Complex DT node
arm64: dts: k3-am6: Add SERDES DT node
arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES
arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to gic_its
arm64: dts: ti: k3-am65: Add MSMC RAM ranges in interconnect node
arm64: dts: ti: k3-am65: Add R5F ranges in interconnect nodes
arm64: dts: ti: k3-am65-mcu: Add the MCU RAM node
arm64: dts: ti: k3-am65: Add MCU SRAM ranges in interconnect nodes
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 16:00:58 +0000 (09:00 -0700)]
Merge tag 'socfpga_dts_updates_for_v5.3' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.3
- Use the new "altr,socfpga-stmmac-a10-s10" for the EMAC controllers on
Arria10/Stratix10
- Add the ltc2497 i2c entry on the Arria10 devkit
- Add the EMAC OCP reset property on the Arria10
* tag 'socfpga_dts_updates_for_v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: arria10: Add EMAC OCP reset property
ARM: dts: socfpga: add ltc2497 on arria10 devkit
arm64: dts: stratix10: use the "altr,socfpga-stmmac-a10-s10" binding
ARM: dts: socfpga: use the "altr,socfpga-stmmac-a10-s10" binding
Signed-off-by: Olof Johansson <olof@lixom.net>
Leo Yan [Wed, 8 May 2019 02:18:52 +0000 (10:18 +0800)]
ARM: dts: hip04: Update coresight DT bindings
CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.
This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Wanglai Shi [Sat, 20 Apr 2019 14:00:35 +0000 (22:00 +0800)]
arm64: dts: hi3660: Add CoreSight support
This patch adds DT bindings for the CoreSight trace components
on hi3660, which is used by 96boards Hikey960.
Signed-off-by: Wanglai Shi <shiwanglai@hisilicon.com>
Reviewed-and-tested-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Leo Yan [Wed, 8 May 2019 02:18:58 +0000 (10:18 +0800)]
arm64: dts: hi6220: Update coresight DT bindings
CoreSight DT bindings have been updated, thus the old compatible strings
are obsolete and the drivers will report warning if DTS uses these
obsolete strings.
This patch switches to the new bindings for CoreSight dynamic funnel and
static replicator, so can dismiss warning during initialisation.
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Fabrizio Castro [Wed, 19 Jun 2019 14:11:24 +0000 (15:11 +0100)]
arm64: dts: renesas: hihope-common: Remove "label" from LEDs
Remove "label" properties from the LEDs device tree nodes, since
we don't have nice labels on the PCB.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Tue, 18 Jun 2019 15:18:39 +0000 (16:18 +0100)]
arm64: dts: renesas: hihope-common: Add HDMI support
Add HDMI support to the HiHope RZ/G2[MN] mother board common
dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Tue, 18 Jun 2019 15:18:38 +0000 (16:18 +0100)]
arm64: dts: renesas: r8a774a1: Add HDMI encoder instance
Add the HDMI encoder to the R8A774A1 DT in disabled state.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Tue, 18 Jun 2019 15:18:37 +0000 (16:18 +0100)]
dt-bindings: display: renesas: Add r8a774a1 support
Document RZ/G2M (R8A774A1) SoC bindings.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Olof Johansson [Wed, 19 Jun 2019 13:27:32 +0000 (06:27 -0700)]
Merge tag 'samsung-dt-5.3' of https://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.3
1. Fixes for minor warnings.
2. Enable ADC on Exynos5410 Odroid XU board.
* tag 'samsung-dt-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add ADC node to Exynos5410 and Odroid XU
ARM: dts: exynos: Raise maximum buck regulator voltages on Arndale Octa
ARM: dts: exynos: Move CPU OPP tables out of SoC node on Exynos5420
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:27:01 +0000 (06:27 -0700)]
Merge tag 'vexpress-updates-5.3' of git://git./linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv7 Vexpress updates for v5.3
1. Couple of updates switching to use new/updated bindings for CoreSight
dynamic funnel components and NOR flash partition type
2. Disable NOR flash on Vexpress TC2 platform as it conflicts with CPU
power management. This follows what we have on ARMv8 Juno platform
and is required after recent commit that enabled CFI NOR FLASH in
multi_v7 defconfig
* tag 'vexpress-updates-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
ARM: dts: vexpress: set the right partition type for NOR flash
arm: dts: vexpress-v2p-ca15_a7: disable NOR flash node by default
ARM: dts: vexpress-v2p-ca15_a7: update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:26:35 +0000 (06:26 -0700)]
Merge tag 'juno-updates-5.3' of git://git./linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno updates for v5.3
Couple of updates switching to use new/updated bindings for CoreSight
dynamic funnel components and NOR flash partition type
* tag 'juno-updates-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: set the right partition type for NOR flash
arm64: dts: juno: update coresight DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:25:55 +0000 (06:25 -0700)]
Merge tag 'omap-for-v5.3/ti-sysc-dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
ti-sysc dts changes for v5.3
We can now drop the custom dts property "ti,hwmods" for drivers that
have the ti-sysc interconnect target module configured in dts.
Let's start with a minimal changes to omap4 uart and mmc. We use
omap4 as the starting point as it has runtime PM implemented and all
the omap variants after that are based on it with similar clkctrl
clock for the modules. More devices will be updated later on as they
get tested.
Note that these changes are based on the related ti-sysc driver
changes.
* tag 'omap-for-v5.3/ti-sysc-dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: dts: Drop legacy custom hwmods property for omap4 mmc
ARM: dts: Drop legacy custom hwmods property for omap4 uart
bus: ti-sysc: Detect uarts also on omap34xx
bus: ti-sysc: Do rstctrl reset handling in two phases
bus: ti-sysc: Add support for disabling module without legacy mode
bus: ti-sysc: Set ENAWAKEUP if available
bus: ti-sysc: Handle swsup idle mode quirks
bus: ti-sysc: Handle clockactivity for enable and disable
bus: ti-sysc: Enable interconnect target module autoidle bit on enable
bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not set
bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits
bus: ti-sysc: Support 16-bit writes too
bus: ti-sysc: Add support for missing clockdomain handling
ARM: dts: dra71x: Disable usb4_tm target module
ARM: dts: dra71x: Disable rtc target module
ARM: dts: dra76x: Disable usb4_tm target module
ARM: dts: dra76x: Disable rtc target module
ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
ARM: dts: am57xx-idk: Remove support for voltage switching for SD card
bus: ti-sysc: Handle devices with no control registers
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:25:29 +0000 (06:25 -0700)]
Merge tag 'omap-for-v5.3/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
dts changes for omap variants for v5.3
This series of changes improves support for few boards:
- configure another lcd type for logicpd torpedo devkit
- a series of updates for am335x phytec boards
- configure mmc card detect pin for am335x-baltos
* tag 'omap-for-v5.3/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-baltos: add support for MMC1 CD pin
ARM: dts: am335x-baltos: Fix PHY mode for ethernet
ARM: dts: Add support for phyBOARD-REGOR-AM335x
ARM: dts: am335x-pcm-953: Remove eth phy delay
ARM: dts: am335x-pcm-953: Update user led names
ARM: dts: am335x-phycore-som: Enable gpmc node in dts files
ARM: dts: am335x-phycore-som: Add emmc node
ARM: dts: am335x phytec boards: Remove regulator node
ARM: dts: Add LCD type 28 support to LogicPD Torpedo DM3730 devkit
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:24:21 +0000 (06:24 -0700)]
Merge tag 'arm-soc/for-5.3/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.3, please pull the following:
- Pramod adds the Device Tree nodes for thermal support on Stingray
- Srinath adds the Device Tree nodes for both XHCI (host) and BDC
(device) modes
- Rayagonda adds the Device Tree node for slave I2C operation when
Stingray operates as a SmartNIC
* tag 'arm-soc/for-5.3/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: Stingray: Add NIC i2c device node
arm64: dts: Add USB DT nodes for Stingray SoC
arm64: dts: stingray: Add Stingray Thermal DT support.
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:22:43 +0000 (06:22 -0700)]
Merge tag 'v5.3-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
PCIe for rockpro64, wifi+bt for Rock-PI4, spi for Rock960 family
and a fix for the yet unused isp-iommus.
* tag 'v5.3-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add WiFi+BT support on ROCK Pi4 board
arm64: dts: rockchip: fix isp iommu clocks and power domain
arm64: dts: rockchip: Enable SPI1 on Ficus
arm64: dts: rockchip: Enable SPI0 and SPI4 on Rock960
arm64: dts: rockchip: add PCIe nodes on rk3399-rockpro64
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:22:09 +0000 (06:22 -0700)]
Merge tag 'v5.3-rockchip-dts32-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
A lot more love for rk3288 in general and veyron specially with changes
all over the place.
* tag 'v5.3-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
ARM: dts: rockchip: Split GPIO keys for veyron into multiple devices
ARM: dts: rockchip: Add HDMI i2c unwedging for rk3288-veyron
ARM: dts: rockchip: Add unwedge pinctrl entries for dw_hdmi on rk3288
ARM: dts: rockchip: Switch to builtin HDMI DDC bus on rk3288-veyron
ARM: dts: rockchip: Add pin names for rk3288-veyron jaq, mickey, speedy
ARM: dts: rockchip: fix pwm-cells for rk3288's pwm3
ARM: dts: rockchip: Configure the GPU thermal zone for mickey
ARM: dts: rockchip: Use the GPU to cool CPU thermal zone of veyron mickey
ARM: dts: rockchip: remove GPU 500 MHz OPP on rk3288
ARM: dts: rockchip: Use GPU as cooling device for the GPU thermal zone of the rk3288
ARM: dts: rockchip: Add #cooling-cells entry for rk3288 GPU
ARM: dts: rockchip: Mark that the rk3288 timer might stop in suspend
ARM: dts: rockchip: Add pin names for rk3288-veyron-jerry
ARM: dts: rockchip: Add pin names for rk3288-veyron-minnie
ARM: dts: raise GPU trip point temperature for speedy to 80 degC
ARM: dts: rockchip: raise GPU trip point temperatures for veyron
ARM: dts: rockchip: raise CPU trip point temperature for veyron to 100 degC
ARM: dts: rockchip: Make rk3288-veyron-minnie run at hs200
ARM: dts: rockchip: Make rk3288-veyron-mickey's emmc work again
ARM: dts: rockchip: Remove bogus 'i2s_clk_out' from rk3288-veyron-mickey
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Andy Gross [Sun, 9 Jun 2019 04:19:32 +0000 (23:19 -0500)]
arm64: qcom: qcs404: Add reset-cells to GCC node
This patch adds a reset-cells property to the gcc controller on the QCS404.
Without this in place, we get warnings like the following if nodes reference
a gcc reset:
arch/arm64/boot/dts/qcom/qcs404.dtsi:261.38-310.5: Warning (resets_property):
/soc@0/remoteproc@b00000: Missing property '#reset-cells' in node
/soc@0/clock-controller@
1800000 or bad phandle (referred from resets[0])
also defined at arch/arm64/boot/dts/qcom/qcs404-evb.dtsi:82.18-84.3
DTC arch/arm64/boot/dts/qcom/qcs404-evb-4000.dtb
arch/arm64/boot/dts/qcom/qcs404.dtsi:261.38-310.5: Warning (resets_property):
/soc@0/remoteproc@b00000: Missing property '#reset-cells' in node
/soc@0/clock-controller@
1800000 or bad phandle (referred from resets[0])
also defined at arch/arm64/boot/dts/qcom/qcs404-evb.dtsi:82.18-84.3
Signed-off-by: Andy Gross <agross@kernel.org>
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Baolin Wang [Tue, 4 Jun 2019 08:14:29 +0000 (16:14 +0800)]
arm64: dts: sprd: Add Spreadtrum SD host controller support
Add one Spreadtrum SD host controller to support eMMC card for Spreadtrum
SC9860 platform.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Wed, 19 Jun 2019 13:15:10 +0000 (06:15 -0700)]
Merge tag 'integrator-dts-v5.3-arm-soc' of git://git./linux/kernel/git/linusw/linux-integrator into arm/dt
DTS updates for the Integrator, target kernel v5.3.
* tag 'integrator-dts-v5.3-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: dts: vexpress: specify AFS partition
ARM: dts: realview: specify AFS partition
ARM: dts: versatile: specify AFS partition
ARM: dts: integrator: specify AFS partition
Signed-off-by: Olof Johansson <olof@lixom.net>
Suman Anna [Wed, 5 Jun 2019 16:34:33 +0000 (11:34 -0500)]
arm64: dts: ti: k3-j721e: Add the MCU SRAM node
Add the on-chip SRAM present within the MCU domain as a mmio-sram node.
The K3 J721E SoCs have 1 MB of such memory. Any specific memory range
within this RAM needed by a driver/software module ought to be reserved
using an appropriate child node.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Lokesh Vutla [Fri, 14 Jun 2019 14:50:01 +0000 (20:20 +0530)]
arm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain
Wakeup domain in J721E SoC has an interrupt router connected to gpio
in wakeup domain. Add DT node for this interrupt router.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Lokesh Vutla [Fri, 14 Jun 2019 14:50:00 +0000 (20:20 +0530)]
arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain
Main domain in J721E has the following interrupt controller instances:
- Main Domain GPIO Interrupt router connected to gpio in main domain.
- Under the Main Domain Navigator Subsystem(NAVSS)
- Main Navss Interrupt Router connected to main navss inta and mailboxes.
- Main Navss Interrupt Aggregator connected to main domain UDMASS
Add DT nodes for the interrupt controllers available in main domain.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Suman Anna [Fri, 31 May 2019 00:48:48 +0000 (19:48 -0500)]
arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node
Add the Interrupt controller node for the Interrupt Router present within
the Main NavSS module. This Interrupt Router can route 192 interrupts to
the GIC_SPI in 3 sets of 64 interrupts each. Note that the last set is
reserved for the host ID A72_3 for hypervisor usecases, so the node is
added only with 2 sets for the Linux kernel context (host id A72_2). This
is specified through the ti,sci-rm-range-girq property.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Nishanth Menon [Wed, 22 May 2019 16:19:21 +0000 (11:19 -0500)]
arm64: defconfig: Enable TI's J721E SoC platform
Enable J721E SoC support from TI.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Nishanth Menon [Wed, 22 May 2019 16:19:20 +0000 (11:19 -0500)]
arm64: dts: ti: Add support for J721E Common Processor Board
Add Support for J721E Common Processor board support.
The EVM architecture is as follows:
+------------------------------------------------------+
| +-------------------------------------------+ |
| | | |
| | Add-on Card 1 Options | |
| | | |
| +-------------------------------------------+ |
| |
| |
| +-------------------+ |
| | | |
| | SOM | |
| +--------------+ | | |
| | | | | |
| | Add-on | +-------------------+ |
| | Card 2 | | Power Supply
| | Options | | |
| | | | |
| +--------------+ | <---
+------------------------------------------------------+
Common Processor Board
Common Processor board is the baseboard that has most of the actual
connectors, power supply etc. A SOM (System on Module) is plugged on
to the common processor board and this contains the SoC, PMIC, DDR and
basic high speed components necessary for functionality. Add-n card
options add further functionality (such as additional Audio, Display,
networking options).
Note:
A) The minimum configuration required to boot up the board is System On
Module(SOM) + Common Processor Board.
B) Since there is just a single SOM and Common Processor Board, we are
maintaining common processor board as the base dts and SOM as the dtsi
that we include. In the future as more SOM's appear, we should move
common processor board as a dtsi and include configurations as dts.
C) All daughter cards beyond the basic boards shall be maintained as
overlays.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Nishanth Menon [Wed, 22 May 2019 16:19:19 +0000 (11:19 -0500)]
soc: ti: Add Support for J721E SoC config option
Add option to build J721E SoC specific components
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Nishanth Menon [Wed, 22 May 2019 16:19:18 +0000 (11:19 -0500)]
arm64: dts: ti: Add Support for J721E SoC
The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
Management (DMSC)
See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Nishanth Menon [Wed, 22 May 2019 16:19:17 +0000 (11:19 -0500)]
dt-bindings: serial: 8250_omap: Add compatible for J721E UART controller
J721e uses a UART controller that is compatible with AM654 UART.
Introduce a specific compatible to help handle the differences if
necessary.
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Nishanth Menon [Wed, 22 May 2019 16:19:16 +0000 (11:19 -0500)]
dt-bindings: arm: ti: Add bindings for J721E SoC
The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
Management (DMSC)
See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
John Stultz [Fri, 14 Jun 2019 23:14:51 +0000 (23:14 +0000)]
arm64: dts: qcom: pm8998: Use qcom,pm8998-pon binding for second gen pon
This changes pm8998 to use the new qcom,pm8998-pon compatible
string for the pon in order to support the gen2 pon
functionality properly.
Cc: Andy Gross <agross@kernel.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Amit Pundir <amit.pundir@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
Bjorn Andersson [Tue, 18 Jun 2019 05:23:46 +0000 (22:23 -0700)]
arm64: dts: qcom: msm8996: Enable SMMUs
Enable SMMUs on 8996 now that the WRZ workaround in the arm-smmu driver
has landed.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <agross@kernel.org>
Bjorn Andersson [Tue, 18 Jun 2019 05:25:47 +0000 (22:25 -0700)]
arm64: dts: qcom: msm8996: Correct apr-domain property
The domain specifier was changed from using "reg" to "qcom,apr-domain",
update the dts accordingly.
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Bjorn Andersson [Tue, 18 Jun 2019 21:19:45 +0000 (14:19 -0700)]
arm64: dts: qcom: Add Dragonboard 845c
This adds an initial dts for the Dragonboard 845. Supported
functionality includes Debug UART, UFS, USB-C (peripheral), USB-A
(host), microSD-card and Bluetooth.
Initializing the SMMU is clearing the mapping used for the splash screen
framebuffer, which causes the board to reboot. This can be worked around
using:
fastboot oem select-display-panel none
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Biju Das [Wed, 12 Jun 2019 14:20:55 +0000 (15:20 +0100)]
arm64: dts: renesas: r8a774a1: Add dynamic power coefficient
Describe the dynamic power coefficient of A57 and A53 CPUs.
Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Wed, 12 Jun 2019 14:20:54 +0000 (15:20 +0100)]
arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
Setup a thermal zone driven by SoC temperature sensor. Create passive trip
points and bind them to CPUFreq cooling device that supports power
extension.
Based on work by Dien Pham <dien.pham.ry@renesas.com> for r8a7796 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Wed, 12 Jun 2019 14:20:53 +0000 (15:20 +0100)]
arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
Set the capacity-dmips-mhz for RZ/G2M(r8a774a1) SoC, that is based on
dhrystone.
Based on work done by Gaku Inami <gaku.inami.xw@bp.renesas.com> for
r8a7796 SoC.
The average dhrystone result for 5 iterations is as below:
r8a774a1 SoC (CA57x2 + CA53x4)
CPU max-freq dhrystone
---------------------------------
CA57 1500 MHz
11428571 lps/s
CA53 1200 MHz
5000000 lps/s
From this, CPU capacity-dmips-mhz for CA57 and CA53 are calculated
as follows:
r8a774a1 SoC
CA57 : 1024 / (
11428571 / 1500) * (
11428571 / 1500) = 1024
CA53 : 1024 / (
11428571 / 1500) * (
5000000 / 1200) = 560
Since each CPUs have different max frequencies, the final CPU
capacities of A53 scaled by the above difference is as below
$ cat /sys/devices/system/cpu/cpu*/cpu_capacity
1024
1024
448
448
448
448
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Wed, 12 Jun 2019 14:20:52 +0000 (15:20 +0100)]
arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
This patch adds the "cpu-map" into r8a774a1 composed of multi-cluster. This
definition is used to parse the cpu topology.
Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> for r8a7796 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Fri, 14 Jun 2019 13:14:35 +0000 (14:14 +0100)]
arm64: dts: renesas: hihope-common: Add LEDs support
This patch adds LEDs support to the HiHope RZ/G2[MN] Main Board
common device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Fri, 14 Jun 2019 14:51:09 +0000 (15:51 +0100)]
arm64: dts: renesas: hihope-common: Enable USB3.0
This patch enables USB3.0 host/peripheral device node for the HiHope
RZ/G2M board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bjorn Andersson [Wed, 8 May 2019 22:43:09 +0000 (15:43 -0700)]
arm64: dts: qcom: qcs404-evb: Enable PCIe
Enable the PCIe PHY and controller found on the QCS404 EVB.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Bjorn Andersson [Wed, 8 May 2019 22:43:08 +0000 (15:43 -0700)]
arm64: dts: qcom: qcs404: Add PCIe related nodes
The QCS404 has a PCIe2 PHY and a Qualcomm PCIe controller, define these
to for the platform.
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Marc Gonzalez [Thu, 11 Apr 2019 08:50:53 +0000 (10:50 +0200)]
arm64: dts: qcom: msm8998: Add PCIe PHY and RC nodes
Add MSM8998 PCIe QMP PHY and PCIe root complex DT nodes.
Based on the following DTS downstream:
https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm8998.dtsi?h=LE.UM.1.3.r3.25#n2537
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Marc Gonzalez [Mon, 1 Apr 2019 15:40:13 +0000 (17:40 +0200)]
arm64: dts: qcom: msm8998: Add ANOC1 SMMU node
The MSM8998 ANOC1(*) SMMU services BLSP2, PCIe, UFS, and USB.
(*) Aggregate Network-on-Chip #1
Based on the following DTS downstream:
https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm-arm-smmu-8998.dtsi?h=LE.UM.1.3.r3.25#n18
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Kishon Vijay Abraham I [Wed, 29 May 2019 09:18:12 +0000 (14:48 +0530)]
arm64: dts: ti: am654-base-board: Disable SERDES and PCIe
AM654 base board does not have any PCIe slots. Disable all the
SERDES and PCIe instances.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Kishon Vijay Abraham I [Wed, 29 May 2019 09:18:11 +0000 (14:48 +0530)]
arm64: dts: k3-am6: Add PCIe Endpoint DT node
Add PCIe Endpoint DT node.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Kishon Vijay Abraham I [Wed, 29 May 2019 09:18:10 +0000 (14:48 +0530)]
arm64: dts: k3-am6: Add PCIe Root Complex DT node
Add PCIe Root Complex DT node.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Kishon Vijay Abraham I [Wed, 29 May 2019 09:18:09 +0000 (14:48 +0530)]
arm64: dts: k3-am6: Add SERDES DT node
Add DT node for SERDES0 and SERDES1.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Kishon Vijay Abraham I [Wed, 29 May 2019 09:18:08 +0000 (14:48 +0530)]
arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES
Add mux-controller DT node as a child node of scm_conf. This is
required for muxing SERDES between USB, PCIe and ICSS2 SGMII.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Kishon Vijay Abraham I [Wed, 29 May 2019 09:18:07 +0000 (14:48 +0530)]
arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to gic_its
GIC_ITS used in AM654 platform has the same configuration as that of
GIC_ITS used in Socionext SoCs. Add "socionext,synquacer-pre-its"
property to get PCI MSI working.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Roger Quadros [Wed, 29 May 2019 21:13:44 +0000 (16:13 -0500)]
arm64: dts: ti: k3-am65: Add MSMC RAM ranges in interconnect node
Add the MSCM RAM address space to the ranges property of the cbass_main
interconnect node so that the addresses can be translated properly.
This fixes the probe failure in the sram driver for the MSMC RAM node.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Suman Anna [Wed, 5 Jun 2019 16:34:34 +0000 (11:34 -0500)]
arm64: dts: ti: k3-am65: Add R5F ranges in interconnect nodes
Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Suman Anna [Wed, 5 Jun 2019 16:34:32 +0000 (11:34 -0500)]
arm64: dts: ti: k3-am65-mcu: Add the MCU RAM node
Add the on-chip SRAM present within the MCU domain as a mmio-sram node.
The K3 AM65x SoCs have 512 KB of such memory. Any specific memory range
within this RAM needed by a software module ought to be reserved using
an appropriate child node.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Suman Anna [Wed, 5 Jun 2019 16:34:31 +0000 (11:34 -0500)]
arm64: dts: ti: k3-am65: Add MCU SRAM ranges in interconnect nodes
Add the address space for the MCU SRAM memory to the ranges property
of the cbass_mcu interconnect node so that the addresses within the
mcu_sram nodes and its children can be translated properly by the
relevant OF address API.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Keerthy [Thu, 6 Jun 2019 09:56:20 +0000 (15:26 +0530)]
arm64: dts: ti: am654-base-board: Add gpio_keys node
There are 2 push buttons: SW5 and SW6 that are basically connected to
WKUP_GPIO0_24 and WKUP_GPIO0_27 respectively. Add the respective
nodes and the pinctrl data to set the mode to GPIO and Input.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Keerthy [Thu, 6 Jun 2019 09:56:19 +0000 (15:26 +0530)]
arm64: dts: ti: am6-main: Add gpio nodes
Add gpio0/1 nodes under main domain. They have 96 and 90 gpios
respectively and all are capable of generating banked interrupts.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Keerthy [Thu, 6 Jun 2019 09:56:18 +0000 (15:26 +0530)]
arm64: dts: ti: am6-wakeup: Add gpio node
Add gpio0 node under wakeup domain. This has 56 gpios
and all are capable of generating banked interrupts.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Lokesh Vutla [Thu, 2 May 2019 09:41:19 +0000 (15:11 +0530)]
arm64: dts: ti: k3-am654: Add interrupt controllers in wakeup domain
Wakeup domain in AM654 SoC has an interrupt router connected to gpio
in wakeup domain. Add DT node for this interrupt router.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Lokesh Vutla [Thu, 2 May 2019 09:41:18 +0000 (15:11 +0530)]
arm64: dts: ti: k3-am654: Add interrupt controllers in main domain
Main domain in AM654 has the following interrupt controller instances:
- Main Domain GPIO Interrupt router connected to gpio in main domain.
- Under the Main Domain Navigator Subsystem(NAVSS)
- Main Navss Interrupt Router connected to main navss inta and mailboxes.
- Main Navss Interrupt Aggregator connected to main domain UDMASS
Add DT nodes for the above three interrupt controllers available
in main domain.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Lokesh Vutla [Thu, 2 May 2019 09:41:17 +0000 (15:11 +0530)]
arm64: dts: ti: k3-am654: Update compatible for dmsc
Use the am654 specific compatible for dmsc. This allows to use
the am654 specific RM mapping table.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cao Van Dong [Thu, 9 May 2019 12:29:49 +0000 (14:29 +0200)]
dt-bindings: timer: renesas, cmt: Document r8a779{5|65|90} CMT support
Document SoC specific bindings for R-Car H3/M3-N/E3 SoCs.
Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Thu, 9 May 2019 19:20:22 +0000 (20:20 +0100)]
dt-bindings: can: rcar_canfd: document r8a774c0 support
Document the support for rcar_canfd on R8A774C0 SoC devices.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Marek Vasut [Thu, 9 May 2019 19:20:21 +0000 (20:20 +0100)]
dt-bindings: can: rcar_canfd: document r8a77990 support
Document the support for rcar_canfd on R8A77990 SoC devices.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: David S. Miller <davem@davemloft.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Marek Vasut [Thu, 9 May 2019 19:20:20 +0000 (20:20 +0100)]
dt-bindings: can: rcar_canfd: document r8a77965 support
Document the support for rcar_canfd on R8A77965 SoC devices.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: David S. Miller <davem@davemloft.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Tue, 11 Jun 2019 13:06:37 +0000 (14:06 +0100)]
arm64: dts: renesas: hihope-common: Add USB 2.0 support
Add USB 2.0 support to the HiHope RZ/G2M.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
projects / openwrt / staging / blogic.git / log