project/bcm63xx/u-boot.git
6 years agommc: fsl_esdhc: enable HS400 feature
Peng Fan [Fri, 10 Aug 2018 06:07:55 +0000 (14:07 +0800)]
mmc: fsl_esdhc: enable HS400 feature

The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
6 years agommc: add HS400 support
Peng Fan [Fri, 10 Aug 2018 06:07:54 +0000 (14:07 +0800)]
mmc: add HS400 support

Add HS400 support.
Selecting HS400 needs first select HS200 according to spec, so use
a dedicated function for HS400.
Add HS400 related macros.
Remove the restriction of only using the low 6 bits of
EXT_CSD_CARD_TYPE, using all the 8 bits.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
6 years agoat91: fix devicetree warnings
Eugen Hristev [Thu, 9 Aug 2018 11:12:01 +0000 (14:12 +0300)]
at91: fix devicetree warnings

This commit fixes various devicetree warnings in the at91 devicetrees
like:
arch/arm/dts/sama5d36ek_cmp.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

These warnings make buildman report failed builds for most of at91 boards.
Thus, fixing it.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
6 years agoARM: dts: Makefile: fix build for at91family
Eugen Hristev [Thu, 9 Aug 2018 11:12:00 +0000 (14:12 +0300)]
ARM: dts: Makefile: fix build for at91family

For at91family, makefile was building unwanted DTBs
Moved them under specific target configuration.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
6 years agogpio: stm32f7: replace ODR update by BSRR write
Patrice Chotard [Thu, 9 Aug 2018 09:57:57 +0000 (11:57 +0200)]
gpio: stm32f7: replace ODR update by BSRR write

Replace clrsetbits on ODR register (2 operations: one read + one write)
by writing on the correct bit (SET or RESET) of the BSRR register
(only 1 write operation).

Moreover this register if safe for simultaneous access by 2 master on
the bus.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoclk: clk_meson: Add mux and div support for reparent and rate setting
Neil Armstrong [Mon, 6 Aug 2018 12:49:20 +0000 (14:49 +0200)]
clk: clk_meson: Add mux and div support for reparent and rate setting

This patch adds support for :
- Rate calculation through muxes and generic dividers
- Basic gate setting propagation
- Reparenting for muxes
- Clock rate setting through generic dividers without reparenting

Support is only added to the Composite VPU and VAPB clocks in order
to support the Video Processing Unit Power Domain clock setup.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
6 years agopower: domain: Add the VPU Power Domain driver
Neil Armstrong [Mon, 6 Aug 2018 12:49:19 +0000 (14:49 +0200)]
power: domain: Add the VPU Power Domain driver

The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
Video Processing Unit.
This patch implements support for this power domain in preparation of the
future support for the Video display support in U-Boot.

This driver will depend on changes in the clock driver to handle the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
6 years agoRemove <inttypes.h> includes and PRI* usages in printf() entirely
Masahiro Yamada [Mon, 6 Aug 2018 11:47:40 +0000 (20:47 +0900)]
Remove <inttypes.h> includes and PRI* usages in printf() entirely

In int-ll64.h, we always use the following typedefs:

  typedef unsigned int         u32;
  typedef unsigned long        uintptr_t;
  typedef unsigned long long   u64;

This does not need to match to the compiler's <inttypes.h>.
Do not include it.

The use of PRI* makes the code super-ugly.  You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoarch: types.h: factor out fixed width typedefs to int-ll64.h
Masahiro Yamada [Mon, 6 Aug 2018 11:47:39 +0000 (20:47 +0900)]
arch: types.h: factor out fixed width typedefs to int-ll64.h

All architectures have the same definition for s8/16/32/64
and u8/16/32/64.

Factor out the duplicated code into <asm-generic/int-ll64.h>.

BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoRemove CONFIG_USE_STDINT
Masahiro Yamada [Mon, 6 Aug 2018 11:47:38 +0000 (20:47 +0900)]
Remove CONFIG_USE_STDINT

You do not need to use the typedefs provided by compiler.

Our compilers are either IPL32 or LP64.  Hence, U-Boot can/should
always use int-ll64.h typedefs like Linux kernel, whatever the
typedefs the compiler internally uses.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoarm: armv7-a: Compile and tune for armv7-a instead of armv5
Adam Ford [Sat, 4 Aug 2018 21:34:54 +0000 (16:34 -0500)]
arm: armv7-a: Compile and tune for armv7-a instead of armv5

arch/arm/Makefile references armv5 for backwards compatibility with
older compilers.  This patch removes those references to armv5,
since by now newer compilers are required which should have armv7
support enabled.

The Makefile also also has a list of options for mtune, but the
entry for CONFIG_CPU_V7A is empty, so this patch tunes the
CPU_V7A architecture to generic-armv7-a.

The following size changed apply to omap3_logic using GCC.

Stock
text data bss dec hex filename
50910 429 67580 118919 1d087 spl/u-boot-spl
540713 22700 327072 890485   d9675 u-boot

Without Armv5
text data bss dec hex filename
50916 429 67580 118925   1d08d spl/u-boot-spl
540719 22700 327064 890483   d9673 u-boot

mtune=generic-armv7-a
text data bss dec hex filename
50932 429 67580 118941   1d09d spl/u-boot-spl
540519 22700 327080 890299   d95bb u-boot

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agosandbox: Add serial test
Patrice Chotard [Fri, 3 Aug 2018 13:07:41 +0000 (15:07 +0200)]
sandbox: Add serial test

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: serial: Remove setparity ops
Patrice Chotard [Fri, 3 Aug 2018 13:07:40 +0000 (15:07 +0200)]
dm: serial: Remove setparity ops

setparity users has been updated to use new setconfig ops,
so we can safely remove setparity ops

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoserial: stm32: Replace setparity by setconfig
Patrice Chotard [Fri, 3 Aug 2018 13:07:39 +0000 (15:07 +0200)]
serial: stm32: Replace setparity by setconfig

Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: serial: Replace setparity by setconfig
Patrice Chotard [Fri, 3 Aug 2018 13:07:38 +0000 (15:07 +0200)]
dm: serial: Replace setparity by setconfig

Replace setparity by more generic setconfig ops
to allow uart parity, bits word length and stop bits
number change.

Adds SERIAL_GET_PARITY/BITS/STOP macros.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agocli: handle getch error
Patrick Delaunay [Fri, 3 Aug 2018 11:38:45 +0000 (13:38 +0200)]
cli: handle getch error

Handle getch error (when getch return 0x0) to avoid display issue
in the console.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoconsole: unify fgetc function when console MUX is deactivated
Patrick Delaunay [Fri, 3 Aug 2018 11:38:44 +0000 (13:38 +0200)]
console: unify fgetc function when console MUX is deactivated

Unify the fgetc function when MUX is activated or not:
- always call tstc() : it is the normal behavior expected
  by serial uclass (call tstc then getc) and that avoids
  issue when SERIAL_RX_BUFFER is activated
- reload WATCHDOG in the char waiting loop

This patch allow to have the same behavior when CONSOLE_MUX is activated
or not and avoid regression when this feature is deactivated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoserial: protect access to serial rx buffer
Patrick Delaunay [Fri, 3 Aug 2018 11:38:43 +0000 (13:38 +0200)]
serial: protect access to serial rx buffer

Add test to avoid access to rx buffer when this buffer is empty.
In this case directly call getc() function to avoid issue when tstc()
is not called.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agostm32mp1: activate serial rx buffer
Patrick Delaunay [Fri, 3 Aug 2018 11:38:42 +0000 (13:38 +0200)]
stm32mp1: activate serial rx buffer

Activate the serial rx buffer.
Prepare console MUX activation with vidconsole, and avoid console
performance issue (missing character for copy-paste).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoinclude/version.h: workaround sysroot inc order
Matt Weber [Fri, 27 Jul 2018 03:37:53 +0000 (22:37 -0500)]
include/version.h: workaround sysroot inc order

On some systems the host system or even the cross sysroot can
contain a version.h.  This leads to the wrong file being picked
up and a PLAIN_VERSION undefined error.

This workaround symlinks the version.h into the tool folder to
allow reordering of search folders.

Fixes
http://autobuild.buildroot.net/results/770/7702d5df36a6532aafdbe6e9e62709bbfa058b54/build-end.log
http://autobuild.buildroot.net/results/e34/e3401027d2fb3ce565ca9e2456a427afd3610a87/build-end.log
... additional can be found with these queries ...
http://autobuild.buildroot.net/?reason=uboot-tools-2018.03
http://autobuild.buildroot.net/?reason=uboot-tools-2018.05

Upstream: pending

Signed-off-by: Matthew Weber <matthew.weber@rockwellcollins.com>
6 years agoPrepare v2018.09
Tom Rini [Mon, 10 Sep 2018 21:46:42 +0000 (17:46 -0400)]
Prepare v2018.09

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years ago.travis.yml: Fix typo in sun7i job description
Tuomas Tynkkynen [Fri, 7 Sep 2018 21:53:18 +0000 (00:53 +0300)]
.travis.yml: Fix typo in sun7i job description

'builman' -> 'buildman'

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agomtd: nand: denali: fix unaligned cache operations on ARMv7 SoCs
Masahiro Yamada [Mon, 10 Sep 2018 02:17:30 +0000 (11:17 +0900)]
mtd: nand: denali: fix unaligned cache operations on ARMv7 SoCs

If the OOB size is not multiple of the cache line size, the ARMv7
cache operation still prints "Misaligned operation at range".

=> nand info

Device 0: nand0, sector size 256 KiB
  Page size       4096 b
  OOB size         224 b
  Erase size    262144 b
  subpagesize     4096 b
  options     0x00104200
  bbt options 0x00060000
=> nand dump 0
CACHE: Misaligned operation at range [9fb152809fb16360]
CACHE: Misaligned operation at range [9fb152809fb16360]
CACHE: Misaligned operation at range [9fb152809fb16360]
CACHE: Misaligned operation at range [9fb152809fb16360]
  ...

The cache flushing operations won't happen in this case to cover all of
the range to fix this by making sure we have things aligned.

Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Reword the commit message to be clear this is a direct problem
rather than just a warning]

6 years agofdt: fix get_next_memory_node()
Marek Vasut [Sun, 9 Sep 2018 14:30:11 +0000 (16:30 +0200)]
fdt: fix get_next_memory_node()

The get_next_memory_node() always sets mem to -1 , which is incorrect,
because then every iteration of memory bank parsing will start from the
first memory bank instead of the previous one.

On systems with 1 memory bank defined in DT and CONFIG_NR_DRAM_BANKS=4 ,
like ie. r8a77965-salvator-x , this will result in U-Boot incorrectly
reporting four identical memory banks with the same memory configuration.

Fix this by setting mem to startoffset value, which restores the behavior
before the fixed patch was applied.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes: 452bc121027d ("fdt: fix fdtdec_setup_memory_banksize()")
Tested-by: Michal Simek <michal.simek@xilinx.com> [on ZynqMP}
6 years agoARM: Specify aligned address for secure section instead of using attributes
Chen-Yu Tsai [Thu, 6 Sep 2018 03:56:28 +0000 (11:56 +0800)]
ARM: Specify aligned address for secure section instead of using attributes

In commit a1274cc94a20 ("ARM: Page align secure section only when it is
executed in situ"), we used output section attributes (the "ALIGN"
keyword after the colon) to specify the alignment requirements. Using
the constant "COMMONPAGE" there was recently broken in binutils 2.31 [1].

Binutils maintainer Alan Modra suggested the former method would still
work. Since both methods achieve the same result, this patch does just
that. This fixes the "reboot after bootm" issue we've been seeing on
sunxi when booting non-secure.

  [1] https://sourceware.org/bugzilla/show_bug.cgi?id=23571

Suggested-by: Alan Modra <amodra@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Jagan Teki <jagan@openedev.com>
6 years agopico-imx7d: Update the README file
Fabio Estevam [Tue, 4 Sep 2018 13:23:12 +0000 (10:23 -0300)]
pico-imx7d: Update the README file

Update the README file to take into accound the switch to SPL.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
6 years agotravis: Use kernel.org pre-built toolchain for riscv
Bin Meng [Thu, 30 Aug 2018 13:17:06 +0000 (06:17 -0700)]
travis: Use  pre-built toolchain for riscv

This updates travis configuration to use kernel.org pre-built
toolchain for riscv.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
6 years agoARM: qemu-arm: Fix qemu_arm64_defconfig for QEMU 3.0
Tuomas Tynkkynen [Tue, 4 Sep 2018 15:16:52 +0000 (18:16 +0300)]
ARM: qemu-arm: Fix qemu_arm64_defconfig for QEMU 3.0

QEMU 3.0 introduced additional memory-mapped regions for PCI-E ECAM and
MMIO. Thus we need to add them to our MMU map or U-Boot will crash with
a Synchronous Abort during PCI-E probing when it tries to access the
unmapped ECAM memory area.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
6 years agolib/slre: remove superfluous assignment
Heinrich Schuchardt [Mon, 3 Sep 2018 03:17:20 +0000 (05:17 +0200)]
lib/slre: remove superfluous assignment

It makes no sense to assign a value to 'res' if the next use of the
variable is an assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoamlogic: board p212: Fix Ethernet PHY init
Jasper kcoding [Mon, 3 Sep 2018 20:14:53 +0000 (22:14 +0200)]
amlogic: board p212: Fix Ethernet PHY init

Without this patch the Ethernet PHY on the p212 board does not get
fully configured.
When this happens Ethernet does not function.

The similar libretech-cc and khadas-vim boards have this code already.
That's why the Ethernet on these boards do work.

Signed-off-by: Jasper Kcoding <jasperkcoding@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
6 years agoqemu-arm: Enable DHCP distro target
Alexander Graf [Tue, 4 Sep 2018 11:49:29 +0000 (13:49 +0200)]
qemu-arm: Enable DHCP distro target

When booting the QEMU virt machine with -net nic,model=e1000 we can already
support network boot just fine today.

So let's enable the default bootcmd to also evaluate DHCP responses properly.
That way we can enable network boot seamlessly with the virt target.

Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Fix MMC Card Detect
Adam Ford [Mon, 3 Sep 2018 14:08:04 +0000 (09:08 -0500)]
ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Fix MMC Card Detect

When re-syncing the DTS files from the kernel, something caused
the MMC driver to no longer detect the MMC card. Undoing the
CD-invert appears to fix the issue.

Fixes: e6ea2390cde3 ("ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit
with Linux 4.18-RC4")

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoMerge tag 'arc-updates-for-2018.09' of git://git.denx.de/u-boot-arc
Tom Rini [Wed, 5 Sep 2018 15:39:03 +0000 (11:39 -0400)]
Merge tag 'arc-updates-for-2018.09' of git://git.denx.de/u-boot-arc

Minor changes for ARC

1. Fix CPU clock value in HSDK's .dts so time is counted properly.
2. Enable bootelf command on EMDK

6 years agoARC: HSDK: Fix timer frequency value
Eugeniy Paltsev [Wed, 5 Sep 2018 11:27:10 +0000 (14:27 +0300)]
ARC: HSDK: Fix timer frequency value

CPU (and hence cpu timers) on HSDK board runs at 500MHz after
preloader so fix wrong CPU frequency value in hsdk.dts

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
6 years agoEMDK: Enable bootelf
Alexey Brodkin [Mon, 6 Aug 2018 13:01:19 +0000 (16:01 +0300)]
EMDK: Enable bootelf

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-imx
Tom Rini [Tue, 4 Sep 2018 21:45:53 +0000 (17:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-imx

6 years agomx7dsabresd: Add the qspi target to the list of supported defconfigs
Fabio Estevam [Sat, 1 Sep 2018 17:24:56 +0000 (14:24 -0300)]
mx7dsabresd: Add the qspi target to the list of supported defconfigs

Add an entry for mx7dsabresd_qspi_defconfig to avoid the following
warnings:

WARNING: no status info for 'mx7dsabresd_qspi'
WARNING: no maintainers for 'mx7dsabresd_qspi'

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: missing CONFIG_MII in mx7dsabresd_qspi_defconfig
Stefano Babic [Fri, 31 Aug 2018 10:08:43 +0000 (12:08 +0200)]
imx: missing CONFIG_MII in mx7dsabresd_qspi_defconfig

CONFIG_CMD_MII is set without CONFIG_MII, build is broken.

Signed-off-by: Stefano Babic <sbabic@denx.de>
6 years agocolibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support
Stefan Agner [Mon, 6 Aug 2018 07:19:19 +0000 (09:19 +0200)]
colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support

This commit adds support for the Toradex Colibri iMX7D 1GB Computer
on Module. The module is very similar to the Colibri iMX7D 512MB
but uses eMMC instead of raw NAND. This patch introduces a new
board specific Kconfig symbol to select between the two flash
options.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agoboard: toradex: common: fail gracefully on missing NAND chip
Stefan Agner [Mon, 6 Aug 2018 07:19:18 +0000 (09:19 +0200)]
board: toradex: common: fail gracefully on missing NAND chip

If the NAND chip is missing get_nand_dev_by_index() returns NULL. Fail
gracefully in this case.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agoimx: mx7: add system suspend/resume support
Anson Huang [Wed, 8 Aug 2018 01:17:50 +0000 (09:17 +0800)]
imx: mx7: add system suspend/resume support

This patch adds system suspend/resume support,
when linux kernel enters deep sleep mode, SoC will go
into below mode:

 - CA7 platform goes into STOP mode;
 - SoC goes into DSM mode;
 - DDR goes into self-refresh mode;
 - CPU0/SCU will be powered down.

When wake up event arrives:

 - SoC DSM mdoe exits;
 - CA7 platform exit STOP mode, SCU/CPU0 power up;
 - Invalidate L1 cache;
 - DDR exit self-refresh mode;
 - Do secure monitor mode related initialization;
 - Jump to linux kernel resume entry.

Belwo is the log of 1 iteration of system suspend/resume:

[  338.824862] PM: suspend entry (deep)
[  338.828853] PM: Syncing filesystems ... done.
[  338.834433] Freezing user space processes ... (elapsed 0.001 seconds) done.
[  338.842939] OOM killer disabled.
[  338.846182] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
[  338.869717] PM: suspend devices took 0.010 seconds
[  338.877846] Disabling non-boot CPUs ...
[  338.960301] Retrying again to check for CPU kill
[  338.964953] CPU1 killed.
[  338.968104] Enabling non-boot CPUs ...
[  338.973598] CPU1 is up
[  339.267155] mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
[  339.275833] mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
[  339.284158] mmc1: queuing unknown CIS tuple 0x80 (6 bytes)
[  339.385065] PM: resume devices took 0.400 seconds
[  339.389836] OOM killer enabled.
[  339.392986] Restarting tasks ... done.
[  339.398990] PM: suspend exit

The resume entry function has to initialize stack pointer before calling
C code, otherwise there will be an external abort occur, in additional,
invalidate L1 cache must be done in secure section as well, so this
patch also adds assembly code back and keep it as simple as possible.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
6 years agoimx: mx7: add gpc initialization for low power mode
Anson Huang [Wed, 8 Aug 2018 01:17:49 +0000 (09:17 +0800)]
imx: mx7: add gpc initialization for low power mode

Add i.MX7D GPC initialization for low power mode
support like system suspend/resume from linux kernel:

 - Pending IOMUXC IRQ to workaround GPC state machine issue;
 - Mask all GPC interrupts for M4/C0/C1;
 - Configure SCU timing;
 - Configure time slot ack;
 - Configure C0/C1 power up/down timing;
 - Configure wakeup source mechanism;
 - Disable DSM/RBC related settings.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
6 years agoimx: mx7: psci: improve cpu hotplug flow
Anson Huang [Wed, 8 Aug 2018 01:17:48 +0000 (09:17 +0800)]
imx: mx7: psci: improve cpu hotplug flow

This patch improves cpu hotplug, previous cpu_off
implementation is NOT safe, a CPU can NOT power down
itself in runtime, it will cause system bus hang due
to pending transaction. So need to use other online
CPU to kill it when it is ready for killed.

Here use SRC parameter register and a magic number
of ~0 as handshake for killing a offline CPU,
when the online CPU checks the psci_affinity_info,
it will help kill the offline CPU according to
the magic number stored in SRC parameter register.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
6 years agoCleanup CONFIG_BOOTDELAY on cl-som-imx7
Alex Kiernan [Tue, 24 Jul 2018 07:29:40 +0000 (07:29 +0000)]
Cleanup CONFIG_BOOTDELAY on cl-som-imx7

CONFIG_BOOTDELAY has been migrated to Kconfig, but cl-som-imx7 was
missed. We can just delete the assignments as the config already has
the correct value.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
6 years agowatchdog: mx25: use the imx_watchdog driver for mx25
Martin Kaiser [Sat, 21 Jul 2018 17:47:03 +0000 (19:47 +0200)]
watchdog: mx25: use the imx_watchdog driver for mx25

The existing imx_watchdog driver is compatible with mx25 chipsets.
Add a WDOG1_BASE_ADDR define for the base address and enable the driver
in watchdog's Makefile.

To use the driver, a board must define CONFIG_IMX_WATCHDOG and
CONFIG_HW_WATCHDOG.

This fixes an issue when booting an mx25 chip via usb/serial. In this
case, the boot rom will always enable the watchdog. If u-boot is running
in interactive mode and the watchdog is not serviced, the system is
rebooted when the watchdog expires.

Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx: imx6ul_evk: Enable DM driver for iMX6UL EVK u-boot
Ye Li [Thu, 28 Jun 2018 03:23:17 +0000 (20:23 -0700)]
imx: imx6ul_evk: Enable DM driver for iMX6UL EVK u-boot

Convert the codes and configurations to enable DM drivers in u-boot for
modules: i2c, PMIC, regulator, USB, Ethernet, SD/MMC, GPIO and QSPI

This patch does not change SPL, so it still uses non-DM driver for
UART, GPIO and SD/MMC.

Signed-off-by: Ye Li <ye.li@nxp.com>
6 years agodts: imx6ul_evk: Add DTS files for 14x14 EVK and 9x9 EVK boards
Ye Li [Thu, 28 Jun 2018 03:23:16 +0000 (20:23 -0700)]
dts: imx6ul_evk: Add DTS files for 14x14 EVK and 9x9 EVK boards

Add the board DTS files for 14x14 EVK and 9x9 EVK. They are necessary
for converting to use u-boot DM driver.

Two -u-boot.dtsi are added to modify compatible string of SPI flash
device to "spi-flash".

Signed-off-by: Ye Li <ye.li@nxp.com>
6 years agodts: imx6ul: Update alias to support DM
Ye Li [Thu, 28 Jun 2018 03:23:15 +0000 (20:23 -0700)]
dts: imx6ul: Update alias to support DM

Add spi0 alias for qspi for enabling DM SPI.
Change usb alias for usbotg1 and usbotg2 for enabling DM USB

Signed-off-by: Ye Li <ye.li@nxp.com>
6 years agoimx: imx7d-sdb: Add DM QSPI support
Ye Li [Thu, 28 Jun 2018 02:30:53 +0000 (19:30 -0700)]
imx: imx7d-sdb: Add DM QSPI support

On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default).
To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399
populate R392-R395, R299, R300). So we add new DTS file and new defconfig
dedicated for QSPI.

Other changes to support the DM QSPI:
 - Add QSPI node and alias spi0.
 - Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req
   conflict
 - Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts to
   align with kernel and also present the conflict.
 - Add -u-boot.dtsi to modify compatible string of mx25l51245g@0 to
   "spi-flash"
 - Remove iomux settings of qspi in board codes which is not needed
   for DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
6 years agoimx: imx6sx-sabreauto: convert to use DM QSPI driver
Ye Li [Thu, 28 Jun 2018 02:27:00 +0000 (19:27 -0700)]
imx: imx6sx-sabreauto: convert to use DM QSPI driver

To support DM QSPI driver:
 - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
   to "spi-flash" and add "num-cs" property.
 - Enable DM SPI and DM SPI FLASH configurations
 - Remove iomux settings of qspi1 in board codes which is not needed
   for DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
6 years agoimx: imx6sx-sdb: Enable DM QSPI driver
Ye Li [Thu, 28 Jun 2018 02:26:59 +0000 (19:26 -0700)]
imx: imx6sx-sdb: Enable DM QSPI driver

To support DM QSPI driver
 - Add spi0 and spi1 alias for qspi1 and qspi2.
 - Add -u-boot.dtsi to modify n25q256a@0 and n25q256a@1 compatible string
   to "spi-flash" and add "num-cs" property.
 - Enable DM SPI/QSPI relavent configurations
 - Remove iomux settings of qspi2 in board codes which is not needed
   for DM driver.
 - Add sf default settings. So running "sf probe" can detect the flash

Signed-off-by: Ye Li <ye.li@nxp.com>
6 years agoPrepare v2018.09-rc3
Tom Rini [Mon, 3 Sep 2018 19:36:33 +0000 (15:36 -0400)]
Prepare v2018.09-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 3 Sep 2018 19:26:12 +0000 (15:26 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agospl: Kconfig: Fix typo in 'Upgrade'
Fabio Estevam [Fri, 31 Aug 2018 13:02:28 +0000 (10:02 -0300)]
spl: Kconfig: Fix typo in 'Upgrade'

Correct the spelling of 'Upgrade'.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoMake kmalloc'ed memory really DMA-safe
Masahiro Yamada [Fri, 24 Aug 2018 10:30:15 +0000 (19:30 +0900)]
Make kmalloc'ed memory really DMA-safe

In Linux, the memory returned by kmalloc() is DMA-capable.
However, it is not true in U-Boot.

At a glance, kmalloc() in U-Boot returns address aligned with
ARCH_DMA_MINALIGN.  However, it never pads the allocated memory.
This half-way house is completely useless because calling kmalloc()
and malloc() in this order causes a cache sharing problem.

Change the implementation to call malloc_cache_aligned(), which
allocates really DMA-capable memory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agotest: fix typo in cmd_ut_category() description
Heinrich Schuchardt [Mon, 27 Aug 2018 20:04:10 +0000 (22:04 +0200)]
test: fix typo in cmd_ut_category() description

argc = 1: all tests are run
argc > 1: only argv[1] is run

So we need argc >= 1.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agohisilicon: hikey: Update instructions based on latest source
Manivannan Sadhasivam [Wed, 29 Aug 2018 04:37:36 +0000 (10:07 +0530)]
hisilicon: hikey: Update instructions based on latest source

Update the HiKey board instructions based on the latest source
available. These instructions are derived from the ATF platform doc.
While updating the instructions, some comments on ATF issue has been
removed since it is fixed in latest ATF source.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Thu, 30 Aug 2018 14:15:03 +0000 (10:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Thu, 30 Aug 2018 14:06:29 +0000 (10:06 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-rockchip
Tom Rini [Thu, 30 Aug 2018 14:06:19 +0000 (10:06 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-rockchip

6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Thu, 30 Aug 2018 14:06:11 +0000 (10:06 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agommc: renesas-sdhi: Use priv directly
Marek Vasut [Thu, 30 Aug 2018 13:27:26 +0000 (15:27 +0200)]
mmc: renesas-sdhi: Use priv directly

The dev_get_priv(dev) is used twice in the probe function.
Replace the second invocation with priv variable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agox86: zimage: Remove acpi_rsdp_addr propagation to kernel boot parameters
Bin Meng [Fri, 24 Aug 2018 04:28:58 +0000 (21:28 -0700)]
x86: zimage: Remove acpi_rsdp_addr propagation to kernel boot parameters

As of today, the proposal of adding "acpi_rsdp_addr" to the kernel
boot protocol does not make its way to the kernel mainline. This
creates some confusion if we leave it in the U-Boot code base.
Remove it for now until we have a clear picture with kernel upstream.

Note this eventually does a partial revert to commit 3469bf427454
("x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters")

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi: payload: Turn on acpi in the kernel command line
Bin Meng [Thu, 23 Aug 2018 15:24:11 +0000 (08:24 -0700)]
x86: efi: payload: Turn on acpi in the kernel command line

Now that we have full Linux kernel boot support on EFI payload,
avoid pass "acpi=off" to the kernel command line.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: zimage: Support booting Linux kernel from an EFI payload
Bin Meng [Thu, 23 Aug 2018 15:24:10 +0000 (08:24 -0700)]
x86: zimage: Support booting Linux kernel from an EFI payload

At present Linux kernel loaded from U-Boot as an EFI payload does
not boot. This fills in kernel's boot params structure with the
required critical EFI information like system table address and
memory map stuff so that kernel can obtain essential data like
runtime services and ACPI table to boot.

With this patch, now U-Boot as an EFI payload becomes much more
practical: it is another option of kernel bootloader, ie, can be
a replacement for grub.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoefi: stub: Pass EFI system table address to U-Boot payload
Bin Meng [Thu, 23 Aug 2018 15:24:09 +0000 (08:24 -0700)]
efi: stub: Pass EFI system table address to U-Boot payload

This updates the EFI stub codes to pass UEFI BIOS's system table
address to U-Boot payload so that U-Boot can utilize it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi: payload: Install E820 map from EFI memory map
Bin Meng [Thu, 23 Aug 2018 15:24:08 +0000 (08:24 -0700)]
x86: efi: payload: Install E820 map from EFI memory map

This implements payload-specific install_e820_map() to get E820 map
from the EFI memory map descriptors.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agorockchip: dts: fix unnecessary '-cells' warning
Kever Yang [Tue, 28 Aug 2018 09:57:32 +0000 (17:57 +0800)]
rockchip: dts: fix unnecessary '-cells' warning

Fix warning below:
unnecessary #address-cells/#size-cells without "ranges" or child "reg"
property

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agousb: dwc2: Add reset ctrl to driver
Ley Foon Tan [Tue, 28 Aug 2018 16:08:48 +0000 (00:08 +0800)]
usb: dwc2: Add reset ctrl to driver

Add code to reset all reset signals as in usb DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agopci: rmobile: Filter out device 1 and 2
Marek Vasut [Fri, 24 Aug 2018 19:03:14 +0000 (21:03 +0200)]
pci: rmobile: Filter out device 1 and 2

Only PCI device 1 and 2 is populated on the R-Car Gen2 internal
PCIe controller. Ignore all other devices. This fix prevents a
duplication of OHCI controller response on slot 0 and 1.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agousb: ehci: Add PHY support to ehci-pci
Marek Vasut [Tue, 7 Aug 2018 10:27:10 +0000 (12:27 +0200)]
usb: ehci: Add PHY support to ehci-pci

Add support for operating a PHY attached to ehci-pci. There are
systems where the EHCI controller is internally wired to a PCI
bus and has a PHY connected to it as well, ie. the R-Car Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agousb: ehci: Make the PHY handling generic
Marek Vasut [Wed, 8 Aug 2018 12:29:55 +0000 (14:29 +0200)]
usb: ehci: Make the PHY handling generic

Pull out the EHCI PHY functions into the ehci-hcd.c to let other
EHCI drivers use them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agophy: Fix warning due to missing definition of structure
Marek Vasut [Thu, 16 Aug 2018 12:37:03 +0000 (14:37 +0200)]
phy: Fix warning due to missing definition of structure

Fix this sort of warning if generic-phy.h is included:

include/generic-phy.h:52:42: warning: ‘struct ofnode_phandle_args’ declared inside parameter list will not be visible outside of this definition or declaration
  int (*of_xlate)(struct phy *phy, struct ofnode_phandle_args *args);

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agoconfigs: am57xx: change default board name to beagle_x15
Praneeth Bajjuri [Wed, 22 Aug 2018 04:47:49 +0000 (23:47 -0500)]
configs: am57xx: change default board name to beagle_x15

beagleboard x15 is the first supported platform variant of am57xx
in AOSP (android open source project) now.

changing board name to stay in consistent with aosp target name.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
6 years agocmd: ubi: change 'default y' for SUNXI to 'imply' in Kconfig
Masahiro Yamada [Mon, 9 Jul 2018 06:12:37 +0000 (15:12 +0900)]
cmd: ubi: change 'default y' for SUNXI to 'imply' in Kconfig

It is not preferred to put SUNXI-specific code in the common place.

Change it to 'imply' property of ARCH_SUNXI.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Fri, 24 Aug 2018 20:11:12 +0000 (16:11 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Fri, 24 Aug 2018 20:11:01 +0000 (16:11 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Fri, 24 Aug 2018 20:10:54 +0000 (16:10 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

6 years agoARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding
Christian Amann [Tue, 21 Aug 2018 15:04:09 +0000 (17:04 +0200)]
ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding

Copy missing Kernel patch to make SLEWCTRL_SLOW available in device tree
and to correct the value of SLEWCTRL_FAST.
After this patch, the Kernel and U-boot device tree settings for
SLEWCTRL have the same effect.

Original Kernel patch message:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=424e0f039bfa8a51fb5c5178b6ece8baa4996469

"
According to AM335x TRM, Document spruh73l, Revised February 2015,
Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control
registers actually sets the SLEWCTRL value to slow rather than fast as
the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that
sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for
completeness. Current users of the macro (i2c and mdio) are left
unmodified as SLEWCTRL_FAST was the macro used and actual desired state.
Tested on am335x-gp-evm with no difference in software performance seen.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
"

Signed-off-by: Christian Amann <Christian.Amann@de.bosch.com>
6 years agoenv: ubi: Add missing ENV_NAME
Marek Vasut [Tue, 21 Aug 2018 13:53:33 +0000 (15:53 +0200)]
env: ubi: Add missing ENV_NAME

Add missing environment name for UBI, to prevent this NULL in output:
Loading Environment from <NULL>...
and rather have a valid UBI there:
Loading Environment from UBI...

Signed-off-by: Marek Vasut <marex@denx.de>
6 years agou-boot: align cache flushes in load_elf_image_shdr to line boundaries
Neil Stainton [Mon, 20 Aug 2018 15:46:19 +0000 (15:46 +0000)]
u-boot: align cache flushes in load_elf_image_shdr to line boundaries

Prevent cache warning messages when using the 'bootelf' command on an
Arm target. Round down each section start address and round up the
respective section end to the nearest cache line.

Currently when using bootelf to load an image on Arm, several warnings
such as the following appear in the console:
  CACHE: Misaligned operation at range [878000008783c5e0]
  CACHE: Misaligned operation at range [8783c5e08784b3e0]

Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
[trini: Reword commit message to include the info after the --- which
included the Signed-off-by line, and change ' at ' to '@']
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoARM: display5: Remove "factory procedure" from display5 board config
Lukasz Majewski [Mon, 20 Aug 2018 14:23:58 +0000 (16:23 +0200)]
ARM: display5: Remove "factory procedure" from display5 board config

This code now is regarded as dead one and hence shall be removed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agodm: test: Fix typo in test-main comment
Michal Simek [Mon, 20 Aug 2018 06:03:22 +0000 (08:03 +0200)]
dm: test: Fix typo in test-main comment

Trivial fix.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomalloc_simple: calloc: don't call memset if malloc failed
Simon Goldschmidt [Thu, 16 Aug 2018 07:50:32 +0000 (09:50 +0200)]
malloc_simple: calloc: don't call memset if malloc failed

malloc_simple() can return 0 if out of memory. Don't call memset
from calloc() in this case but rely on the caller checking
the return value.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
6 years agoboard: arm: bcmstb: Declare get_ticks in timer.h
Thomas Fitzsimmons [Thu, 16 Aug 2018 01:33:49 +0000 (21:33 -0400)]
board: arm: bcmstb: Declare get_ticks in timer.h

In an earlier proposed patch, bcmstb.c implemented timer_read_counter,
but it was updated to implement get_ticks instead.  This patch updates
the declaration in timer.h accordingly.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
6 years agoboards: amlogic: remove ethernet gpio reset code from boards
Beniamino Galvani [Tue, 14 Aug 2018 13:07:52 +0000 (15:07 +0200)]
boards: amlogic: remove ethernet gpio reset code from boards

The reset is already handled by the designware driver using
information from device tree.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
6 years agocommon: avb_verify: Fix division by zero in mmc_byte_io()
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:09 +0000 (02:43 +0200)]
common: avb_verify: Fix division by zero in mmc_byte_io()

Compiling U-Boot with ubsan/asan libraries and running it in sandbox
may lead to below backtrace:

 => avb init 0
 => avb verify
 ## Android Verified Boot 2.0 version 1.1.0
read_is_device_unlocked not supported yet
common/avb_verify.c:407:31: runtime error: division by zero
AddressSanitizer:DEADLYSIGNAL
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
=================================================================
==9388==ERROR: AddressSanitizer: FPE on unknown address 0x0000004b467f \
    (pc 0x0000004b467f bp 0x000000000000 sp 0x7ffd899fe150 T0)
    #0 0x4b467e in mmc_byte_io common/avb_verify.c:407
    #1 0x4b4c47 in mmc_byte_io common/avb_verify.c:532
    #2 0x4b4c47 in read_from_partition common/avb_verify.c:533
    #3 0x69dc0d in load_and_verify_vbmeta lib/libavb/avb_slot_verify.c:560
    #4 0x6a1ee6 in avb_slot_verify lib/libavb/avb_slot_verify.c:1139
    #5 0x45dabd in do_avb_verify_part cmd/avb.c:245
    #6 0x4af77c in cmd_call common/command.c:499
    #7 0x4af77c in cmd_process common/command.c:538
    #8 0x46bafc in run_pipe_real common/cli_hush.c:1677
    #9 0x46bafc in run_list_real common/cli_hush.c:1875
    #10 0x46c780 in run_list common/cli_hush.c:2024
    #11 0x46c780 in parse_stream_outer common/cli_hush.c:3216
    #12 0x46d34b in parse_file_outer common/cli_hush.c:3299
    #13 0x4ad609 in cli_loop common/cli.c:217
    #14 0x4625ae in main_loop common/main.c:65
    #15 0x46f2d1 in run_main_loop common/board_r.c:648
    #16 0x640253 in initcall_run_list lib/initcall.c:30
    #17 0x46f9d0 in board_init_r common/board_r.c:879
    #18 0x40539b in main arch/sandbox/cpu/start.c:321
    #19 0x7fa94925f82f in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x2082f)
    #20 0x408908 in _start (/srv/R/u-boot-master/u-boot+0x408908)

AddressSanitizer can not provide additional info.
SUMMARY: AddressSanitizer: FPE common/avb_verify.c:407 in mmc_byte_io
==9388==ABORTING

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
6 years agocommon: avb_verify: Fix never-occurring avb_free(ops_data)
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:08 +0000 (02:43 +0200)]
common: avb_verify: Fix never-occurring avb_free(ops_data)

Cppcheck (v1.85) reports w/o this patch:

[common/avb_verify.c:738] -> [common/avb_verify.c:741]: (warning) \
  Either the condition 'ops' is redundant or there is possible null \
  pointer dereference: ops.

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
6 years agocommon: avb_verify: Fix memory leaks
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:07 +0000 (02:43 +0200)]
common: avb_verify: Fix memory leaks

Cppcheck (v1.85) reports w/o this patch:

[common/avb_verify.c:351]: (error) Memory leak: part
[common/avb_verify.c:356]: (error) Memory leak: part
[common/avb_verify.c:361]: (error) Memory leak: part
[common/avb_verify.c:366]: (error) Memory leak: part

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
6 years agocommon: avb_verify: Make local data static
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:06 +0000 (02:43 +0200)]
common: avb_verify: Make local data static

Fix sparse complaint:

common/avb_verify.c:14:21: warning: \
  symbol 'avb_root_pub' was not declared. Should it be static?

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
6 years agocommon: kconfig: Mark AVB_VERIFY as dependent on PARTITION_UUIDS
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:05 +0000 (02:43 +0200)]
common: kconfig: Mark AVB_VERIFY as dependent on PARTITION_UUIDS

Avoid below compiler [1] errors, reproduced with configuration [2]:

common/avb_verify.c: In function ‘get_unique_guid_for_partition’:
common/avb_verify.c:692:31: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
  uuid_size = sizeof(part->info.uuid);
                               ^
common/avb_verify.c:696:29: error: ‘disk_partition_t {aka struct disk_partition}’ has no member named ‘uuid’
  memcpy(guid_buf, part->info.uuid, uuid_size);
                             ^
  LD      drivers/built-in.o
make[2]: *** [scripts/Makefile.build:278: common/avb_verify.o] Error 1

[1] aarch64-linux-gnu-gcc (Linaro GCC 7.2-2017.11)
[2] r8a7795_ulcb_defconfig, plus:
    CONFIG_AVB_VERIFY=y
    CONFIG_PARTITION_UUIDS=y
    CONFIG_UDP_FUNCTION_FASTBOOT=y
    CONFIG_LIBAVB=y

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
6 years agocommon: avb_verify: Fix invalid 'for' loop condition
Eugeniu Rosca [Tue, 14 Aug 2018 00:43:04 +0000 (02:43 +0200)]
common: avb_verify: Fix invalid 'for' loop condition

Fix below compiler [1] warning:

common/avb_verify.c: In function ‘avb_find_dm_args’:
common/avb_verify.c:179:30: warning: left-hand operand of comma expression has no effect [-Wunused-value]
  for (i = 0; i < AVB_MAX_ARGS, args[i]; ++i) {

[1] aarch64-linux-gnu-gcc (Linaro GCC 7.2-2017.11)

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
6 years agolibavb: Handle wrong hashtree_error_mode in avb_append_options()
Ievgen Maliarenko [Tue, 14 Aug 2018 00:43:03 +0000 (02:43 +0200)]
libavb: Handle wrong hashtree_error_mode in avb_append_options()

Exit with AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT
when hashtree_error_mode value passed to avb_append_options()
is unknown (not from AvbHashtreeErrorMode enum).

Otherwise, default value is not handled in the
switch(hashtree_error_mode), which causes below compile warning:

lib/libavb/avb_cmdline.c: In function ‘avb_append_options’:
lib/libavb/avb_cmdline.c:354:13: warning: ‘dm_verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
     new_ret = avb_replace(
     ~~~~~~~~^~~~~~~~~~~~~~
         slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
         ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libavb/avb_cmdline.c:363:8: warning: ‘verity_mode’ may be used uninitialized in this function [-Wmaybe-uninitialized]
   if (!cmdline_append_option(
        ^~~~~~~~~~~~~~~~~~~~~~
           slot_data, "androidboot.veritymode", verity_mode)) {

Signed-off-by: Ievgen Maliarenko <ievgen.maliarenko@globallogic.com>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
6 years agoARM: dts: socfpga: Add missing NAND reset
Marek Vasut [Tue, 21 Aug 2018 13:54:22 +0000 (15:54 +0200)]
ARM: dts: socfpga: Add missing NAND reset

The NAND reset is missing from DT, so the reset manager cannot unreset the NAND.
Add the missing DT reset entry.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT
Marek Vasut [Tue, 21 Aug 2018 14:26:32 +0000 (16:26 +0200)]
ARM: dts: socfpga: Drop ad-hoc UART clock frequency encoding from DT

The UART clock frequency can be obtained from the clock framework by the
ns16550 driver, so drop this redundant DT node.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Convert Arria10 to timer framework
Marek Vasut [Sat, 18 Aug 2018 14:00:31 +0000 (16:00 +0200)]
ARM: socfpga: Convert Arria10 to timer framework

Switch the Arria10 from ad-hoc hardcoded timer to timer framework
and the DW APB timer driver. This allows the A10 to extract timer
information, like timer rate, from clock framework and thus DT
instead of having it hardcoded in U-Boot configuration files.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: dts: socfpga: Flag timer clock as pre-reloc
Marek Vasut [Sat, 18 Aug 2018 17:13:28 +0000 (19:13 +0200)]
ARM: dts: socfpga: Flag timer clock as pre-reloc

Flag timer clock as DM pre-reloc, so that a timer driver can be used and
it can extract information about it's clock rate using the clock framework.
This patch also moves some of the pre-reloc flags into the core dtsi file,
this is because the timer is not board specific, but rather is used on all
boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agotimer: dw-apb: Add Designware APB timer driver
Marek Vasut [Sat, 18 Aug 2018 13:58:32 +0000 (15:58 +0200)]
timer: dw-apb: Add Designware APB timer driver

Add timer driver for the Designware APB Timer IP. This is present
for example on the Altera SoCFPGA chips.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Reorder Arria10 SPL
Marek Vasut [Sat, 18 Aug 2018 17:11:52 +0000 (19:11 +0200)]
ARM: socfpga: Reorder Arria10 SPL

The Arria10 SPL is a complete mess of calls to functions which are
called in the wrong context and it is surprise it works at all. This
patch tries to clean that mess up by shuffling the function calls
around and moving the calls into the correct context. Due to the
delicate nature of the reordering, this is done in one huge patch.

The following changes happen in this patch:
- Security policy init and NIC301 happens first in board_init_f()
- The clock init happens very early in board_init_f() in SPL only
- arch_early_init_r() only registers the FPGA, just like on Gen5
- arch_early_init_r() is never called from any _f() function
- Dedicated FPGA pins are inited in board_init_f() as on Gen5

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Fix mailbox urgent command with urgent register
Ley Foon Tan [Fri, 17 Aug 2018 08:22:03 +0000 (16:22 +0800)]
arm: socfpga: stratix10: Fix mailbox urgent command with urgent register

According to mailbox spec, software should send urgent command with
urgent register instead of COUT location. This patch write urgent
command index to urgent register.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>