Tom Rini [Tue, 9 May 2017 02:14:35 +0000 (22:14 -0400)]
m5253demo: Fix static variable in non-static inline function warning
The function 'spin_wheel' is declared as inline, but not static and thus
we see warnings that 'w' and 'p' are declared static in a non-static
inline function. Correct this by marking spin_wheel as static inline.
Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:34 +0000 (22:14 -0400)]
common: Only build cli_readline.o for CMDLINE on non-SPL
With gcc-6 and later we may get a warning such as:
.../common/cli_readline.c:20:21: warning: ‘tab_seq’ defined but not used [-Wunused-const-variable=]
static const char tab_seq[] = " "; /* used to expand TABs */
^~~~~~~
.../common/cli_readline.c:19:19: warning: ‘erase_seq’ defined but not used [-Wunused-const-variable=]
static const char erase_seq[] = "\b \b"; /* erase sequence */
^~~~~~~~~
Because in SPL we're normally not doing interactive commands anyhow, so
lets just not compile this at all in SPL. This also means that we need
to correct the logic (and comment) about what the drivers/ddr/fsl/ and
CONFIG_FSL_DDR_INTERACTIVE requires and this will be included in SPL
there.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:33 +0000 (22:14 -0400)]
net: uli526x: Fix unknown storage size error
The variable netdev_ethtool_ops is not referenced, drop it. However
with gcc-6 or later we fail to even compile as we do not have the
required struct definition in U-Boot.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:32 +0000 (22:14 -0400)]
net: phy: mv88e61xx: Fix uninitialized variable warning
The variable 'res' may be unused uninitialized if our call to
mv88e61xx_port_read (register read) fails and we goto the error
handling section. In this case we set 'res' to -EIO to indicate why we
failed.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chris Packham <judge.packham@gmail.com>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:31 +0000 (22:14 -0400)]
net: eepro100: Fix unused variable warning
The variable i82557_config_cmd is never referenced, drop.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:30 +0000 (22:14 -0400)]
video: ld9040: Fix unused variable warnings
The variables SEQ_SWRESET, SEQ_ELVSS_ON, SEQ_TEMP_SWIRE, SEQ_APON and
SEQ_SLPIN are unreferenced, drop.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:29 +0000 (22:14 -0400)]
colibri_imx7: Fix unused variable warning
The variable usdhc3_emmc_pads is never referenced, drop.
Cc: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:28 +0000 (22:14 -0400)]
apalis_imx6: Fix unused variable warning
The variable vga_pads is never referenced, drop.
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Tom Rini [Tue, 9 May 2017 02:14:27 +0000 (22:14 -0400)]
pcm058: Fix unused variable warnings
The variable nfc_pads is only referenced when CONFIG_CMD_NAND is set,
add a gaurd. The variable gpio_pads is never referenced, drop it. The
variable usdhc4_pads are only referenced when we do not have
CONFIG_CMD_NAND set and we are not doing an SPL build, modify the
existing guard.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tom Rini [Tue, 9 May 2017 02:14:26 +0000 (22:14 -0400)]
gdsys: P1022: Fix unused variable warnings
The variables prg_stage2_prepare, prg_stage2_success and prg_stage_fail
are only referenced when CCDM_SECOND_STAGE is set, move these to be by
the existing guard.
Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:25 +0000 (22:14 -0400)]
gw_ventana: Fix unused variable warnings
The variable nfc_pads is only referenced when CONFIG_CMD_NAND is set,
move the existing guard and drop a now redundant comment. The variable
gwproto_gpio_pads is never referenced, remove it.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:24 +0000 (22:14 -0400)]
mx6ul_14x14_evk: Fix unused variable warning
The variable usdhc1_pads is only referenced during SPL builds, add a guard.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tom Rini [Tue, 9 May 2017 02:14:23 +0000 (22:14 -0400)]
mx6slevk: Fix unused variable warning
The variable usdhc1_pads is only referenced during SPL builds, add a
guard.
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tom Rini [Tue, 9 May 2017 02:14:22 +0000 (22:14 -0400)]
cgtqmx6eval: Fix unused variable warning
The variable usdhc2_pads is only referenced during SPL builds, add a guard.
Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 May 2017 02:14:21 +0000 (22:14 -0400)]
ot1200: Fix unused variable warning
The variable pwm_pad is never referenced, drop.
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tom Rini [Tue, 9 May 2017 02:14:20 +0000 (22:14 -0400)]
rk3036: Fix unused variable warning
The variable grf is only referenced if EARLY_DEBUG is defined so move the
declaration to be under the existing guard.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 9 May 2017 02:14:19 +0000 (22:14 -0400)]
socrates: Fix a misleading indentation warning
With gcc-6 and later we see a warning about the fact that we have a
construct of "if (test);\n\tstatement". Upon reviewing the code, the
intention here is as the compiler suggests, we only want to execute the
indented statement if the test was true.
Cc: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
xypron.glpk@gmx.de [Mon, 8 May 2017 19:43:43 +0000 (21:43 +0200)]
common: env: remove superfluous assignment
The value assigned to variable 'value' is never used.
The problem was indicated by clang scan-build.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Jelle van der Waa [Mon, 8 May 2017 19:31:20 +0000 (21:31 +0200)]
tools: kwbimage fix build with OpenSSL 1.1.x
The rsa_st struct has been made opaque in 1.1.x, add forward compatible
code to access the n, e, d members of rsa_struct.
EVP_MD_CTX_cleanup has been removed in 1.1.x and EVP_MD_CTX_reset should be
called to reinitialise an already created structure.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Jelle van der Waa [Mon, 8 May 2017 19:31:19 +0000 (21:31 +0200)]
rsa: Fix build with OpenSSL 1.1.x
The rsa_st struct has been made opaque in 1.1.x, add forward compatible
code to access the n, e, d members of rsa_struct.
EVP_MD_CTX_cleanup has been removed in 1.1.x and EVP_MD_CTX_reset should be
called to reinitialise an already created structure.
xypron.glpk@gmx.de [Mon, 8 May 2017 19:24:28 +0000 (21:24 +0200)]
net/arp: remove superfluous assignments
The value of variable pkt is never used.
The problem was indicated by clang scan-build.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xypron.glpk@gmx.de [Mon, 8 May 2017 19:13:43 +0000 (21:13 +0200)]
lib/slre: remove superfluous assignment
The value assigned to saved_offset is never used.
The problem was indicated by clang scan-build.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xypron.glpk@gmx.de [Mon, 8 May 2017 18:40:16 +0000 (20:40 +0200)]
pci: avoid memory leak
strdup uses malloc to allocate memory for str.
If we cannot bind to the generic driver we should release
the memory.
The problem was indicated by clang scan-build.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
xypron.glpk@gmx.de [Mon, 8 May 2017 18:23:54 +0000 (20:23 +0200)]
env: avoid possible NULL pointer access
env_attr_lookup call env_attr_walk with
callback = regex_callback.
In env_attr_walk
attributes = strchr(entry_cpy, ENV_ATTR_SEP)
will return NULL if ENV_ATTR_SEP is not found.
In the aftermath regex_callback may call
strlen(attributes)
with a NULL value which will lead to a failure.
The problem was indicated by scan-clam.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xypron.glpk@gmx.de [Mon, 8 May 2017 17:30:58 +0000 (19:30 +0200)]
env: correct sign for error code
Error codes should be negative.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Lokesh Vutla [Fri, 5 May 2017 08:15:28 +0000 (13:45 +0530)]
arm: amx3xx: Add support for early debug
For early debug, the following configs needs to be enabled:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_OMAP=y
CONFIG_DEBUG_UART_BASE=0x44e09000
CONFIG_DEBUG_UART_CLOCK=
48000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Fri, 5 May 2017 08:15:27 +0000 (13:45 +0530)]
arm: omap5+: Add support for early debug
For early debug, the following configs needs to be enabled:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_OMAP=y
CONFIG_DEBUG_UART_CLOCK=
48000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
For DRA7xx:
CONFIG_DEBUG_UART_BASE=0x4806a000
For AM57xx:
CONFIG_DEBUG_UART_BASE=0x48020000
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Fri, 5 May 2017 07:29:10 +0000 (12:59 +0530)]
arm: am33xx: Add support for mulitiple PLL input frequencies
am335x supports various sysclk frequencies which can be determined
using sysboot pins. PLLs should be configures based on this
sysclk frequency. Add PLL configurations for all supported
frequencies.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Fri, 5 May 2017 07:29:09 +0000 (12:59 +0530)]
board: am335x: Introduce scale_vcores
Update voltages before programming plls.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 5 May 2017 07:29:08 +0000 (12:59 +0530)]
arm: am33xx: Fix MPU opp selection
Update MPU frequencies and voltages as per the latest
DM[1] dated: OCT 2011 Revised APRIL 2016, Section 5.4.
Below is the consolidated data:
MPU values for PG 2.0 and later(Package ZCZ and ZCE):
-------------------------------------------------------
| | ZCZ | ZCE |
|-------------------------------------------------------|
| | VDD[V] | ARM [MHz] | VDD[V] | ARM [MHz] |
|-------|----------|------------|----------|------------|
| NITRO | 1.325 | 1000 | NA | NA |
|-------|----------|------------|----------|------------|
| TURBO | 1.26 | 800 | NA | NA |
|-------|----------|------------|----------|------------|
|OPP120 | 1.20 | 720 | NA | NA |
|-------|----------|------------|----------|------------|
|OPP100 | 1.10 | 600 | 1.10 | 600 |
|-------|----------|------------|----------|------------|
| OPP50 | 0.95 | 300 | 0.95 | 300 |
-------------------------------------------------------
There is no eFuse blown on PG1.0 Silicons due to which there is
no way to detect the maximum frequencies supported. So default
to OPP100 for which both frequency and voltages are common on both
the packages.
[1] http://www.ti.com/lit/ds/symlink/am3356.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Fri, 5 May 2017 07:29:07 +0000 (12:59 +0530)]
configs: convert CONFIG_SYS_MPUCLK to Kconfig
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
B, Ravi [Thu, 4 May 2017 10:15:29 +0000 (15:45 +0530)]
common: dfu: ignore reset for spl-dfu
The SPL-DFU feature enable to load and
execute u-boot from RAM over usb from
PC using dfu-util.
Hence dfu-reset should not be issued
when dfu-util -R switch is issued.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
B, Ravi [Thu, 4 May 2017 10:15:28 +0000 (15:45 +0530)]
spl: Kconfig: dfu: spl-dfu depends on SPL_RAM_SUPPORT
Since SPL_DFU_SUPPORT is depends on SPL_RAM_SUPPORT,
hence select SPL_DFU_SUPPORT only when
SPL_RAM_SUPPORT is chosen.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vikas Manocha [Wed, 3 May 2017 23:38:57 +0000 (16:38 -0700)]
stm32f7: configure mpu valid for f7 family
This configuration should be valid for all F7 family devices in general.
Here is the regions info:
- Region0 : 4GB : cacheable & executable.
- Region1 : 512MB : text area : strogly ordered & executable.
- Region2 : 512MB : peripherals : device memory & non-executable.
- Region3 : 512MB : peripherals : device memory & non-executable.
- Region4 : 512MB : cortexM area: strongly ordered & non-executable.
Higher region number overrides the lower region configuration.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Vikas Manocha [Wed, 3 May 2017 23:38:56 +0000 (16:38 -0700)]
stm32: use armv7m MPU configuration support
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Vikas Manocha [Wed, 3 May 2017 23:38:55 +0000 (16:38 -0700)]
armv7m: add MPU configuration support
Cortex-M archs support option memory protection unit (MPU). MPU is used
to set the memory types, attributes, access permissions for different regions,
cache policies of the device.
e.g. using MPU it is possible to configure memory region as device memory
or strongly ordered, memory attributes like execute never, cache policies
like write-back or write-through.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Vikas Manocha [Wed, 3 May 2017 23:38:54 +0000 (16:38 -0700)]
armv7m: correct mpu region size define for 8MB size
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Vikas Manocha [Wed, 3 May 2017 22:48:26 +0000 (15:48 -0700)]
arvm7m: add cleanup before linux booting
Data cache memory needs to be disabled before handing over control to
linux kernel. This patch populates the cleanup_before_linux stub.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Vikas Manocha [Wed, 3 May 2017 22:48:25 +0000 (15:48 -0700)]
armv7m: cache: add flush & invalidate all dcache
Add functionality to flush & invalidate all the dcache using the
prototype declared in common header file.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Add dummy functions for the not-enabled case]
Signed-off-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 26 Apr 2017 08:07:10 +0000 (13:37 +0530)]
arm: am335x: Enable tiny printf in SPL
am335x_evm SPL is very close to its limit in SRAM space.
Switch to use tiny printf to reclaim some size.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 26 Apr 2017 08:07:09 +0000 (13:37 +0530)]
configs: am335x_evm: Enable SPL_DM
Enable SPL_DM on all AM335x based TI platforms.
http://patchwork.ozlabs.org/patch/751300/
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 26 Apr 2017 08:07:08 +0000 (13:37 +0530)]
am33xx: Provide platform data for mmc
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 26 Apr 2017 08:07:07 +0000 (13:37 +0530)]
configs: am335x_evm: Use omap2 generic spl load script
No reason to use a separate load script for am33xx than using
omap-common load script.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 26 Apr 2017 08:07:06 +0000 (13:37 +0530)]
dm: mmc: omap_hsmmc: Add pre-reloc flag to the driver
For platforms that don't use device tree in SPL the only
way to mark this driver as 'required by relocation' is
with the DM_FLAG_PRE_RELOC flag. Add this to ensure that
the driver is bound.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 26 Apr 2017 08:07:05 +0000 (13:37 +0530)]
dm: mmc: omap_hsmmc: Update to support of-platdata
This is to aid platforms that uses OF_PLATDATA.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 22 Apr 2017 10:27:25 +0000 (15:57 +0530)]
serial: omap: Support debug UART
Add debug UART functions to permit omap specific ns16550 to
provide an early debug UART. This is mostly in common with
DEBUG_UART_NS16550 except for Mode definition register which
is required for selecting UART mode(16x auto-baud or 13x mode).
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
James Balean [Wed, 19 Apr 2017 02:06:35 +0000 (21:06 -0500)]
Add 16-bit single register pin controller support
Enables the pinctrl-single driver to support 16-bit registers. Only
32-bit registers were supported previously. Reduced width registers are
required for some platforms, such as OMAP.
Signed-off-by: James Balean <james@balean.com.au>
Cc: Felix Brack <fb@ltec.ch>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Simon Glass <sjg@chromium.org>
B, Ravi [Tue, 18 Apr 2017 11:57:27 +0000 (17:27 +0530)]
boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot
In single stage bootmode or falcon boot mode, the SPL shall update the
device tree that we load with the normal fixups done via
arch_fixup_fdt(), when possible (ie we have enough information in this
restricted environment to be able to do that still). This will include
for example updating them memory nodes.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
[trini: Reword commit message]
B, Ravi [Tue, 18 Apr 2017 11:57:26 +0000 (17:27 +0530)]
spl: fdt: support for fdt fixup for falcon boot
Adding support for fdt fixup to update the
memory node in device tree for falcon boot.
This is needed for single stage or falcon
bootmode, to pass memory configuration to
kernel through DT memory node.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
B, Ravi [Tue, 18 Apr 2017 11:57:25 +0000 (17:27 +0530)]
qspi: dra7xx: enable qspi-boot for dra7x paltform
Enables qspi boot configuration for dra7xx platform.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Lokesh Vutla [Tue, 18 Apr 2017 11:57:24 +0000 (17:27 +0530)]
arch: arm: omap: Declare size of ddr very early
Declare the size of ddr very early in spl, so that this can be
used to enable cache.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Lokesh Vutla [Tue, 18 Apr 2017 11:57:23 +0000 (17:27 +0530)]
spl: reorder the assignment of board info to global data
Move the assignment of board info to global data a bit early which is
safe,
so that ram details can be used to enable caches.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Mon, 17 Apr 2017 15:45:13 +0000 (17:45 +0200)]
spl: Makefile: include /config in the (reduced) FDT used by the SPL stage
When OF control is enabled for the SPL stage, nodes are removed from
the DTB to reduce its size. While /chosen is kept, /config is removed.
There's no reason why /chosen should be kept over /config (and as we
would like to put properties into /config that control the SPL stage),
we add '/config' to the list of nodes to be retained for the SPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Mon, 17 Apr 2017 15:45:12 +0000 (17:45 +0200)]
doc: document /config/u-boot, spl-payload-offset property
This adds documentation on the u-boot,spl-payload-offset property
(which overrides CONFIG_SYS_SPI_U_BOOT_OFFS during the SPI loading in
the SPL stage, if present).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Mon, 17 Apr 2017 15:45:11 +0000 (17:45 +0200)]
spl: spi: override CONFIG_SYS_SPI_U_BOOT_OFFS via /config-property
For the RK3399-Q7, we need some flexibility (depending on the feature
set we include in the SPL stage and how large our SPI flash is) in
positioning the SPL payload (i.e. the FIT image containing U-Boot, ATF
and the M0 payload) in our SPI flash.
To avoid having to deal with this through different U-Boot images, we
introduce a the '/config/u-boot,spl-payload-offset' property node
allow it to override the default setting.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 5 Apr 2017 23:53:18 +0000 (17:53 -0600)]
arm: Support cache invalidate
At present there is not operation to invalidate a cache range. This seems
to be needed to fill out the cache operations. Add an implementation based
on the flush operation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Simon Glass [Wed, 5 Apr 2017 23:53:17 +0000 (17:53 -0600)]
arm: Correct signature for get_ticks()
This should be uint64_t to match its definition in common.h. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Alex Deymo [Sun, 2 Apr 2017 08:49:50 +0000 (01:49 -0700)]
disk: Return the partition number in part_get_info_by_name()
Similar to what blk_get_device_part_str() does, this patch makes
part_get_info_by_name() return the partition number in case of a match.
This is useful when the partition number is needed and not just the
descriptor.
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alex Deymo [Sun, 2 Apr 2017 08:49:47 +0000 (01:49 -0700)]
image: Update include/android_image.h
Update the Android image header format to the latest version published
in AOSP. The original code moved to a new repository, so this patch also
updates the reference to that path.
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
nicolas.le.bayon@st.com [Tue, 9 May 2017 15:58:36 +0000 (15:58 +0000)]
usb: gadget: avoid variable name clipping in cb_getvar
Hi,
A kind reminder to look at this patch (already reviewed by Marek and acked by Lukasz), and if possible to put it in the next pull list, or the one after is timing is too short.
Thanks in advance for your time
Best Regards
Nicolas
-----Original Message-----
From: Nicolas LE BAYON
Sent: mardi 25 avril 2017 10:18
To: Nicolas LE BAYON <nicolas.le.bayon@st.com>; u-boot@lists.denx.de; lukma@denx.de; marex@denx.de
Cc: nlebayon@gmail.com; Patrice CHOTARD <patrice.chotard@st.com>; Jean-philippe ROMAIN <jean-philippe.romain@st.com>
Subject: [U-Boot][PATCH v7] usb: gadget: avoid variable name clipping in cb_getvar
From: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Instead of using a fixed-size array to store variable name, preferring a dynamic allocation treats correctly all variable name lengths.
Variable names are growing through releases and features. By this way, name clipping is prevented.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Tom Rini [Wed, 10 May 2017 21:40:11 +0000 (17:40 -0400)]
Merge git://git.denx.de/u-boot-rockchip
This adds a new firefly-rk3399 board, MIPI support for rk3399 and
rk3288, rk818 pmic support, mkimage improvements for rockchip and a few
other things.
Tom Rini [Wed, 10 May 2017 19:50:21 +0000 (15:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Eric Gao [Tue, 2 May 2017 10:32:45 +0000 (18:32 +0800)]
rockchip: dts: evb_rk3288: Add mipi display support
Add mipi dsi configuration for evb-rk3288 device tree.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:32:43 +0000 (18:32 +0800)]
rockchip: rk3288: grf: Add grf define for mipi dsi
Add grf register define for rk3288 mipi dsi
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:23:57 +0000 (18:23 +0800)]
rockchip: defconfigs: Add mipi dsi support for rk3399 evb board
Add mipi dsi configs for rk3399 evb board
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:23:56 +0000 (18:23 +0800)]
rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Eric Gao [Tue, 2 May 2017 10:23:55 +0000 (18:23 +0800)]
rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight
Enable pwm0 for display of rk3399 evb board. The PWM do not have decicated
interrupt number in dts and can not get periph_id by pinctrl framework. So
init them here.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:23:54 +0000 (18:23 +0800)]
rockchip: video: vop: Reserve enough space for mipi dispaly
plat->size here is used to reserve frame buffer space befor relocation.
our mipi panel use 24 bitwidth, and vop require 32bit align. So the frame
buffer size should be at least 1920*1200*32/8.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:23:53 +0000 (18:23 +0800)]
rockchip: video: vop: Set different bitwidth for different display mode
Because the bitwidth is different for different display mode, so we need
to set them according to demand.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:23:52 +0000 (18:23 +0800)]
rockchip: video: vop: Add mipi display mode for rk3399
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:23:51 +0000 (18:23 +0800)]
rockchip: video: vop: Fix rk_display_init() return error
It's caused by the difference of clk_set_rate function implement between
rk3288 andd rk3399.
clk_set_rate() of rk3288 return 0 in normal condition.
clk_set_rate() of rk3399 return input parameter in normal condition.
So check clk_set_rate's return value by IS_ERR_VALUE.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Eric Gao [Tue, 2 May 2017 10:23:50 +0000 (18:23 +0800)]
rockchip: video: Add mipi driver support for rockchip soc
Add basic driver for mipi display on rockchip soc platform.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Eric Gao [Tue, 2 May 2017 10:23:49 +0000 (18:23 +0800)]
rockchip: include: grf: Add GRF register declaration for mipi dsi
Add GRF register declaration for mipi dsi.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jacob Chen [Tue, 2 May 2017 06:54:52 +0000 (14:54 +0800)]
power: rk808: rename to rk8xx
Since this driver can be used for rk8xx series pmic,
let's rename rk808 to rk8xx, to make it clear.
Configs parts are done by sed -i "s/RK808/RK8XX/g" `grep RK808 -lr ./`
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Jacob Chen [Tue, 2 May 2017 06:54:51 +0000 (14:54 +0800)]
power: regulator: rk808: add rk818 support
Add support for the rk818 regulator. The regulator module consists
of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
power OTG and HDMI5V.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jacob Chen [Tue, 2 May 2017 06:54:50 +0000 (14:54 +0800)]
power: regulator: rk808: replace vsel_bits with vsel_mask
Using mask is more flexible than bits.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jacob Chen [Tue, 2 May 2017 06:54:49 +0000 (14:54 +0800)]
power: pmic: rk808: add RK818 support
The RK818 chip is a Power Management IC (PMIC) for multimedia and handheld
devices.
For boards use rk818, the input current should be set in the early stage, before
ddr initialization.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Jacob Chen [Tue, 2 May 2017 06:54:48 +0000 (14:54 +0800)]
power: pmic: append rk818 regs to rk808
Both RK808 and RK818 chips are using a similar register map,
so we can reuse them.
I have also add reg prefix to exist registers, to keep them same style.
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Sat, 22 Apr 2017 08:57:54 +0000 (08:57 +0000)]
rockchip: tinker: set ethaddr in late init
Set ethernet mac address in late init for Tinker Board,
prevents getting a random mac address each boot.
Read mac address from eeprom, first 6 bytes from m24c08@50.
Same as /etc/init.d/rockchip.sh on Tinker OS.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Sat, 22 Apr 2017 08:57:41 +0000 (08:57 +0000)]
i2c_eeprom: add read and write functions
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Apr 2017 16:33:58 +0000 (18:33 +0200)]
rockchip: pinctrl: rk3399: add support for the HDMI I2C pins
To add HDMI support for the RK3399, this commit provides the needed
pinctrl functionality to configure the HDMI I2C pins (used for reading
the screen's EDID).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Apr 2017 16:33:57 +0000 (18:33 +0200)]
rockchip: clk: rk3399: allow requests for HDMI clocks
This allows requests (via the DTS) for PCLK_HDMI_CTRL/PCLK_VIO_GRF,
which are clock gates in the HDMI output path for the RK3399.
As these are enabled by default (i.e. after reset), we don't implement
any logic to actively open/close these clock gates and simply assume
that their reset-default has not been changed.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Apr 2017 15:31:44 +0000 (17:31 +0200)]
rockchip: ARM64: puma-rk3399: get DRAM size from DMC init
With the RK3399 DRAM controller (DMC) driver providing all the
infrastructure, retrieve the DRAM size from the DMC init in the
board-specific code (instead of hard-coding) for the RK3399-Q7 (Puma).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Apr 2017 15:11:55 +0000 (17:11 +0200)]
rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS
The (non-secure) efuse node in the DTS requests PCLK_EFUSE1024NS.
To allow us to add a efuse-driver (and more importantly, to allow
probes of such a driver to succeed), we need need to accept requests
for PCLK_EFUSE1024NS and return a non-error result.
As PCLK_EFUSE1024NS is enabled by default (i.e. after reset), we don't
implement any logic to manage this clock gate and simply assume that
the reset-default has not been changed.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Mon, 24 Apr 2017 03:58:30 +0000 (11:58 +0800)]
rockchip: add defconfig for firefly-rk3399
The file is from evb-rk3399_defconfig with changes:
- use rk3399-firefly dtb
- re-order by make savedefconfig
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Mon, 24 Apr 2017 02:27:52 +0000 (10:27 +0800)]
dm: sandbox: pwm: add test for pwm_set_invert()
Add test case for new interface set_invert().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix typo in subject and build error in sandbox_pwm_set_invert():
Signed-off-by: Simon Glass <sjg@chromium.org>
Kever Yang [Mon, 24 Apr 2017 02:27:51 +0000 (10:27 +0800)]
doc: dtbinding: add pwm binding file
This is a copy from kernel.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Mon, 24 Apr 2017 02:27:50 +0000 (10:27 +0800)]
rockchip: pwm: implement pwm_set_invert()
Rockchip pwm need to init polarity, implement pwm_set_invert()
to do it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Mon, 24 Apr 2017 02:27:49 +0000 (10:27 +0800)]
power: regulator: pwm: support pwm polarity setting
The latest kernel PWM drivers enable the polarity settings. When system
run from U-Boot to kerenl, if there are differences in polarity set or
duty cycle, the PMW will re-init:
close -> set polarity and duty cycle -> enable the PWM.
The power supply controled by pwm regulator may have voltage shaking,
which lead to the system not stable.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 19 Apr 2017 10:17:32 +0000 (18:17 +0800)]
rockchip: dts: add rk3399-firefly dts
Firefly-rk3399 is a bord from T-Firefly, you can find detail about
it here:
http://en.t-firefly.com/en/firenow/Firefly_RK3399/
This patch add basic node for the board and make it able to bring
up.
Peripheral/interfaces on board:
- usb hub which connect to ehci controller;
- UART2 debug
- eMMC
- PCIe
- USB 3.0 HOST, type-C port
- sdio, sd-card
- HDMI
- Ethernet
- OPTICAL
- WiFi/BT
- MIPI CSI/DSI
- IR
- EDP/DP
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 19 Apr 2017 10:17:31 +0000 (18:17 +0800)]
rockchip: dts: rk3399: sync with kernel dts
The kernel dts has update a lot since the first time we commit rk3399.dtsi,
sync with kernel for further development.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 23 Apr 2017 00:42:22 +0000 (18:42 -0600)]
dtoc: Handle nodes with phandles that depend on the same
At present dtoc assumes that nodes which are phandles do not themselves
reference other phandle nodes. Unfortunately this is not necessarilly
true. As a result we can currently output C code which does not compile
because a node declaration can be referenced before it is declared.
Adjust the code to explicitly output all phandle nodes needed by node
before the node itself is output.
This fixes building with the latest rk3399-firefly.dts from Linux, which
has reordered the nodes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Sun, 23 Apr 2017 00:42:21 +0000 (18:42 -0600)]
dtoc: Move the output code into its own function
The code to generate the tables is quite long. Move the node-output code
into its own function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Philipp Tomsich [Tue, 25 Apr 2017 07:52:07 +0000 (09:52 +0200)]
rockchip: mmc: handle deprecation of 'clock-freq-min-max'
The 'clock-freq-min-max' property was deprecated in the upstream
(i.e. Linux) DTS bindings in favor of the 'max-frequency' property.
With the latest RK3399 DTSI does no longer include the deprecated
property and the rockchip_dw_mmc driver requiring it to be present,
the driver doesn't bind to the node in the RK3399 DTSI any longer
(thus breaking access to the SD card on the RK3399-Q7 board).
To fix this, we implement a similar logic as in the Linux driver: if
the deprecated property is present, we issue a warning (if DEBUG is
enabled); if it is missing, we require 'max-frequency' to be set and
use it to create a min/max value-pair.
See https://github.com/torvalds/linux/commit/
b023030f10573de738bbe8df63d43acab64c9f7b
for the deprecation/matching change in Linux.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 25 Apr 2017 07:52:06 +0000 (09:52 +0200)]
rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTS
The clocking of the designware MMC controller in the upstream
(i.e. Linux) RK3399 has changed/does not match what the current DTS in
U-Boot uses: the first clock entry now is HCLK_SDMMC instead of
SCLK_SDMMC.
With the simple clock driver used for the RK3399, this needs a change
in the selector understood by the various case statements in the driver
to ensure that the driver still loads successfully.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 20 Apr 2017 09:03:46 +0000 (17:03 +0800)]
rockchip: reserve memory for rk3399 ATF data
There are 3 regions used by rk3399 ATF:
- bl31 code, located at 0x10000;
- cortex-m0 code and data, located at 0xff8c0000;
- bl31 data, located at 0xff8c1000 ~ 0xff8c4000;
SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory
for ATF data, or else there will be memory corrupt after SPL
loads the ATF image.
More detail about cortex-M0 code in ATF:
https://github.com/ARM-software/arm-trusted-firmware/commit/
8382e17c4c6bffd15119dfce1ee4372e3c1a7890
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 20 Apr 2017 08:15:34 +0000 (16:15 +0800)]
rockchip: pinctrl: rk3399: add gmac io strength support
GMAC controller need to init the tx io driver strength to 13mA,
just like the description in dts pinctrl node, or else the controller
may only work in 100MHz Mode, and fail to work at 1000MHz mode.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com <mailto:philipp.tomsich@theobroma-systems.com>>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Mon, 1 May 2017 22:16:01 +0000 (16:16 -0600)]
rockchip: dts: evb-rk3399: add gmac support
Enable gmac for evb-rk3399.
Change-Id: I85e35667e08e22e38577e63eb0e65731fc9c69b6
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Wed, 19 Apr 2017 08:01:14 +0000 (16:01 +0800)]
rockchip: rk3399: use actual dram size
Since our sdram driver is ready, we can use the actual size
instead of hard code.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Eddie Cai [Tue, 18 Apr 2017 11:17:27 +0000 (19:17 +0800)]
rockchip: enable debug uart
enable debug uart for rk3288 and print something to let people know
where we are
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>