Simon Glass [Tue, 14 Oct 2014 05:41:50 +0000 (23:41 -0600)]
dm: core: Allow parents to pass data to children during probe
Buses sometimes want to pass data to their children when they are probed.
For example, a SPI bus may want to tell the slave device about the chip
select it is connected to.
Add a new function to permit the parent data to be supplied to the child.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:49 +0000 (23:41 -0600)]
dm: core: Add functions for iterating through device children
Buses need to iterate through their children in some situations. Add a few
functions to make this easy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Tue, 14 Oct 2014 05:41:48 +0000 (23:41 -0600)]
sandbox: dts: Add a SPI device and cros_ec device
Add a SPI device which can be used for testing SPI flash features in
sandbox.
Also add a cros_ec device since with driver model the Chrome OS EC
emulation will not otherwise be available.
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 22:36:17 +0000 (16:36 -0600)]
dm: exynos: Move serial to driver model
Change the Exynos serial driver to work with driver model and switch over
all relevant boards to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 22:36:16 +0000 (16:36 -0600)]
dm: exynos: Mark exynos5 console as pre-reloc
We will need the console before relocation, so mark it that way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:40 +0000 (19:48 -0600)]
dm: exynos: gpio: Convert to driver model
Convert the exynos GPIO driver to driver model. This implements the generic
GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:39 +0000 (19:48 -0600)]
dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.
(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:38 +0000 (19:48 -0600)]
dm: exynos: Tidy up GPIO defines
The defines at the top of the GPIO driver use single-character names for
parameters which are not very descriptive.
Improve these to use descriptive parameter names.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:37 +0000 (19:48 -0600)]
dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:36 +0000 (19:48 -0600)]
dm: exynos: Move s5p_goni to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for s5p_goni.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:35 +0000 (19:48 -0600)]
dm: exynos: Move smdkc100 to generic board
The generic board deadline is approaching, and we need this feature to
enable driver model. Enable CONFIG_SYS_GENERIC_BOARD for smdkc100.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:34 +0000 (19:48 -0600)]
dm: exynos: Add pinctrl settings for s5p_goni
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:33 +0000 (19:48 -0600)]
dm: exynos: Add pinctrl settings for smdkc100
These describe the GPIOs in enough detail for U-Boot's GPIO driver to
operate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:32 +0000 (19:48 -0600)]
dm: exynos: dts: Adjust device tree files for U-Boot
The pinctrl bindings used by Linux are an incomplete description of the
hardware. It is possible in most cases to determine the register address
of each, but not in all cases. By adding an additional property we can
fix this, and avoid adding a table to U-Boot for every single Exynos
SOC.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:31 +0000 (19:48 -0600)]
dm: exynos: dts: Remove unused pinctrl information to save space
We don't include the pinctrl functions for U-Boot as they use up quite
a bit of space and are not used.
We could instead perhaps eliminate this material with fdtgrep, but so far
this tool has not made it to upstream.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:30 +0000 (19:48 -0600)]
dm: exynos: Bring in pinctrl dts files from Linux kernel
Bring in required device tree files for pinctrl from Linux v3.14. These
are initially unchanged and have a number of pieces not needed by U-Boot.
Note that exynos5420 is renamed to exynos54xx here since we want to
support exynos5422 also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 21 Oct 2014 01:48:29 +0000 (19:48 -0600)]
dm: exynos: dts: Convert /include/ to #include
We should be consistent about this. The kernel has moved to #include
which breaks error reporting to some extent but does allow us to include
binding files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Robert Baldyga [Mon, 6 Oct 2014 12:33:11 +0000 (14:33 +0200)]
arm: goni: add i2c_init_board()
Add proper initialization of GPIO pins used by software i2c.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:51:31 +0000 (14:51 +0900)]
dm: add of_match_ptr() macro
The driver model supports two ways for passing device parameters;
Device Tree and platform_data (board file).
Each driver should generally support both of them because some
popular IPs are used on various platforms.
Assume the following scenario:
- The driver Foo is used on SoC Bar and SoC Baz
- The SoC Bar uses Device Tree control (CONFIG_OF_CONTROL=y)
- The SoC Baz does not support Device Tree; uses a board file
In this situation, the device driver Foo should work with/without
the device tree control. The driver should have .of_match and
.ofdata_to_platdata members for SoC Bar, while they are meaningless
for SoC Baz; therefore those device-tree control code should go
inside #ifdef CONFIG_OF_CONTROL.
The driver code will be like this:
#ifdef CONFIG_OF_CONTROL
static const struct udevice_id foo_of_match = {
{ .compatible = "foo_driver" },
{},
}
static int foo_ofdata_to_platdata(struct udevice *dev)
{
...
}
#endif
U_BOOT_DRIVER(foo_driver) = {
...
.of_match = of_match_ptr(foo_of_match),
.ofdata_to_platdata = of_match_ptr(foo_ofdata_to_platdata),
...
}
This idea has been borrowed from Linux.
(In Linux, this macro is defined in include/linux/of.h)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:49:38 +0000 (14:49 +0900)]
dm: fix include guard
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:49:13 +0000 (14:49 +0900)]
dm: include <linker_lists.h> from platdata.h and uclass.h
The header files include/dm/platdata.h and include/dm/uclass.h
use ll_entry_declare(); therefore they depend on
include/linker_lists.h.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 7 Oct 2014 05:48:22 +0000 (14:48 +0900)]
linker_lists: include <linux/compiler.h>
The header file include/linker_lists.h uses __aligned();
therefore it depends on include/linux/compiler.h
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Sun, 28 Sep 2014 13:52:27 +0000 (22:52 +0900)]
dm: simplify the loop in lists_driver_lookup_name()
if (strncmp(name, entry->name, len))
continue;
/* Full match */
if (len == strlen(entry->name))
return entry;
is equivalent to:
if (!strcmp(name, entry->name))
return entry;
The latter is simpler.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Masahiro Yamada [Sun, 28 Sep 2014 13:52:25 +0000 (22:52 +0900)]
dm: do not check the existence of uclass operation
The function uclass_add() checks uc_drv->ops as follows:
if (uc_drv->ops) {
dm_warn("No ops for uclass id %d\n", id);
return -EINVAL;
}
It seems odd because it warns "No ops" when uc_drv->ops has
non-NULL pointer. (Looks opposite.)
Anyway, most of UCLASS_DRIVER entries have no .ops member.
This check makes no sense.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Sun, 28 Sep 2014 13:52:24 +0000 (22:52 +0900)]
dm: fix comments
The struct udevice stands for a device, not a driver.
The driver_info.name is a driver's name, which is referenced
to bind devices.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 20 Oct 2014 22:17:26 +0000 (18:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Ruchika Gupta [Tue, 7 Oct 2014 10:18:47 +0000 (15:48 +0530)]
ls102x: Add support for secure boot and enable blob command
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 7 Oct 2014 10:18:46 +0000 (15:48 +0530)]
mpc85xx: configs - Enable blob command in freescale platforms
Enable blob commands for platforms having SEC 4.0 or greater
for secure boot scenarios
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 7 Oct 2014 10:16:20 +0000 (15:46 +0530)]
crypto/fsl: Add command for encapsulating/decapsulating blobs
Freescale's SEC block has built-in Blob Protocol which provides
a method for protecting user-defined data across system power
cycles. SEC block protects data in a data structure called a Blob,
which provides both confidentiality and integrity protection.
Encapsulating data as a blob
Each time that the Blob Protocol is used to protect data, a
different randomly generated key is used to encrypt the data.
This random key is itself encrypted using a key which is derived
from SoC's non volatile secret key and a 16 bit Key identifier.
The resulting encrypted key along with encrypted data is called a blob.
The non volatile secure key is available for use only during secure boot.
During decapsulation, the reverse process is performed to get back
the original data.
Commands added
--------------
blob enc - encapsulating data as a cryptgraphic blob
blob dec - decapsulating cryptgraphic blob to get the data
Commands Syntax
---------------
blob enc src dst len km
Encapsulate and create blob of data $len bytes long
at address $src and store the result at address $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.
blob dec src dst len km
Decapsulate the blob of data at address $src and
store result of $len byte at addr $dst.
$km is the 16 byte key modifier is also required for
generation/use as key for cryptographic operation. Key
modifier should be 16 byte long.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Mon, 29 Sep 2014 06:05:33 +0000 (11:35 +0530)]
powerpc/mpc85xx: SECURE BOOT - Bypass PAMU in case of secure boot
By default, PAMU's (IOMMU) are enabled in case of secure boot.
Disable/bypass them once the control reaches the bootloader.
For non-secure boot, PAMU's are already bypassed in the default
SoC configuration.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:09:06 +0000 (11:39 +0530)]
ls102x: configs - Add hash command in freescale LS1 platforms
Hardware accelerated support for SHA-1 and SHA-256 has been added.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:05:31 +0000 (11:35 +0530)]
mpc85xx: configs - Add hash command in freescale platforms
Enable CAAM in platforms supporting the hardware block.
Hash command enabled along with hardware accelerated support for
SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Wed, 15 Oct 2014 06:05:30 +0000 (11:35 +0530)]
fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 9 Sep 2014 06:20:31 +0000 (11:50 +0530)]
fsl_sec : Change accessor function to take care of endianness
SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.
So update acessor functions with common SEC acessor functions to take care
both type of endianness.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Tue, 9 Sep 2014 06:20:30 +0000 (11:50 +0530)]
fsl_sec : Move SEC CCSR definition to common include
Freescale SEC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
SEC to common include
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ruchika Gupta [Mon, 29 Sep 2014 05:44:35 +0000 (11:14 +0530)]
powerpc/P1010RDB:Update RESET_VECTOR_ADDRESS for 768KB u-boot size
U-boot binary size has been increased from 512KB to 768KB.
So update CONFIG_RESET_VECTOR_ADDRESS to reflect the same for
P1010 SPI Flash Secure boot target.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
[York Sun: Modified subject to P1010RDB]
Reviewed-by: York Sun <yorksun@freescale.com>
Jeroen Hofstee [Tue, 14 Oct 2014 18:37:15 +0000 (20:37 +0200)]
video: ipu_disp: remove pixclk fixup
The ipu display insists on having a lower_margin smaller
then 2. If this is not the case it will attempt to force
it and adjust the pixclk accordingly. This multiplies pixclk
in Hz with the width and height, since this is typically
a * 10^7 * b * 10^2 * c * 10^2 this will overflow the
uint_32 and make things even worse. Since this is a
bootloader and the adjustment is neglectible, just force
it to two and warn about it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Jeroen Hofstee [Tue, 14 Oct 2014 18:37:14 +0000 (20:37 +0200)]
video: ipu: fix debug and comment
- fix debug pixel clk display and add unit
- fix some comments
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Simon Glass [Wed, 15 Oct 2014 10:53:04 +0000 (04:53 -0600)]
lcd: Fix build error with CONFIG_LCD_BMP_RLE8
Add a block to avoid a build error with the variable declaration.
Enable the option on sandbox to prevent an error being introduced in
future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 14 Oct 2014 08:47:15 +0000 (04:47 -0400)]
Prepare v2014.10
Signed-off-by: Tom Rini <trini@ti.com>
Hans de Goede [Mon, 13 Oct 2014 12:51:40 +0000 (14:51 +0200)]
sunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step
Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.
This commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tom Rini [Mon, 13 Oct 2014 12:38:55 +0000 (08:38 -0400)]
Makefile: drop "tools-only" from no-dot-config-targets
With the introduction of CONFIG_LOCALVERSION support we cannot build
tools without having a config file (as we won't know our PLAIN_VERSION
until then).
Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Sat, 11 Oct 2014 00:59:28 +0000 (20:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
Albert ARIBAUD [Fri, 10 Oct 2014 23:20:55 +0000 (01:20 +0200)]
Merge branch 'u-boot-socfpga/topic/arm/socfpga-
20141010' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 10 Oct 2014 23:20:30 +0000 (01:20 +0200)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Marek Vasut [Thu, 9 Oct 2014 23:50:23 +0000 (01:50 +0200)]
arm: socfpga: Use EMAC1 on SoCDK
The SoCDK uses EMAC1, not EMAC0. This patch fixes the issue.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Pavel Machek [Thu, 9 Oct 2014 23:50:22 +0000 (01:50 +0200)]
arm: socfpga: add MAINTAINERS entry
Add MAINTAINERS entry.
Signed-off-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Jeroen Hofstee [Tue, 7 Oct 2014 20:42:27 +0000 (22:42 +0200)]
tools: compiler.h: Fix build on FreeBSD
Commit 832472 "tools: socfpga: Add socfpga preloader signing
to mkimage" added tools/socfpga.c which relies on htole32,
le32toh and friends. While compiler.h includes these protypes
for linux from endian.h, it doesn't do so for FreeBSD. Hence
include <sys/endian.h> for FreeBSD.
Cc: Marek Vasut <marex@denx.de>
CC: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Heiko Schocher [Wed, 1 Oct 2014 05:26:06 +0000 (07:26 +0200)]
arm, at91: add generic board support for the taurus and corvus board
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Wed, 24 Sep 2014 07:35:53 +0000 (15:35 +0800)]
ARM: atmel: switch at91sam9263ek to generic board
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Thu, 18 Sep 2014 21:46:49 +0000 (23:46 +0200)]
sama5d3xek: run PHY's config
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Andreas Bießmann [Thu, 18 Sep 2014 21:46:48 +0000 (23:46 +0200)]
macb: simplify gmac initialisation
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Hans de Goede [Fri, 10 Oct 2014 16:30:17 +0000 (18:30 +0200)]
serial-uclass: Fix compilation error
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Khoronzhuk, Ivan [Thu, 9 Oct 2014 19:21:14 +0000 (22:21 +0300)]
ks2_evm: readme: align according to actual sources
Update readme file for Keystone II EVM boards to actual sources.
Also correct some typos. For now the Edison evaluation board is
added, README for K2E is mostly the same, so update README to
contain information also for K2E evm. Rename file to README as
it contains information for all keystone evm boards.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Murali Karicheri [Thu, 9 Oct 2014 19:20:36 +0000 (22:20 +0300)]
configs:ks2_evm: update defconfigs to support SPL
The K2HK and K2E boards support SPL by default, so add
CONFIG_SPL option. Also export CONFIG_ARM, CONFIG_ARCH_KEYSTONE
and TARGET_K2*_EVM options to spl/.config as they are the same.
So now it's convinient to build gph images using only two commands:
make k2hk_evm_defconfig
make u-boot-spi.gph
Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Tom Rini [Fri, 10 Oct 2014 13:45:16 +0000 (09:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
Tom Rini [Fri, 3 Oct 2014 19:57:00 +0000 (15:57 -0400)]
am335x_evm: Correct BOOTCOUNT driver support
We need to set the 'BE' flag here for things to work right.
Signed-off-by: Tom Rini <trini@ti.com>
Valentin Longchamp [Fri, 3 Oct 2014 09:16:19 +0000 (11:16 +0200)]
common/board_r: remove warning in initr_mem for 64-bit phys_size_t
Since on powerpc phys_size_t can be unsigned long long, this printout
line can result in a not nice compile warning.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Acked-by: Simon Glass <sjg@chromium.org>
Hannes Petermaier [Fri, 3 Oct 2014 05:30:15 +0000 (07:30 +0200)]
board/BuR: fix pinmux for MII Ethernet Interface
The lines COL (collision detect) and CRS (carrier sense) needs to be connected
and muxed to the CPSW MAC for a proper function in half-duplex Mode of the
interface.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: Tom Rini <trini@ti.com>
York Sun [Wed, 1 Oct 2014 15:44:55 +0000 (08:44 -0700)]
scripts/multiconfig.sh: Fix a typo
Fix the spelling of "configs".
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Jeroen Hofstee [Wed, 1 Oct 2014 15:22:58 +0000 (17:22 +0200)]
multiconfig.sh: replace GNU sed specific match
A SPL/TPL enabled target would was not recognized as
such by BSD sed, since it relies on a GNU extension.
Instead of or-ing just spell out both matches.
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 11:53:28 +0000 (13:53 +0200)]
VCMA9: remove EXT2 support
remove the seldomly used EXT2 support because the U-Boot binary will
not fit into the 512KiB flash otherwise.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 11:23:54 +0000 (13:23 +0200)]
PATI: fix broken SPI access
fix broken SPI access by adding/activating BOARD_EARLY_INIT_F
functionality and calling spi_init_f() from there.
Signed-off-by: David Müller <d.mueller@elsoft.ch>
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:23 +0000 (12:32 +0200)]
PATI: convert to generic board
Signed-off-by: David Müller <d.mueller@elsoft.ch>
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:22 +0000 (12:32 +0200)]
VCMA9: convert to generic board
Signed-off-by: David Müller <d.mueller@elsoft.ch>
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:21 +0000 (12:32 +0200)]
MIP405: convert to generic board
Signed-off-by: David Müller <d.mueller@elsoft.ch>
David Müller (ELSOFT AG) [Tue, 30 Sep 2014 10:32:20 +0000 (12:32 +0200)]
PIP405: convert to generic board
Signed-off-by: David Müller <d.mueller@elsoft.ch>
Wolfgang Denk [Tue, 30 Sep 2014 08:44:01 +0000 (10:44 +0200)]
SPDX License cleanup for LiMon imported files
A number of network related files were imported from the LiMon
project; these contain a somewhat unclear license statement:
Copyright 1994 - 2000 Neil Russell.
(See License)
I analyzed the source code of LiMon v1.4.2 which was used for this
import. It does not contain any "License" file, but the top level
directory contains a file "COPYING", which turns out to be GPL v2
of June 1991. So it is legitimate to conclude that the LiMon derived
files are also to be released under GPLv2. Mark them as such.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Alexander Kochetkov [Mon, 29 Sep 2014 17:46:48 +0000 (21:46 +0400)]
beagleboard: Remove side effects of i2c2 pullup resisters initialization code
Fix typo of commit
d4e53f063dd25e071444b87303573e7440deeb89.
i2c2 pullup resisters are controlled by bit 0 of CONTROL_PROG_IO1.
It's value after reset is 0x00100001.
In order to clear bit 0, original code write 0xfffffffe to
CONTROL_PROG_IO1 and toggle almost all default values.
Original code affect following:
* disable i2c1 pullup resisters
* increase far end load setting for many modules
* setup invalid SC/LB combination
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
CC: Tom Rini <trini@ti.com>
CC: Steve Kipisz <s-kipisz2@ti.com>
Masahiro Yamada [Sun, 28 Sep 2014 16:38:01 +0000 (01:38 +0900)]
powerpc: mpc5xxx: remove board support for MVBC_P and MVSMR
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Sun, 28 Sep 2014 16:38:00 +0000 (01:38 +0900)]
powerpc: mpc83xx: remove board support for MERGERBOX and MVBLM7
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Sun, 28 Sep 2014 16:37:59 +0000 (01:37 +0900)]
powerpc: ppc4xx: remove board support for bluestone
This board has been orphaned for more than 6 months.
It is the last board defining CONFIG_APM821XX.
The code inside #ifdef CONFIG_APM821XX should be removed too.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Sun, 28 Sep 2014 16:37:58 +0000 (01:37 +0900)]
powerpc: ppc4xx: remove board support for CRAYL1
This board has been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Sun, 28 Sep 2014 16:37:57 +0000 (01:37 +0900)]
powerpc: ppc4xx: remove board support for KAREF and METROBOX
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Fri, 26 Sep 2014 09:42:36 +0000 (18:42 +0900)]
kconfig: fix another bug of "make savedefconfig"
In some cases, the last lines of SPL or TPL are not output to a file.
The entries remaining in the "unmatched" variable must be flushed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Khoronzhuk, Ivan [Tue, 23 Sep 2014 18:10:26 +0000 (21:10 +0300)]
ARM: keystone: clock: fix main pll ratio div definitions
The definitions for div ratio supposed to be in hex and were added
in dec by mistake.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Roger Quadros [Tue, 23 Sep 2014 15:07:04 +0000 (18:07 +0300)]
common: spl_sata: perform SCSI scan before getting device
At least on OMAP, init_sata() no longer performs scsi_scan()
so we must do it explicitly here.
Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Tue, 23 Sep 2014 15:07:03 +0000 (18:07 +0300)]
ARM: OMAP5+: sata: Move scsi_scan() to the right place
scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Tue, 23 Sep 2014 15:07:02 +0000 (18:07 +0300)]
OMAP5+: sata/scsi: Implement scsi_init()
On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().
Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Tue, 23 Sep 2014 15:07:01 +0000 (18:07 +0300)]
ahci: Don't start command DMA engine before buffers are set
The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)
This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x260/0x358()
44000000.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in User mode during Functional access
Signed-off-by: Roger Quadros <rogerq@ti.com>
Stefan Herbrechtsmeier [Tue, 16 Sep 2014 15:51:05 +0000 (17:51 +0200)]
omap3: overo: Fix fdtfile test
Commit
12cc54376768461533b55ada1b0b6d4979f40579 'omap3: overo: Select
fdtfile for expansion board' wrongly missed the operator in the fdtfile
test. Update the test to only overwrite an empty fdtfile environment
variable.
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
York Sun [Thu, 2 Oct 2014 22:20:10 +0000 (15:20 -0700)]
common/board_r: Fix booting issue on T4240QDS
Commit
294b91a5817147d4b7f47be2ac69bac2a1f26491 moved initr_malloc
earlier than initr_unlock_ram_in_cache. This causes issue on T4240.
It may be related to locked L1 d-cache and unlocked L2 cache. D-
cache could and should be unlock earlier for normal operation.
This patch moves initr_unlock_ram_in_cache before initr_malloc. It
has been verified on the following boards, in which only T4240QDS
suffered and has been since fixed: T4240QDS, T2080QDS, P5040DS,
P4080DS, MPC8572DS, MPC8536DS, MPC8641HPCN, B4860QDS.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Ian Campbell [Fri, 3 Oct 2014 13:29:01 +0000 (14:29 +0100)]
pxe: Ensure we don't overflow bootargs
On a couple of platforms I've tripped over long PXE append lines overflowing
this array, due to having CONFIG_SYS_CBSIZE == 256. When doing preseeded Debian
installs it's pretty trivial to exceed that.
Since the symptom can be a silent hang or a crash add a check. Of course the
affected boards would also need an increased CBSIZE to actually work.
Note that due to the printing of the final bootargs string CONFIG_SYS_PBSIZE
also needs to be sufficiently large.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
[trini: Use %zd not %d in printf for all args]
Signed-off-by: Tom Rini <trini@ti.com>
Albert ARIBAUD [Fri, 10 Oct 2014 06:56:01 +0000 (08:56 +0200)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Masahiro Yamada [Fri, 3 Oct 2014 11:03:04 +0000 (20:03 +0900)]
mtd: denali: support NAND_CMD_RNDOUT command
The function nand_flash_detect_ext_param_page() requires
NAND_CMD_RNDOUT command supported. It is necessary to detect some
types of ONFi-compliant devices. Without it, the error message
"unsupported command received 0x5" is shown.
Let's support this command on the Denali NAND controller driver.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>
Masahiro Yamada [Fri, 3 Oct 2014 11:03:03 +0000 (20:03 +0900)]
mtd: denali: fix NAND_CMD_PARAM command
NAND_CMD_PARAM (0xEC) command is not working on the Denali
NAND controller driver.
Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command
is followed by an address cycle, the target device goes busy.
(R/B# is deasserted)
Wait until the parameter data are ready.
In addition, unnecessary clear_interrupts() should be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>
Nikita Kiryanov [Wed, 17 Sep 2014 12:59:25 +0000 (15:59 +0300)]
compulab: eeprom: add default eeprom bus
Add default eeprom bus setting.
This addresses the trimslice compile error that was introduced
with the addition of this setting.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Nobuhiro Iwamatsu [Thu, 7 Aug 2014 23:44:02 +0000 (08:44 +0900)]
arm: rmobile: r8a7794: Skip initialize L2 cache
rmobile/lowlevel_init_ca15.S are common in r8a7790, r8a7791 and r8a7794 of
rmobile SoCs. The initialize L2 cache in lowlevel_init_ca15.S only needed
for Cortex-A15. The r8a7794 is Cortex-A7, not Cortex-A15.
This adds Skip to initialize L2 cache when r8a7794.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Thu, 7 Aug 2014 23:41:15 +0000 (08:41 +0900)]
arm: rmobile: r8a7791: Fix initialize L2 cache
rmobile/lowlevel_init_ca15.S are common in r8a7790 and r8a7791 of
rmobile SoC. But L2 cache of r8a7791 does not use L2CTLR[5].
This adds fix to set L2CTLR [5] only when the r8a7790.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Thu, 7 Aug 2014 00:10:45 +0000 (09:10 +0900)]
arm: rmobile: Remove unnecessary initialization for l2ctlr
This removes duplicate initialization of l2ctlr.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Wed, 30 Jul 2014 03:28:00 +0000 (12:28 +0900)]
arm: rmobile: lager: Fix CPU frequency setting
Setting to change the CPU frequency is only used version2.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Tue, 29 Jul 2014 03:14:05 +0000 (12:14 +0900)]
arm: rmobile: lager: Add Qos setting for ES2
This adds support version 0.963 for ES2 of lager board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Tue, 29 Jul 2014 03:13:16 +0000 (12:13 +0900)]
arm: rmobile: lager: Update Qos setting to version 0.955
This updates QoS version 0.955 for ES1 of lager board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Thu, 24 Jul 2014 06:30:32 +0000 (15:30 +0900)]
arm: rmobile: alt: Update QoS initialization to version 0.11
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Thu, 24 Jul 2014 06:28:04 +0000 (15:28 +0900)]
arm: rmobile: koelsch: Update QoS initialization to version 0.334
This update QoS version 0.334 for ES2 of R8A7791.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Sun, 27 Jul 2014 23:35:05 +0000 (08:35 +0900)]
arm: rmobile: koelsch: Add CONFIG_SCIF_USE_EXT_CLK
SCIF of koelsch use external clock mode.
This enables external clock mode on koelsch board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Sun, 27 Jul 2014 23:35:05 +0000 (08:35 +0900)]
arm: rmobile: lager: Add CONFIG_SCIF_USE_EXT_CLK
SCIF of lager use external clock mode.
This enables external clock mode on lager board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Sun, 27 Jul 2014 23:11:21 +0000 (08:11 +0900)]
arm: rmobile: lager: Fix value of CONFIG_SH_SCIF_CLK_FREQ
The clock of SCIF (serial port) of lager is supplied from External
Clock. And value of clock is 14.7456MHz.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Albert ARIBAUD [Wed, 8 Oct 2014 19:20:49 +0000 (21:20 +0200)]
Merge remote-tracking branch 'u-boot-imx/master'
The single file conflict below is actually trivial.
Conflicts:
board/boundary/nitrogen6x/nitrogen6x.c
Hans de Goede [Tue, 30 Sep 2014 16:45:32 +0000 (18:45 +0200)]
sunxi: Fix gmac not working reliable on the Bananapi
In order for the gmac nic to work reliable on the Bananapi, we need to set
bits 10-12 GTXDC "GMAC Transmit Clock Delay Chain" of the GMAC clk register
(0x01c20164) to 3.
Without this about 9 out of 10 ethernet packets get lost, with this setting
there is no packet loss.
So far setting these bits is only necessary on the Bananapi, so this commit
solves this with a bit of #ifdef CONFIG_BANANAPI code. If in the future we
need to do something similar for other boards, we can create a specific
CONFIG_FOO option for this then.
Reported-by: Karsten Merker <merker@debian.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Karsten Merker <merker@debian.org>
Tested-by: Zoltan HERPAI <wigyori@openwrt.org>
Tested-by: Tony Zhang <tony.zhang@lemaker.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
projects / project / bcm63xx / u-boot.git / log