openwrt/staging/blogic.git
10 years agoMerge tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel...
Olof Johansson [Mon, 26 May 2014 19:57:33 +0000 (12:57 -0700)]
Merge tag 'omap-for-v3.16/soc-signed' of git://git./linux/kernel/git/tmlind/linux-omap into next/soc

Pull "ARM: omap soc changes for v3.16 merge window" from Tony Lindgren:

SoC related changes for omaps.

* tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: DRA752: add detection of SoC information
  ARM: OMAP2+: Remove suspend_set_ops from common pm late init
  ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data
  ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them)

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoARM: sunxi: allow building without reset controller
Arnd Bergmann [Mon, 26 May 2014 15:14:57 +0000 (17:14 +0200)]
ARM: sunxi: allow building without reset controller

The sunxi reset controller code is only used with sun6i (a31).
After the platform has been split up into per-soc options, it's
now possible to build it without the reset controller code, so
the base platform init must not call into the reset driver
if that is turned off at compile time.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoDocumentation: devicetree: arm: sort enable-method entries
Olof Johansson [Mon, 26 May 2014 18:14:36 +0000 (11:14 -0700)]
Documentation: devicetree: arm: sort enable-method entries

People have appended new entries instead of inserting them at
the right location, so sort them.

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE
Heiko Stübner [Thu, 27 Mar 2014 00:06:32 +0000 (01:06 +0100)]
ARM: rockchip: convert smp bringup to CPU_METHOD_OF_DECLARE

With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore
to reference the relevant smp_ops in the board file, but instead it can
simply be set by the enable-method property of the cpu nodes.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'for-3.16/bcm-soc' of git://github.com/broadcom/mach-bcm into next/soc
Arnd Bergmann [Fri, 23 May 2014 22:44:26 +0000 (00:44 +0200)]
Merge tag 'for-3.16/bcm-soc' of git://github.com/broadcom/mach-bcm into next/soc

Merge "mach-bcm 3.16 soc updates" From Matt Porter:

* only show ARCH_BCM in multi v6/v7 configs
* enable ARM erratum 775420
* bcm_defconfig updates for pwm

* tag 'for-3.16/bcm-soc' of git://github.com/broadcom/mach-bcm:
  ARM: bcm_defconfig: Enable PWM and Backlight
  ARM: mach-bcm: add ARM_ERRATA_775420
  ARM: bcm: Restrict ARCH_BCM selection to ARCH_MULTI_V6_V7

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoMerge branch 'bcm/cleanup' into next/soc
Arnd Bergmann [Fri, 23 May 2014 22:44:17 +0000 (00:44 +0200)]
Merge branch 'bcm/cleanup' into next/soc

Conflicts:
arch/arm/mach-bcm/Kconfig

10 years agoMerge tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux into next/soc
Arnd Bergmann [Fri, 23 May 2014 19:33:48 +0000 (21:33 +0200)]
Merge tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux into next/soc

Merge "Allwinner Core additions for 3.16, take 2" from Maxime Ripard:

  - Convert the A31 SMP operations to the CPU_METHOD_OF_DECLARE mechanism
  - Remove the reset code from the machine definition, that removes pretty much
    all the code left in mach-sunxi

* tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux:
  ARM: sunxi: Remove init_machine callback
  ARM: sunxi: Remove reset code from the platform
  ARM: sun6i: Retire the smp field in A31 machine
  Documentation: dt: bindings: Document Allwinner A31 enable method
  ARM: sun6i: Use CPU_METHOD_OF_DECLARE
  Documentation: dt: bindings: Document ARM PSCI enable method

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoMerge tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak...
Arnd Bergmann [Fri, 23 May 2014 19:32:29 +0000 (21:32 +0200)]
Merge tag 'qcom-soc-for-3.16' of git://git./linux/kernel/git/galak/linux-qcom into next/soc

Merge "Qualcomm ARM Based SoC Updates for v3.16" from Kumar Gala:

* Enabling building pinctrl and AMBA bus support
* Clean up debug UART selection

* tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
  ARM: qcom: Select PINCTRL by default for ARCH_QCOM
  ARM: debug: qcom: make UART address selection configuration option
  ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.

Conflicts:
arch/arm/Kconfig.debug
arch/arm/mach-qcom/Kconfig

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoMerge tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu into next/soc
Arnd Bergmann [Fri, 23 May 2014 16:50:19 +0000 (18:50 +0200)]
Merge tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu into next/soc

Merge "mvebu SoC changes for v3.16 (incremental #2)" from Jason Cooper <jason@lakedaemon.net>:

 - mvebu
    - fix coherency on big-endian in -next
    - hardware IO coherency
    - L2/PCIe deadlock workaround
    - small coherency cleanups

* tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()
  ARM: mvebu: improve comments in coherency_ll.S
  ARM: mvebu: fix indentation of assembly instructions in coherency_ll.S
  ARM: mvebu: fix big endian booting after coherency code rework
  ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI
  ARM: mvebu: implement L2/PCIe deadlock workaround
  ARM: mvebu: use hardware I/O coherency also for PCI devices

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoMerge branch 'axxia/soc' into next/soc
Arnd Bergmann [Fri, 23 May 2014 16:19:11 +0000 (18:19 +0200)]
Merge branch 'axxia/soc' into next/soc

Patches from Anders Berg applied individually:

Here is version 4 of platform support for AXM5516 SoC.

The clk driver is now applied to clk-next. The rest should be ready for
arm-soc. Haven't got any response from the power/reset maintainers... I hope
this driver can be taken via arm-soc as well.

The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.

This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.

* axxia/soc:
  ARM: dts: axxia: Add reset controller
  power: reset: Add Axxia system reset driver
  ARM: axxia: Adding defconfig for AXM55xx
  ARM: dts: Device tree for AXM55xx.
  ARM: Add platform support for LSI AXM55xx SoC

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoARM: dts: axxia: Add reset controller
Anders Berg [Fri, 23 May 2014 09:08:39 +0000 (11:08 +0200)]
ARM: dts: axxia: Add reset controller

Add the reset controller to the AXM5xx device tree.

Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agopower: reset: Add Axxia system reset driver
Anders Berg [Fri, 23 May 2014 09:08:38 +0000 (11:08 +0200)]
power: reset: Add Axxia system reset driver

Add Axxia (AXM55xx) SoC system reset driver. This driver handles only system
reboot (and not power-off).

Signed-off-by: Anders Berg <anders.berg@lsi.com>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoARM: axxia: Adding defconfig for AXM55xx
Anders Berg [Fri, 23 May 2014 09:08:37 +0000 (11:08 +0200)]
ARM: axxia: Adding defconfig for AXM55xx

Add a defconfig file for the LSI Axxia family of devices (CONFIG_ARCH_AXXIA).

Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoARM: dts: Device tree for AXM55xx.
Anders Berg [Fri, 23 May 2014 09:08:36 +0000 (11:08 +0200)]
ARM: dts: Device tree for AXM55xx.

Add device tree for the Amarillo validation board with an AXM5516 SoC.

Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoARM: Add platform support for LSI AXM55xx SoC
Anders Berg [Fri, 23 May 2014 09:08:35 +0000 (11:08 +0200)]
ARM: Add platform support for LSI AXM55xx SoC

The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.

This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.

Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
10 years agoARM: sunxi: Remove init_machine callback
Maxime Ripard [Wed, 7 May 2014 02:44:22 +0000 (21:44 -0500)]
ARM: sunxi: Remove init_machine callback

The init_machine hook is now at its default value. We can remove it.

Even though the sun4i and sun7i machines are nothing more than generic machines
now, leave them in so that we won't have to add them back if needed, and so
that the machine is still displayed in /proc/cpuinfo.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 years agoARM: sunxi: Remove reset code from the platform
Maxime Ripard [Wed, 7 May 2014 02:44:21 +0000 (21:44 -0500)]
ARM: sunxi: Remove reset code from the platform

Now that reset is handled either by the watchdog driver for the sun4i, sun5i
and sun7i, and by a driver of its own for sun6i, we can remove it from the
platform code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
10 years agoARM: qcom: Select PINCTRL by default for ARCH_QCOM
Andy Gross [Tue, 15 Apr 2014 03:10:37 +0000 (22:10 -0500)]
ARM: qcom: Select PINCTRL by default for ARCH_QCOM

Add missing PINCTRL selection.  This enables selection of pinctrollers for
Qualcomm processors.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
10 years agoARM: debug: qcom: make UART address selection configuration option
Ivan T. Ivanov [Mon, 14 Apr 2014 13:47:34 +0000 (16:47 +0300)]
ARM: debug: qcom: make UART address selection configuration option

Separate Qualcomm low-level debugging UART to two options.

DEBUG_MSM_UART is used in earlier non-multi platform arches,
like MSM7X00A, QSD8X50 and MSM7X30.

DEBUG_QCOM_UARTDM is used in multi-plafrom arches and have
embedded data mover.

Make DEBUG_UART_PHYS and DEBUG_UART_BASE user adjustable by
Kconfig menu.

Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
10 years agoARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.
Srinivas Kandagatla [Thu, 15 May 2014 10:08:55 +0000 (11:08 +0100)]
ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.

As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs.
For example SDCC controller is PrimeCell MCI pl180. Adding this option will
give flexibility to reuse the existing drivers as it is without major
modifications.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
10 years agoARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()
Thomas Petazzoni [Thu, 22 May 2014 12:48:02 +0000 (14:48 +0200)]
ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()

In the refactoring of the coherency fabric assembly code, a function
called ll_get_cpuid() was created to factorize common logic between
functions adding CPU to the SMP coherency group, enabling and
disabling the coherency.

However, the name of the function is highly misleading: ll_get_cpuid()
makes one think tat it returns the ID of the CPU, i.e 0 for CPU0, 1
for CPU1, etc. In fact, this is not at all what this function returns:
it returns a CPU mask for the current CPU, usable for the coherency
fabric configuration and control registers.

Therefore this commit renames this function to
ll_get_coherency_cpumask(), and adds additional comments on top of the
function to explain in more details what it does, and also how the
endianess issue is handled.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-5-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: improve comments in coherency_ll.S
Thomas Petazzoni [Thu, 22 May 2014 12:48:01 +0000 (14:48 +0200)]
ARM: mvebu: improve comments in coherency_ll.S

This commit makes no functional change, it only improves a bit the
various code comments in mach-mvebu/coherency_ll.S, by fixing a few
typos and adding a few more details.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-4-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: fix indentation of assembly instructions in coherency_ll.S
Thomas Petazzoni [Thu, 22 May 2014 12:48:00 +0000 (14:48 +0200)]
ARM: mvebu: fix indentation of assembly instructions in coherency_ll.S

This commit does not make any functional change, it only fixes the
indentation of a few assembly instructions in
arch/arm/mach-mvebu/coherency_ll.S.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-3-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: fix big endian booting after coherency code rework
Thomas Petazzoni [Thu, 22 May 2014 12:47:59 +0000 (14:47 +0200)]
ARM: mvebu: fix big endian booting after coherency code rework

As part of the introduction of the cpuidle support for Armada XP, the
coherency code was significantly reworked, especially in the
coherency_ll.S file. However, when the ll_get_cpuid function was
created, the big-endian specific code that switches the endianess of
the register was not updated properly.

This patch fixes this code, and therefore makes big endian systems
bootable again.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-2-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: 2e8a5942f875 ("ARM: mvebu: Split low level functions to manipulate HW coherency")
Reported-by: Kevin Hilman <khilman@linaro.org>
Cc: Kevin Hilman <khilman@linaro.org>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI
Thomas Petazzoni [Tue, 20 May 2014 15:13:03 +0000 (17:13 +0200)]
ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI

Commit b0063aad5dd8 ("ARM: mvebu: use hardware I/O coherency also for
PCI devices") added a reference to the pci_bus_type variable, but this
variable is only available when CONFIG_PCI is enabled. Therefore,
there is now a build failure in !CONFIG_PCI situations.

This commit fixes that by enclosing the entire initcall into a
IS_ENABLED(CONFIG_PCI) condition.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400598783-706-1-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: implement L2/PCIe deadlock workaround
Thomas Petazzoni [Thu, 15 May 2014 14:59:34 +0000 (16:59 +0200)]
ARM: mvebu: implement L2/PCIe deadlock workaround

The Marvell Armada 375 and Armada 38x SOCs, which use the Cortex-A9
CPU core, the PL310 cache and the Marvell PCIe hardware block are
affected a L2/PCIe deadlock caused by a system erratum when hardware
I/O coherency is used.

This deadlock can be avoided by mapping the PCIe memory areas as
strongly-ordered (note: MT_UNCACHED is strongly-ordered), and by
removing the outer cache sync done in software. This is implemented in
this patch by:

 * Registering a custom arch_ioremap_caller function that allows to
   make sure PCI memory regions are mapped MT_UNCACHED.

 * Adding at runtime the 'arm,io-coherent' property to the PL310 cache
   controller. This cannot be done permanently in the DT, because the
   hardware I/O coherency can only be enabled when CONFIG_SMP is
   enabled, in the current kernel situation.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400165974-9059-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoMerge tag 'tegra-for-3.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra...
Olof Johansson [Wed, 21 May 2014 22:04:52 +0000 (15:04 -0700)]
Merge tag 'tegra-for-3.16-soc' of git://git./linux/kernel/git/tegra/linux into next/soc

Merge "ARM: tegra: core code changes for 3.16" from Stephen Warren:

This branch contains just a single patch this time around. Thierry
enhanced Tegra's restart code to allow programming PMC scratch registers
to request specific behaviour after reboot. One of the most useful
options for mainline software is the ability to reboot directly into USB
recovery mode, which e.g. allows the bootloader to be reflashed.

* tag 'tegra-for-3.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Support reboot modes

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'imx-soc-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo...
Olof Johansson [Wed, 21 May 2014 21:45:05 +0000 (14:45 -0700)]
Merge tag 'imx-soc-3.16' of git://git./linux/kernel/git/shawnguo/linux into next/soc

Merge "ARM: imx: soc changes for 3.16" from Shawn Guo:

i.MX SoC changes for 3.16:
 - A few cleanups on mx21ads board file, which should make the later
   conversion to DT a little bit easier.
 - Add some missing clocks and drop unused clk lookups for i.MX1 and
   i.MX27 clock drivers
 - Add initial i.MX SoloX (imx6sx) SoC support
 - Remove mx51_babbage and mach-cpuimx51sd board files, as the
   equivalent DT support is ready for the boards
 - Clean up device tree timer initialization a little bit
 - Add missing i2c4 clock for i.MX6 DualLite/Solo
 - Add missing CKO clock i.MX25
 - Add shared gate clock support for i.MX specific clk_gate2
 - Add low-level debug support for SoC VF610
 - Some random code cleanups and defconfig updates

* tag 'imx-soc-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits)
  ARM: mx25: Add CLKO support
  ARM: i.MX1 clk: Remove clk_register_clkdev() for unused clocks
  ARM: i.MX1 clk: Add missing clocks
  ARM: imx: add basic imx6sx SoC support
  ARM: imx: add clock driver for imx6sx
  ARM: imx: add low-level debug support for imx6sx
  ARM: mx51: Remove mach-cpuimx51sd board file
  ARM: i.MX: Setup IRQ handler from IRQ driver
  ARM: i.MX27 pca100: remove deprecated IRQF_DISABLED
  ARM: imx/mxs defconfigs: add MTD_SPI_NOR (new dependency for M25P80)
  ARM: i.MX: Fix eMMa PrP resource size
  ARM: imx_v4_v5_defconfig: drop CONFIG_COMMON_CLK_DEBUG option
  ARM: i.MX27 clk: Remove clk_register_clkdev() for unused clocks
  ARM: i.MX27 clk: Add missing clocks for MSHC and RTIC
  ARM: imx6q: add the missing esai_ahb clock
  ARM: imx: add shared gate clock support
  ARM: imx: lock is always valid for clk_gate2
  ARM: imx: define struct clk_gate2 on our own
  ARM: i.MX: Remove #ifdef CONFIG_OF
  ARM: imx_v6_v7_defconfig: enable option CONFIG_LOCALVERSION_AUTO
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'sunxi-core-for-3.16' of https://github.com/mripard/linux into next/soc
Olof Johansson [Wed, 21 May 2014 21:35:04 +0000 (14:35 -0700)]
Merge tag 'sunxi-core-for-3.16' of https://github.com/mripard/linux into next/soc

Merge "Allwinner SoCs core additions for 3.16" from Maxime Ripard:

Refactor the Kconfig options to have one Kconfig option per machine.

* tag 'sunxi-core-for-3.16' of https://github.com/mripard/linux:
  ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled
  ARM: sunxi: Split the various SoCs support in Kconfig

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'sti-soc-for-v3.16' of git://git.stlinux.com/devel/kernel/linux-sti into...
Olof Johansson [Tue, 20 May 2014 06:30:26 +0000 (23:30 -0700)]
Merge tag 'sti-soc-for-v3.16' of git://git.stlinux.com/devel/kernel/linux-sti into next/soc

Merge "ARM: STi: SoC changes for v3.16" from Maxime Coquelin:

SoC changes for STi platforms
 - Add support for STiH407

* tag 'sti-soc-for-v3.16' of git://git.stlinux.com/devel/kernel/linux-sti:
  ARM: STi: Add STiH407 SoC support

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kerne...
Olof Johansson [Tue, 20 May 2014 06:29:46 +0000 (23:29 -0700)]
Merge tag 'renesas-soc-cleanup-for-v3.16' of git://git./linux/kernel/git/horms/renesas into next/soc

Merge "Renesas ARM Based SoC soc-cleanup Updates for v3.16" from Simon Horman:

r8a7791 (R-Car H2) SoC and its Koelsch board and,
r8a7740 (R-Mobile A1) SoC and its Armadillo800eva board
* Set CPU clock frequency from OF nodes

* tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Set clock frequency in HZ from OF nodes
  ARM: shmobile: Use shmobile_init_late() on r8a7740
  ARM: shmobile: Remove unused r8a7791_init_early()
  ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch
  ARM: shmobile: Use r8a7791 DT CPU Frequency in common case
  ARM: shmobile: Remove unused r8a7740_init_delay()
  ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref
  ARM: shmobile: Use r8a7740 DT CPU Frequency in common case
  ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel...
Olof Johansson [Tue, 20 May 2014 06:29:24 +0000 (23:29 -0700)]
Merge tag 'renesas-clock2-for-v3.16' of git://git./linux/kernel/git/horms/renesas into next/soc

Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.16" from
Simon Horman:

r8a7791 (R-Car M2) SoC
* Correct SYS-DMAC clock defines

r8a7740 (R-Mobile A1) SoC
* Correct name of DT Ethernet clock

* tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines
  ARM: shmobile: r8a7740: Correct name of DT Ethernet clock

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge branch 'cleanup/kconfig' into next/soc
Olof Johansson [Tue, 20 May 2014 05:27:05 +0000 (22:27 -0700)]
Merge branch 'cleanup/kconfig' into next/soc

Bring in the cleanup branch due to conflicts in new additions. Should really
have been the base before the other branch, but this way works too.

* cleanup/kconfig:
  ARM: qcom: clean-up unneeded kconfig selects
  ARM: bcm: clean-up unneeded kconfig selects
  ARM: mvebu: clean-up unneeded kconfig selects

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu into next/soc
Olof Johansson [Tue, 20 May 2014 04:59:55 +0000 (21:59 -0700)]
Merge tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu into next/soc

Merge "ARM: mvebu: SoC changes for v3.16" from Jason Cooper:

mvebu SoC changes for v3.16

 - Armada 375/38x coherency support
 - Armada 375/38x SMP support
 - mvebu PMSU and CPU reset support
 - Armada 370/XP cpuidle support
 - kirkwood remove platform init of audio device
 - small fixes and cleanup for new SoC (375/38x)

Note:
 - due to complex deps, cpuidle changes Acked by appropriate maintainer for
   going though arm-soc tree.

* tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu: (46 commits)
  ARM: mvebu: Fix pmsu compilation when ARMv6 is selected
  ARM: mvebu: conditionalize Armada 375 coherency workaround
  ARM: mvebu: conditionalize Armada 375 SMP workaround
  ARM: mvebu: add Armada 375 A0 revision definition
  ARM: mvebu: initialize mvebu-soc-id earlier
  ARM: mvebu: fix thermal quirk SoC revision check
  ARM: Kirkwood: t5325: Remove platform device to instantiate audio
  ARM: Kirkwood: Remove platform driver for codec
  ARM: mvebu: Add thermal quirk for the Armada 375 DB board
  ARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled
  ARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id
  ARM: mvebu: remove unnecessary ifdef around l2x0_of_init
  ARM: mvebu: register the cpuidle driver for the Armada XP SoCs
  cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC
  ARM: mvebu: Register notifier callback for the cpuidle transition
  ARM: mvebu: refine which files are build in mach-mvebu
  ARM: mvebu: Add the PMSU related part of the cpu idle functions
  ARM: mvebu: Allow to power down L2 cache controller in idle mode
  ARM: mvebu: Low level function to disable HW coherency support
  ARM: mvebu: Split low level functions to manipulate HW coherency
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu into next/soc
Olof Johansson [Tue, 20 May 2014 04:56:38 +0000 (21:56 -0700)]
Merge tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu into next/soc

Merge "ARM: mvebu: SoC orion5x DT conversion for v3.16" from Jason Cooper:

mvebu SoC orion5x DT conversion for v3.16

 - orion5x
    - convert to DT

* tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu: (29 commits)
  ARM: orion: remove no longer needed gpio DT code
  ARM: orion: remove no longer needed DT IRQ code
  ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
  ARM: orion5x: convert d2net to Device Tree
  ARM: orion5x: convert RD-88F5182 to Device Tree
  ARM: orion5x: remove unneeded code for edmini_v2
  ARM: orion5x: keep TODO list in edmini_v2 DT
  ARM: orion5x: use DT to describe NOR on edmini_v2
  ARM: orion5x: use DT to describe EHCI on edmini_v2
  ARM: orion5x: use DT to describe I2C devices on edmini_v2
  ARM: orion5x: convert edmini_v2 to DT pinctrl
  ARM: orion5x: add standard pinctrl configs for sata0 and sata1
  ARM: orion5x: add Device Bus description at SoC level
  ARM: orion5x: update I2C description at SoC level
  ARM: orion5x: enable pinctrl driver at SoC level
  ARM: orion5x: switch to DT interrupts and timer
  ARM: orion: switch to a per-platform handle_irq() function
  ARM: orion5x: convert to use 'clocks' property for UART controllers
  ARM: orion5x: switch to use the clock driver for DT platforms
  ARM: orion5x: add interrupt for Ethernet in Device Tree
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoARM: DRA752: add detection of SoC information
Nishanth Menon [Mon, 19 May 2014 15:27:11 +0000 (10:27 -0500)]
ARM: DRA752: add detection of SoC information

Currently the files in /sys/devices/soc0/ show no information about
DRA7. Few userspace programs do depend on this information to make SoC
specific support. So update logic to detect the relevant information and
provide to userspace.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
10 years agoARM: OMAP2+: Remove suspend_set_ops from common pm late init
Dave Gerlach [Mon, 12 May 2014 18:33:21 +0000 (13:33 -0500)]
ARM: OMAP2+: Remove suspend_set_ops from common pm late init

In omap2_common_pm_late_init suspend_set_ops was called to set common
suspend handling functions for all omap platforms. This created two
problems. First, these suspend ops were being set for all platforms,
regardless of whether or not suspend support has been integrated so in
the case of AM33XX, suspend to mem was presented as available but
failed every time. Second, some platforms will need to define a
completely separate set of suspend ops, such as AM33XX, due to
differences from previous omap platforms so there is no need to
always set the common omap ops.

This patch moves the suspend_set_ops call from omap2_common_pm_late_init
into a separate function that then gets called in the omap*_pm_init
functions for each platform.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
10 years agoARM: sun6i: Retire the smp field in A31 machine
Maxime Ripard [Fri, 18 Apr 2014 19:01:53 +0000 (21:01 +0200)]
ARM: sun6i: Retire the smp field in A31 machine

Now that we can rely on the enable-method, remove the smp field declaration
from A31 machine.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 years agoDocumentation: dt: bindings: Document Allwinner A31 enable method
Maxime Ripard [Fri, 18 Apr 2014 19:01:51 +0000 (21:01 +0200)]
Documentation: dt: bindings: Document Allwinner A31 enable method

Document the necently introduced A31 enable-method as a valid option.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 years agoARM: sun6i: Use CPU_METHOD_OF_DECLARE
Maxime Ripard [Fri, 18 Apr 2014 19:01:50 +0000 (21:01 +0200)]
ARM: sun6i: Use CPU_METHOD_OF_DECLARE

CPU_METHOD_OF_DECLARE allows to bind the smp_ops to a set of cpus through the
enable-method property, instead of relying on the machine to define it. Switch
to it to get closer to an empty machine.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 years agoDocumentation: dt: bindings: Document ARM PSCI enable method
Maxime Ripard [Fri, 18 Apr 2014 19:01:49 +0000 (21:01 +0200)]
Documentation: dt: bindings: Document ARM PSCI enable method

arm,psci is also a valid enable-method for the CPUs on ARM. Document it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 years agoARM: STi: Add STiH407 SoC support
Maxime Coquelin [Thu, 27 Feb 2014 12:17:27 +0000 (13:17 +0100)]
ARM: STi: Add STiH407 SoC support

This patch adds support to STiH407 SoC.

Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
10 years agoMerge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/soc
Olof Johansson [Fri, 16 May 2014 23:22:41 +0000 (16:22 -0700)]
Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/soc

Merge "at91: cleanup for 3.16 #1" from Nicolas Ferre:

First cleanup series for 3.15
- localize GPIO header in mach-at91 directory
- big update on the CCF front with main and slow clocks
- a cleanup of ADC and touchscreen driver with unification on IIO and
  removal of old driver

[olof: Most of this branch is new code, not cleanups, so I'm merging this into
the SoC branch in spite of the branch name]

* tag 'at91-cleanup' of git://github.com/at91linux/linux-at91: (28 commits)
  ARM: at91/dt: at91-cosino_mega2560 remove useless tsadcc node
  ARM: at91: remove atmel_tsadcc platform_data
  Input: atmel_tsadcc: remove driver
  ARM: at91: remove atmel_tsadcc from sama5_defconfig
  ARM: at91: sam9rl: switch from atmel_tsadcc to at91_adc
  ARM: at91: sam9g45: switch from atmel_tsadcc to at91_adc
  ARM: at91: sam9rlek add touchscreen support through at91_adc
  ARM: at91: sam9rl: add at91_adc to support adc and touchscreen
  iio: adc: at91: add sam9rl support
  iio: adc: at91: remove unused include from include/mach
  ARM: at91: sam9m10g45ek: Add touchscreen support through at91_adc
  iio: adc: at91_adc: Add support for touchscreens without TSMR
  iio: adc: at91: cleanup platform_data
  ARM: at91: sam9260: remove unused platform_data
  ARM: at91: sam9g45: remove unused platform_data
  ARM: at91/dt: define sam9rlek crystal frequencies
  ARM: at91/dt: move at91sam9rl SoC to the new slow/main clock models
  ARM: at91/dt: define main xtal frequency of the at91sam9261ek board
  ARM: at91/dt: move at91sam9261 SoC to the new main clock model
  ARM: at91/dt: add xtal frequencies to sama5d3 xplained board
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
10 years agoMerge tag 'for-v3.16/hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw...
Tony Lindgren [Fri, 16 May 2014 21:19:05 +0000 (14:19 -0700)]
Merge tag 'for-v3.16/hwmod-a' of git://git./linux/kernel/git/pjw/omap-pending into omap-for-v3.16/soc

First (and possibly last) set of hwmod data changes for v3.16.  This
set should clean up some obsolete OMAP4 hwmod data, and add OMAP5 DSS
support.

Basic build, boot, and PM logs are available here:

http://www.pwsan.com/omap/testlogs/hwmod-a-v3.16/20140515210013/

10 years agoARM: mx25: Add CLKO support
Fabio Estevam [Tue, 11 Mar 2014 18:55:46 +0000 (02:55 +0800)]
ARM: mx25: Add CLKO support

CLKO support is a clock output on mx25 which can output many of the internal
clock sources. It is useful for debugging purpose or also for driving the
audio codec for example.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: i.MX1 clk: Remove clk_register_clkdev() for unused clocks
Alexander Shiyan [Tue, 13 May 2014 16:04:22 +0000 (20:04 +0400)]
ARM: i.MX1 clk: Remove clk_register_clkdev() for unused clocks

This patch removes clk_register_clkdev() for the clocks that do not
have any users from boards and drivers.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: i.MX1 clk: Add missing clocks
Alexander Shiyan [Tue, 13 May 2014 16:04:21 +0000 (20:04 +0400)]
ARM: i.MX1 clk: Add missing clocks

This patch adds missing clocks for mpll_gate, spll_gate, uart3_gate,
ssi2_gate and brom_gate. As an additional this fixes incorrect bit
position for dma_gate clock.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx: add basic imx6sx SoC support
Shawn Guo [Tue, 13 May 2014 13:46:16 +0000 (21:46 +0800)]
ARM: imx: add basic imx6sx SoC support

Add basic suppport for i.MX6 SoloX SoC.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx: add clock driver for imx6sx
Anson Huang [Sun, 11 May 2014 14:47:09 +0000 (22:47 +0800)]
ARM: imx: add clock driver for imx6sx

Add clock driver for i.MX6 SoloX SoC.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx: add low-level debug support for imx6sx
Shawn Guo [Sun, 11 May 2014 13:53:48 +0000 (21:53 +0800)]
ARM: imx: add low-level debug support for imx6sx

Enable low-level debug support for i.MX6 SoloX by adding the debug
port definitions for the SoC.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: mvebu: use hardware I/O coherency also for PCI devices
Thomas Petazzoni [Tue, 13 May 2014 16:04:30 +0000 (18:04 +0200)]
ARM: mvebu: use hardware I/O coherency also for PCI devices

Since the beginning of the introduction of hardware I/O coherency
support for Armada 370 and Armada XP, the special DMA operations
should have applied to all DMA capable devices. Unfortunately, while
the original code properly took into account platform devices, it
didn't take into account PCI devices, which can also be DMA masters.

This commit fixes that by registering a bus notifier on pci_bus_type,
to register our custom DMA operations, like is already done for
platform devices. While doing this, we also rename
mvebu_hwcc_platform_notifier() to mvebu_hwcc_notifier() and
mvebu_hwcc_platform_nb to mvebu_hwcc_nb because they are no longer
specific to platform devices.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399997070-11434-1-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled
Boris BREZILLON [Thu, 15 May 2014 08:55:13 +0000 (10:55 +0200)]
ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled

Select the MFD_SUN6I_PRCM option when sun6i arch is enabled in order to get
the PRCM (Power/Reset/Clock Management) related drivers compiled.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 years agoARM: OMAP2+: hwmod: OMAP5 DSS hwmod data
Archit Taneja [Wed, 14 May 2014 18:26:10 +0000 (12:26 -0600)]
ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data

Add hwmod data for dss core, dispc dsi1, dsi2, rfbi and hdmi. It's more
or less similar to omap4 hwmod data.

Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
10 years agoARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them)
Peter Ujfalusi [Wed, 14 May 2014 18:26:10 +0000 (12:26 -0600)]
ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them)

All audio related omap_hwmod_ocp_if *_dma can be removed from the data since
we can just add the user flag to the non dma structure.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
10 years agoARM: shmobile: Set clock frequency in HZ from OF nodes
Simon Horman [Tue, 13 May 2014 06:59:18 +0000 (15:59 +0900)]
ARM: shmobile: Set clock frequency in HZ from OF nodes

shmobile_init_delay() looks for OF "clock-frequency" to determine
the delay which is set by calling shmobile_setup_delay().

Unfortunately this seems to be incorrect in detail as
"clock-frequency" node values are in HZ whereas the frequency
argument to shmobile_setup_delay() is in MHz.

Provide a variant of shmobile_setup_delay() that accepts HZ to
correct this problem.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: Use shmobile_init_late() on r8a7740
Magnus Damm [Sun, 11 May 2014 23:10:50 +0000 (08:10 +0900)]
ARM: shmobile: Use shmobile_init_late() on r8a7740

Hook up ->init_late for r8a7740 to initialize Suspend-to-RAM
and CPUIdle in case of C-code less board support for r8a7740.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: mx51: Remove mach-cpuimx51sd board file
Fabio Estevam [Sat, 10 May 2014 15:47:36 +0000 (12:47 -0300)]
ARM: mx51: Remove mach-cpuimx51sd board file

eukrea_mbimxsd51-baseboard.c and mach-cpuimx51sd.c can be replaced with their
devicetree equivalents: imx51-eukrea-mbimxsd51-baseboard.dts and
imx51-eukrea-cpuimx51.dtsi respectively, so remove the board files.

This allows the conversion of mx51 to a devicetree-only platform.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: shmobile: r8a7791: Correct SYS-DMAC clock defines
Geert Uytterhoeven [Mon, 12 May 2014 18:49:33 +0000 (20:49 +0200)]
ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines

R-Car M2 has two MSTP bits for SYS-DMAC, not one.
Also bring the naming in sync with the documentation.

This issue was introduced in v3.14, in commit
4d8864c9e94ec727f1c675b9f6921525c360334b ("ARM: shmobile: r8a7791: Add
clock index macros for DT sources").

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: i.MX: Setup IRQ handler from IRQ driver
Alexander Shiyan [Sun, 11 May 2014 07:35:57 +0000 (11:35 +0400)]
ARM: i.MX: Setup IRQ handler from IRQ driver

This patch moves IRQ handler setup to the its corresponded IRQ
driver (AVIC, TZIC).

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: i.MX27 pca100: remove deprecated IRQF_DISABLED
Juan Solano [Wed, 7 May 2014 15:09:59 +0000 (17:09 +0200)]
ARM: i.MX27 pca100: remove deprecated IRQF_DISABLED

This flag is a NOOP and can be removed now.

Signed-off-by: Juan Solano <jsm@jsolano.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx/mxs defconfigs: add MTD_SPI_NOR (new dependency for M25P80)
Brian Norris [Thu, 1 May 2014 06:26:36 +0000 (23:26 -0700)]
ARM: imx/mxs defconfigs: add MTD_SPI_NOR (new dependency for M25P80)

These defconfigs contain the CONFIG_M25P80 symbol, which is now
dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy
the new dependency.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: i.MX: Fix eMMa PrP resource size
Alexander Shiyan [Sun, 27 Apr 2014 16:03:26 +0000 (20:03 +0400)]
ARM: i.MX: Fix eMMa PrP resource size

Last address for eMMa PrP is 0x80...0x83, so increase resource size
for eMMa to 256.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx_v4_v5_defconfig: drop CONFIG_COMMON_CLK_DEBUG option
Shawn Guo [Tue, 29 Apr 2014 06:15:58 +0000 (14:15 +0800)]
ARM: imx_v4_v5_defconfig: drop CONFIG_COMMON_CLK_DEBUG option

The option COMMON_CLK_DEBUG was removed by commit ea72dc2 (clk: remove
CONFIG_COMMON_CLK_DEBUG), so let's remove CONFIG_COMMON_CLK_DEBUG from
the defconfig.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: i.MX27 clk: Remove clk_register_clkdev() for unused clocks
Alexander Shiyan [Sun, 20 Apr 2014 05:18:52 +0000 (09:18 +0400)]
ARM: i.MX27 clk: Remove clk_register_clkdev() for unused clocks

This patch removes clk_register_clkdev() for the clocks that do not
have any users for non-DT boards and drivers.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: i.MX27 clk: Add missing clocks for MSHC and RTIC
Alexander Shiyan [Sun, 20 Apr 2014 05:18:51 +0000 (09:18 +0400)]
ARM: i.MX27 clk: Add missing clocks for MSHC and RTIC

This patch adds missing clocks handling for the Memory Stick Host
Controller (MSHC) and Run-Time Integrity Checker (RTIC).

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx6q: add the missing esai_ahb clock
Shawn Guo [Sat, 19 Apr 2014 03:15:06 +0000 (11:15 +0800)]
ARM: imx6q: add the missing esai_ahb clock

The esai_ahb clock is derived from ahb and used to provide ESAI the
capability of register accessing and FSYS clock source for I2S clocks
dividing.  The gate bits of this esai_ahb clock are shared with the
esai clock -- the baud clock, so we need to call imx_clk_gate2_shared()
for these two clocks.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx: add shared gate clock support
Shawn Guo [Sat, 19 Apr 2014 02:58:22 +0000 (10:58 +0800)]
ARM: imx: add shared gate clock support

It's quite common on i.MX that one gate bit controls the gating of
multiple clocks, i.e. this is a shared gate.  The patch adds the
function imx_clk_gate2_shared() for such case.  The clocks controlled
by the same gate bits should call this function with a pointer to a
single share count variable, so that the gate bits will only be
operated on the first enabling and the last disabling of these shared
gate clocks.

Thanks to Gerhard Sittig <gsi@denx.de> for this idea.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx: lock is always valid for clk_gate2
Shawn Guo [Fri, 18 Apr 2014 08:07:44 +0000 (16:07 +0800)]
ARM: imx: lock is always valid for clk_gate2

The imx specific clk_gate2 always has a valid lock with the clock.  So
the validation on gate->lock is not really needed.  Remove it.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx: define struct clk_gate2 on our own
Shawn Guo [Fri, 18 Apr 2014 07:55:16 +0000 (15:55 +0800)]
ARM: imx: define struct clk_gate2 on our own

The imx clk-gate2 driver implements an i.MX specific gate clock, which
has two bits controlling the gate states.  While this is a completely
separate gate driver from the common clk-gate one, it reuses the common
clk_gate structure.  Such reusing makes the extending of clk_gate2
clumsy.  Let's define struct clk_gate2 on our own to make the driver
independent of the common clk-gate one, and ease the clk_gate2 extending
at a later time.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: i.MX: Remove #ifdef CONFIG_OF
Alexander Shiyan [Sat, 19 Apr 2014 05:04:03 +0000 (09:04 +0400)]
ARM: i.MX: Remove #ifdef CONFIG_OF

CONFIG_OF is always selected for i.MX.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx_v6_v7_defconfig: enable option CONFIG_LOCALVERSION_AUTO
Shawn Guo [Mon, 14 Apr 2014 04:58:32 +0000 (12:58 +0800)]
ARM: imx_v6_v7_defconfig: enable option CONFIG_LOCALVERSION_AUTO

Option CONFIG_LOCALVERSION_AUTO is quite helpful to tell kernel version.
I do not see any reason why we should unset it.  Let's remove the unset
to have it enabled.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx: drop CONFIG_MMC_UNSAFE_RESUME from defconfig
Shawn Guo [Mon, 14 Apr 2014 04:55:13 +0000 (12:55 +0800)]
ARM: imx: drop CONFIG_MMC_UNSAFE_RESUME from defconfig

Since 2501c91 (mmc: core: Use MMC_UNSAFE_RESUME as default behavior),
CONFIG_MMC_UNSAFE_RESUME is not available anymore.  Drop it from imx
defconfig.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock
Iain Paton [Wed, 16 Apr 2014 18:33:24 +0000 (19:33 +0100)]
ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock

Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
replaces the ecspi5 clock with the i2c4 clock.

Handle this difference using cpu_is_imx6dl().

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: imx_v6_v7_defconfig: enable cpufreq and CMA support
Shawn Guo [Thu, 10 Apr 2014 06:53:34 +0000 (14:53 +0800)]
ARM: imx_v6_v7_defconfig: enable cpufreq and CMA support

 - Enable imx6 cpufreq support with ondemand governor
 - Enable CMA support so that device like 1080p HDMI can work
 - Run savedefconfig

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
10 years agoARM: shmobile: Remove unused r8a7791_init_early()
Magnus Damm [Sun, 11 May 2014 23:25:37 +0000 (08:25 +0900)]
ARM: shmobile: Remove unused r8a7791_init_early()

Remove the now unused r8a7791_init_early() function.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch
Magnus Damm [Sun, 11 May 2014 23:25:27 +0000 (08:25 +0900)]
ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch

Convert the Koelsch board support to use shmobile_init_delay()
to be able to migrate away from per-SoC delay setup functions.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: Use r8a7791 DT CPU Frequency in common case
Magnus Damm [Sun, 11 May 2014 23:25:18 +0000 (08:25 +0900)]
ARM: shmobile: Use r8a7791 DT CPU Frequency in common case

Convert the common C-code-less r8a7791 DT board support
to use shmobile_init_delay() to be able to migrate away
from per-SoC delay setup functions.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: Remove unused r8a7740_init_delay()
Magnus Damm [Wed, 7 May 2014 23:32:56 +0000 (08:32 +0900)]
ARM: shmobile: Remove unused r8a7740_init_delay()

Remove the now unused r8a7740_init_delay() function.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref
Magnus Damm [Wed, 7 May 2014 23:32:47 +0000 (08:32 +0900)]
ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref

Convert the Armadillo r8a7740 DT reference board support
to use shmobile_init_delay() to be able to migrate away
from per-SoC delay setup functions.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: Use r8a7740 DT CPU Frequency in common case
Magnus Damm [Wed, 7 May 2014 23:32:38 +0000 (08:32 +0900)]
ARM: shmobile: Use r8a7740 DT CPU Frequency in common case

Convert the common C-code-less r8a7740 DT board support
to use shmobile_init_delay() to be able to migrate away
from per-SoC delay setup functions.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS
Magnus Damm [Wed, 7 May 2014 23:32:29 +0000 (08:32 +0900)]
ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS

Add 800 MHz to the r8a7740 DTS to describe the maximum CPU frequency.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Tested-by: Geert Uytterhoeven <geert@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: shmobile: r8a7740: Correct name of DT Ethernet clock
Geert Uytterhoeven [Wed, 7 May 2014 20:32:28 +0000 (22:32 +0200)]
ARM: shmobile: r8a7740: Correct name of DT Ethernet clock

The preferred node name in DT for an Ethernet device is "ethernet".
"sh-eth" was used in preliminary and incomplete bindings.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
10 years agoARM: mvebu: Fix pmsu compilation when ARMv6 is selected
Vincent Stehlé [Tue, 6 May 2014 20:23:02 +0000 (22:23 +0200)]
ARM: mvebu: Fix pmsu compilation when ARMv6 is selected

When compiling for multiplatform for both ARMv6 and ARMv7, the default compiler
flags are for ARMv6, and we will get:

  /tmp/ccwDEzd0.s: Assembler messages:
  /tmp/ccwDEzd0.s:639: Error: selected processor does not support ARM mode `isb '
  /tmp/ccwDEzd0.s:645: Error: selected processor does not support ARM mode `isb '
  /tmp/ccwDEzd0.s:646: Error: selected processor does not support ARM mode `dsb '
  /tmp/ccwDEzd0.s:695: Error: selected processor does not support ARM mode `isb '
  make[1]: *** [arch/arm/mach-mvebu/pmsu.o] Error 1

Fix this in a similar manner than done previously in commit
72533b77d30c2be02672e26b5dde1263d7b4c2be, by specifying ARMv7 flags for pmsu.o.

Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net>
Link: https://lkml.kernel.org/r/1399407782-29091-1-git-send-email-vincent.stehle@laposte.net
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: conditionalize Armada 375 coherency workaround
Thomas Petazzoni [Mon, 5 May 2014 15:05:26 +0000 (17:05 +0200)]
ARM: mvebu: conditionalize Armada 375 coherency workaround

The Armada 375 coherency workaround only needs to be applied to the Z1
revision of the SoC. The A0 and later revisions have been fixed, and
no longer need this workaround.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399302326-6917-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: conditionalize Armada 375 SMP workaround
Thomas Petazzoni [Mon, 5 May 2014 15:05:25 +0000 (17:05 +0200)]
ARM: mvebu: conditionalize Armada 375 SMP workaround

The Armada 375 SMP workaround only needs to be applied to the Z1
revision of the SoC. The A0 and later revisions have been fixed, and
no longer need this workaround.

Note that the initialization of the SMP workaround is delayed from
->smp_prepare_cpus() to ->smp_boot_secondary() because when
->smp_prepare_cpus() is called, the early initcalls have not be
called, so the mvebu-soc-id mechanism is not operational. Since the
workaround is anyway not needed before the secondary CPU is started,
we can delay its implementation until the ->smp_boot_secondary() call.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399302326-6917-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: add Armada 375 A0 revision definition
Thomas Petazzoni [Mon, 5 May 2014 15:05:24 +0000 (17:05 +0200)]
ARM: mvebu: add Armada 375 A0 revision definition

Now that we have access to Armada 375 A0 platforms, we can add the
corresponding revision definition in mvebu-soc-id.h.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399302326-6917-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: initialize mvebu-soc-id earlier
Thomas Petazzoni [Mon, 5 May 2014 15:05:23 +0000 (17:05 +0200)]
ARM: mvebu: initialize mvebu-soc-id earlier

Currently, the mvebu-soc-id logic is initialized through a
core_initcall(). However, we will soon need to know the SoC revision
before booting secondary CPUs, because a workaround affects Armada 375
Z1 steppings, but should not be applied on Armada 375 A0 steppings.

Unfortunately, core_initcall() are called way too late compared to the
SMP initialization. Therefore, the mvebu-soc-id initialization is move
to an early_initcall(), which is called before the SMP initialization.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399302326-6917-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: fix thermal quirk SoC revision check
Thomas Petazzoni [Mon, 5 May 2014 15:05:22 +0000 (17:05 +0200)]
ARM: mvebu: fix thermal quirk SoC revision check

In commit 54fe26a900bc528f3df1e4235cb6b9ca5c6d4dc2 ('ARM: mvebu: Add
thermal quirk for the Armada 375 DB board'), a check on the Armada SoC
revision was added to decide whether a quirk for the thermal device
should be applied or not.

However, the quirk implementation has a bug: it assumes
mvebu_get_soc_id() returns true on success, but it returns
0. Therefore, the condition:

  if (mvebu_get_soc_id(&dev, &rev) && rev > ARMADA_375_Z1_REV)

is always false (as long as mvebu-soc-id is properly initialized). As
a consequence, the quirk is always applied, even on A0 steppings, for
which the quirk should not be applied.

This was spotted by testing the thermal driver on Armada 375 A0, which
Ezequiel could not do since he does not have access to the A0 revision
of the SoC for the moment.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1399302326-6917-2-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: 54fe26a900bc528f3df1e4235cb6b9ca5c6d4dc2 ('ARM: mvebu: Add thermal quirk for the Armada 375 DB board')
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: Kirkwood: t5325: Remove platform device to instantiate audio
Andrew Lunn [Sat, 3 May 2014 18:30:16 +0000 (20:30 +0200)]
ARM: Kirkwood: t5325: Remove platform device to instantiate audio

Remove platform device instantiating of the audio, which results in
board-t5325.c being removed. A DT node will be added to take its
place.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1399141819-23924-7-git-send-email-andrew@lunn.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: Kirkwood: Remove platform driver for codec
Andrew Lunn [Sat, 3 May 2014 18:30:12 +0000 (20:30 +0200)]
ARM: Kirkwood: Remove platform driver for codec

Remove the platform driver and platform data for the audio codec.
A DT node will replace it.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1399141819-23924-3-git-send-email-andrew@lunn.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: Add thermal quirk for the Armada 375 DB board
Ezequiel Garcia [Thu, 24 Apr 2014 20:23:22 +0000 (17:23 -0300)]
ARM: mvebu: Add thermal quirk for the Armada 375 DB board

The initial release of the Armada 375 DB board has an Armada 375
Z1 stepping silicon. This commit introduces a quirk that allows
to workaround a series of issues with the thermal sensor in this
stepping, but updating the devicetree:

  * Updates the compatible string for the thermal, so the driver
    can perform a specific initialization of the sensor.

  * Moves the offset of the thermal control register. This quirk
    allows to specifiy the correct (A0 stepping) offset in the
    devicetree.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1398371004-15807-9-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled
Ezequiel Garcia [Thu, 24 Apr 2014 11:34:36 +0000 (08:34 -0300)]
ARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled

HAVE_ARM_TWD depends on SMP, so we should only select it if
SMP is enabled, as the others platforms do.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1398339276-5754-1-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id
Gregory CLEMENT [Sat, 19 Apr 2014 16:32:50 +0000 (18:32 +0200)]
ARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id

The name of the two parameters of mvebu_get_soc_id were inverted. This
patch fix it in order to have a more readable code.

Reported-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397925170-8202-3-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: remove unnecessary ifdef around l2x0_of_init
Gregory CLEMENT [Sat, 19 Apr 2014 16:32:49 +0000 (18:32 +0200)]
ARM: mvebu: remove unnecessary ifdef around l2x0_of_init

l2x0_of_init function is always defined
arch/arm/include/asm/hardware/cache-l2x0.h: in case of
CONFIG_CACHE_L2X0 is not selected then a placeholder is defined.
Then there is no need to have ifdef around  l2x0_of_init.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397925170-8202-2-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: register the cpuidle driver for the Armada XP SoCs
Gregory CLEMENT [Mon, 14 Apr 2014 15:10:14 +0000 (17:10 +0200)]
ARM: mvebu: register the cpuidle driver for the Armada XP SoCs

The cpuidle is a platform driver so we register the device just after
the initialization of the board in an arch_initcall.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-12-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agocpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC
Gregory CLEMENT [Mon, 14 Apr 2014 15:10:13 +0000 (17:10 +0200)]
cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC

Add the wfi, cpu idle and cpu deep idle power states support for the
Armada XP SoCs.

All the latencies and the power consumption values used at the
"armada_370_xp_idle_driver" structure are preliminary and will be
modified in the future after running some measurements and analysis.

Based on the work of Nadav Haklai.

Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Link: https://lkml.kernel.org/r/1397488214-20685-11-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-11-git-send-email-gregory.clement@free-electrons.com
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: Register notifier callback for the cpuidle transition
Gregory CLEMENT [Mon, 14 Apr 2014 15:10:12 +0000 (17:10 +0200)]
ARM: mvebu: Register notifier callback for the cpuidle transition

In order to have well encapsulated code, we use notifier callbacks for
CPU_PM_ENTER and CPU_PM_EXIT inside the mvebu power management code.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-10-git-send-email-gregory.clement@free-electrons.com
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: refine which files are build in mach-mvebu
Thomas Petazzoni [Mon, 28 Apr 2014 18:20:39 +0000 (20:20 +0200)]
ARM: mvebu: refine which files are build in mach-mvebu

Following the integration into mach-mvebu of the Kirkwood ARMv5
support, we need to be more careful about which files get built. For
example, the pmsu.c file now calls wfi(), which only exists on ARMv7
platforms.

Therefore, this commit changes mach-mvebu/Makefile to build the Armada
370/XP/375/38x specific files only when CONFIG_MACH_MVEBU_V7 is
enabled.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1398709239-6126-1-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: Add the PMSU related part of the cpu idle functions
Gregory CLEMENT [Mon, 14 Apr 2014 15:10:11 +0000 (17:10 +0200)]
ARM: mvebu: Add the PMSU related part of the cpu idle functions

The cpu idle support will need to access to Power Management Service
Unit. This commit adds the architecture related functions that will be
used in the idle path of the cpuidle driver.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-9-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
10 years agoARM: mvebu: Allow to power down L2 cache controller in idle mode
Gregory CLEMENT [Mon, 14 Apr 2014 15:10:10 +0000 (17:10 +0200)]
ARM: mvebu: Allow to power down L2 cache controller in idle mode

This commit adds a function which adjusts the PMSU configuration to
automatically power down the L2 and coherency fabric when we enter a
certain idle state.

This feature is part of the Power Management Service Unit of the
Armada 370 and Armada XP SoCs.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397488214-20685-8-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>