openwrt/staging/blogic.git
8 years agodrm/amd/powerplay: set UVD clocks bypass mode for Polaris10
Eric Huang [Tue, 7 Jun 2016 21:01:27 +0000 (17:01 -0400)]
drm/amd/powerplay: set UVD clocks bypass mode for Polaris10

Saves power when not in use.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: stop trying to schedule() with a spin held
Christian König [Mon, 13 Jun 2016 14:12:42 +0000 (16:12 +0200)]
drm/amdgpu: stop trying to schedule() with a spin held

Drop the lock before calling cancel_delayed_work_sync().

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96445

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon/cik: fix CP jump table size
Alex Deucher [Thu, 9 Jun 2016 21:27:36 +0000 (17:27 -0400)]
drm/radeon/cik: fix CP jump table size

Align to the jump table offset. May fix hangs on some
asics with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx7: fix CP jump table size
Alex Deucher [Thu, 9 Jun 2016 21:22:56 +0000 (17:22 -0400)]
drm/amdgpu/gfx7: fix CP jump table size

Align to the jump table offset.  May fix hangs on some
asics with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: fix CP jump table size
Alex Deucher [Thu, 9 Jun 2016 21:17:07 +0000 (17:17 -0400)]
drm/amdgpu/gfx8: fix CP jump table size

Align to the jump table offset. Fixes hangs on some
systems with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu : adding new tracepoints to track memory information.
David Mao [Tue, 7 Jun 2016 09:48:52 +0000 (17:48 +0800)]
drm/amd/amdgpu : adding new tracepoints to track memory information.

 - adding amdgpu_cs_bo_status to track total size and
   total entry count of bo for each submission.
 - adding amdgpu_ttm_bo_move to track the bo eviction
   including the size of bo and the location before/after the move

Signed-off-by: David Mao <David.Mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu : Refine tracepoints to track more information
David Mao [Tue, 7 Jun 2016 09:43:51 +0000 (17:43 +0800)]
drm/amd/amdgpu : Refine tracepoints to track more information

 - adding memory type, prefered heap, allowed heap, and host visible
   information to the amdgpu_bo_create tracepoint.
 - adding bo size to the amdgpu_bo_list_set tracepoint.

Signed-off-by: David Mao <David.Mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/uvd6: De-numberify startup
Tom St Denis [Tue, 7 Jun 2016 17:04:36 +0000 (13:04 -0400)]
drm/amdgpu/uvd6: De-numberify startup

To make the code more legible various numerical constants
have been changed to their #define'ed MASKs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize the variables in a straight-forward way
Alex Xie [Mon, 6 Jun 2016 22:21:09 +0000 (18:21 -0400)]
drm/amdgpu: Initialize the variables in a straight-forward way

Initialize the variable in a straight-forward way instead of
hiding the initialization inside the loop. This can also
reduce one function call.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Add comment to describe the purpose of one difficult if statement
Alex Xie [Mon, 6 Jun 2016 22:14:57 +0000 (18:14 -0400)]
drm/amdgpu: Add comment to describe the purpose of one difficult if statement

Use == instead of != in the if statement to make code easier understood

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Change some variable names to make code easier understood
Alex Xie [Mon, 6 Jun 2016 22:13:26 +0000 (18:13 -0400)]
drm/amdgpu: Change some variable names to make code easier understood

Add comment to describe some variables otherwise.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable BUS master after pci reset
Chunming Zhou [Mon, 6 Jun 2016 05:50:18 +0000 (13:50 +0800)]
drm/amdgpu: enable BUS master after pci reset

Re-enable bus mastering after GPU reset. We disable it
at the top of these functions, so balance them by
re-enabling it.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
eviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add return value for pci config reset
Chunming Zhou [Mon, 6 Jun 2016 05:06:45 +0000 (13:06 +0800)]
drm/amdgpu: add return value for pci config reset

So we know whether or not the reset succeeded.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove now unnecessary checks
Christian König [Wed, 1 Jun 2016 11:31:17 +0000 (13:31 +0200)]
drm/amdgpu: remove now unnecessary checks

vm_flush() now comes directly after vm_grab_id().

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use a fence array for VMID management
Christian König [Wed, 1 Jun 2016 08:47:36 +0000 (10:47 +0200)]
drm/amdgpu: use a fence array for VMID management

Just wait for any fence to become available, instead
of waiting for the last entry of the LRU.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: reuse VMIDs assigned to a VM only if there is also a free one
Christian König [Mon, 23 May 2016 14:00:32 +0000 (16:00 +0200)]
drm/amdgpu: reuse VMIDs assigned to a VM only if there is also a free one

This fixes a fairness problem with the GPU scheduler. VM having lot of
jobs could previously starve VM with less jobs.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: prefer VMIDs idle on the current ring
Christian König [Mon, 23 May 2016 13:30:08 +0000 (15:30 +0200)]
drm/amdgpu: prefer VMIDs idle on the current ring

Prefer to use a VMIDs which are idle on the ring we want to submit to. This
also removes bubbling idle VMIDs up on the LRU, which is actually not
beneficial.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add optional ring to amdgpu_sync_is_idle
Christian König [Mon, 23 May 2016 12:26:39 +0000 (14:26 +0200)]
drm/amdgpu: add optional ring to amdgpu_sync_is_idle

Check if the sync object is idle depending on the ring a submission works with.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove amdgpu_sync_wait
Christian König [Fri, 20 May 2016 11:06:09 +0000 (13:06 +0200)]
drm/amdgpu: remove amdgpu_sync_wait

Stop hiding bugs, instead print a proper error when the scheduler
doesn't handle all dependencies.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: generalize the scheduler fence
Christian König [Fri, 20 May 2016 10:53:52 +0000 (12:53 +0200)]
drm/amdgpu: generalize the scheduler fence

Make it two events, one for the job being scheduled and one when it is finished.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: document amdgpu_sync_get_fence
Christian König [Mon, 23 May 2016 14:19:44 +0000 (16:19 +0200)]
drm/amdgpu: document amdgpu_sync_get_fence

It's not obvious what it should do.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.
Tom St Denis [Fri, 3 Jun 2016 18:31:46 +0000 (14:31 -0400)]
drm/amdgpu/gfx80:  Add QUICK_PG bit to GFX header and use it.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: Tidy up various PG helpers
Tom St Denis [Fri, 3 Jun 2016 16:52:03 +0000 (12:52 -0400)]
drm/amdgpu/gfx8: Tidy up various PG helpers

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: Enable PG on Stoney
Tom St Denis [Thu, 2 Jun 2016 12:53:35 +0000 (08:53 -0400)]
drm/amdgpu/gfx8: Enable PG on Stoney

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: Enable CG on Stoney
Tom St Denis [Thu, 2 Jun 2016 12:52:39 +0000 (08:52 -0400)]
drm/amdgpu/gfx8: Enable CG on Stoney

Enable all relevant CG flags for Stoney parts.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: Switch Stoney to share CZ's RLC functions
Tom St Denis [Thu, 2 Jun 2016 12:51:15 +0000 (08:51 -0400)]
drm/amdgpu/gfx8: Switch Stoney to share CZ's RLC functions

According to the bringup code ST/CZ share the RLC
ENTER/EXIT logic.

Tested on my ST board.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add amdgpu.cg_mask and amdgpu.pg_mask parameters
Nicolai Hähnle [Thu, 2 Jun 2016 10:32:07 +0000 (12:32 +0200)]
drm/amdgpu: add amdgpu.cg_mask and amdgpu.pg_mask parameters

They allow disabling clock and power gating from the kernel command line,
which hopefully helps with diagnosing problems in the field.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/trace: Add tracepoints to MMIO read/writes
Tom St Denis [Tue, 31 May 2016 12:02:27 +0000 (08:02 -0400)]
drm/amdgpu/trace:  Add tracepoints to MMIO read/writes

Add tracepoints to the MMIO read/write so we can log
MMIO traffic.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: print smc fw info in CGS.
yanyang1 [Mon, 30 May 2016 07:30:54 +0000 (15:30 +0800)]
drm/amdgpu: print smc fw info in CGS.

The non-powerplay code handles this directly.  Do
it in cgs for powerplay.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Rex Zhu Rex.Zhu@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: properly clean up runtime pm
Alex Deucher [Fri, 3 Jun 2016 22:21:41 +0000 (18:21 -0400)]
drm/amdgpu: properly clean up runtime pm

Was missing the calls to fini.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: work around lack of upstream ACPI support for D3cold
Alex Deucher [Fri, 3 Jun 2016 21:10:33 +0000 (17:10 -0400)]
drm/radeon: work around lack of upstream ACPI support for D3cold

Until Dave's patch to support the new hybrid gfx ACPI method goes
upstream, we can fallback to the old ATPX method which seems to
still work.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: work around lack of upstream ACPI support for D3cold
Alex Deucher [Fri, 3 Jun 2016 21:06:18 +0000 (17:06 -0400)]
drm/amdgpu: work around lack of upstream ACPI support for D3cold

Until Dave's patch to support the new hybrid gfx ACPI method goes
upstream, we can fallback to the old ATPX method which seems to
still work.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add gpu reset to timeout handler
Chunming Zhou [Mon, 30 May 2016 01:58:50 +0000 (09:58 +0800)]
drm/amdgpu: add gpu reset to timeout handler

so that we could actually reset the GPU when it hangs.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix ring debugfs bug
Monk Liu [Tue, 14 Jun 2016 16:02:21 +0000 (12:02 -0400)]
drm/amdgpu: fix ring debugfs bug

debugfs file added but not released after driver unloaded

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: ring debugfs is read in increments of 4 bytes
Tom St Denis [Mon, 2 May 2016 12:35:35 +0000 (08:35 -0400)]
drm/amd/amdgpu: ring debugfs is read in increments of 4 bytes

If a user tries to read a non-multiple of 4 bytes it would have
read until the end of the ring potentially crashing the user
task.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Convert ring debugfs entries to binary
Tom St Denis [Wed, 27 Apr 2016 16:41:16 +0000 (12:41 -0400)]
drm/amd/amdgpu: Convert ring debugfs entries to binary

They now emit ring data in binary which will be read/written by
the userspace tool umr shortly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: drop explicit pci D3/D0 setting for ATPX power control
Alex Deucher [Thu, 2 Jun 2016 13:31:59 +0000 (09:31 -0400)]
drm/radeon: drop explicit pci D3/D0 setting for ATPX power control

The ATPX power control method does this for you.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon/atpx: hybrid platforms use d3cold
Alex Deucher [Thu, 2 Jun 2016 13:27:03 +0000 (09:27 -0400)]
drm/radeon/atpx: hybrid platforms use d3cold

The platform d3 cold is used to power down the dGPU.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon/atpx: track whether if this is a hybrid graphics platform
Alex Deucher [Thu, 2 Jun 2016 13:24:53 +0000 (09:24 -0400)]
drm/radeon/atpx: track whether if this is a hybrid graphics platform

hybrid graphics in this case refers to systems which use the new
platform d3 cold ACPI methods as opposed to ATPX for dGPU power
control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: drop explicit pci D3/D0 setting for ATPX power control
Alex Deucher [Thu, 2 Jun 2016 13:18:34 +0000 (09:18 -0400)]
drm/amdgpu: drop explicit pci D3/D0 setting for ATPX power control

The ATPX power control method does this for you.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/atpx: hybrid platforms use d3cold
Alex Deucher [Thu, 2 Jun 2016 13:08:32 +0000 (09:08 -0400)]
drm/amdgpu/atpx: hybrid platforms use d3cold

The platform d3 cold is used to power down the dGPU.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/atpx: track whether if this is a hybrid graphics platform
Alex Deucher [Thu, 2 Jun 2016 13:04:01 +0000 (09:04 -0400)]
drm/amdgpu/atpx: track whether if this is a hybrid graphics platform

hybrid graphics in this case refers to systems which use the new
platform d3 cold ACPI methods as opposed to ATPX for dGPU power
control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon/atpx: drop forcing of dGPU power control
Alex Deucher [Wed, 1 Jun 2016 19:13:24 +0000 (15:13 -0400)]
drm/radeon/atpx: drop forcing of dGPU power control

Now that we handle this correctly, there is no need to force
it.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: use PCI_D3hot for PX systems without dGPU power control
Alex Deucher [Wed, 1 Jun 2016 19:07:44 +0000 (15:07 -0400)]
drm/radeon: use PCI_D3hot for PX systems without dGPU power control

On PX systems without dGPU power control, use PCI_D3hot.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon/atpx: add a query for ATPX dGPU power control
Alex Deucher [Wed, 1 Jun 2016 19:05:05 +0000 (15:05 -0400)]
drm/radeon/atpx: add a query for ATPX dGPU power control

The runtime pm sequence is different depending on whether or
not the platform supports ATPX dGPU power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: add a delay after ATPX dGPU power off
Alex Deucher [Wed, 1 Jun 2016 16:58:36 +0000 (12:58 -0400)]
drm/radeon: add a delay after ATPX dGPU power off

ATPX dGPU power control requires a 200ms delay between
power off and on.  This should fix dGPU failures on
resume from power off.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/radeon: clean up atpx power control handling
Alex Deucher [Wed, 1 Jun 2016 16:47:38 +0000 (12:47 -0400)]
drm/radeon: clean up atpx power control handling

The presence of the power control method should be determined
via the presence of the method in function 0.  However, some
sbioses only set the appropriate bits in function 1 so use
then to override a missing power control function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: disable power control on hybrid laptops
Alex Deucher [Wed, 1 Jun 2016 16:20:16 +0000 (12:20 -0400)]
drm/radeon: disable power control on hybrid laptops

Windows 10 (and some 8.1) systems use standardized
ACPI calls for hybrid laptops to control dGPU power.
Detect those cases and disable the AMD specific ATPX
power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/atpx: drop forcing of dGPU power control
Alex Deucher [Wed, 1 Jun 2016 17:14:48 +0000 (13:14 -0400)]
drm/amdgpu/atpx: drop forcing of dGPU power control

Now that we handle this correctly, there is no need to force
it.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use PCI_D3hot for PX systems without dGPU power control
Alex Deucher [Wed, 1 Jun 2016 17:12:25 +0000 (13:12 -0400)]
drm/amdgpu: use PCI_D3hot for PX systems without dGPU power control

On PX systems without dGPU power control, use PCI_D3hot.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/atpx: add a query for ATPX dGPU power control
Alex Deucher [Wed, 1 Jun 2016 17:08:21 +0000 (13:08 -0400)]
drm/amdgpu/atpx: add a query for ATPX dGPU power control

The runtime pm sequence is different depending on whether or
not the platform supports ATPX dGPU power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add a delay after ATPX dGPU power off
Alex Deucher [Wed, 1 Jun 2016 16:54:33 +0000 (12:54 -0400)]
drm/amdgpu: add a delay after ATPX dGPU power off

ATPX dGPU power control requires a 200ms delay between
power off and on.  This should fix dGPU failures on
resume from power off.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/amdgpu: clean up atpx power control handling
Alex Deucher [Wed, 1 Jun 2016 16:42:35 +0000 (12:42 -0400)]
drm/amdgpu: clean up atpx power control handling

The presence of the power control method should be determined
via the presence of the method in function 0.  However, some
sbioses only set the appropriate bits in function 1 so use
then to override a missing power control function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: disable power control on hybrid laptops
Alex Deucher [Wed, 1 Jun 2016 16:28:13 +0000 (12:28 -0400)]
drm/amdgpu: disable power control on hybrid laptops

Windows 10 (and some 8.1) systems use standardized
ACPI calls for hybrid laptops to control dGPU power.
Detect those cases and disable the AMD specific ATPX
power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: allow PACKET3_PFP_SYNC_ME on evergreen
Edmondo Tommasina [Mon, 30 May 2016 23:11:14 +0000 (01:11 +0200)]
drm/radeon: allow PACKET3_PFP_SYNC_ME on evergreen

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable
Tom St Denis [Thu, 26 May 2016 13:47:44 +0000 (09:47 -0400)]
drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable

Must wait for SERDES idle before exiting RLC SAFEMODE

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add mclk OD(overdrive) support for Polaris10
Eric Huang [Tue, 24 May 2016 20:22:34 +0000 (16:22 -0400)]
drm/amd/powerplay: add mclk OD(overdrive) support for Polaris10

The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add mclk OD(overdrive) support for Fiji
Eric Huang [Tue, 24 May 2016 20:14:50 +0000 (16:14 -0400)]
drm/amd/powerplay: add mclk OD(overdrive) support for Fiji

The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add mclk OD(overdrive) support for Tonga
Eric Huang [Tue, 24 May 2016 20:13:25 +0000 (16:13 -0400)]
drm/amd/powerplay: add mclk OD(overdrive) support for Tonga

The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add mclk OD(overdrive) support for CI
Eric Huang [Tue, 24 May 2016 19:43:53 +0000 (15:43 -0400)]
drm/amdgpu: add mclk OD(overdrive) support for CI

The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add the common code to support mclk OD
Eric Huang [Tue, 24 May 2016 19:11:17 +0000 (15:11 -0400)]
drm/amdgpu: add the common code to support mclk OD

This implements mclk OverDrive(OD) through sysfs.
The new entry pp_mclk_od is read/write. The value of input/output
is an integer of the overclocking percentage.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add powercontainment module parameter
Huang Rui [Tue, 24 May 2016 05:47:05 +0000 (13:47 +0800)]
drm/amdgpu: add powercontainment module parameter

This patch makes powercontainment feature configurable. Currently, the
powercontainment is not very stable, so add a module parameter to
enable/disable it via user mode.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix and cleanup job destruction
Christian König [Thu, 19 May 2016 07:54:15 +0000 (09:54 +0200)]
drm/amdgpu: fix and cleanup job destruction

Remove the job reference counting and just properly destroy it from a
work item which blocks on any potential running timeout handler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move locking into the functions who need it
Christian König [Wed, 18 May 2016 13:40:58 +0000 (15:40 +0200)]
drm/amdgpu: move locking into the functions who need it

Otherwise the locking becomes rather confusing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: properly abstract scheduler timeout handling
Christian König [Wed, 18 May 2016 12:19:32 +0000 (14:19 +0200)]
drm/amdgpu: properly abstract scheduler timeout handling

The driver shouldn't mess with the scheduler internals.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove use_shed hack in job cleanup
Christian König [Wed, 18 May 2016 11:12:12 +0000 (13:12 +0200)]
drm/amdgpu: remove use_shed hack in job cleanup

Remembering the code path in a variable to cleanup
differently is usually not a good idea at all.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix coding style in amdgpu_job_free
Christian König [Wed, 18 May 2016 11:09:47 +0000 (13:09 +0200)]
drm/amdgpu: fix coding style in amdgpu_job_free

Ther should be a new line between code and decleration.
Also use amdgpu_ib_free() instead of releasing the member manually.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove duplicated timeout callback
Christian König [Wed, 18 May 2016 11:04:02 +0000 (13:04 +0200)]
drm/amdgpu: remove duplicated timeout callback

No need for double housekeeping here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove begin_job/finish_job
Christian König [Wed, 18 May 2016 11:00:38 +0000 (13:00 +0200)]
drm/amdgpu: remove begin_job/finish_job

Completely pointless and confusing to use a callback
to call into the same code file.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix coding style in the scheduler v2
Christian König [Wed, 18 May 2016 07:43:07 +0000 (09:43 +0200)]
drm/amdgpu: fix coding style in the scheduler v2

v2: fix even more

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add the CI code to enable sclk OD(OverDrive)
Eric Huang [Thu, 19 May 2016 19:54:35 +0000 (15:54 -0400)]
drm/amdgpu: add the CI code to enable sclk OD(OverDrive)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add the CI code to enable clock level selection
Eric Huang [Thu, 19 May 2016 19:50:09 +0000 (15:50 -0400)]
drm/amdgpu: add the CI code to enable clock level selection

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add the new common pm code to support sclk OD
Eric Huang [Thu, 19 May 2016 19:46:10 +0000 (15:46 -0400)]
drm/amdgpu: add the new common pm code to support sclk OD

This extends OD (OverDrive) support to the non-Powerplay code paths.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add the new common pm code to select the clock levels
Eric Huang [Thu, 19 May 2016 19:41:25 +0000 (15:41 -0400)]
drm/amdgpu: add the new common pm code to select the clock levels

This extends dpm clock level selection to the non-powerplay code paths.
This interface can be used to select individual clock levels.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: Enable GFX PG on CZ
Tom St Denis [Tue, 17 May 2016 11:40:16 +0000 (07:40 -0400)]
drm/amdgpu/gfx8: Enable GFX PG on CZ

Based on Alex's patches this enables GFX PG on CZ.

Tested with xonotic-glx/glxgears/supertuxkart and idle desktop.
Also read-back registers via umr for verificiation that the bits
are truly enabled.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: clean up polaris11 PG enable
Alex Deucher [Wed, 4 May 2016 14:13:35 +0000 (10:13 -0400)]
drm/amdgpu/gfx8: clean up polaris11 PG enable

Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: add powergating support for CZ/ST
Alex Deucher [Wed, 4 May 2016 14:07:22 +0000 (10:07 -0400)]
drm/amdgpu/gfx8: add powergating support for CZ/ST

This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add new GFX powergating types
Alex Deucher [Wed, 4 May 2016 14:06:21 +0000 (10:06 -0400)]
drm/amdgpu: add new GFX powergating types

Add some new GFX powergating flags.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: rename some pg functions
Alex Deucher [Tue, 3 May 2016 22:13:45 +0000 (18:13 -0400)]
drm/amdgpu/gfx8: rename some pg functions

So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating
Alex Deucher [Tue, 3 May 2016 21:39:32 +0000 (17:39 -0400)]
drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating

This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon/gfx7: expand cp jt size to handle GDS as well
Alex Deucher [Tue, 3 May 2016 21:48:41 +0000 (17:48 -0400)]
drm/radeon/gfx7: expand cp jt size to handle GDS as well

The size needs to handle the CP JT and GDS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx7: expand cp jt size to handle GDS as well
Alex Deucher [Tue, 3 May 2016 21:45:18 +0000 (17:45 -0400)]
drm/amdgpu/gfx7: expand cp jt size to handle GDS as well

The size needs to handle the CP JT and GDS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add sclk OD support on Polaris10
Eric Huang [Thu, 12 May 2016 19:19:10 +0000 (15:19 -0400)]
drm/amd/powerplay: add sclk OD support on Polaris10

This implements sclk overdrive(OD) overclocking support for Polaris10,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add sclk OD support on Tonga
Eric Huang [Thu, 12 May 2016 19:10:49 +0000 (15:10 -0400)]
drm/amd/powerplay: add sclk OD support on Tonga

This implements sclk overdrive(OD) overclocking support for Tonga,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add sclk OD support on Fiji
Eric Huang [Thu, 12 May 2016 19:06:10 +0000 (15:06 -0400)]
drm/amd/powerplay: add sclk OD support on Fiji

This implements sclk overdrive(OD) overclocking support for Fiji,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add powerplay sclk OD support through sysfs (v2)
Eric Huang [Thu, 12 May 2016 18:51:21 +0000 (14:51 -0400)]
drm/amdgpu: add powerplay sclk OD support through sysfs (v2)

Add a new sysfs entry pp_sclk_od to support sclk overdrive(OD) overclocking,
the entry is read/write, the value of input/output is an integer which is the
over percentage of the highest sclk.

v2: drop extra semicolon

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: load different smc firmware on some CI variants
Alex Deucher [Thu, 10 Dec 2015 04:55:45 +0000 (23:55 -0500)]
drm/radeon: load different smc firmware on some CI variants

The power tables on some variants require different firmware.
This may fix stability issues on some newer CI parts.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: load different smc firmware on some SI variants
Alex Deucher [Thu, 10 Dec 2015 04:48:11 +0000 (23:48 -0500)]
drm/radeon: load different smc firmware on some SI variants

The power tables on some variants require different firmware.
This may fix stability issues on some newer SI parts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: load different smc firmware on some CI variants
Alex Deucher [Thu, 10 Dec 2015 05:49:32 +0000 (00:49 -0500)]
drm/amdgpu: load different smc firmware on some CI variants

The power tables on some variants require different firmware.
This fixes stability issues on some newer CI parts.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: clear RB at ring init
Monk Liu [Wed, 1 Jun 2016 21:37:21 +0000 (17:37 -0400)]
drm/amdgpu: clear RB at ring init

This help fix reloading driver hang issue of SDMA
ring.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoMerge tag 'asoc-hdmi-codec-pdata' of git://git.kernel.org/pub/scm/linux/kernel/git...
Dave Airlie [Mon, 4 Jul 2016 23:43:02 +0000 (09:43 +1000)]
Merge tag 'asoc-hdmi-codec-pdata' of git://git./linux/kernel/git/broonie/sound into drm-next

ASoC: Add private data for HDMI CODEC callbacks

Allow the HDMI CODECs to get private data passed in in callbacks.

[airlied:
Add STI/mediatek patches from Arnd for drivers merged later in drm tree.]

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
* tag 'asoc-hdmi-codec-pdata' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound:
  ASoC: hdmi-codec: callback function will be called with private data

8 years agoMerge branch 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next
Dave Airlie [Sat, 2 Jul 2016 06:21:35 +0000 (16:21 +1000)]
Merge branch 'for-next' of git.agner.ch/git/linux-drm-fsl-dcu into drm-next

The patchset contains a new helper in drm_fb_cma_helper.c for suspend/
resume when using cma backed framebuffers.

* 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu:
  drm/fsl-dcu: disable vblank events on CRTC disable
  drm/fsl-dcu: implement suspend/resume using atomic helpers
  drm/fsl-dcu: use clk helpers
  drm/fsl-dcu: move layer initialization to plane file
  drm/fsl-dcu: store layer registers in soc_data
  drm/fb_cma_helper: add suspend helper

8 years agoBack-merge tag 'v4.7-rc5' into drm-next
Dave Airlie [Sat, 2 Jul 2016 05:56:01 +0000 (15:56 +1000)]
Back-merge tag 'v4.7-rc5' into drm-next

Linux 4.7-rc5

The fsl-dcu pull needs -rc3 so go to -rc5 for now.

8 years agoMerge branch 'sti-drm-next-2016-06-30' of http://git.linaro.org/people/benjamin.gaign...
Dave Airlie [Sat, 2 Jul 2016 05:51:46 +0000 (15:51 +1000)]
Merge branch 'sti-drm-next-2016-06-30' of git.linaro.org/people/benjamin.gaignard/kernel into drm-next

This pull request include 3 minors fix and one feature evolution
around ASoC hdmi codec support.

* 'sti-drm-next-2016-06-30' of http://git.linaro.org/people/benjamin.gaignard/kernel:
  drm: sti: Add ASoC generic hdmi codec support.
  drm/sti: adjust delay for AWG
  drm: sti: fix clocking issues in crtc
  drm/sti: Use 64-bit timestamps

8 years agodrm: sti: Add ASoC generic hdmi codec support.
Arnaud Pouliquen [Mon, 30 May 2016 13:31:37 +0000 (15:31 +0200)]
drm: sti: Add ASoC generic hdmi codec support.

Add the interface needed by audio hdmi-codec driver.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
8 years agoASoC: hdmi-codec: callback function will be called with private data
Kuninori Morimoto [Fri, 24 Jun 2016 02:47:55 +0000 (02:47 +0000)]
ASoC: hdmi-codec: callback function will be called with private data

Current hdmi-codec driver is assuming that it will be registered
from HDMI driver. Because of this assumption, each callback function
has struct device pointer which is parent device (= HDMI).
Then, it can use dev_get_drvdata() to get private data.

OTOH, on some SoC/HDMI case, SoC has VIDEO/SOUND and HDMI IPs.
This case, it needs SoC VIDEO, SoC SOUND and HDMI video, HDMI codec
driver. In DesignWare HDMI IP case, SoC VIDEO (= DRM/KMS) driver tries
to bind DesignWare HDMI video driver, and HDMI codec driver
(= hdmi-codec). This case, above "parent device" of HDMI codec driver
is DRM/KMS driver and its "device" already has private data.

And, from DT and ASoC CPU/Codec/Card binding point of view, HDMI codec
(= hdmi-codec) needs to have "parent device" (= DRM/KMS), otherwise,
it never detect sound card.

Because of these reasons, some driver can't use dev_get_drvdata() to
get private data on hdmi-codec driver. This patch add new void pointer
on hdmi_codec_pdata for private data, and callback function will be
called with it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
8 years agodrm/sti: adjust delay for AWG
Bich Hemon [Tue, 15 Mar 2016 16:11:14 +0000 (17:11 +0100)]
drm/sti: adjust delay for AWG

Compensate delay introduced by AWG IP during DE generation

Signed-off-by: Bich Hemon <bich.hemon@st.com>
Reviewed-by: Vincent ABRIOU <vincent.abriou@st.com>
8 years agodrm: sti: fix clocking issues in crtc
Benjamin Gaignard [Thu, 26 May 2016 08:39:20 +0000 (10:39 +0200)]
drm: sti: fix clocking issues in crtc

fix and simplify clock management in crtc to avoid unbalanced
call to clk_prepare_enable and clk_disable_unprepare functions
remove unused functions

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
8 years agodrm/sti: Use 64-bit timestamps
Tina Ruchandani [Wed, 13 Apr 2016 09:28:02 +0000 (02:28 -0700)]
drm/sti: Use 64-bit timestamps

'struct timespec' uses a 32-bit field for seconds, which
will overflow in year 2038 and beyond. This patch is part
of a larger attempt to remove instances of timeval, timespec
and time_t, all of which suffer from the y2038 issue, from the
kernel.

Signed-off-by: Tina Ruchandani <ruchandani.tina@gmail.com>
8 years agoLinux 4.7-rc5
Linus Torvalds [Mon, 27 Jun 2016 00:52:03 +0000 (17:52 -0700)]
Linux 4.7-rc5