project/bcm63xx/u-boot.git
8 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Sun, 30 Oct 2016 12:11:50 +0000 (08:11 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi

8 years agotools: add mksunxiboot to tools-all target
Stefan Brüns [Sat, 29 Oct 2016 10:23:18 +0000 (12:23 +0200)]
tools: add mksunxiboot to tools-all target

mksunxiboot is useful outside of u-boot, it is e.g. used by sunxi-tools.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: A64: enable USB support
Amit Singh Tomar [Fri, 21 Oct 2016 01:24:30 +0000 (02:24 +0100)]
sunxi: A64: enable USB support

Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Update DRAM clock for Olimex A20 boards
Stefan Mavrodiev [Sat, 29 Oct 2016 12:34:07 +0000 (14:34 +0200)]
sunxi: Update DRAM clock for Olimex A20 boards

Originally dram clock was set to 480MHz, but this behaves
unstable. To improve stability the clock is reduced to 384MHz

Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: dts: Pine64: add Ethernet alias
Andre Przywara [Fri, 21 Oct 2016 00:11:46 +0000 (01:11 +0100)]
sunxi: dts: Pine64: add Ethernet alias

The sun8i-emac driver works fine with the A64 Ethernet IP, but we are
missing an alias entry to trigger the driver instantiation by U-Boot.
Add the line to point U-Boot to the Ethernet DT node.
This enables TFTP boot on the Pine64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT defines
Masahiro Yamada [Thu, 13 Oct 2016 15:40:01 +0000 (00:40 +0900)]
sunxi: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT defines

ARCH_SUNXI selects DM_USB, where CONFIG_USB_MAX_CONTROLLER_COUNT
is not used.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXI
Jagan Teki [Thu, 13 Oct 2016 08:49:35 +0000 (14:19 +0530)]
sunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXI

CONFIG_SUNXI -> CONFIG_ARCH_SUNXI
and removed CONFIG_SUNIX from config_whitelist.txt

Cc: Simon Glass <sjg@chromium.org>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sat, 29 Oct 2016 21:16:00 +0000 (17:16 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sat, 29 Oct 2016 21:15:37 +0000 (17:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

8 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Sat, 29 Oct 2016 21:15:24 +0000 (17:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

8 years agodrivers: USB: OHCI: allow compilation for 64-bit targets
Andre Przywara [Fri, 21 Oct 2016 01:24:29 +0000 (02:24 +0100)]
drivers: USB: OHCI: allow compilation for 64-bit targets

OHCI has a known limitation of allowing only 32-bit DMA buffer
addresses, so we have a lot of u32 variables around, which are assigned
to pointers and vice versa. This obviously creates issues with 64-bit
systems, so the compiler complains here and there.
To allow compilation for 64-bit boards which use only memory below 4GB
anyway (and to avoid more invasive fixes), adjust some casts and types
and assume that the EDs and TDs are all located in the lower 4GB.
This fixes compilation of the OHCI driver for the Pine64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
8 years agoconfigs/chromebox_panther_defconfig: Re-enable CONFIG_DM_PCI
Tom Rini [Sat, 29 Oct 2016 12:41:45 +0000 (08:41 -0400)]
configs/chromebox_panther_defconfig: Re-enable CONFIG_DM_PCI

This was turned off by accident, re-enble.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMAINTAINERS: Update Jagan's email
Jagan Teki [Fri, 28 Oct 2016 17:57:34 +0000 (23:27 +0530)]
MAINTAINERS: Update Jagan's email

Signed-off-by: Jagan Teki <jagan@openedev.com>
8 years agotravis-ci: build Tegra boards
Stephen Warren [Wed, 26 Oct 2016 19:05:52 +0000 (13:05 -0600)]
travis-ci: build Tegra boards

ARMv7 Tegra boards aren't currently covered by any other travis-ci jobs.
Add a new job to build them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agotravis-ci: compile with buildman when running test/py
Stephen Warren [Wed, 26 Oct 2016 17:05:36 +0000 (11:05 -0600)]
travis-ci: compile with buildman when running test/py

Use buildman to compile any U-Boot binary tested by test/py. This
re-uses all the work done elsewhere to make buildman work within
Travis-CI, in particular related to toolchain downloading and buildman
config file creation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agoARM: uniphier: update DRAM init code for LD11 SoC
Masahiro Yamada [Thu, 27 Oct 2016 14:47:10 +0000 (23:47 +0900)]
ARM: uniphier: update DRAM init code for LD11 SoC

Introduce run-time DDR PHY training.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: support DDR PHY parameter dump command for LD11
Masahiro Yamada [Thu, 27 Oct 2016 14:47:09 +0000 (23:47 +0900)]
ARM: uniphier: support DDR PHY parameter dump command for LD11

Add the LD11 SoC data and adjuts the printf() format because this is
a 64-bit SoC.  Otherwise, 16-digits pointer addresses would break
the log format.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: refactor DDR PHY parameter dump command
Masahiro Yamada [Thu, 27 Oct 2016 14:47:08 +0000 (23:47 +0900)]
ARM: uniphier: refactor DDR PHY parameter dump command

Do not hard-code the number of DX blocks because it is a different
value for LD11 SoC.

Move the macro NR_DATX8_PER_DDRPHY to ddrphy-training.c since it
is the last user.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoC
Masahiro Yamada [Thu, 27 Oct 2016 14:47:07 +0000 (23:47 +0900)]
ARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoC

The DDR PHY register view of LD11 is slightly different from that
of LD4/Pro4/sLD8, but it will be possible to share the register
macros (and I want to re-use as much code as possible).  Change
the code in the more flexible form.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3
Masahiro Yamada [Thu, 27 Oct 2016 14:47:06 +0000 (23:47 +0900)]
ARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3

The USB boot without the stand-by MPU is available on ES3 or later
of LD11 SoC, but the code in this if-conditional block must not be
run when booting from USB.  Check if the boot device is USB, and
skip the code in the case.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabled
Masahiro Yamada [Thu, 27 Oct 2016 14:47:05 +0000 (23:47 +0900)]
ARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabled

At the moment, the clk driver is not clever enough to automatically
enable parent clocks like Linux.  Enable the STDMAC clock explicitly
if USB is enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8
Masahiro Yamada [Thu, 27 Oct 2016 14:47:04 +0000 (23:47 +0900)]
ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8

The status register should be polled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h
Masahiro Yamada [Thu, 27 Oct 2016 14:47:03 +0000 (23:47 +0900)]
ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h

This PHY might be used for other SoCs in the future.
Avoid including the SoC name in the header name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: update DRAM init code for LD20 SoC (3rd)
Masahiro Yamada [Thu, 27 Oct 2016 14:47:02 +0000 (23:47 +0900)]
ARM: uniphier: update DRAM init code for LD20 SoC (3rd)

  - Constify UMC setting data arrays
  - Merge data arrays *_d0 and *_d1.
  - Add PHY parameters for LD20 C1 board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: remove unused board attribute macros
Masahiro Yamada [Thu, 27 Oct 2016 14:47:01 +0000 (23:47 +0900)]
ARM: uniphier: remove unused board attribute macros

After SoC evaluation, they turned out unnecessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: enable SSC for more PLLs for LD20 SoC
Masahiro Yamada [Thu, 27 Oct 2016 14:47:00 +0000 (23:47 +0900)]
ARM: uniphier: enable SSC for more PLLs for LD20 SoC

For Electro-Magnetic Compatibility.

Set CPLL, SPLL2, MPLL, VPPLL, GPPLL, DPLL* to SSC rate 1 percent.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: remove unneeded mdelay() in PLL setting function
Masahiro Yamada [Wed, 19 Oct 2016 07:26:49 +0000 (16:26 +0900)]
ARM: uniphier: remove unneeded mdelay() in PLL setting function

This delay is already cared by the callers of this function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoARM: uniphier: adjust fdt_file environment handling to latest Linux
Masahiro Yamada [Mon, 17 Oct 2016 13:18:02 +0000 (22:18 +0900)]
ARM: uniphier: adjust fdt_file environment handling to latest Linux

The environment fdt_file is useful to remember the appropriate DTB
file name.  Adjust it to the recent renaming in the upstream kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agotravis-ci: don't invoke exit on success
Stephen Warren [Wed, 26 Oct 2016 17:05:35 +0000 (11:05 -0600)]
travis-ci: don't invoke exit on success

Invoking exit prevents any subsequent build commands from running, and
future patches will add extra commands.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agotravis-ci: use buildman -P everywhere
Stephen Warren [Wed, 26 Oct 2016 17:05:34 +0000 (11:05 -0600)]
travis-ci: use buildman -P everywhere

This places build results into a board-specific directory rather than a
buildman-thread-specific directory. This is required so that we can
access the directory from test.py, and there's no risk of a particular
build's results being over-written by another build performed by the
same thread.

In theory, this can lead to slower builds when building many different
boards in a single buildman thread, since it removes the possibility of
incremental builds between boards. In practice however I didn't notice
longer build times when when enabling this option; if anything build
times decreased although I suspect that's simply due to general
variations in build performance across different machines within the
Travis CI infra-structure.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agotravis-ci: centralize ~/.buildman editing
Stephen Warren [Wed, 26 Oct 2016 17:05:33 +0000 (11:05 -0600)]
travis-ci: centralize ~/.buildman editing

Any time an x86 toolchain is used, we need to edit ~/.buildman to
reference it. Move the editing logic into a central place so that it
doesn't have to be duplicated everywhere that uses the x86 toolchain;
future patches will add additional cases where it's used.

It would be nice if we could unconditionally write all of ~/.buildman at
once. Unfortunately, buildman fails if any toolchain mentioned in a
toolchain-prefix entry doesn't exist, even if it doesn't need to use it
for the current build.

The sandbox/x86 build definition currently does nothing more than edit
~/.buildman; no builds are run. Fix this by not defining a custom script
for this build, and hence preventing that stanza from replacing the
default script.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agotravis-ci: use correct exit code on errors
Stephen Warren [Wed, 26 Oct 2016 17:05:32 +0000 (11:05 -0600)]
travis-ci: use correct exit code on errors

The phrase "if [ $? -ne 0 ]; then exit $?; fi" doesn't work correctly;
by the time the "exit" statement runs, $? has already been over-written
by the result of the [ command. Fix this by explicitly storing $? and
then using that stored value in both the test and the error-case exit
statement.

This change also converts from textual comparison to integer comparison,
since the exit code is an integer and there's no need to convert it to
a string for comparison.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agotravis-ci: Use = not : when writing ~/.buildman
Stephen Warren [Wed, 26 Oct 2016 17:05:31 +0000 (11:05 -0600)]
travis-ci: Use = not : when writing ~/.buildman

Travis CI seems to be confused when there's a colon in an echo command,
and this is currently worked around using a variable that contains the
text we want to echo. Use = syntax instead so that we can remove the
work-around; it's rather confusing until you find out what it's for.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agotravis-ci: remove duplicate build
Stephen Warren [Mon, 24 Oct 2016 22:41:49 +0000 (16:41 -0600)]
travis-ci: remove duplicate build

There were two sub-jobs to build arm1136. Remove the duplicate.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotravis-ci: set env vars to name jobs
Stephen Warren [Mon, 24 Oct 2016 22:41:48 +0000 (16:41 -0600)]
travis-ci: set env vars to name jobs

Travis CI names sub-jobs after the first environment variable that is set
for a script. This doesn't produce meaningful results for any of the non-
buildman jobs. Add a dummy variable to give the jobs meaningful names.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Fri, 28 Oct 2016 18:14:18 +0000 (14:14 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

8 years agodm: at91: Add driver model support for the spi driver
Wenyou Yang [Fri, 28 Oct 2016 06:17:49 +0000 (14:17 +0800)]
dm: at91: Add driver model support for the spi driver

Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoboard: sama5d2_xplained: Enable an early debug UART
Wenyou Yang [Mon, 17 Oct 2016 01:55:26 +0000 (09:55 +0800)]
board: sama5d2_xplained: Enable an early debug UART

Enable an early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoboard: sama5d2_xplained: Set 'ethaddr' got from AT24MAC
Wenyou Yang [Mon, 17 Oct 2016 01:55:25 +0000 (09:55 +0800)]
board: sama5d2_xplained: Set 'ethaddr' got from AT24MAC

If 'ethaddr' is not set, we will get the ethernet address from AT24MAC,
and set it to 'ethaddr' variable.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
Reviewed-by: Andreas Bießmann <biessmann@corscience.de>
8 years agoboard: sama5d2_xplained: Clean up code
Wenyou Yang [Mon, 17 Oct 2016 01:55:24 +0000 (09:55 +0800)]
board: sama5d2_xplained: Clean up code

Since the introduction of pinctrl and clk driver, and the dts file,
remove unneeded the pin configurations and the clock enabling code.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoboard: sama5d2_xplained: Move config options to defconfigs
Wenyou Yang [Mon, 17 Oct 2016 01:55:23 +0000 (09:55 +0800)]
board: sama5d2_xplained: Move config options to defconfigs

Move the config options from the include/configs/sama5d2_xplained.h
to configs/sama5d2_xplained_*_defconfig.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoserial: atmel_usart: Support enable an early debug UART
Wenyou Yang [Mon, 17 Oct 2016 01:49:55 +0000 (09:49 +0800)]
serial: atmel_usart: Support enable an early debug UART

Add support to enable an early debug UART for debugging.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoserial: Kconfig: Add ATMEL_USART option
Wenyou Yang [Mon, 17 Oct 2016 01:49:54 +0000 (09:49 +0800)]
serial: Kconfig: Add ATMEL_USART option

Add ATMEL_USART option to support to enable the Atmel usart driver
from Kconfig.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agommc: atmel_sdhci: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:34 +0000 (11:00 +0800)]
mmc: atmel_sdhci: Remove unnecessary clock calling

Due to the peripheral and generated clock driver improvement,
remove the unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agousb: ehci-atmel: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:33 +0000 (11:00 +0800)]
usb: ehci-atmel: Remove unnecessary clock calling

Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoi2c: at91_i2c: Change error return -ENODEV to -EINVAL
Wenyou Yang [Tue, 27 Sep 2016 03:00:32 +0000 (11:00 +0800)]
i2c: at91_i2c: Change error return -ENODEV to -EINVAL

Change the error return value -ENODEV from to -EINVAL for more
reasonable.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agoi2c: at91_i2c: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:31 +0000 (11:00 +0800)]
i2c: at91_i2c: Remove unnecessary clock calling

Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agogpio: atmel_pio4: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:30 +0000 (11:00 +0800)]
gpio: atmel_pio4: Remove unnecessary clock calling

Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoclk: at91: Improve the clock implementation
Wenyou Yang [Tue, 27 Sep 2016 03:00:29 +0000 (11:00 +0800)]
clk: at91: Improve the clock implementation

For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.

The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.

So do the generated clock and system clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoclk: clk-uclass: Assign clk->dev before call .of_xlate
Wenyou Yang [Tue, 27 Sep 2016 03:00:28 +0000 (11:00 +0800)]
clk: clk-uclass: Assign clk->dev before call .of_xlate

In order to make clk->dev available in ops->of_xlate() to get the
clock ID from the 'reg' property of the clock node, assign the
clk->dev before calling ops->of_xlate().

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoARM: at91/dt: sama5d2: Fix the warning from dtc
Wenyou Yang [Sun, 18 Sep 2016 07:37:47 +0000 (15:37 +0800)]
ARM: at91/dt: sama5d2: Fix the warning from dtc

Fix the warning from dtc like,
---8<----
Warning (unit_address_vs_reg): Node /ahb/apb/pmc@f0014000/periph64ck/sdmmc0_hclk has a reg or ranges property, but no unit name
--->8----

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoclk: at91: Fix at91-pmc and at91-sckc's class ID
Wenyou Yang [Tue, 13 Sep 2016 02:25:55 +0000 (10:25 +0800)]
clk: at91: Fix at91-pmc and at91-sckc's class ID

The at91-pmc and at91-sckc aren't the clock providers, change their
class ID from UCLASS_CLK to UCLASS_SIMPLE_BUS, they also don't
need to bind the child nodes explicitly, the .post_bind callback
of simple_bus uclass will do it for them.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoAT91: Correct misspelling of "redundent" in partition names
Robert P. J. Day [Thu, 1 Sep 2016 13:49:14 +0000 (09:49 -0400)]
AT91: Correct misspelling of "redundent" in partition names

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoarm, at91: add icache support
Heiko Schocher [Wed, 17 Aug 2016 07:13:25 +0000 (09:13 +0200)]
arm, at91: add icache support

add at least icache support for at91 based boards.
This speeds up NOR flash access on an at91sam9g15
based board from 15.2 seconds reading 8 MiB from
a SPI NOR flash to 5.7 seconds.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoARM: at91: clock: correct PRES offset for at91sam9x5
Heiko Schocher [Wed, 17 Aug 2016 07:13:24 +0000 (09:13 +0200)]
ARM: at91: clock: correct PRES offset for at91sam9x5

on at91sam9x5 PRES offset is 4 in the PMC master
clock register.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoarm: at91: mpddrc: add missing MPDDRC_MD defines
Heiko Schocher [Wed, 17 Aug 2016 07:13:23 +0000 (09:13 +0200)]
arm: at91: mpddrc: add missing MPDDRC_MD defines

add missing MPDDRC_MD defines

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Fri, 28 Oct 2016 15:12:03 +0000 (11:12 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
common/Kconfig
configs/dms-ba16_defconfig

8 years agoMerge branch 'master' of http://git.denx.de/u-boot-mmc
Tom Rini [Fri, 28 Oct 2016 13:08:13 +0000 (09:08 -0400)]
Merge branch 'master' of git.denx.de/u-boot-mmc

8 years agopci: Move CONFIG_PCI_PNP to Kconfig
Bin Meng [Mon, 17 Oct 2016 06:35:18 +0000 (23:35 -0700)]
pci: Move CONFIG_PCI_PNP to Kconfig

Introduce CONFIG_PCI_PNP in Kconfig and move over boards' defconfig
to use that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Re-generate configs and include/configs/ changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agodm: mmc: socfpga: fix MMC_OPS support
Sylvain Lesne [Mon, 24 Oct 2016 16:24:37 +0000 (18:24 +0200)]
dm: mmc: socfpga: fix MMC_OPS support

Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.

This adds the missing fields in the driver declaration.

Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agommc: sdhci: assign to clk_mul when host version is upper than SD3.0
Jaehoon Chung [Fri, 21 Oct 2016 11:52:35 +0000 (20:52 +0900)]
mmc: sdhci: assign to clk_mul when host version is upper than SD3.0

To prevent the wrong value check the SD version.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agommc: add the device name in debugging message for supplying vmmc
Jaehoon Chung [Mon, 24 Oct 2016 06:22:22 +0000 (15:22 +0900)]
mmc: add the device name in debugging message for supplying vmmc

If vmmc didn't supply, we didn't know which card didn't supply vmmc.
And changed from "put" to "debug".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
8 years agodm: mmc: socfpga: fix MMC_OPS support
Sylvain Lesne [Mon, 24 Oct 2016 16:24:37 +0000 (18:24 +0200)]
dm: mmc: socfpga: fix MMC_OPS support

Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.

This adds the missing fields in the driver declaration.

Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agommc: refactor two core functions
Masahiro Yamada [Thu, 13 Oct 2016 15:13:18 +0000 (00:13 +0900)]
mmc: refactor two core functions

Drop unneeded variables and assignments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agommc: sdhci: fix the "misaligned operation at range" for cache
Jaehoon Chung [Thu, 13 Oct 2016 01:33:06 +0000 (10:33 +0900)]
mmc: sdhci: fix the "misaligned operation at range" for cache

This pathc is fixed the below thing.
If misaligned the cache range, Just flush to CACHLINE_SIZE.
"CACHE: Misaligned operation at range [7ae55b007ae55b08]"

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
8 years agommc: introduce mmc_power_init
Peng Fan [Tue, 11 Oct 2016 07:08:43 +0000 (15:08 +0800)]
mmc: introduce mmc_power_init

In device tree, there is vmmc-supply property for SD/MMC.
Introduce mmc_power_init function to handle vmmc-supply.

mmc_power_init will first invoke board_mmc_power_init to
avoid break boards which already implement board_mmc_power_init.

If DM_MMC and DM_REGULATOR is defined, the regulator
will be enabled to power up the device.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
8 years agodrivers/pci/Kconfig: Add PCI
Tom Rini [Wed, 26 Oct 2016 21:15:37 +0000 (17:15 -0400)]
drivers/pci/Kconfig: Add PCI

Add 'PCI' as a menu option and migrate all existing users.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoarm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:04 +0000 (10:26 +0800)]
arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoarm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:03 +0000 (10:26 +0800)]
arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoarm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:02 +0000 (10:26 +0800)]
arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoarm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:01 +0000 (10:26 +0800)]
arm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoarm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:00 +0000 (10:26 +0800)]
arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoarm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:25:59 +0000 (10:25 +0800)]
arm: socfpga: socrates: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoarm: socfpga: mcvevk: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:25:58 +0000 (10:25 +0800)]
arm: socfpga: mcvevk: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoarm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:25:57 +0000 (10:25 +0800)]
arm: socfpga: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agoddr: altera: Configuring SDRAM extra cycles timing parameters
Chin Liang See [Wed, 21 Sep 2016 02:25:56 +0000 (10:25 +0800)]
ddr: altera: Configuring SDRAM extra cycles timing parameters

To enable configuration of sdr.ctrlcfg.extratime1 register which enable
extra clocks for read to write command timing. This is critical to
ensure successful LPDDR2 interface

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
8 years agousb: xhci-mvebu: use xhci_deregister() for .remove callback
Masahiro Yamada [Fri, 14 Oct 2016 01:30:01 +0000 (10:30 +0900)]
usb: xhci-mvebu: use xhci_deregister() for .remove callback

No need to use a wrapper that is equivalent to xhci_deregister().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agousb: ehci-vf: use ehci_deregister() for .remove callback
Masahiro Yamada [Fri, 14 Oct 2016 01:29:37 +0000 (10:29 +0900)]
usb: ehci-vf: use ehci_deregister() for .remove callback

This driver was recently converted to Driver Model, so missed the
subsystem-wide cleanups by commit 405273427366 ("usb: replace
ehci_*_remove() with usb_deregister()").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoimx6: icorem6: Add default mtd nand partition table
Jagan Teki [Sat, 8 Oct 2016 12:30:28 +0000 (18:00 +0530)]
imx6: icorem6: Add default mtd nand partition table

icorem6qdl> mtdparts

device nand0 <nand>, # parts = 6
0: spl                 0x00200000      0x00000000      0
1: uboot               0x00200000      0x00200000      0
2: env                 0x00100000      0x00400000      0
3: kernel              0x00400000      0x00500000      0
4: dtb                 0x00100000      0x00900000      0
5: rootfs              0x1f600000      0x00a00000      0

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoimx6: icorem6: Enable MTD device support
Jagan Teki [Sat, 8 Oct 2016 12:30:27 +0000 (18:00 +0530)]
imx6: icorem6: Enable MTD device support

Enable MTD device, partition and command support.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoimx6: icorem6: Add NAND support
Jagan Teki [Tue, 25 Oct 2016 06:23:23 +0000 (11:53 +0530)]
imx6: icorem6: Add NAND support

Add NAND support for Engicam i.CoreM6 qdl board.

Boot Log:
--------

U-Boot SPL 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43)
Trying to boot from NAND
NAND : 512 MiB

U-Boot 2016.09-rc2-30755-gd3dc581-dirty (Sep 28 2016 - 23:00:43 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 55C
Reset cause: WDOG
Model: Engicam i.CoreM6 DualLite/Solo Starter Kit
DRAM:  256 MiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Hit any key to stop autoboot:  0
icorem6qdl>

Cc: Scott Wood <oss@buserror.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agomtd: nand: Kconfig: Add NAND_MXS entry
Jagan Teki [Sat, 8 Oct 2016 12:30:25 +0000 (18:00 +0530)]
mtd: nand: Kconfig: Add NAND_MXS entry

Added kconfig for NAND_MXS driver.

Cc: Scott Wood <oss@buserror.net>
Cc: Simon Glass <sjg@chromium.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual
Jagan Teki [Sat, 8 Oct 2016 12:30:24 +0000 (18:00 +0530)]
arm: imx6q: Add devicetree support for Engicam i.CoreM6 Quad/Dual

i.CoreM6 Quad/Dual modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU           NXP i.MX6 DQ, 800MHz
RAM           1GB, 32, 64 bit, DDR3-800/1066
NAND          SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: dts: imx6q: Add pinctrl defines
Jagan Teki [Sat, 8 Oct 2016 12:30:23 +0000 (18:00 +0530)]
arm: dts: imx6q: Add pinctrl defines

Add imx6q pinctrl defines support from Linux.

Here is the last commit:
"ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ"
(sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2)

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: dts: Add devicetree for i.MX6Q
Jagan Teki [Sat, 8 Oct 2016 12:30:22 +0000 (18:00 +0530)]
arm: dts: Add devicetree for i.MX6Q

Add i.MX6Q dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoengicam: icorem6: Add DM_GPIO, DM_MMC support
Jagan Teki [Tue, 25 Oct 2016 06:23:22 +0000 (11:53 +0530)]
engicam: icorem6: Add DM_GPIO, DM_MMC support

Add DM_GPIO, DM_MMC support for u-boot and disable for SPL.

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoimx6q: icorem6: Enable pinctrl driver
Jagan Teki [Sat, 8 Oct 2016 12:30:20 +0000 (18:00 +0530)]
imx6q: icorem6: Enable pinctrl driver

Enable imx6 pinctrl driver support for i.CoreM6.

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo
Jagan Teki [Sat, 8 Oct 2016 12:30:19 +0000 (18:00 +0530)]
arm: imx6q: Add devicetree support for Engicam i.CoreM6 DualLite/Solo

i.CoreM6 DualLite/Solo modules are system on module solutions
manufactured by Engicam with following characteristics:
CPU           NXP i.MX6 DL, 800MHz
RAM           1GB, 32, 64 bit, DDR3-800/1066
NAND          SLC,512MB
Power supply  Single 5V
MAX LCD RES   FULLHD

and more info at
http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agodt-bindings: clock: imx6qdl: Add clock defines
Jagan Teki [Sat, 8 Oct 2016 12:30:18 +0000 (18:00 +0530)]
dt-bindings: clock: imx6qdl: Add clock defines

Add imx6qdl clock header defines support from Linux.

"clk: imx: Add clock support for imx6qp"
(sha1: ee36027427c769b0b9e5e205fe43aced93d6aa66)

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: dts: imx6dl: Add pinctrl defines
Jagan Teki [Sat, 8 Oct 2016 12:30:17 +0000 (18:00 +0530)]
arm: dts: imx6dl: Add pinctrl defines

Add imx6dl pinctrl defines support from Linux.

Here is the last commit:
"ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ"
(sha1: d8c765e0d1ddbd5032c2491c82cc9660c2f0e7f2)

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: dts: Add devicetree for i.MX6DQL
Jagan Teki [Sat, 8 Oct 2016 12:30:16 +0000 (18:00 +0530)]
arm: dts: Add devicetree for i.MX6DQL

Add i.MX6DQL dtsi support from Linux.

Here is the last commit:
"ARM: dts: imx6qdl: Fix SPDIF regression"
(sha1: f065e9e4addd75c21bb976bb2558648bf4f61de6)

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: dts: Add devicetree for i.MX6DL
Jagan Teki [Sat, 8 Oct 2016 12:30:15 +0000 (18:00 +0530)]
arm: dts: Add devicetree for i.MX6DL

Add i.MX6DL dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoimx: s/docs\/README.imximage/doc\/README.imximage/g
Jagan Teki [Sat, 8 Oct 2016 12:30:14 +0000 (18:00 +0530)]
imx: s/docs\/README.imximage/doc\/README.imximage/g

Fixed typo for doc/README.imximage on respective imximage.cfg files.

Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoimx6: icorem6: Add ENET support
Jagan Teki [Sat, 8 Oct 2016 12:30:13 +0000 (18:00 +0530)]
imx6: icorem6: Add ENET support

Add enet support for engicam icorem6 qdl starter kit.
- Add pinmux settings
- Add board_eth_init

TFTP log:
--------
Net:   FEC [PRIME]
Hit any key to stop autoboot:  0
icorem6qdl> tftpboot {fdt_addr} imx6dl-icore.dtb
Using FEC device
TFTP from server 192.168.2.96; our IP address is 192.168.2.75
Filename 'imx6dl-icore.dtb'.
Load address: 0x0
Loading: ######
         1.3 MiB/s
done
Bytes transferred = 28976 (7130 hex)
CACHE: Misaligned operation at range [0000000000007130]
icorem6qdl>

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: Kconfig: Add FEC_MXC entry
Jagan Teki [Sat, 8 Oct 2016 12:30:12 +0000 (18:00 +0530)]
net: Kconfig: Add FEC_MXC entry

Added kconfig for FEC_MXC driver.

Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoarm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support
Jagan Teki [Sat, 8 Oct 2016 12:30:11 +0000 (18:00 +0530)]
arm: imx: Add Engicam i.CoreM6 QDL Starter Kit initial support

Boot Log for i.CoreM6 DualLite/Solo Starter Kit:
-----------------------------------------------

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6SOLO rev1.3 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 31C
Reset cause: POR
DRAM:  256 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0 is current device
switch to partitions #0, OK
mmc0 is current device
reading boot.scr
** Unable to read file boot.scr **
reading zImage
6741808 bytes read in 341 ms (18.9 MiB/s)
Booting from mmc ...
reading imx6dl-icore.dtb
30600 bytes read in 19 ms (1.5 MiB/s)
   Booting using the fdt blob at 0x18000000
   Using Device Tree in place at 18000000, end 1800a787

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0

Boot Log for i.CoreM6 Quad/Dual Starter Kit:
--------------------------------------------

U-Boot SPL 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46)
Trying to boot from MMC1

U-Boot 2016.09-rc2-30739-gd1fa290 (Sep 17 2016 - 00:37:46 +0530)

CPU:   Freescale i.MX6Q rev1.2 at 792MHz
CPU:   Industrial temperature grade (-40C to 105C) at 28C
Reset cause: POR
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoconfig: Move CONFIG_DEFAULT_FDT_FILE to defconfigs
Jagan Teki [Sat, 8 Oct 2016 12:30:10 +0000 (18:00 +0530)]
config: Move CONFIG_DEFAULT_FDT_FILE to defconfigs

- Add DEFAULT_FDT_FILE kconfig entry
- Move CONFIG_DEFAULT_FDT_FILE from include/configs to defconfigs

Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agothermal: Kconfig: Add IMX_THERMAL entry
Jagan Teki [Sat, 8 Oct 2016 12:30:09 +0000 (18:00 +0530)]
thermal: Kconfig: Add IMX_THERMAL entry

Added kconfig for IMX_THERMAL driver.

Cc: Simon Glass <sjg@chromium.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoserial: Kconfig: Add MXC_UART entry
Jagan Teki [Sat, 8 Oct 2016 12:30:08 +0000 (18:00 +0530)]
serial: Kconfig: Add MXC_UART entry

Added kconfig for MXC_UART driver.

Cc: Simon Glass <sjg@chromium.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
8 years agoimx: mx6ull_14x14_evk: add plugin defconfig
Peng Fan [Tue, 11 Oct 2016 06:29:17 +0000 (14:29 +0800)]
imx: mx6ull_14x14_evk: add plugin defconfig

Add defconfig file to use plugin code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>