Andrew F. Davis [Fri, 4 May 2018 19:06:12 +0000 (19:06 +0000)]
ti: k3: drivers: ti_sci: Add support for Core control
Since system controller now has control over SoC power management, core
operation such as reset need to be explicitly requested to reboot the SoC.
Add support for this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis [Fri, 4 May 2018 19:06:11 +0000 (19:06 +0000)]
ti: k3: drivers: ti_sci: Add support for Clock control
TI-SCI message protocol provides support for management of various
hardware entities within the SoC.
In general, we expect to function at a device level of abstraction,
however, for proper operation of hardware blocks, many clocks directly
supplying the hardware block needs to be queried or configured.
Introduce support for the set of TI-SCI message protocol support that
provide us with this capability.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis [Fri, 4 May 2018 19:06:10 +0000 (19:06 +0000)]
ti: k3: drivers: ti_sci: Add support for Device control
TI-SCI message protocol provides support for management of various
hardware entitites within the SoC.
We introduce the fundamental device management capability support to
the driver protocol as part of this change.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis [Fri, 4 May 2018 19:06:09 +0000 (19:06 +0000)]
ti: k3: drivers: Add support for TI System Control Interface protocol
Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used in Texas Instrument's System on Chip (SoC) such as those
in K3 family AM654x SoCs to communicate between various compute
processors with a central system controller entity.
TI-SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Andrew F. Davis [Fri, 4 May 2018 19:06:08 +0000 (19:06 +0000)]
ti: k3: drivers: Add Secure Proxy driver
Secure Proxy module manages hardware threads that are meant
for communication between the processor entities. Add support
for this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Dimitris Papastamos [Wed, 22 Aug 2018 13:40:50 +0000 (14:40 +0100)]
Merge pull request #1528 from antonio-nino-diaz-arm/an/libc
libc: Cleanup library
Antonio Nino Diaz [Thu, 16 Aug 2018 14:42:44 +0000 (15:42 +0100)]
libc: armclang: Implement compiler printf symbols
armclang replaces calls to printf by calls to one of the symbols
__0printf, __1printf or __2printf. This patch adds new functions with
these names that internally call printf so that the Trusted Firmware can
be compiled with this compiler.
Change-Id: I06a0e3e5001232fe5b2577615666ddd66e81eef0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 16 Aug 2018 15:46:06 +0000 (16:46 +0100)]
libc: Use printf and snprintf across codebase
tf_printf and tf_snprintf are now called printf and snprintf, so the
code needs to be updated.
Change-Id: Iffeee97afcd6328c4c2d30830d4923b964682d71
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 15 Aug 2018 16:02:28 +0000 (17:02 +0100)]
libc: Move tf_printf and tf_snprintf to libc
Change their names to printf and snprintf. They are much smaller than
the previous versions we had, which makes them better suited for the
Trusted Firmware.
Change-Id: Ia872af91b7b967c47fce012eccecede7873a3daf
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 15 Aug 2018 15:52:32 +0000 (16:52 +0100)]
tf_printf: Return number of printed characters
The C standard says that printf() has to return the number of characters
it has printed.
Change-Id: I0ef50b1d6766d140724ac0a2fa2c5d023431f984
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 16 Aug 2018 15:52:57 +0000 (16:52 +0100)]
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 14 Aug 2018 12:39:29 +0000 (13:39 +0100)]
libc: Cleanup SCC headers
Only leave the parts relevant to the Trusted Firmware.
Change-Id: I0444c16e402f6c1629211d03bf6cb32ca3dbcf59
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 15 Aug 2018 18:51:09 +0000 (19:51 +0100)]
libc: Add AArch32 and AArch64 headers
Change-Id: I4f58bb4660078c9bc76d2826c90b2fa711719a3e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 17 Aug 2018 09:45:47 +0000 (10:45 +0100)]
libc: Introduce files from SCC
Taken from http://git.simple-cc.org/scc/ from the following commit:
67508ad14af314cea2229783d3c084f28c41daf0
Permission has been granted from the author to use them under the
license BSD-3-Clause instead of ISC.
Change-Id: I65c0ce3ab60c49d34a57533af12a74bd7bde88e5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Mon, 13 Aug 2018 18:41:17 +0000 (19:41 +0100)]
libc: Cleanup FreeBSD files
Remove code specific to FreeBSD so that they can be used in this
repository.
Change-Id: I5c11eb5b3c05a7fb91aed08371a1f7a0e6122a94
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Mon, 13 Aug 2018 18:39:40 +0000 (19:39 +0100)]
libc: Import files from FreeBSD
From commit
aafd1cf4235d78ce85b76d7da63e9589039344b3:
- sys/sys/endian.h
- sys/arm/include/endian.h
- sys/arm64/include/endian.h
- sys/sys/errno.h
- lib/libc/strchr.c
- lib/libc/strcmp.c
- lib/libc/strncmp.c
- lib/libc/strnlen.c
strcasecmp() hasn't been imported.
Change-Id: I8a0787aec9ba8960a008fb5c66f7a73c84919b93
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Mon, 13 Aug 2018 18:51:26 +0000 (19:51 +0100)]
libc: Introduce cdefs.h, assert.h and strlen.c
Change-Id: I76091d52571f1950111c4b1670d5fc3883607715
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 16 Aug 2018 13:53:05 +0000 (14:53 +0100)]
libc: Cleanup remaining files
The existing files had some style problems that this patch fixes.
Change-Id: I794e0d96e52f8da0ffa0d70a41f36c4432b4e563
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 15 Aug 2018 15:54:55 +0000 (16:54 +0100)]
libc: Remove printf-like functions
They are too big for the Trusted Firmware, and it can be confusing to
have two versions of the same functions with different names. tf_printf
and tf_snprintf will replace them in the next patch.
Change-Id: I978414ac169cc3156e249549ef101a70eb31a295
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 17 Aug 2018 08:46:43 +0000 (09:46 +0100)]
libc: Remove sscanf() and timingsafe_bcmp()
sscanf() is unused and it doesn't work, so it doesn't make sense to
keep it.
timingsafe_bcmp() isn't used anywhere.
Change-Id: Ib5d28ff21d0f3ccc36c5c0fb5474b3384105cf80
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 14 Aug 2018 12:17:41 +0000 (13:17 +0100)]
libc: Remove non-Arm files
Remove all files that don't have only Arm copyright. This is the first
step to cleanup the C library in this repository. They will be re-added
in the following patches.
Change-Id: I72c40a1620d1df3228fc397ec695d569a20245fd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Dimitris Papastamos [Wed, 22 Aug 2018 09:25:41 +0000 (10:25 +0100)]
Merge pull request #1532 from jeenu-arm/misra-fixes
MISRA fixes
Dimitris Papastamos [Wed, 22 Aug 2018 09:24:24 +0000 (10:24 +0100)]
Merge pull request #1533 from jeenu-arm/mpam
AArch64: Enable MPAM for lower ELs
Dimitris Papastamos [Wed, 22 Aug 2018 09:24:06 +0000 (10:24 +0100)]
Merge pull request #1530 from antonio-nino-diaz-arm/an/rpi3-deprecated
rpi3: Migrate from deprecated APIs
Dimitris Papastamos [Wed, 22 Aug 2018 09:23:52 +0000 (10:23 +0100)]
Merge pull request #1526 from robertovargas-arm/arm-memprotect
memprotect: Move files to specific platform makefiles
Roberto Vargas [Mon, 6 Aug 2018 12:35:31 +0000 (13:35 +0100)]
memprotect: Move files to specific platform makefiles
All the arm platforms were including the files related to
mem-protect. This configuration generates some problems
with new platforms that don't support such functionality,
and for that reason this patch moves these files to the
platform specific makefiles.
Change-Id: I6923e5224668b76667795d8e11723cede7979b1e
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Dimitris Papastamos [Mon, 20 Aug 2018 13:57:39 +0000 (14:57 +0100)]
Merge pull request #1388 from vwadekar/report-cve-2017-5715
cpus: denver: report CVE_2017_5715 mitigation to higher layers
Dimitris Papastamos [Mon, 20 Aug 2018 08:38:17 +0000 (09:38 +0100)]
Merge pull request #1524 from danielboulby-arm/db/ReclaimInit
rockchip: Add plat_is_my_cpu_primary function
Dimitris Papastamos [Mon, 20 Aug 2018 08:37:16 +0000 (09:37 +0100)]
Merge pull request #1523 from jts-arm/dsu
DSU erratum 936184 workaround
Jeenu Viswambharan [Thu, 2 Aug 2018 09:14:12 +0000 (10:14 +0100)]
SiP: MISRA fixes for execution state switch
These changes address most of the required MISRA rules. In the process,
some from generic code is also fixed.
No functional changes.
Change-Id: I707dbec9b34b802397e99da2f5ae738165d6feba
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan [Thu, 2 Aug 2018 09:14:12 +0000 (10:14 +0100)]
RAS: MISRA fixes
These changes address most of the required MISRA rules. In the process,
some from generic code is also fixed.
No functional changes.
Change-Id: I76cacf6e1d73b09510561b5090c2bb66d81bec88
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan [Thu, 2 Aug 2018 09:14:12 +0000 (10:14 +0100)]
EHF: MISRA fixes
These changes address most of the required MISRA rules. In the process,
some from generic code are also fixed.
No functional changes.
Change-Id: I19786070af7bc5e1f6d15bdba93e22a4451d8fe9
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan [Fri, 10 Aug 2018 10:05:31 +0000 (11:05 +0100)]
SDEI: Fix locking issues
The event lock for a shared event was being unlocked twice, and the
locking sequence for event complete was misplaced. This patch fixes both
issues.
Change-Id: Ie2fb15c6ec240af132d7d438946ca160bd5c63dc
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan [Thu, 2 Aug 2018 09:14:12 +0000 (10:14 +0100)]
SDEI: MISRA fixes
These changes address most of the required MISRA rules. In the process,
some from generic code is also fixed.
No functional changes.
Change-Id: I6235a355e006f0b1c7c1c4d811b3964a64d0434f
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Jeenu Viswambharan [Tue, 31 Jul 2018 15:13:33 +0000 (16:13 +0100)]
AArch64: Enable MPAM for lower ELs
Memory Partitioning And Monitoring is an Armv8.4 feature that enables
various memory system components and resources to define partitions.
Software running at various ELs can then assign themselves to the
desired partition to control their performance aspects.
With this patch, when ENABLE_MPAM_FOR_LOWER_ELS is set to 1, EL3 allows
lower ELs to access their own MPAM registers without trapping to EL3.
This patch however doesn't make use of partitioning in EL3; platform
initialisation code should configure and use partitions in EL3 if
required.
Change-Id: I5a55b6771ccaa0c1cffc05543d2116b60cbbcdcd
Co-authored-by: James Morse <james.morse@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Varun Wadekar [Fri, 6 Jul 2018 20:39:52 +0000 (13:39 -0700)]
cpus: denver: report CVE_2017_5715 mitigation to higher layers
This patch uses the 'declare_cpu_ops_wa' macro, to set the check function,
to report that Denver cores are mitigated.
Denver cores are vulnerable to this anomaly and require the mitigation to
be enabled always.
Change-Id: I1bb6eefdec8c01fb8b645e112f8d04d4bb8811ef
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Dimitris Papastamos [Fri, 17 Aug 2018 15:00:30 +0000 (16:00 +0100)]
Merge pull request #1529 from satheesbalya-arm/sb1_2549_fix_dtc_warn
DTC: Add recommended device tree compiler version
Antonio Nino Diaz [Fri, 17 Aug 2018 13:25:08 +0000 (14:25 +0100)]
rpi3: Migrate from deprecated APIs
Change-Id: If53b5b2430a06ce8cf6e7948765b560b37afc335
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
John Tsichritzis [Mon, 23 Jul 2018 08:11:59 +0000 (09:11 +0100)]
DSU erratum 936184 workaround
If the system is in near idle conditions, this erratum could cause a
deadlock or data corruption. This patch applies the workaround that
prevents this.
This DSU erratum affects only the DSUs that contain the ACP interface
and it was fixed in r2p0. The workaround is applied only to the DSUs
that are actually affected.
Link to respective Arm documentation:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.epm138168/index.html
Change-Id: I033213b3077685130fc1e3f4f79c4d15d7483ec9
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Sathees Balya [Fri, 17 Aug 2018 09:22:01 +0000 (10:22 +0100)]
DTC: Add recommended device tree compiler version
Change-Id: Ice87052e41a24b0ede5610467e12941ae1d886e0
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
Dimitris Papastamos [Fri, 17 Aug 2018 08:55:38 +0000 (09:55 +0100)]
Merge pull request #1525 from antonio-nino-diaz-arm/an/rpi3
rpi3: Remove dependencies on Arm platform code
Dimitris Papastamos [Fri, 17 Aug 2018 08:51:19 +0000 (09:51 +0100)]
Merge pull request #1527 from jts-arm/docs
Fix typo in documentation page title
Dimitris Papastamos [Fri, 17 Aug 2018 08:51:01 +0000 (09:51 +0100)]
Merge pull request #1517 from satheesbalya-arm/sb1_2607_mcd_reg
Console: Use callee-saved registers
John Tsichritzis [Wed, 15 Aug 2018 13:29:07 +0000 (14:29 +0100)]
Fix typo in documentation page title
Change-Id: I426ffc8717757e35e556f675162a729ba095b7d5
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Antonio Nino Diaz [Wed, 15 Aug 2018 13:43:29 +0000 (14:43 +0100)]
rpi3: Remove dependencies on Arm platform code
The Raspberry Pi 3 port doesn't actually depend on any Arm platform
code, so the dependencies can be removed.
Change-Id: Ic2f47f5001bebde3862815b1d880a169d82b3f65
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Daniel Boulby [Tue, 14 Aug 2018 16:10:06 +0000 (17:10 +0100)]
rockchip: Add plat_is_my_cpu_primary function
This function is required for platforms where
COLD_BOOT_SINGLE_CPU=0 however it was missing from rockchip
platforms
Change-Id: I32a85f226a4f22085a27113903f34bdb6f28dbcc
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Sathees Balya [Tue, 31 Jul 2018 14:11:11 +0000 (15:11 +0100)]
Console: Use callee-saved registers
This allows the console drivers to be implemented in C
Change-Id: Ibac859c4bcef0e92a0dcacc6b58ac19bc69b8342
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
Dimitris Papastamos [Wed, 15 Aug 2018 09:49:57 +0000 (10:49 +0100)]
Merge pull request #1516 from antonio-nino-diaz-arm/an/printf
Replace stdio.h functions by TF functions
Dimitris Papastamos [Mon, 13 Aug 2018 14:29:35 +0000 (15:29 +0100)]
Merge pull request #1502 from dp-arm/dp/irc
readme: Add information about the TF-A IRC channel
Dimitris Papastamos [Mon, 13 Aug 2018 14:29:22 +0000 (15:29 +0100)]
Merge pull request #1520 from robertovargas-arm/cci-dsb
cci: Use dsb to wait before reading status register
Roberto Vargas [Mon, 13 Aug 2018 13:17:43 +0000 (14:17 +0100)]
cci: Use dsb to wait before reading status register
The CCI500 TRM explicitily requires completion of the write
operation before the read operation, and it is not guaranteed
by dmb but it is dsb.
Change-Id: Ieeaa0d1a4b8fcb87108dea9b6de03d9c8a150829
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Dimitris Papastamos [Mon, 13 Aug 2018 12:02:16 +0000 (13:02 +0100)]
Merge pull request #1510 from robertovargas-arm/romlib
Add support for moving libraries to ROM
Dimitris Papastamos [Mon, 13 Aug 2018 12:02:04 +0000 (13:02 +0100)]
Merge pull request #1519 from antonio-nino-diaz-arm/an/xlat-el2
xlat v2: Support EL2 translation regime
Dimitris Papastamos [Mon, 13 Aug 2018 10:22:25 +0000 (11:22 +0100)]
Merge pull request #1518 from antonio-nino-diaz-arm/an/fix_mmc
mmc: Fix warning about usage of uninitialized variable
Antonio Nino Diaz [Fri, 10 Aug 2018 12:04:02 +0000 (13:04 +0100)]
drivers/mmc: Fix warning about usage of uninitialized variable
Because of -Werror, this causes a build error.
Change-Id: I37a8c4bbfe3f2ced5e17981a2814985919ad483b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 7 Aug 2018 15:35:54 +0000 (16:35 +0100)]
layerscape: stm32mp1: Migrate to enable_mmu_svc_mon()
Change-Id: I3d16b247a0fa457e6293e2d2c4503dfde1e51c1d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 7 Aug 2018 15:35:19 +0000 (16:35 +0100)]
plat/arm: Migrate to enable_mmu_svc_mon()
Change-Id: I1bb310e1b05968d30b28913c4011c0601e1ae64e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 7 Aug 2018 18:59:49 +0000 (19:59 +0100)]
xlat v2: Support the EL2 translation regime
The translation library is useful elsewhere. Even though this repository
doesn't exercise the EL2 support of the library, it is better to have it
here as well to make it easier to maintain.
enable_mmu_secure() and enable_mmu_direct() have been deprecated. The
functions are still present, but they are behind ERROR_DEPRECATED and
they call the new functions enable_mmu_svc_mon() and
enable_mmu_direct_svc_mon().
Change-Id: I13ad10cd048d9cc2d55e0fff9a5133671b67dcba
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Dimitris Papastamos [Fri, 10 Aug 2018 11:40:53 +0000 (12:40 +0100)]
Merge pull request #1504 from hzhuang1/migrate_mmc
Migrate mmc
Haojian Zhuang [Sat, 4 Aug 2018 10:07:58 +0000 (18:07 +0800)]
doc/maintainers: remove emmc framework
Remove emmc framework from maintain list.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Sat, 4 Aug 2018 10:07:44 +0000 (18:07 +0800)]
drivers/emmc: remove emmc framework
Replace emmc framework by mmc framework.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Sat, 4 Aug 2018 10:07:26 +0000 (18:07 +0800)]
plat/poplar: migrate to mmc framework
Migrate from emmc framework to mmc framework.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Sat, 4 Aug 2018 10:07:10 +0000 (18:07 +0800)]
plat/hikey: migrate to mmc framework
Migrate to mmc framework.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Sat, 4 Aug 2018 10:06:52 +0000 (18:06 +0800)]
drivers/dw_mmc: migrate to mmc framework
Migrate dw_mmc driver from emmc framework to mmc framework. The
emmc framework will be abandoned.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Sat, 4 Aug 2018 10:04:30 +0000 (18:04 +0800)]
drivers/mmc: set buswidth and speed before reading data
It should set buswidth and speed of mmc controller before accessing
mmc.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Thu, 2 Aug 2018 06:50:12 +0000 (14:50 +0800)]
drivers/mmc: make mmc_ext_csd aligned with 16 char
DMA is always used in mmc driver. So the buffer address should
always follow the DMA limitation.
There're same requirement in mmc_read_blocks()/mmc_write_blocks()
on parameter buf. Since parameter buf comes from io_block driver,
it's already handled in io_block driver.
At here, just make the minimum address alignment on 16 chars.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Thu, 2 Aug 2018 06:49:51 +0000 (14:49 +0800)]
drivers/mmc: fix lba param to int
mmc_read_blocks()/mmc_write_blocks() derived from io_block_ops_t
type. It means that lba param should be integer type, not
unsigned integer type.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Haojian Zhuang [Thu, 2 Aug 2018 06:48:17 +0000 (14:48 +0800)]
drivers/mmc: send CMD8 only for SD card in initialization
Sending CMD8 before CMD1 just causes to fetch data failure in eMMC.
Check whether it's eMMC first. If it's eMMC, send CMD1 command instead.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Dimitris Papastamos [Fri, 10 Aug 2018 08:44:09 +0000 (09:44 +0100)]
Merge pull request #1505 from Yann-lms/mmc_delays
mmc: add required delays when retrying commands
Antonio Nino Diaz [Thu, 9 Aug 2018 14:30:28 +0000 (15:30 +0100)]
Replace stdio.h functions by TF functions
Functions provided by stdio.h such as printf and sprintf are available
in the codebase, but they add a lot of code to the final image if they
are used:
- AArch64: ~4KB
- AArch32: ~2KB in T32, ~3KB in A32
tf_printf and tf_snprintf are a lot more simple, but it is preferable
to use them when possible because they are also used in common code.
Change-Id: Id09fd2b486198fe3d79276e2c27931595b7ba60e
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 9 Aug 2018 14:30:47 +0000 (15:30 +0100)]
tf_snprintf: Add support for '%s'
Change-Id: Ia3a159444e638f63de7dc5a6a4b76169c757188a
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Dimitris Papastamos [Thu, 9 Aug 2018 14:16:19 +0000 (15:16 +0100)]
Merge pull request #1513 from antonio-nino-diaz-arm/an/xlat-caches
xlat v2: Cleanup and dcache coherency bug fix
Antonio Nino Diaz [Tue, 7 Aug 2018 11:47:12 +0000 (12:47 +0100)]
xlat v2: Flush xlat tables after being modified
During cold boot, the initial translation tables are created with data
caches disabled, so all modifications go to memory directly. After the
MMU is enabled and data cache is enabled, any modification to the tables
goes to data cache, and eventually may get flushed to memory.
If CPU0 modifies the tables while CPU1 is off, CPU0 will have the
modified tables in its data cache. When CPU1 is powered on, the MMU is
enabled, then it enables coherency, and then it enables the data cache.
Until this is done, CPU1 isn't in coherency, and the translation tables
it sees can be outdated if CPU0 still has some modified entries in its
data cache.
This can be a problem in some cases. For example, the warm boot code
uses only the tables mapped during cold boot, which don't normally
change. However, if they are modified (and a RO page is made RW, or a XN
page is made executable) the CPU will see the old attributes and crash
when it tries to access it.
This doesn't happen in systems with HW_ASSISTED_COHERENCY or
WARMBOOT_ENABLE_DCACHE_EARLY. In these systems, the data cache is
enabled at the same time as the MMU. As soon as this happens, the CPU is
in coherency.
There was an attempt of a fix in psci_helpers.S, but it didn't solve the
problem. That code has been deleted. The code was introduced in commit
<
264410306381> ("Invalidate TLB entries during warm boot").
Now, during a map or unmap operation, the memory associated to each
modified table is flushed. Traversing a table will also flush it's
memory, as there is no way to tell in the current implementation if the
table that has been traversed has also been modified.
Change-Id: I4b520bca27502f1018878061bc5fb82af740bb92
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Dimitris Papastamos [Mon, 6 Aug 2018 15:09:20 +0000 (16:09 +0100)]
Merge pull request #1501 from robertovargas-arm/cci
cci: Wait before reading status register
Roberto Vargas [Wed, 23 May 2018 08:27:06 +0000 (09:27 +0100)]
Add librom support in FVP
Change-Id: Idb9ba3864d6de3053260724f07172fd32c1523e0
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Dimitris Papastamos [Mon, 6 Aug 2018 10:19:03 +0000 (11:19 +0100)]
Merge pull request #1512 from npoushin/integration
Add support for Arm System Guidance for Mobile fixed virtual platform
Antonio Nino Diaz [Sun, 5 Aug 2018 14:34:10 +0000 (15:34 +0100)]
xlat v2: Cleanup get/change mem attr helpers
Changed the names for consistency with the rest of the library. Introduced
new helpers that manipulate the active translation tables context.
Change-Id: Icaca56b67fcf6a96e88aa3c7e47411162e8e6856
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Nariman Poushin [Wed, 7 Mar 2018 10:29:57 +0000 (10:29 +0000)]
plat/arm: Add support for SGM775
Add support for System Guidance for Mobile platform SGM775
Change-Id: I2442a50caae8f597e5e5949cd48f695cf75d9653
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
Deepak Pandey [Tue, 10 Oct 2017 16:04:32 +0000 (21:34 +0530)]
css_pm_scmi: optimise cpu suspend to remove redundant scmi call
In css platforms where the cpu/cluster management is done by the hardware,
software does need to issue certain scmi requests.
This patch wraps those scmi calls around the HW_ASSISTED_COHERENCY
build option to remove them on platforms that have this hardware support.
Change-Id: Ie818e234484ef18549aa7f977aef5c3f0fc26c27
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
Nariman Poushin [Fri, 27 Apr 2018 17:49:52 +0000 (18:49 +0100)]
plat/arm: tzc_dmc500: Add missing plat_arm.h include
This omission causes a build error as the definition for
arm_tzc_regions_info_t is needed from plat_arm.h
Change-Id: I26935ee90d3e36ab6a016ff2c4eee4413df3e4e8
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
Nariman Poushin [Mon, 25 Jun 2018 16:04:51 +0000 (17:04 +0100)]
plat/arm: css: Set MT bit in incoming mpidr arugments
Change-Id: I278d6876508800abff7aa2480910306a24de5378
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>
Dimitris Papastamos [Fri, 3 Aug 2018 13:16:31 +0000 (14:16 +0100)]
Merge pull request #1511 from chandnich/sgi575-updates
Sgi575 updates
Chandni Cherukuri [Wed, 1 Aug 2018 10:28:48 +0000 (15:58 +0530)]
plat/sgi: switch to using scmi
The Arm SGI platforms can switch to using SCMI. So enable support for
SCMI and remove portions of code that would be unused after switching
to SCMI.
Change-Id: Ifd9e1c944745f703da5f970b5daf1be2b07ed14e
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Thu, 2 Aug 2018 06:59:07 +0000 (12:29 +0530)]
sgi: disable CPU power down bit in reset handler
On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1'
register requires an explicit write to clear it for hotplug and
idle to function correctly. The reset value of this bit is zero
but it still requires this explicit clear to zero. This indicates
that this could be a model related issue but for now this issue can
be fixed be clearing the CORE_PWRDN_EN in the platform specific
reset handler function.
Change-Id: I4222930daa9a3abacdace6b7c3f4a5472ac0cb19
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Roberto Vargas [Tue, 22 May 2018 15:05:42 +0000 (16:05 +0100)]
Add support for romlib in the build system
Romlib is a new image that is stored in ROM and contains the code of
several libraries that can be shared between different images. All
the functions within in the library are accessed using a jump table
which allows to update the romlib image whithout changing the binary
compatibility. This jump table can be also stored in RAM and it can
allow to patch a romlib with potential bugs fixes..
Change-Id: If980ccdaca24b7aaca900e32acc68baf6f94ab35
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas [Thu, 24 May 2018 12:34:53 +0000 (13:34 +0100)]
Add atexit function to libc
We had exit but we didn't have atexit, and we were calling panic and
tf_printf from exit, which generated a dependency from exit to them.
Having atexit allows to set a different function pointer in every image.
Change-Id: I95b9556d680d96249ed3b14da159b6f417da7661
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas [Mon, 4 Jun 2018 14:15:04 +0000 (15:15 +0100)]
Don't include mbebtls include paths in INCLUDES
Mbebtls include paths are controlled by the user using the variable
MBEDTLS_DIR and they are out of the TF source tree. Since these
includes have a different origin it is better to move them to a
different variable.
This change makes easier for the romlib Makefile to parse the include
paths.
Change-Id: I3e4c99300f1012bc7f88c6b9f5bc0ec1f7b5aa8d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas [Tue, 8 May 2018 09:27:10 +0000 (10:27 +0100)]
Create a library file for libmbedtls
TF Makefile was linking all the objects files generated for the
Mbed TLS library instead of creating a static library that could be
used in the linking stage.
Change-Id: I8e4cd843ef56033c9d3faeee71601d110b7e4c12
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas [Tue, 8 May 2018 09:27:10 +0000 (10:27 +0100)]
Create a library file for libc
TF Makefile was linking all the objects files generated for the
c library instead of creating a static library that could be
used in the linking stage.
Change-Id: I721daea097e9b13cbb42c9f8eaa2af8fea0799cf
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas [Tue, 8 May 2018 09:27:10 +0000 (10:27 +0100)]
Create a library file for libfdt
TF Makefile was linking all the objects files generated for the
fdt library instead of creating a static library that could be
used in the linking stage.
Change-Id: If3705bba188ec39e1fbf2322a7f2a9a941e1b90d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Roberto Vargas [Tue, 8 May 2018 09:27:10 +0000 (10:27 +0100)]
Add make macros to build library archives
This patch adds all the make macros needed to create a library archive
and to use it in the link stage.
Change-Id: I26597bfd6543649d0b68a9b1e06aec1ba353e6de
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Dimitris Papastamos [Fri, 3 Aug 2018 09:56:47 +0000 (10:56 +0100)]
Merge pull request #1506 from danielboulby-arm/db/SeparateCodeAndROData
Fix build for SEPARATE_CODE_AND_RODATA=0
Dimitris Papastamos [Fri, 3 Aug 2018 09:53:12 +0000 (10:53 +0100)]
Merge pull request #1509 from antonio-nino-diaz-arm/an/bool
xlat: psci: Use bool instead of int
Dimitris Papastamos [Fri, 3 Aug 2018 08:36:49 +0000 (09:36 +0100)]
Merge pull request #1503 from ARM-software/dh/dual-lic
Update license information in readme.rst
Dimitris Papastamos [Fri, 3 Aug 2018 08:34:58 +0000 (09:34 +0100)]
Merge pull request #1508 from sandrine-bailleux-arm/sb/fix-trusty-build
Fix handler prototype in Trusty generic dispatcher
Antonio Nino Diaz [Wed, 1 Aug 2018 15:42:10 +0000 (16:42 +0100)]
psci: Use bool in internal interfaces
Change-Id: I77c9cd2d1d6d0122cc49917fa686014bee154589
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 2 Aug 2018 08:57:29 +0000 (09:57 +0100)]
xlat: Use bool instead of int
Change-Id: I35d5b6a7c219f6f38983b30f157c1ed3808af17f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Yann Gautier [Thu, 2 Aug 2018 11:46:17 +0000 (13:46 +0200)]
mmc: add required delays when retrying commands
A new function mmc_reset_to_idle is also created.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Dimitris Papastamos [Thu, 2 Aug 2018 09:21:27 +0000 (10:21 +0100)]
Merge pull request #1507 from jeenu-arm/bool
Define bool type
Daniel Boulby [Mon, 16 Jul 2018 13:09:15 +0000 (14:09 +0100)]
Fix build for SEPARATE_CODE_AND_RODATA=0
TF won't build since no memory region is specified
for when SEPARATE_CODE_AND_RODATA=0 it still relies on
the ARM_MAP_BL_RO_DATA region which is never defined for
this case. Create memory region combining code and RO data for
when the build flag SEPARATE_CODE_AND_RODATA=0 to fix this
Change-Id: I6c129eb0833497710cce55e76b8908ce03e0a638
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>