project/bcm63xx/atf.git
5 years agorcar_gen3: drivers: pfc: D3: Switch to common register header file
Marek Vasut [Mon, 17 Jun 2019 16:19:09 +0000 (18:19 +0200)]
rcar_gen3: drivers: pfc: D3: Switch to common register header file

Drop local copy of register macros and switch to common header.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I26cd58706d7fc9fc92de280bfd77ae162924533d

5 years agorcar_gen3: drivers: pfc: M3N: Drop forward declarations
Marek Vasut [Mon, 17 Jun 2019 17:05:51 +0000 (19:05 +0200)]
rcar_gen3: drivers: pfc: M3N: Drop forward declarations

There's no point in having forward declaration just before the function
itself, drop it. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I374c4e90729cd13aa4c5878bb3d0917071fa19f1

5 years agorcar_gen3: drivers: pfc: M3N: Switch to BIT() macro
Marek Vasut [Mon, 17 Jun 2019 17:05:37 +0000 (19:05 +0200)]
rcar_gen3: drivers: pfc: M3N: Switch to BIT() macro

Utilise existing BIT() macro. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I4cd541f6485a454bd32bd34a3c95d50fd183052f

5 years agorcar_gen3: drivers: pfc: M3N: Checkpatch cleanup
Marek Vasut [Mon, 17 Jun 2019 17:05:26 +0000 (19:05 +0200)]
rcar_gen3: drivers: pfc: M3N: Checkpatch cleanup

Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Iea1f0625ecc461168342e591e30947b543501bac

5 years agorcar_gen3: drivers: pfc: M3N: Switch to common register header file
Marek Vasut [Mon, 17 Jun 2019 17:04:36 +0000 (19:04 +0200)]
rcar_gen3: drivers: pfc: M3N: Switch to common register header file

Drop local copy of register macros and switch to common header.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If39ba51685ef0bb993010658d98be6981253dce0

5 years agorcar_gen3: drivers: pfc: M3W: Fix camel case
Marek Vasut [Mon, 17 Jun 2019 17:02:58 +0000 (19:02 +0200)]
rcar_gen3: drivers: pfc: M3W: Fix camel case

Replace function name with non-camel-case one. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I98317def6640aebe559aa2edc4304029acf80505

5 years agorcar_gen3: drivers: pfc: M3W: Drop forward declarations
Marek Vasut [Mon, 17 Jun 2019 17:01:39 +0000 (19:01 +0200)]
rcar_gen3: drivers: pfc: M3W: Drop forward declarations

There's no point in having forward declaration just before the function
itself, drop it. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I936232205adbfc834fffdfa015ec5c5d4e3480ea

5 years agorcar_gen3: drivers: pfc: M3W: Switch to BIT() macro
Marek Vasut [Mon, 17 Jun 2019 16:58:23 +0000 (18:58 +0200)]
rcar_gen3: drivers: pfc: M3W: Switch to BIT() macro

Utilise existing BIT() macro. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Idea2afc11fb5dcfc39fb319b703ee8ee9dcc3ea6

5 years agorcar_gen3: drivers: pfc: M3W: Checkpatch cleanup
Marek Vasut [Mon, 17 Jun 2019 16:57:37 +0000 (18:57 +0200)]
rcar_gen3: drivers: pfc: M3W: Checkpatch cleanup

Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I6d48af4b1d56ef487744f4a58126140bbad28132

5 years agorcar_gen3: drivers: pfc: M3W: Switch to common register header file
Marek Vasut [Mon, 17 Jun 2019 16:57:11 +0000 (18:57 +0200)]
rcar_gen3: drivers: pfc: M3W: Switch to common register header file

Drop local copy of register macros and switch to common header.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I8374340961d5465698183fdbc30143a70ebcbde4

5 years agorcar_gen3: drivers: pfc: H3: Drop pfc_reg_write() forward declaration
Marek Vasut [Mon, 17 Jun 2019 16:51:40 +0000 (18:51 +0200)]
rcar_gen3: drivers: pfc: H3: Drop pfc_reg_write() forward declaration

There's no point in having forward declaration just before the function
itself, drop it. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I56125389fa6fe3ae169cacdb0e4b60376f0a6489

5 years agorcar_gen3: drivers: pfc: H3: Switch to BIT() macro
Marek Vasut [Mon, 17 Jun 2019 16:52:06 +0000 (18:52 +0200)]
rcar_gen3: drivers: pfc: H3: Switch to BIT() macro

Utilise existing BIT() macro. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I339dbd8c8579dffc9bf454d34e3ba9f142a07fa7

5 years agorcar_gen3: drivers: pfc: H3: Drop unused macros
Marek Vasut [Mon, 17 Jun 2019 16:51:29 +0000 (18:51 +0200)]
rcar_gen3: drivers: pfc: H3: Drop unused macros

Remove unused and irrelevant macros. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I0f251cd838f1d5879ccfd0738dc8ead355b3b74f

5 years agorcar_gen3: drivers: pfc: H3: Checkpatch cleanup
Marek Vasut [Mon, 17 Jun 2019 16:51:19 +0000 (18:51 +0200)]
rcar_gen3: drivers: pfc: H3: Checkpatch cleanup

Checkpatch cleanups of the PFC init code and remaining SoC specific macros.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I31293e70a362f713261ac588f563c687449c5f6c

5 years agorcar_gen3: drivers: pfc: H3: Switch to common register header file
Marek Vasut [Mon, 17 Jun 2019 16:49:35 +0000 (18:49 +0200)]
rcar_gen3: drivers: pfc: H3: Switch to common register header file

Drop local copy of register macros and switch to common header.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I85d6855f329771f698d84348ce11ce31548512db

5 years agorcar_gen3: drivers: pfc: Introduce common register header file
Marek Vasut [Mon, 17 Jun 2019 16:18:56 +0000 (18:18 +0200)]
rcar_gen3: drivers: pfc: Introduce common register header file

Introduce header file which contains the shared registers and bits
between the different SoCs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I5f41d39347b9d57e3efdea24ae61a16d5c7efb80

5 years agorcar_gen3: drivers: pfc: D3: Drop unused M3W check
Marek Vasut [Mon, 17 Jun 2019 16:27:07 +0000 (18:27 +0200)]
rcar_gen3: drivers: pfc: D3: Drop unused M3W check

Drop check for SoC being M3W ES1.0 , this check is clearly bogus,
as this code can never be executed on M3W ES 1.0.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If6087f1c217393dc65d20f6591eca40188563710

5 years agoMerge "libc: fix memchr implementation" into integration
John Tsichritzis [Thu, 20 Jun 2019 12:15:31 +0000 (12:15 +0000)]
Merge "libc: fix memchr implementation" into integration

5 years agoMerge "doc: Isolate security-related build options" into integration
John Tsichritzis [Thu, 20 Jun 2019 09:54:53 +0000 (09:54 +0000)]
Merge "doc: Isolate security-related build options" into integration

5 years agolibc: fix memchr implementation
Ambroise Vincent [Fri, 7 Jun 2019 10:19:45 +0000 (11:19 +0100)]
libc: fix memchr implementation

The previous implementation could behave incorrectly because of the sign
extension of the char when compared to the int.

Change-Id: I397838b0ec87a6f1af6972d022a8c19a5184b447
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
5 years agoMerge "bl2_el3: clean up linker script" into integration
Soby Mathew [Thu, 20 Jun 2019 07:42:23 +0000 (07:42 +0000)]
Merge "bl2_el3: clean up linker script" into integration

5 years agoMerge changes from topic "yg/clk_syscfg_dt" into integration
John Tsichritzis [Wed, 19 Jun 2019 15:06:00 +0000 (15:06 +0000)]
Merge changes from topic "yg/clk_syscfg_dt" into integration

* changes:
  fdts: stm32mp1: realign device tree files with internal devs
  stm32mp1: increase device tree size to 20kB
  stm32mp1: make dt_get_stdout_node_offset() static
  stm32mp1: use unsigned values for SDMMC defines
  stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES
  stm32mp1: update doc for U-Boot compilation
  stm32mp1: add general SYSCFG management
  stm32mp1: move stm32_get_gpio_bank_clock() to private file
  clk: stm32mp1: correctly handle Clock Spreading Generator
  clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
  clk: stm32mp1: move oscillator functions to generic file
  arch: add some defines for generic timer registers

5 years agoMerge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration
John Tsichritzis [Mon, 17 Jun 2019 13:40:05 +0000 (13:40 +0000)]
Merge changes If61ab215,I3e8b0251,I1757eee9,I81b48475,I46b445a7, ... into integration

* changes:
  rcar_gen3: drivers: qos: Move QoS drivers out of staging
  rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table
  rcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table
  rcar_gen3: drivers: qos: Fix checkpatch issues
  rcar_gen3: drivers: qos: V3M: Drop useless comments
  rcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: V3M: Use common register definition
  rcar_gen3: drivers: qos: E3: Drop extra level of nesting
  rcar_gen3: drivers: qos: E3: Use common register definition
  rcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros
  rcar_gen3: drivers: qos: D3: Drop MD pin check
  rcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting()
  rcar_gen3: drivers: qos: D3: Drop useless comments
  rcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: D3: Use common register definition
  rcar_gen3: drivers: qos: M3N: Fix checkpatch issues
  rcar_gen3: drivers: qos: M3N: Drop MD pin check
  rcar_gen3: drivers: qos: M3N: Drop useless comments
  rcar_gen3: drivers: qos: M3N: Drop extra level of nesting
  rcar_gen3: drivers: qos: M3N: Use common register definition
  rcar_gen3: drivers: qos: M3W: Fix checkpatch issues
  rcar_gen3: drivers: qos: M3W: Drop MD pin check
  rcar_gen3: drivers: qos: M3W: Drop useless comments
  rcar_gen3: drivers: qos: M3W: Drop extra level of nesting
  rcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: M3W: Use common register definition
  rcar_gen3: drivers: qos: H3: Fix checkpatch issues
  rcar_gen3: drivers: qos: H3: Drop MD pin check
  rcar_gen3: drivers: qos: H3: Drop useless comments
  rcar_gen3: drivers: qos: H3: Drop extra level of nesting
  rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
  rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
  rcar_gen3: drivers: qos: H3: Use common register definition
  rcar_gen3: console: Convert to multi-console API

5 years agorcar_gen3: drivers: qos: Move QoS drivers out of staging
Marek Vasut [Sat, 15 Jun 2019 13:01:04 +0000 (15:01 +0200)]
rcar_gen3: drivers: qos: Move QoS drivers out of staging

Now that QoS drivers are cleaned up , move them out of staging.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8

5 years agorcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table
Marek Vasut [Fri, 14 Jun 2019 14:10:09 +0000 (16:10 +0200)]
rcar_gen3: drivers: qos: V3M: Configure DBSC QoS from a table

Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I3e8b0251099b57581ebdcfce5670bff5579dc505

5 years agorcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table
Marek Vasut [Fri, 14 Jun 2019 13:50:57 +0000 (15:50 +0200)]
rcar_gen3: drivers: qos: E3: Configure DBSC QoS from a table

Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I1757eee9a209c368d0e8fba9809e56b8090ee43f

5 years agorcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table
Marek Vasut [Fri, 14 Jun 2019 13:46:08 +0000 (15:46 +0200)]
rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table

Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I81b48475114fc293766a6d7f2b46f8e913a51b06

5 years agorcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table
Marek Vasut [Fri, 14 Jun 2019 14:09:05 +0000 (16:09 +0200)]
rcar_gen3: drivers: qos: M3N: Configure DBSC QoS from a table

Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I46b445a77b39412e7a41ae0e0e087a409d0c22e3

5 years agorcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table
Marek Vasut [Fri, 14 Jun 2019 14:08:19 +0000 (16:08 +0200)]
rcar_gen3: drivers: qos: M3W: Configure DBSC QoS from a table

Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie2cbfdacf6d1c7eca4498ab7787b866a83660485

5 years agorcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table
Marek Vasut [Fri, 14 Jun 2019 13:52:45 +0000 (15:52 +0200)]
rcar_gen3: drivers: qos: H3: Configure DBSC QoS from a table

Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I62b133ea4f4129a641b779a782938976ad52fbfe

5 years agorcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table
Marek Vasut [Fri, 14 Jun 2019 13:55:04 +0000 (15:55 +0200)]
rcar_gen3: drivers: qos: Add function to configure DBSC QoS settings from a table

The DBSC QoS settings can be programmed by iterating over a table with
register-value pairs and writing those to the registers, add function
to do just that. Subsequent patches will convert the DBSC QoS setting
functions for each SoC to this new function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I949c46a0f032661a58000cb5f7829349e973438c

5 years agorcar_gen3: drivers: qos: Fix checkpatch issues
Marek Vasut [Fri, 14 Jun 2019 00:27:52 +0000 (02:27 +0200)]
rcar_gen3: drivers: qos: Fix checkpatch issues

Fix checkpatch issues, clean up macro indentation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Id0f1e322b44562f9863e885583d89fbf47cab91b

5 years agorcar_gen3: drivers: qos: V3M: Drop useless comments
Marek Vasut [Fri, 14 Jun 2019 00:10:17 +0000 (02:10 +0200)]
rcar_gen3: drivers: qos: V3M: Drop useless comments

Drop useless comments in dbsc_setting(). No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I8a113d253f39e5b6a61e16b1740f9a66b2540753

5 years agorcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t
Marek Vasut [Fri, 14 Jun 2019 00:08:45 +0000 (02:08 +0200)]
rcar_gen3: drivers: qos: V3M: Convert mstat table to uint64_t

Convert the mstat table from a complex structure to simple sequence
of uint64_t values, since the structure described just that and the
loop can operate over incrementing sequence of addresses just fine.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If1917605e5540a38cbd763c56fc1e677573e7066

5 years agorcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file
Marek Vasut [Fri, 14 Jun 2019 00:07:18 +0000 (02:07 +0200)]
rcar_gen3: drivers: qos: V3M: Factor out mstat fix into separate file

Pull out the mstat fix array into separate file, to align the structure
of the driver with the other SoCs. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ifb6644063d8f463e2eb20bdadc5b69ab74ac591d

5 years agorcar_gen3: drivers: qos: V3M: Use common register definition
Marek Vasut [Fri, 14 Jun 2019 00:05:43 +0000 (02:05 +0200)]
rcar_gen3: drivers: qos: V3M: Use common register definition

Use common qos_regs.h instead of a local copy in the V3M QoS init.
Fill missing registers into qos_regs.h . No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I9aabff54abc05781ef606b0d09e4e9fbf7ec3968

5 years agorcar_gen3: drivers: qos: E3: Drop extra level of nesting
Marek Vasut [Thu, 13 Jun 2019 23:04:07 +0000 (01:04 +0200)]
rcar_gen3: drivers: qos: E3: Drop extra level of nesting

The extra level of nesting is not necessary, drop it.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I49df37734cd6016373a5850d3b9cf4a6569c36d6

5 years agorcar_gen3: drivers: qos: E3: Use common register definition
Marek Vasut [Fri, 14 Jun 2019 00:23:04 +0000 (02:23 +0200)]
rcar_gen3: drivers: qos: E3: Use common register definition

Use common qos_regs.h instead of a local copy in the E3 QoS init.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ia4336d4b6173e1dbb671a003d904dbc5dc0c196d

5 years agorcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros
Marek Vasut [Sat, 15 Jun 2019 12:55:29 +0000 (14:55 +0200)]
rcar_gen3: drivers: qos: D3: Replace ad-hoc register addresses with macros

Replace the remaining ad-hoc register addresses with proper macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If125f0c8ef77ed280107324edaa05f21979a2c27

5 years agorcar_gen3: drivers: qos: D3: Drop MD pin check
Marek Vasut [Thu, 13 Jun 2019 22:54:01 +0000 (00:54 +0200)]
rcar_gen3: drivers: qos: D3: Drop MD pin check

The DBSC_SCFCTST2 is always written with the same value, no matter
what the MD pin value is, drop the entire check and just write the
register with the one and only possible value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I44d48ad59293562539a0c1d8ffd66333714e041e

5 years agorcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting()
Marek Vasut [Thu, 13 Jun 2019 22:51:47 +0000 (00:51 +0200)]
rcar_gen3: drivers: qos: D3: Make DBSC settings local to dbsc_setting()

Move the DBSC write enabling and disabling to dbsc_setting() function,
to make it local, instead of having it all over the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If8e5657c3230b5d82b551cb89b11c4d13a2d096b

5 years agorcar_gen3: drivers: qos: D3: Drop useless comments
Marek Vasut [Thu, 13 Jun 2019 22:50:28 +0000 (00:50 +0200)]
rcar_gen3: drivers: qos: D3: Drop useless comments

Drop useless comments in dbsc_setting(). No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: If54e770ce81c9a6610cd89c3d5f01ea9b96af521

5 years agorcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t
Marek Vasut [Thu, 13 Jun 2019 23:01:34 +0000 (01:01 +0200)]
rcar_gen3: drivers: qos: D3: Convert mstat table to uint64_t

Convert the mstat table from a complex structure to simple sequence
of uint64_t values, since the structure described just that and the
loop can operate over incrementing sequence of addresses just fine.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I5f797024c76f2c18b160ac50ede9e1eac24e6652

5 years agorcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file
Marek Vasut [Thu, 13 Jun 2019 22:47:30 +0000 (00:47 +0200)]
rcar_gen3: drivers: qos: D3: Factor out mstat fix into separate file

Pull out the mstat fix array into separate file, to align the structure
of the driver with the other SoCs. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I2559c5ceb06505361d026ebc1b762bebe17d920b

5 years agorcar_gen3: drivers: qos: D3: Use common register definition
Marek Vasut [Thu, 13 Jun 2019 22:42:59 +0000 (00:42 +0200)]
rcar_gen3: drivers: qos: D3: Use common register definition

Use common qos_regs.h instead of a local copy in the D3 QoS init.
Fill missing registers into qos_regs.h . No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ie22a81bf5cbf3f8970c6e3fbb43ef52c26fb7168

5 years agorcar_gen3: drivers: qos: M3N: Fix checkpatch issues
Marek Vasut [Fri, 14 Jun 2019 00:21:54 +0000 (02:21 +0200)]
rcar_gen3: drivers: qos: M3N: Fix checkpatch issues

Fix checkpatch issues, clean up macro indentation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I08c033b317685bef7537eb49de160e827b7791ad

5 years agorcar_gen3: drivers: qos: M3N: Drop MD pin check
Marek Vasut [Thu, 13 Jun 2019 23:58:56 +0000 (01:58 +0200)]
rcar_gen3: drivers: qos: M3N: Drop MD pin check

The DBSC_SCFCTST2 is always written with the same value, no matter
what the MD pin value is, drop the entire check and just write the
register with the one and only possible value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Icd3e12f814d4fdcddaec2d1415f0bbf92169284b

5 years agorcar_gen3: drivers: qos: M3N: Drop useless comments
Marek Vasut [Thu, 13 Jun 2019 23:58:27 +0000 (01:58 +0200)]
rcar_gen3: drivers: qos: M3N: Drop useless comments

Drop useless comments in dbsc_setting(). No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I6fe03e16c63278aa6fc1bbcc72c07a450d3b7638

5 years agorcar_gen3: drivers: qos: M3N: Drop extra level of nesting
Marek Vasut [Thu, 13 Jun 2019 23:57:30 +0000 (01:57 +0200)]
rcar_gen3: drivers: qos: M3N: Drop extra level of nesting

The extra level of nesting is not necessary, drop it.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I6d268eae8df5794511d5211e5a59a36291adab3e

5 years agorcar_gen3: drivers: qos: M3N: Use common register definition
Marek Vasut [Fri, 14 Jun 2019 00:01:00 +0000 (02:01 +0200)]
rcar_gen3: drivers: qos: M3N: Use common register definition

Use common qos_regs.h instead of a local copy in the M3N QoS init.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I9670c9cdb320d6724175c22210d048af54490b47

5 years agorcar_gen3: drivers: qos: M3W: Fix checkpatch issues
Marek Vasut [Fri, 14 Jun 2019 00:21:45 +0000 (02:21 +0200)]
rcar_gen3: drivers: qos: M3W: Fix checkpatch issues

Fix checkpatch issues, clean up macro indentation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ifd397962c40d174c3af31cb440241cc8bd9335d3

5 years agorcar_gen3: drivers: qos: M3W: Drop MD pin check
Marek Vasut [Thu, 13 Jun 2019 23:51:40 +0000 (01:51 +0200)]
rcar_gen3: drivers: qos: M3W: Drop MD pin check

The DBSC_SCFCTST2 is always written with the same value, no matter
what the MD pin value is, drop the entire check and just write the
register with the one and only possible value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Idf26cf064e99e95f0140dd747183efe6a6d7f0bf

5 years agorcar_gen3: drivers: qos: M3W: Drop useless comments
Marek Vasut [Thu, 13 Jun 2019 23:50:16 +0000 (01:50 +0200)]
rcar_gen3: drivers: qos: M3W: Drop useless comments

Drop useless comments in dbsc_setting(). No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I4460c55bf58f33ca72c9bbad99a28b5e4ef7421e

5 years agorcar_gen3: drivers: qos: M3W: Drop extra level of nesting
Marek Vasut [Thu, 13 Jun 2019 23:39:27 +0000 (01:39 +0200)]
rcar_gen3: drivers: qos: M3W: Drop extra level of nesting

The extra level of nesting is not necessary, drop it.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I086ab1f457866f0e2c3ccd67609c0be35631f893

5 years agorcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t
Marek Vasut [Thu, 13 Jun 2019 23:47:00 +0000 (01:47 +0200)]
rcar_gen3: drivers: qos: M3W: Convert mstat table to uint64_t

Convert the mstat table from a complex structure to simple sequence
of uint64_t values, since the structure described just that and the
loop can operate over incrementing sequence of addresses just fine.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I41728b30087996edc9799f320bf6a3b4465538bd

5 years agorcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file
Marek Vasut [Thu, 13 Jun 2019 23:44:43 +0000 (01:44 +0200)]
rcar_gen3: drivers: qos: M3W: Factor out mstat fix into separate file

Pull out the mstat fix array into separate file, to align the structure
of the driver with the other SoCs. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I21c18e80ab9225837e5553dadcf196605e878143

5 years agorcar_gen3: drivers: qos: M3W: Use common register definition
Marek Vasut [Thu, 13 Jun 2019 23:41:10 +0000 (01:41 +0200)]
rcar_gen3: drivers: qos: M3W: Use common register definition

Use common qos_regs.h instead of a local copy in the M3W QoS init.
Fill missing registers into qos_regs.h . No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I91175c86cdb94b9271c880df2cb65949f15f1bad

5 years agofdts: stm32mp1: realign device tree files with internal devs
Yann Gautier [Tue, 4 Jun 2019 15:24:36 +0000 (17:24 +0200)]
fdts: stm32mp1: realign device tree files with internal devs

Update DDR parameters to version 1.45.
Remove useless sdmmc1_dir_pins_b node.
Add USART3 and UART7 nodes.
Correct a PMIC value for USB regulator.
Add TIMER12, TIMER15, CRYP, HASH and USBOTG_HS nodes.
Update DTSI file for SDMMC compatible, but overwrite it with the former
name.
Move BSEC board_id node to boards DTS files, as this OTP is specific to
STMicroelectronics boards.

Change-Id: If4d2fe090c6a8368afe8e21e5ac70579911d3939
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: increase device tree size to 20kB
Yann Gautier [Fri, 19 Apr 2019 08:55:03 +0000 (10:55 +0200)]
stm32mp1: increase device tree size to 20kB

Change-Id: Idee966b6434aa038e54b6e7176749a7b65bdbe84
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: make dt_get_stdout_node_offset() static
Yann Gautier [Tue, 4 Jun 2019 15:20:44 +0000 (17:20 +0200)]
stm32mp1: make dt_get_stdout_node_offset() static

Do not export function dt_get_stdout_node_offset() that is used only inside
stm32mp_dt.c source file.

Change-Id: I9dd3dbfab21d42ed81c68723e71fe5a7586dce93
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: use unsigned values for SDMMC defines
Yann Gautier [Thu, 9 May 2019 11:25:52 +0000 (13:25 +0200)]
stm32mp1: use unsigned values for SDMMC defines

Correct SDMMC macros to define unsigned values as expected by the
driver implementation.

Change-Id: Ib009f3df2cf26a9759d129eb571a27b2564770ce
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES
Yann Gautier [Thu, 9 May 2019 09:56:30 +0000 (11:56 +0200)]
stm32mp1: remove useless LIBFDT_SRCS from PLAT_BL_COMMON_SOURCES

Remove inclusion of libfdt source files in source file list since these
are already included from generic libfdt.mk makefile.

Change-Id: If42624557c4d88ca85d70f83b1b08c58f50afe72
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: update doc for U-Boot compilation
Yann Gautier [Mon, 20 May 2019 09:50:18 +0000 (11:50 +0200)]
stm32mp1: update doc for U-Boot compilation

U-Boot should be compiled with stm32mp15_trusted_defconfig which is
supported since tag v2019.07-rc1 with commit [1].

The creation of the U-Boot binary with stm32 header is done at U-Boot
compilation step, it is no more required to call the extra command.

[1] https://git.denx.de/?p=u-boot.git;a=commit;h=015289580f81

Change-Id: Ia875c22184785fc2e02ad07993a649069cd5ce34
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: add general SYSCFG management
Yann Gautier [Mon, 20 May 2019 17:17:08 +0000 (19:17 +0200)]
stm32mp1: add general SYSCFG management

The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.

The SYSCFG driver is in charge of configuring masters on the interconnect,
IO compensation, low voltage boards, or pull-ups for boot pins.
All other configurations should be handled in Linux drivers requiring it.

Device tree files are also updated to manage vdd-supply regulator.

Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: move stm32_get_gpio_bank_clock() to private file
Yann Gautier [Tue, 7 May 2019 16:52:17 +0000 (18:52 +0200)]
stm32mp1: move stm32_get_gpio_bank_clock() to private file

GPIOx clocks are specific to each STM32MP platforms.
This change moves function stm32_get_gpio_bank_clock() from stm32mp
common source files to platform private stm32mp1_private.c source file.

Change-Id: I9616c0d3fe4d10af715d6f2d1550c13ab62c829a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agoclk: stm32mp1: correctly handle Clock Spreading Generator
Yann Gautier [Tue, 4 Jun 2019 13:55:37 +0000 (15:55 +0200)]
clk: stm32mp1: correctly handle Clock Spreading Generator

To activate the CSG option, the driver needs to set the bit2
of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator.
This bit should not be cleared when starting the PLL.

Change-Id: Ie5c720ff03655f27a7e7e9e7ccf8295dd046112f
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agoclk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
Yann Gautier [Tue, 7 May 2019 16:49:33 +0000 (18:49 +0200)]
clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array

Rework the macro that eases the table definition: the src and msk fields
are now using MASK and SHIFT defines of each source register.
Some macros had then to be modified: _USART1_SEL, _ASS_SEL and _MSS_SEL to
_UART1_SEL, _AXIS_SEL, and _MCUS_SEL to match register fields.

Note: the mask for RCC_ASSCKSELR_AXISSRC is changed from 0x3 to 0x7
to reflect the size of the register field, even if there are only
3 possible clock sources.

The mask value is also corrected for QSPI and FMC clock selection.

Change-Id: I44114e3c1dd37b9fa1be1ba519611abd9a07764c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
5 years agoclk: stm32mp1: move oscillator functions to generic file
Yann Gautier [Fri, 17 May 2019 13:57:56 +0000 (15:57 +0200)]
clk: stm32mp1: move oscillator functions to generic file

Those functions are generic for parsing nodes from device tree
hence could be located in generic source file.

The oscillators description structure is also moved to STM32MP1 clock
driver, as it is no more used in stm32mp1_clkfunc and cannot be in a
generic file.

Change-Id: I93ba74f4eea916440fef9b160d306af1b39f17c6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agoarch: add some defines for generic timer registers
Yann Gautier [Wed, 17 Apr 2019 11:47:07 +0000 (13:47 +0200)]
arch: add some defines for generic timer registers

Those defines are used in STM32MP1 clock driver.
It is better to put them altogether with already defined registers.

Change-Id: I6f8ad8c2477b947af6f76283a4ef5c40212d0027
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agoMerge "Fix type of cot_desc_ptr" into integration
John Tsichritzis [Mon, 17 Jun 2019 11:51:24 +0000 (11:51 +0000)]
Merge "Fix type of cot_desc_ptr" into integration

5 years agoMerge "DSU: Apply erratum 936184 for Neoverse N1/E1" into integration
John Tsichritzis [Mon, 17 Jun 2019 11:50:52 +0000 (11:50 +0000)]
Merge "DSU: Apply erratum 936184 for Neoverse N1/E1" into integration

5 years agoMerge "allwinner: Disable unused features to save space" into integration
John Tsichritzis [Mon, 17 Jun 2019 11:49:23 +0000 (11:49 +0000)]
Merge "allwinner: Disable unused features to save space" into integration

5 years agorcar_gen3: drivers: qos: H3: Fix checkpatch issues
Marek Vasut [Fri, 14 Jun 2019 00:17:54 +0000 (02:17 +0200)]
rcar_gen3: drivers: qos: H3: Fix checkpatch issues

Fix checkpatch issues, clean up macro indentation. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I605109b5e41219473a4cbc4a1929b84377ba0b67

5 years agorcar_gen3: drivers: qos: H3: Drop MD pin check
Marek Vasut [Thu, 13 Jun 2019 23:35:59 +0000 (01:35 +0200)]
rcar_gen3: drivers: qos: H3: Drop MD pin check

The DBSC_SCFCTST2 is always written with the same value, no matter
what the MD pin value is, drop the entire check and just write the
register with the one and only possible value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I4d8926eb3c44c61ec777c05c581ce8247f13daa6

5 years agorcar_gen3: drivers: qos: H3: Drop useless comments
Marek Vasut [Thu, 13 Jun 2019 23:32:53 +0000 (01:32 +0200)]
rcar_gen3: drivers: qos: H3: Drop useless comments

Drop useless comments in dbsc_setting(). No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I9e3d025567ff4e10e2b4448e8a518b4eee13f6c5

5 years agorcar_gen3: drivers: qos: H3: Drop extra level of nesting
Marek Vasut [Thu, 13 Jun 2019 23:30:41 +0000 (01:30 +0200)]
rcar_gen3: drivers: qos: H3: Drop extra level of nesting

The extra level of nesting is not necessary, drop it.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I7b55a6fa53145ff0427e05656234917f486031df

5 years agorcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
Marek Vasut [Thu, 13 Jun 2019 23:27:27 +0000 (01:27 +0200)]
rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t

Convert the mstat table from a complex structure to simple sequence
of uint64_t values, since the structure described just that and the
loop can operate over incrementing sequence of addresses just fine.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I379a1a5dfe2095d9477b364393ab120c4d8e1ba4

5 years agorcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
Marek Vasut [Thu, 13 Jun 2019 23:25:01 +0000 (01:25 +0200)]
rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file

Pull out the mstat fix array into separate file, to align the structure
of the driver with the other SoCs. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ia92abe11c425220a065d707c350644c955efef92

5 years agorcar_gen3: drivers: qos: H3: Use common register definition
Marek Vasut [Thu, 13 Jun 2019 23:22:38 +0000 (01:22 +0200)]
rcar_gen3: drivers: qos: H3: Use common register definition

Use common qos_regs.h instead of a local copy in the H3 QoS init.
Fill missing registers into qos_regs.h . No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I0b5ceab71be07e270885bdff403e5292e3373787

5 years agobl2_el3: clean up linker script
Masahiro Yamada [Fri, 14 Jun 2019 08:49:17 +0000 (17:49 +0900)]
bl2_el3: clean up linker script

This linker script is so unreadable due to sprinkled #ifdef.

Direct read-only data to 'ROM' and read-write data to 'RAM'.

Both go to the same memory device when BL2_IN_XIP_MEM is disabled.

Change-Id: Ieeac3f1a4e05e9e8599de2ec84260819c70f361e
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agorcar_gen3: console: Convert to multi-console API
Marek Vasut [Sat, 18 May 2019 17:29:16 +0000 (19:29 +0200)]
rcar_gen3: console: Convert to multi-console API

Convert the R-Car Gen3 platform and both SCIF and Log drivers
to multi-console API.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I18556973937d150b60453f9150d54ee612571e35

5 years agoFix type of cot_desc_ptr
Sandrine Bailleux [Fri, 7 Jun 2019 12:33:51 +0000 (14:33 +0200)]
Fix type of cot_desc_ptr

The chain of trust description and the pointer pointing to its first
element were incompatible, thus requiring an explicit type cast for
the assignment.

- cot_desc was an array of
  const pointers to const image descriptors.

- cot_desc_ptr was a const pointer to
  (non-constant) pointers to const image descriptors.

Thus, trying to assign cot_desc to cot_desc_ptr (with no cast) would
generate the following compiler warning:

drivers/auth/tbbr/tbbr_cot.c:826:14: warning: initialization discards
  â€˜const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
 REGISTER_COT(cot_desc);
              ^~~~~~~~

Change-Id: Iae62dd1bdb43fe379e3843d96461d47cc2f68a06
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
5 years agodoc: Isolate security-related build options
Ambroise Vincent [Wed, 5 Jun 2019 14:40:29 +0000 (15:40 +0100)]
doc: Isolate security-related build options

Reference security specific build options from the user guide.

Change-Id: I0e1efbf47d914cf3c473104175c702ff1a80eb67
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
5 years agoDSU: Apply erratum 936184 for Neoverse N1/E1
Louis Mayencourt [Mon, 10 Jun 2019 15:43:39 +0000 (16:43 +0100)]
DSU: Apply erratum 936184 for Neoverse N1/E1

Change-Id: Idd08914bcb945ad6aa0621e594c95df88ee8f9c8
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
5 years agoMerge "plat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set" into integration
Soby Mathew [Tue, 11 Jun 2019 11:39:46 +0000 (11:39 +0000)]
Merge "plat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set" into integration

5 years agoplat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set
Louis Mayencourt [Tue, 11 Jun 2019 09:51:34 +0000 (10:51 +0100)]
plat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set

BL2U should not build when RESET_TO_SP_MIN flag is set, like BL1 and
BL2.

Change-Id: Iac516121f98611ca1f58d2b5efdec6525b06ce4e
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
5 years agoMerge "Update maintainers list" into integration
Soby Mathew [Tue, 11 Jun 2019 10:35:56 +0000 (10:35 +0000)]
Merge "Update maintainers list" into integration

5 years agoUpdate maintainers list
John Tsichritzis [Mon, 10 Jun 2019 09:31:17 +0000 (10:31 +0100)]
Update maintainers list

Also sort alphabetically the links at the bottom, a couple of them were
not sorted.

Change-Id: I49a1dbe9e56a36c5fdbace8e4c8b9a5270bc2984
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
5 years agoMerge "doc: Document E and W build options" into integration
Soby Mathew [Mon, 10 Jun 2019 09:41:44 +0000 (09:41 +0000)]
Merge "doc: Document E and W build options" into integration

5 years agoMerge changes from topic "jts/ti_fix" into integration
Soby Mathew [Mon, 10 Jun 2019 09:40:25 +0000 (09:40 +0000)]
Merge changes from topic "jts/ti_fix" into integration

* changes:
  ti: k3: common: Remove coherency workaround for AM65x
  ti: k3: common: Use coherent memory for shared data

5 years agoMerge "PSCI: Lookup list of parent nodes to lock only once" into integration
Soby Mathew [Mon, 10 Jun 2019 09:39:23 +0000 (09:39 +0000)]
Merge "PSCI: Lookup list of parent nodes to lock only once" into integration

5 years agoMerge "Update Allwinner SoC names in documentation" into integration
Soby Mathew [Mon, 10 Jun 2019 09:14:13 +0000 (09:14 +0000)]
Merge "Update Allwinner SoC names in documentation" into integration

5 years agoallwinner: Disable unused features to save space
Samuel Holland [Sat, 8 Jun 2019 21:03:32 +0000 (16:03 -0500)]
allwinner: Disable unused features to save space

As all Allwinner platforms are single-cluster A53 chips, we can disable
support for newer, unsupported architecture extensions. We can also
avoid some cache maintenance code, since no platform-specific setup is
required to enable coherency.

These changes reduce the size of .text on a default build with GCC 9.1
enough that .vectors again fits in the second half of a page, instead
of requiring its own page.

This commit was boot-tested on the Pinebook.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Ib90454ef0c798d5e714b7780c585be0b1ed49c6d

5 years agoUpdate Allwinner SoC names in documentation
Samuel Holland [Sat, 8 Jun 2019 21:18:02 +0000 (16:18 -0500)]
Update Allwinner SoC names in documentation

Provide the friendly marketing names, not just the platform name.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Id4427abb73d0c1be4ac1709b2a8e87beffc20dd5

5 years agoMerge "Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703" into integr...
John Tsichritzis [Fri, 7 Jun 2019 15:20:45 +0000 (15:20 +0000)]
Merge "Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703" into integration

5 years agoPSCI: Lookup list of parent nodes to lock only once
Andrew F. Davis [Tue, 4 Jun 2019 14:46:54 +0000 (10:46 -0400)]
PSCI: Lookup list of parent nodes to lock only once

When acquiring or releasing the power domain locks for a given CPU the
parent nodes are looked up by walking the up the PD tree list on both the
acquire and release path, only one set of lookups is needed. Fetch the
parent nodes first and pass this list into both the acquire and release
functions to avoid the double lookup.

This also allows us to not have to do this lookup after coherency has
been exited during the core power down sequence. The shared struct
psci_cpu_pd_nodes is not placed in coherent memory like is done
for psci_non_cpu_pd_nodes and doing so would negatively affect
performance. With this patch we remove the need to have it in coherent
memory by moving the access out of psci_release_pwr_domain_locks().

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I7b9cfa9d31148dea0f5e21091c8b45ef7fe4c4ab

5 years agoMerge "FVP: Remove GIC initialisation from secondary core cold boot" into integration
John Tsichritzis [Thu, 6 Jun 2019 15:19:50 +0000 (15:19 +0000)]
Merge "FVP: Remove GIC initialisation from secondary core cold boot" into integration

5 years agoNeoverse N1: Introduce workaround for Neoverse N1 erratum 1315703
Andre Przywara [Mon, 20 May 2019 13:57:06 +0000 (14:57 +0100)]
Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703

Neoverse N1 erratum 1315703 is a Cat A (rare) erratum [1], present in
older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined CPUACTLR2_EL1
system register, which will disable the load-bypass-store feature.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdocpjdoc-466751330-1032/index.html

Change-Id: I5c708dbe0efa4daa0bcb6bd9622c5efe19c03af9
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
5 years agoMerge "Introduce BTI support in ROMLIB" into integration
John Tsichritzis [Thu, 6 Jun 2019 10:26:10 +0000 (10:26 +0000)]
Merge "Introduce BTI support in ROMLIB" into integration

5 years agoti: k3: common: Remove coherency workaround for AM65x
Andrew F. Davis [Thu, 25 Apr 2019 18:33:30 +0000 (14:33 -0400)]
ti: k3: common: Remove coherency workaround for AM65x

We previously left our caches on during power-down to prevent any
non-caching accesses to memory that is cached by other cores. Now with
the last accessed areas all being marked as non-cached by
USE_COHERENT_MEM we can rely on that to workaround our interconnect
issues. Remove the old workaround.

Change-Id: Idadb7696d1449499d1edff4f6f62ab3b99d1efb7
Signed-off-by: Andrew F. Davis <afd@ti.com>