openwrt/staging/blogic.git
12 years agodrm/i915: be more careful when returning -ENXIO in gmbus transfer
Daniel Vetter [Mon, 21 May 2012 18:19:48 +0000 (20:19 +0200)]
drm/i915: be more careful when returning -ENXIO in gmbus transfer

... flaky ddc hardware can cause a spurious NAK, resulting in the i2c
core and drm edid functions not trying to retry the edid transfer.

Luckily the gmbus quiescenting also times out for these cases, so we
can get out of this mess by returning -ETIMEDOUT for this specific
case. This way we keep the fast-fail of returning -ENXIO if there is
no device present, speeding up the boot process.

This regression has been introduced in

commit e646d5773572bf52017983d758bdf05777dc5600
Author: Daniel Kurtz <djkurtz@chromium.org>
Date:   Fri Mar 30 19:46:38 2012 +0800

    drm/i915/intel_i2c: always wait for IDLE before clearing NAK

v2: Return -ETIMEDOUT for this case and keep the -ENXIO for real NAKs,
suggested by Daniel Kurtz.

Cc: Daniel Kurtz <djkurtz@chromium.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49518
Reported-and-Tested-by: Julian Simioni <julian.simioni@gmail.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agoMerge tag 'drm-intel-next-2012-05-20' of git://people.freedesktop.org/~danvet/drm...
Dave Airlie [Mon, 21 May 2012 07:09:06 +0000 (08:09 +0100)]
Merge tag 'drm-intel-next-2012-05-20' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next

Daniel wrote:

The last pull I'd like to squeeze into 3.5, safe for the hsw stuff mostly
bugfixes:
- last few patches for basic hsw enabling (Eugeni, infoframe support by
 Paulo)
- Fix up infoframe support, we've hopefully squashed all the cargo-culting
 in there (Paulo). Among all the issues, this finally fixes some of the
 infoframe regressions seen on g4x and snb systems.
- Fixup sdvo infoframe support, this fixes a regression from 2.6.37.
- Correctly enable semaphores on snb, we've enabled it already for 3.5,
 but the dmar check was slightly wrong.
- gen6 irq fixlets from Chris.
- disable gmbus on i830, the hw seems to be simply broken.
- fix up the pch pll fallout (Chris & me).
- for_each_ring macro from Chris - I've figured I'll merge this now to
 avoid backport pain.
- complain when the rps state isn't what we expect (Chris). Note that this
 is shockingly easy to hit and hence pretty much will cause a regression
 report. But it only tells us that the gpu turbo state got out of whack,
 a problem we know off since a long time (it cause the gpu to get stuck a
 a fixed frequency, usually the lowest one). Chris is working on a fix,
 but we haven't yet found a magic formula that works perfectly (only
 patches that massively reduce the frequency of this happening).
- MAINTAINERS patch, I'm now officially the guy to beat up."

* tag 'drm-intel-next-2012-05-20' of git://people.freedesktop.org/~danvet/drm-intel: (57 commits)
  drm/i915: IBX has a fixed pch pll to pch pipe mapping
  drm/i915: implement hsw_write_infoframe
  drm/i915: small hdmi coding style cleanups
  drm/i915: fixup infoframe support for sdvo
  drm/i915: Enable the PCH PLL for all generations after link training
  drm/i915: Convert BUG_ON(!pll->active) and friends to a WARN
  drm/i915: don't clobber the pipe param in sanitize_modesetting
  drm/i915: disable gmbus on i830
  drm/i915: Replace the feature tests for BLT/BSD with ring init checks
  drm/i915: Check whether the ring is initialised prior to dispatch
  drm/i915: Introduce for_each_ring() macro
  drm/i915: Assert that the transcoder is indeed off before modifying it
  drm/i915: hook Haswell devices in place
  drm/i915: prepare HDMI link for Haswell
  drm/i915: move HDMI structs to shared location
  drm/i915: add WR PLL programming table
  drm/i915: add support for DDI-controlled digital outputs
  drm/i915: detect digital outputs on Haswell
  drm/i915: program iCLKIP on Lynx Point
  drm/i915: program WM_LINETIME on Haswell
  ...

12 years agodrm/i915: IBX has a fixed pch pll to pch pipe mapping
Daniel Vetter [Sun, 20 May 2012 18:00:25 +0000 (20:00 +0200)]
drm/i915: IBX has a fixed pch pll to pch pipe mapping

This should fix breakage introduced in

commit ee7b9f93fd96a72e5d09e2b44024c11880873c6b
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Fri Apr 20 17:11:53 2012 +0100

    drm/i915: manage PCH PLLs separately from pipes

v2: Add a DRM_DEBUG_KMS message to explain why a given pll was
selected, suggested by Chris Wilson.

v3: Actually run git add.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49712
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: implement hsw_write_infoframe
Paulo Zanoni [Mon, 14 May 2012 20:12:51 +0000 (17:12 -0300)]
drm/i915: implement hsw_write_infoframe

Both the control and data registers are completely different now.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: small hdmi coding style cleanups
Paulo Zanoni [Mon, 14 May 2012 20:12:50 +0000 (17:12 -0300)]
drm/i915: small hdmi coding style cleanups

- Changed the coding style of auxiliary infoframe functions to make
  them smaller
- Fixed the column alignment of some function definitions
- Remove definition of "struct drm_crtc" in some places as they're
  used only to retrieve "struct intel_crtc"

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: fixup infoframe support for sdvo
Daniel Vetter [Sat, 12 May 2012 18:22:00 +0000 (20:22 +0200)]
drm/i915: fixup infoframe support for sdvo

At least the worst offenders:
- SDVO specifies that the encoder should compute the ecc. Testing also
  shows that we must not send the ecc field, so copy the dip_infoframe
  struct to a temporay place and avoid the ecc field. This way the avi
  infoframe is exactly 17 bytes long, which agrees with what the spec
  mandates as a minimal storage capacity (with the ecc field it would
  be 18 bytes).
- Only 17 when sending the avi infoframe. The SDVO spec explicitly
  says that sending more data than what the device announces results
  in undefined behaviour.
- Add __attribute__((packed)) to the avi and spd infoframes, for
  otherwise they're wrongly aligned. Noticed because the avi infoframe
  ended up being 18 bytes large instead of 17. We haven't noticed this
  yet because we don't use the uint16_t fields yet (which are the only
  ones that would be wrongly aligned).

This regression has been introduce by

3c17fe4b8f40a112a85758a9ab2aebf772bdd647 is the first bad commit
commit 3c17fe4b8f40a112a85758a9ab2aebf772bdd647
Author: David Härdeman <david@hardeman.nu>
Date:   Fri Sep 24 21:44:32 2010 +0200

    i915: enable AVI infoframe for intel_hdmi.c [v4]

Patch tested on my g33 with a sdvo hdmi adaptor.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=25732
Tested-by: Peter Ross <pross@xvid.org> (G35 SDVO-HDMI)
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/kms: fix Kconfig for new drivers.
Dave Airlie [Sun, 20 May 2012 09:09:25 +0000 (10:09 +0100)]
drm/kms: fix Kconfig for new drivers.

Reported-by: Jiri Slaby <jslaby@suse.cz>
Reported-by: Jonathan Nieder <jrnieder@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/i915: Enable the PCH PLL for all generations after link training
Chris Wilson [Sun, 13 May 2012 08:54:09 +0000 (09:54 +0100)]
drm/i915: Enable the PCH PLL for all generations after link training

Hidden away within one chipset specific path was the necessary logic to
turn on the PLL. This needs to be done everywhere in order for us to
drive any display! As such as soon as we tested on a non-CougarPoint
chipset, we failed to bring up any DisplayPorts and generated a nice set
of assertion failures in the process. At least one part of our logic is
working, the part that assumes that we have no idea what we are doing.

Reported-by: guang.a.yang@intel.com
References: https://bugs.freedesktop.org/show_bug.cgi?id=49712
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Convert BUG_ON(!pll->active) and friends to a WARN
Chris Wilson [Sun, 13 May 2012 19:16:12 +0000 (20:16 +0100)]
drm/i915: Convert BUG_ON(!pll->active) and friends to a WARN

Turn a fatal lockup into a merely blank display with lots of shouty
messages.

v2: Whilst in the area, convert the other BUG_ON into less fatal errors.
In particular, note that we may be called on a PCH platform not using
PLLs, such as Haswell, and so we do not always want to BUG_ON(!pll)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: don't clobber the pipe param in sanitize_modesetting
Daniel Vetter [Sun, 13 May 2012 20:29:25 +0000 (22:29 +0200)]
drm/i915: don't clobber the pipe param in sanitize_modesetting

... we need it later on in the function to clean up pipe <-> plane
associations. This regression has been introduced in

commit f47166d2b0001fcb752b40c5a2d4db986dfbea68
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Thu Mar 22 15:00:50 2012 +0000

    drm/i915: Sanitize BIOS debugging bits from PIPECONF

Spotted by staring at debug output of an (as it turns out) totally
unrelated bug.

v2: I've totally failed to do the s/pipe/i/ correctly, spotted by
Chris Wilson.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Cc: stable@kernel.org (the regression was Cc: stable, too)
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: disable gmbus on i830
Daniel Vetter [Sun, 13 May 2012 12:44:20 +0000 (14:44 +0200)]
drm/i915: disable gmbus on i830

The hw just returns garbage.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49838
Reported-and-tested-by: Vladyslav <DFEW.Entwickler@googlemail.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Replace the feature tests for BLT/BSD with ring init checks
Chris Wilson [Fri, 11 May 2012 13:29:32 +0000 (14:29 +0100)]
drm/i915: Replace the feature tests for BLT/BSD with ring init checks

When userspace asks whether the driver supports the BLT or BSD rings for
this chip, simply report whether those particular rings are initialised

v2: Use intel_ring_initialized()

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Check whether the ring is initialised prior to dispatch
Chris Wilson [Fri, 11 May 2012 13:29:31 +0000 (14:29 +0100)]
drm/i915: Check whether the ring is initialised prior to dispatch

Rather than use the magic feature tests HAS_BLT/HAS_BSD just check
whether the ring we are about to dispatch the execbuffer on is
initialised.

v2: Use intel_ring_initialized()

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Introduce for_each_ring() macro
Chris Wilson [Fri, 11 May 2012 13:29:30 +0000 (14:29 +0100)]
drm/i915: Introduce for_each_ring() macro

In many places we wish to iterate over the rings associated with the
GPU, so refactor them to use a common macro.

Along the way, there are a few code removals that should be side-effect
free and some rearrangement which should only have a cosmetic impact,
such as error-state.

Note that this slightly changes the semantics in the hangcheck code:
We now always cycle through all enabled rings instead of
short-circuiting the logic.

v2: Pull in a couple of suggestions from Ben and Daniel for
intel_ring_initialized() and not removing the warning (just moving them
to a new home, closer to the error).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Added note to commit message about the small behaviour
change, suggested by Ben Widawsky.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Assert that the transcoder is indeed off before modifying it
Chris Wilson [Fri, 11 May 2012 08:21:25 +0000 (09:21 +0100)]
drm/i915: Assert that the transcoder is indeed off before modifying it

Inspired by a recent regression that seems to confuse pch transcoder
state, let's be a bit more paranoid.

References: https://bugs.freedesktop.org/show_bug.cgi?id=49712
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Pimped commit message.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: hook Haswell devices in place
Eugeni Dodonov [Wed, 9 May 2012 18:37:32 +0000 (15:37 -0300)]
drm/i915: hook Haswell devices in place

This patch enables i915 driver to handle Haswell devices. It should go in
last, when things are working stable enough.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: prepare HDMI link for Haswell
Eugeni Dodonov [Wed, 9 May 2012 18:37:31 +0000 (15:37 -0300)]
drm/i915: prepare HDMI link for Haswell

On Haswell, we need to properly train the DDI buffers prior to enabling
HDMI, and enable the required clocks with correct dividers for the desired
frequency.

Also, we cannot simple reuse HDMI routines from previous generations of
GPU, as most of HDMI-specific stuff is being done via the DDI port
programming instead of HDMI-specific registers.

This commit take advantage of the WR PLL clock table which is in a
separate (previous) commit to select the right divisors for each mode.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: move HDMI structs to shared location
Eugeni Dodonov [Wed, 9 May 2012 18:37:30 +0000 (15:37 -0300)]
drm/i915: move HDMI structs to shared location

Move intel_hdmi data structure and support functions to a shared location,
to allow their usage from intel_ddi module.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add WR PLL programming table
Eugeni Dodonov [Wed, 9 May 2012 18:37:29 +0000 (15:37 -0300)]
drm/i915: add WR PLL programming table

This table is used for programming WR PLL clocks, used by HDMI and DVI outputs.
I split it into a separate patch to simplify the HDMI enabling patch which was
getting huge.

Note that this table is a temporary solution for WR PLL programming. It
will be reworked into a more exact algorithm at a later stage. But for
now, it provides the most accurate clock setting solution, so we use it
here.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add support for DDI-controlled digital outputs
Eugeni Dodonov [Wed, 9 May 2012 18:37:28 +0000 (15:37 -0300)]
drm/i915: add support for DDI-controlled digital outputs

Those are driven by DDIs on Haswell architecture, so we need to keep track
of which DDI is being used on each output.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: detect digital outputs on Haswell
Eugeni Dodonov [Wed, 9 May 2012 18:37:27 +0000 (15:37 -0300)]
drm/i915: detect digital outputs on Haswell

Digital port detection on Haswell is indicated by the presence of a bit in
DDI_BUF_CTL for port A, and by a different register for ports B, C and D.
So we check for those bits during the initialization time and let the hdmi
function know about those.

Note that this bit does not indicates whether the output is DP or HDMI.
However, the DDI buffers can be programmed in a way that is shared between
DP/HDMI and FDI/HDMI except for PORT E.

So for now, we detect those digital outputs as being HDMI, but proper DP
support is still pending.

Note that DDI A can only drive eDP, so we do not handle it here for hdmi
initialization.

v2: simplify Haswell handling logic

v3: use generic function for handling digital outputs.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: program iCLKIP on Lynx Point
Eugeni Dodonov [Wed, 9 May 2012 18:37:26 +0000 (15:37 -0300)]
drm/i915: program iCLKIP on Lynx Point

The iCLKIP clock is used to drive the VGA pixel clock on the PCH. In order
to do so, it must be programmed to properly do the clock ticks according
to the divisor, phase direction, phase increments and a special auxiliary
divisor for 20MHz clock.

v2: calculate divisor values directly instead of relying on a table.

v3: merged a fix from Ben to properly check for invalid divider values.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: program WM_LINETIME on Haswell
Eugeni Dodonov [Wed, 9 May 2012 18:37:24 +0000 (15:37 -0300)]
drm/i915: program WM_LINETIME on Haswell

The line time can be programmed according to the number of horizontal
pixels vs effective pixel rate ratio.

v2: improve comment as per Chris Wilson suggestion

v3: incorporate latest changes in specs.

v4: move into wm update routine, also mention that the same routine can
program IPS watermarks. We do not have their enablement code yet, nor
handle the required clock settings at the moment, so this patch won't
program those values for now.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: define Haswell watermarks and clock gating
Eugeni Dodonov [Wed, 9 May 2012 18:37:23 +0000 (15:37 -0300)]
drm/i915: define Haswell watermarks and clock gating

For now, we simple reuse the Ivy Bridge routines here.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: use ironlake eld write routine for Haswell
Eugeni Dodonov [Wed, 9 May 2012 18:37:22 +0000 (15:37 -0300)]
drm/i915: use ironlake eld write routine for Haswell

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: support DDI training in FDI mode
Eugeni Dodonov [Wed, 9 May 2012 18:37:21 +0000 (15:37 -0300)]
drm/i915: support DDI training in FDI mode

Starting with Haswell, DDI ports can work in FDI mode to support
connectivity with the outputs located on the PCH.

This commit adds support for such connections in the intel_ddi module, and
provides Haswell-specific functionality to make it work.

v2: simplify the commit as per Daniel Vetter suggestion.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: initialize DDI buffer translations
Eugeni Dodonov [Wed, 9 May 2012 18:37:20 +0000 (15:37 -0300)]
drm/i915: initialize DDI buffer translations

DDI is introduced starting with Haswell GPU generation. So to simplify its
management in the future, we also add intel_ddi.c to hold all the
DDI-related items.

Buffer translations for DDI links must be initialized prior to enablement.
For FDI and DP, first 9 pairs of values are used to select the connection
parameters. HDMI uses the last pair of values and ignores the first 9
pairs. So we program HDMI values in both cases, which allows HDMI to work
over both FDI and DP-friendly buffers.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: account for only one PCH receiver on Haswell
Eugeni Dodonov [Wed, 9 May 2012 18:37:19 +0000 (15:37 -0300)]
drm/i915: account for only one PCH receiver on Haswell

On Haswell, only one pipe can work in FDI mode, so this patch prevents
messing with wrong registers when FDI is being used by non-first pipe. And
to prevent this, we also specify that the VGA can only be used on pipe 0
for now in the crtc_mask value.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: handle DDI-related assertions
Eugeni Dodonov [Wed, 9 May 2012 18:37:18 +0000 (15:37 -0300)]
drm/i915: handle DDI-related assertions

Prevent bogus asserts on DDI-related paths.

Longer explanation from Eugeni by mail:

"For the asserts there are 3 paths where we hit them:
- in assert_fdi_tx (we don't have the FDI_TX_CTL anymore, backup plan
  DDI_FUNC_CTL is used instead)
- in assert_fdi_tx_pll_enabled (we have the combination of iCLKIP and
  DDI_FUNC_CTL, plus PORT_CLK_SEL and PIPE_CLK_SEL now to make things
  work). We could use an assert here indeed - if we configure port to
  use one clock, and pipe to use another, everything hangs. Right now,
  we configure all of them in one place only; but yes, when DP code
  lands it will get more funky.
- and in ironlake_fdi_pll_enable. I reuse part of this function (to
  configure the TU sizes), but as in the 1st case, FDI_TX_CTL is gone
  so I just ignore it here."

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
[danvet: Pasted Eugeni's explanation into the commit message.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add LPT PCH checks
Eugeni Dodonov [Wed, 9 May 2012 18:37:17 +0000 (15:37 -0300)]
drm/i915: add LPT PCH checks

Avoid bogus asserts and PCH PLL accesses on Lynx Point.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: enable power wells on Haswell init
Eugeni Dodonov [Wed, 9 May 2012 18:37:16 +0000 (15:37 -0300)]
drm/i915: enable power wells on Haswell init

This attempts to enable all the available power wells during the
initialization.

Those power wells can be enabled in parallel or on-demand, and disabled
when no longer needed, but this is out of scope of this initial
enablement. Proper tracking of who uses which power well will require
a considerable rework of our display handling, so we just leave them all
enabled when the driver is loaded for now.

v2: use more generic and future-proof code

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: detect PCH encoders on Haswell
Eugeni Dodonov [Wed, 9 May 2012 23:30:31 +0000 (20:30 -0300)]
drm/i915: detect PCH encoders on Haswell

On Haswell, the recommended PCH-connected output is the one driven by DDI
E in FDI mode, used for VGA connection. All the others are handled by the
CPU.

Note that this does not accounts for Haswell/PPT combination yet, so if we
encounter such combination an error message is thrown to indicate that
things could go wrong.

v2: improve non-LPT detection warning per Daniel Vetter's suggestion.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: do not use fdi_normal_train on Haswell
Eugeni Dodonov [Wed, 9 May 2012 18:37:14 +0000 (15:37 -0300)]
drm/i915: do not use fdi_normal_train on Haswell

This should be already configured when FDI auto-negotiation is done.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: show unknown sdvox registers on hdmi init
Eugeni Dodonov [Wed, 9 May 2012 18:37:13 +0000 (15:37 -0300)]
drm/i915: show unknown sdvox registers on hdmi init

This will throw a BUG() message when an unknown sdvox register is
given to intel_hdmi_init. When this happens, things could going to be pretty
much broken afterwards, so we better detect this as soon as possible.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: properly check for pipe count
Eugeni Dodonov [Wed, 9 May 2012 18:37:12 +0000 (15:37 -0300)]
drm/i915: properly check for pipe count

As suggested by Chris Wilson and Daniel Vetter, this chunk of code can be
simplified with a more simple check.

Also, as noticed by Jesse Barnes, it is worth mentioning that plane is an
enum and num_pipe is an int, so we could be more paranoid here about those
validation checks eventually.

CC: Daniel Vetter <daniel.vetter@ffwll.ch>
CC: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: calculate watermarks for devices that have 3 pipes
Eugeni Dodonov [Wed, 9 May 2012 18:37:11 +0000 (15:37 -0300)]
drm/i915: calculate watermarks for devices that have 3 pipes

This adds proper support for calculating those watermarks, checking for
number of available pipes instead of specific GPU variants when deciding
if watermarks for 3rd pipe are necessary.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add support for SBI ops
Eugeni Dodonov [Wed, 9 May 2012 18:37:10 +0000 (15:37 -0300)]
drm/i915: add support for SBI ops

With Lynx Point, we need to use SBI to communicate with the display clock
control. This commit adds helper functions to access the registers via
SBI.

v2: de-inline the function and address changes in bits names

v3: protect operations with dpio_lock, increase timeout to 100 for
paranoia sake.

v4: decrease paranoia a bit, as noticed by Chris Wilson

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: reuse Ivy Bridge interrupts code for Haswell
Eugeni Dodonov [Wed, 9 May 2012 18:37:09 +0000 (15:37 -0300)]
drm/i915: reuse Ivy Bridge interrupts code for Haswell

Haswell interrupts are mostly similar with Ivy Bridge, so we share same
routines with it.

This patch also simplifies the vblank counter handling for all the Gen5+
architectures.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add new Haswell DIP controls registers
Eugeni Dodonov [Thu, 10 May 2012 13:18:02 +0000 (10:18 -0300)]
drm/i915: add new Haswell DIP controls registers

Haswell has different DIP control registers and offsets which we need to
use for infoframes, which this patch adds.

Note that this does not adds full DIP frames support, but only the basic
functionality necessary for HDMI to work in early enablement.

v2: replace infoframe handling with a debug message, proper support will
be added via a patch from Paulo Zanoni later.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: gen6_enable_rps() wants to be called after ring initialisation
Chris Wilson [Wed, 9 May 2012 10:56:28 +0000 (11:56 +0100)]
drm/i915: gen6_enable_rps() wants to be called after ring initialisation

Currently we call gen6_enable_rps() (which writes into the per-ring
register mmio space) from intel_modeset_init_hw() which is called before
we initialise the rings. If we defer intel_modeset_init_hw() until
afterwards (in the intel_modeset_gem_init() phase) all is well.

v2: Rectify ordering of gem vs display HW init upon resume. (Daniel)

v3: Fix up locking. (Paulo)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Smash Paulo's locking fix onto Chris' patch.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/cirrus/ast/mgag200: fix build without CONFIG_VGA_CONSOLE
Dave Airlie [Sat, 19 May 2012 15:33:21 +0000 (16:33 +0100)]
drm/cirrus/ast/mgag200: fix build without CONFIG_VGA_CONSOLE

Reported-by: Randy Dunlap
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/prime: expose capability flags for userspace.
Dave Airlie [Mon, 2 Apr 2012 13:11:50 +0000 (14:11 +0100)]
drm/prime: expose capability flags for userspace.

This lets the kernel tell userspace if the device supports prime
import/export.

This is useful for -modesetting at least, but would be nice for other
drivers.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/hdmi: use new AFMT structs
Rafał Miłecki [Mon, 14 May 2012 14:52:30 +0000 (16:52 +0200)]
drm/radeon/hdmi: use new AFMT structs

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/hdmi: store info about all AFMT blocks
Alex Deucher [Mon, 14 May 2012 14:52:29 +0000 (16:52 +0200)]
drm/radeon/hdmi: store info about all AFMT blocks

Introduce special struct radeon_afmt for this purpose.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: make use of radeon_gem_init() consistent
Alex Deucher [Thu, 10 May 2012 17:00:06 +0000 (13:00 -0400)]
drm/radeon: make use of radeon_gem_init() consistent

All radeon_gem_init() does is initialize the gem objects
list.  radeon_device.c does this explicitly.  r600+ calls
radeon_gem_init() so the list gets initialized twice.  Older
asics don't call it at all and rely on the the init in
radeon_device.c.  Just call radeon_gem_init() in radeon_device.c
and remove the explicit calls from all the newer asics.

All asics call radeon_gem_fini() in their fini pathes.  That
could possibly be cleaned up too.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: eliminate redundant connector_names table
Ilija Hadzic [Fri, 4 May 2012 15:25:12 +0000 (11:25 -0400)]
drm/radeon: eliminate redundant connector_names table

connector_names table is just a repeat of information that
already exists in drm_connector_enum_list and the same string
can be retrieved using drm_get_connector_name function.

Nuke the redundant table and use the proper function to retrieve
the connector name.

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: Also reset BCI on SI GPU reset.
Michel Dänzer [Tue, 15 May 2012 15:31:02 +0000 (17:31 +0200)]
drm/radeon: Also reset BCI on SI GPU reset.

Without this, e.g. egltri_screen looks scrambled after a GPU reset.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: don't mess with hot plug detect for eDP or LVDS connector v2
Jerome Glisse [Fri, 4 May 2012 15:06:22 +0000 (11:06 -0400)]
drm/radeon: don't mess with hot plug detect for eDP or LVDS connector v2

It seems imac pannel doesn't like whe we change the hot plug setup
and then refuse to work. This help but doesn't fully fix:
https://bugzilla.redhat.com/show_bug.cgi?id=726143

v2: fix typo and improve commit message

Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: checking the wrong variable in savage_do_init_bci()
Dan Carpenter [Thu, 17 May 2012 07:09:44 +0000 (10:09 +0300)]
drm: checking the wrong variable in savage_do_init_bci()

drm_core_ioremap() initializes ->handle.  We already know
"dev->agp_buffer_map" is a valid pointer.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: fix build warning
Dave Airlie [Thu, 17 May 2012 10:17:33 +0000 (11:17 +0100)]
gma500: fix build warning

 CC [M]  drivers/gpu/drm/i915/i915_gem_evict.o
/ssd/git/drm-core-next/drivers/gpu/drm/gma500/psb_device.c: In function ‘psb_chip_errata’:
/ssd/git/drm-core-next/drivers/gpu/drm/gma500/psb_device.c:360:1: warning: no return statement in function returning non-void [-Wreturn-type]
/ssd/git/drm-core-next/drivers/gpu/drm/gma500/psb_device.c: At top level:
/ssd/git/drm-core-next/drivers/gpu/drm/gma500/psb_device.c:379:2: warning: initialization from incompatible pointer type [enabled by default]
/ssd/git/drm-core-next/drivers/gpu/drm/gma500/psb_device.c:379:2: warning: (near initialization for ‘psb_chip_ops.errata’) [enabled by default]

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: silence an unused variable warning
Dan Carpenter [Thu, 10 May 2012 07:33:02 +0000 (10:33 +0300)]
gma500: silence an unused variable warning

If CONFIG_BACKLIGHT_CLASS_DEVICE is disabled then GCC warns that:
drivers/gpu/drm/gma500/opregion.c:154:6: warning:
unused variable ‘max’ [-Wunused-variable]

Which give me a chance to use the new config_enabled() macro.  :)

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: check kmalloc() for failures
Dan Carpenter [Tue, 15 May 2012 08:56:59 +0000 (11:56 +0300)]
drm/radeon: check kmalloc() for failures

We can just return -ENOMEM here if the allocation fails.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: add CRTC properties
Paulo Zanoni [Tue, 15 May 2012 21:09:05 +0000 (18:09 -0300)]
drm: add CRTC properties

The i915 driver needs this for the rotation and overscan compensation
properties. Other drivers might need this too.

Reviewed-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: add 'count' to struct drm_object_properties
Paulo Zanoni [Tue, 15 May 2012 21:09:04 +0000 (18:09 -0300)]
drm: add 'count' to struct drm_object_properties

This way, we don't need to count every time, so we're a little bit
faster and code is a little bit smaller.

Change suggested by Ville Syrjälä.

Reviewed-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: make the connector properties code use the object properties code
Paulo Zanoni [Tue, 15 May 2012 21:09:03 +0000 (18:09 -0300)]
drm: make the connector properties code use the object properties code

In the future, we may want to kill the internal functions:
- drm_connector_attach_property
- drm_connector_property_set_value
- drm_connector_property_get_value

It seems the IOCTL drm_mode_connector_property_set_ioctl will have to live, but
we may change libdrm to not use it anymore, if we want.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: add generic ioctls to get/set properties on any object
Paulo Zanoni [Tue, 15 May 2012 21:09:02 +0000 (18:09 -0300)]
drm: add generic ioctls to get/set properties on any object

Useless for connector properties (since they already have their own
ioctls), but useful when we add properties to CRTCs, planes and other
objects.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: create struct drm_object_properties and use it
Paulo Zanoni [Tue, 15 May 2012 21:09:01 +0000 (18:09 -0300)]
drm: create struct drm_object_properties and use it

For now, only connectors have it. In the future, all objects that need
properties should use it. Since the structure is referenced inside
struct drm_mode_object, we will be able to deal with object properties
without knowing the real type of the object.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: WARN() when drm_connector_attach_property fails
Paulo Zanoni [Tue, 15 May 2012 21:09:00 +0000 (18:09 -0300)]
drm: WARN() when drm_connector_attach_property fails

Also return void instead of int. We have more than 100 callers and
no one checks for the return value.

If this function fails the property won't be exposed by the get/set
ioctls, but we should probably survive. If this starts happening,
the solution will be to increase DRM_CONNECTOR_MAX_PROPERTY and
recompile the Kernel.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: add drm_property_change_is_valid
Paulo Zanoni [Tue, 15 May 2012 21:08:59 +0000 (18:08 -0300)]
drm: add drm_property_change_is_valid

Move code from drm_mode_connector_property_set_ioctl to a new
function, so we can reuse this code when we add crtc properties.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: unload fixes
Alan Cox [Mon, 14 May 2012 11:04:00 +0000 (12:04 +0100)]
gma500: unload fixes

Debugging the lid problem tested various error paths which were found
wanting so start fixing them up.

There is a ton of improvement work could be done here so that every bit
of functionality agrees if its _fini, _uninit, etc, and they agree who
is responsible for deciding if the clean up is needed.

That can come later.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: Fix crash on D2700MUD and various other boards
Alan Cox [Mon, 14 May 2012 11:03:34 +0000 (12:03 +0100)]
gma500: Fix crash on D2700MUD and various other boards

The recent changes led to the lid timer code being run on various devices.
It does no harm on most but isn't needed. It also calls unconditionally
into the Poulsbo backlight code which goes bang on Cedartrail.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/kms: driver for virtual cirrus under qemu
Dave Airlie [Tue, 17 Apr 2012 13:12:29 +0000 (14:12 +0100)]
drm/kms: driver for virtual cirrus under qemu

This is the initial driver for emulated cirrus GPU found in qemu.
This driver only supports the emulated GPU and doesn't attempt
to bind to any real cirrus GPUs.

This driver is intended to be used with xf86-video-modesetting in userspace.
It requires at least version 0.3.0

This follow the same design as ast and mgag200, and is based on work
done by Matthew Garrett previously.

This GPU has no hw cursor, and it can't scanout 32-bpp, only packed 24-bpp.
i.e. it sucks.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agomgag200: initial g200se driver (v2)
Dave Airlie [Tue, 17 Apr 2012 14:01:25 +0000 (15:01 +0100)]
mgag200: initial g200se driver (v2)

This is a driver for the G200 server engines chips,
it doesn't driver any of the Matrix G series desktop cards.

It will bind to G200 SE A,B, G200EV, G200WB, G200EH and G200ER cards.

Its based on previous work done my Matthew Garrett but remodelled
to follow the same style and flow as the AST server driver. It also
works along the same lines as the AST server driver wrt memory management.

There is no userspace driver planned, xf86-video-modesetting should be used.
It also appears these GPUs have no ARGB hw cursors.

v2: add missing tagfifo reset + G200 SE memory bw setup pieces.

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: Initial KMS driver for AST (ASpeed Technologies) 2000 series (v2)
Dave Airlie [Wed, 29 Feb 2012 13:40:04 +0000 (13:40 +0000)]
drm: Initial KMS driver for AST (ASpeed Technologies) 2000 series (v2)

This is the initial driver for the Aspeed Technologies chips found in
servers. This driver supports the AST 2000, 2100, 2200, 2150 and 2300. It
doesn't support the AST11xx due to lack of hw to test it on, and them requiring
different codepaths.

This driver is intended to be used with xf86-video-modesetting in userspace.

This driver has a slightly different design than other KMS drivers, but
future server chips will probably share similiar setup. As these GPUs commonly
have low video RAM, it doesn't make sense to put the kms console in VRAM
always. This driver places the kms console into system RAM, and does dirty
updates to a copy in video RAM. When userspace sets a new scanout buffer,
it forcefully evicts the video RAM console, and X can create a framebuffer
that can use all of of video RAM.

This driver uses TTM but in a very simple fashion to control the eviction
to system RAM of the console, and multiple servers.

v2: add s/r support, fix Kconfig.

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agox86/vga: fix build with efi disabled.
Dave Airlie [Thu, 17 May 2012 07:31:29 +0000 (08:31 +0100)]
x86/vga: fix build with efi disabled.

Reported by sfr on -next merge.

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agox86/vga: set the default device from the fixup.
Dave Airlie [Mon, 14 May 2012 16:00:40 +0000 (17:00 +0100)]
x86/vga: set the default device from the fixup.

Since Matthew's efi/vga changes on non-EFI machines we were failing
to tell the vgaarb/switcheroo what the default device was, this
sets the default device in the quirk if none has been set before.

This fixes the switcheroo on my T410s.

Cc: Matthew Garrett <mjg@redhat.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agoMerge branch 'topic/vga-switcheroo' of git://git.kernel.org/pub/scm/linux/kernel...
Dave Airlie [Sun, 13 May 2012 15:58:08 +0000 (16:58 +0100)]
Merge branch 'topic/vga-switcheroo' of git://git./linux/kernel/git/tiwai/sound into drm-core-next

* 'topic/vga-switcheroo' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  vga_switcheroo: Add the support for audio clients
  vga_switcheroo: Introduce struct vga_switcheroo_client_ops
  vga_switcheroo: Refactor using linked list

12 years agodrm/radeon/hdmi: fix some coding style
Rafał Miłecki [Sun, 6 May 2012 15:29:46 +0000 (17:29 +0200)]
drm/radeon/hdmi: fix some coding style

Use defined macros by the way.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/hdmi: update modesetting
Rafał Miłecki [Sun, 6 May 2012 15:29:45 +0000 (17:29 +0200)]
drm/radeon/hdmi: update modesetting

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/hdmi: separate evergreen code
Rafał Miłecki [Sun, 6 May 2012 15:29:44 +0000 (17:29 +0200)]
drm/radeon/hdmi: separate evergreen code

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/kms/hdmi: helper getting ready ACR entry
Rafał Miłecki [Mon, 30 Apr 2012 13:44:54 +0000 (15:44 +0200)]
drm/radeon/kms/hdmi: helper getting ready ACR entry

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/kms/hdmi: clean&improve handling HDMI mode
Rafał Miłecki [Mon, 30 Apr 2012 13:44:53 +0000 (15:44 +0200)]
drm/radeon/kms/hdmi: clean&improve handling HDMI mode

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/kms/hdmi: enable audio packets at one place
Rafał Miłecki [Mon, 30 Apr 2012 13:44:52 +0000 (15:44 +0200)]
drm/radeon/kms/hdmi: enable audio packets at one place

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agovga_switcheroo: Add the support for audio clients
Takashi Iwai [Thu, 26 Apr 2012 12:29:48 +0000 (14:29 +0200)]
vga_switcheroo: Add the support for audio clients

Add the support for audio clients to VGA-switcheroo for handling the
HDMI audio controller together with VGA switching.  The id of the
audio controller should be given explicitly at registration time
unlike the video controller.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43155

Signed-off-by: Takashi Iwai <tiwai@suse.de>
12 years agovga_switcheroo: Introduce struct vga_switcheroo_client_ops
Takashi Iwai [Fri, 11 May 2012 05:51:17 +0000 (07:51 +0200)]
vga_switcheroo: Introduce struct vga_switcheroo_client_ops

This changes the API as a clean-up.  Instead of passing multiple
function pointers at each time, introduce a new struct holding the
whole callback functions and pass it to the registration.

The same struct will be used for the upcoming audio client
registration, too.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
12 years agovga_switcheroo: Refactor using linked list
Takashi Iwai [Thu, 26 Apr 2012 10:55:59 +0000 (12:55 +0200)]
vga_switcheroo: Refactor using linked list

Refactor the code base a bit for the further work to adapt more clients.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
12 years agoMerge tag 'drm-intel-next-2012-05-06-merged' of git://people.freedesktop.org/~danvet...
Dave Airlie [Fri, 11 May 2012 16:41:58 +0000 (17:41 +0100)]
Merge tag 'drm-intel-next-2012-05-06-merged' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next

Daniel says

Highlights:
- sparse fixes from Ben.
- tons of little cleanups from Chris all over: tiling_changed
 clarification, deferred_free list removal, ...
- fix up irq handler on gen2 & gen3 + related cleanups from Chris
- prep work for wait_rendering_timeout from Ben with some nice
 refactorings
- first set of infoframe fixes from Paulo for doubleclocked CEA modes
- improve pch pll handling from Jesse and Chris
- gpu hangman, this also contains the reset fix for gen4
- rps sanity check from Chris - this papers over issues when the gpu fails
 to clock up on snb/ivb, and it is shockingly easy to hit. The code
 prints a big WARN backtrace and restores the hw to a sane state. The
 real fix is still in the works.

Atm I'm aware of 2 regressions in -next:
- One of the gmbus patches (not gmbus itself) regressed lvds detection on
 a MacbookPro. I've analyzed the bug already and I think I know what's
 going on, patch is awaiting test feedback.
- Just today QA reported that DP on ilk regressed. That bug is fresh of
 the press and still awaiting detailed logfiles and the bisect result.
 The only thing that's clear atm is that -fixes works and -next doesn't.

12 years agodrm: pass dev to drm_vm_{open,close}_locked()
Rob Clark [Tue, 1 May 2012 16:04:51 +0000 (11:04 -0500)]
drm: pass dev to drm_vm_{open,close}_locked()

Previously these functions would assume that vma->vm_file was the
drm_file.  Although if in some cases if the drm driver needs to use
something else for the backing file (such as the tmpfs filp) then this
assumption is no longer true.  But vma->vm_private_data is still the
GEM object.

With this change, now the drm_device comes from the GEM object rather
than the drm_file so the driver is more free to play with vma->vm_file.

The scenario where this comes up is for mmap'ing of cached dmabuf's
for non-coherent systems, where the driver needs to use fault handling
and PTE shootdown to simulate coherency.  We can't use the vma->vm_file
of the dmabuf, which is using anon_inode's address_space.  The most
straightforward thing to do is to use the GEM object's obj->filp for
vma->vm_file in all cases, for which we need this patch.

Signed-off-by: Rob Clark <rob@ti.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: Turn on the IRQ for everything
Alan Cox [Fri, 11 May 2012 10:33:17 +0000 (11:33 +0100)]
gma500: Turn on the IRQ for everything

Keep this as a patch of its own in case of bug reports.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: clean up some more checks
Alan Cox [Fri, 11 May 2012 10:33:03 +0000 (11:33 +0100)]
gma500: clean up some more checks

We don't need to check these - they are always going to be the
same for any PVR based device.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agocdv: Add all cedarview pci ids
Alan Cox [Fri, 11 May 2012 10:32:46 +0000 (11:32 +0100)]
cdv: Add all cedarview pci ids

Cover all D2xxx/N2xxx chips.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
[Hand applied to upstream driver]
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: Clean up some of the noise
Alan Cox [Fri, 11 May 2012 10:32:31 +0000 (11:32 +0100)]
gma500: Clean up some of the noise

We have a lot of debug type stuff we don't actually need any more.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: use the register map to clean up
Alan Cox [Fri, 11 May 2012 10:31:22 +0000 (11:31 +0100)]
gma500: use the register map to clean up

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: introduce some register maps
Alan Cox [Fri, 11 May 2012 10:30:53 +0000 (11:30 +0100)]
gma500: introduce some register maps

All the conditional ugly register selection really wants to be
cleaned up. Use a struct describing each pipe and its registers.

This will also let us hide some of the oddments between platforms
for any future merging of bits together. In particular the way the
DPLL and FP registers randomly wander around.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: Clean up from the psb_pipe structure
Alan Cox [Fri, 11 May 2012 10:30:33 +0000 (11:30 +0100)]
gma500: Clean up from the psb_pipe structure

We have lots of local assignments that can now be eliminated

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: introduce a structure describing each pipe
Alan Cox [Fri, 11 May 2012 10:30:16 +0000 (11:30 +0100)]
gma500: introduce a structure describing each pipe

This starts the move away from lots of confused unions of per driver stuff
inherited when we merged the drivers together.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agogma500: Fix build without ACPI
Alan Cox [Fri, 11 May 2012 10:29:41 +0000 (11:29 +0100)]
gma500: Fix build without ACPI

Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/i915: Simplify interrupt processing for IvyBridge
Chris Wilson [Wed, 9 May 2012 20:45:44 +0000 (21:45 +0100)]
drm/i915: Simplify interrupt processing for IvyBridge

We can take advantage that the PCH_IIR is a subordinate register to
reduce one of the required IIR reads, and that we only need to clear
interrupts handled to reduce the writes. And by simply tidying the code
we can reduce the line count and hopefully make it more readable.

v2: Split out the bugfix from the refactoring.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Avoid a double-read of PCH_IIR during interrupt handling
Chris Wilson [Wed, 9 May 2012 20:45:43 +0000 (21:45 +0100)]
drm/i915: Avoid a double-read of PCH_IIR during interrupt handling

Currently the code re-reads PCH_IIR during the hotplug interrupt
processing. Not only is this a wasted read, but introduces a potential
for handling a spurious interrupt as we then may not clear all the
interrupts processed (since the re-read IIR may contains more interrupts
asserted than we clear using the result of the original read).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: stable@kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: enable semaphores on gen6 if dmar is not active
Daniel Vetter [Mon, 2 Apr 2012 18:48:43 +0000 (20:48 +0200)]
drm/i915: enable semaphores on gen6 if dmar is not active

Inspired by the recent ppgtt regression report, where switching of
dmar only for the gpu seems to fix things completely, I've looked
again at the semaphores+vt-d situation.

Contrary to my earlier testing a few months back my system is now
stable with dmar disabled for the igd, and not only when disabling
dmar completely.

So I'm rather hopeful that all our recent fixes for snb have changed
things for code and it's time to try enabling semaphores again. We've
also had issues with enabling semaphores which are not vt-d related,
but I guess these are all fixed by the autoreport-disabling and lazy
request fix. And there's only one way to find out whether there are
still other issues ...

When I've tried to apply this patch I've noticed that semaphores on
gen6 have already silently been enabled in

commit 2911a35b2e4eb87ec48d03aeb11f019e51ae3c0d
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Thu Apr 5 14:47:36 2012 -0700

    drm/i915: use semaphores for the display plane

Fix this up by only checking whether dmar is enabled on the gfx (not
on the entire system).

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/radeon/kms: fix warning on 32-bit in atomic fence printing
Dave Airlie [Wed, 9 May 2012 16:27:29 +0000 (17:27 +0100)]
drm/radeon/kms: fix warning on 32-bit in atomic fence printing

/ssd/git/drm-core-next/drivers/gpu/drm/radeon/radeon_fence.c: In function ‘radeon_debugfs_fence_info’:
/ssd/git/drm-core-next/drivers/gpu/drm/radeon/radeon_fence.c:606:7: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘long long int’ [-Wformat]

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: make the ib an inline object
Jerome Glisse [Wed, 9 May 2012 13:35:02 +0000 (15:35 +0200)]
drm/radeon: make the ib an inline object

No need to malloc it any more.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: remove r600 blit mutex v2
Christian König [Wed, 9 May 2012 13:35:01 +0000 (15:35 +0200)]
drm/radeon: remove r600 blit mutex v2

If we don't store local data into global variables
it isn't necessary to lock anything.

v2: rebased on new SA interface

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: move the semaphore from the fence into the ib
Jerome Glisse [Wed, 9 May 2012 13:35:00 +0000 (15:35 +0200)]
drm/radeon: move the semaphore from the fence into the ib

It never really belonged there in the first place.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: immediately free ttm-move semaphore
Christian König [Wed, 9 May 2012 13:34:59 +0000 (15:34 +0200)]
drm/radeon: immediately free ttm-move semaphore

We can now protected the semaphore ram by a
fence, so free it immediately.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: rip out the ib pool
Jerome Glisse [Wed, 9 May 2012 13:34:58 +0000 (15:34 +0200)]
drm/radeon: rip out the ib pool

It isn't necessary any more and the suballocator seems to perform
even better.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: simplify semaphore handling v2
Jerome Glisse [Wed, 9 May 2012 13:34:57 +0000 (15:34 +0200)]
drm/radeon: simplify semaphore handling v2

Directly use the suballocator to get small chunks of memory.
It's equally fast and doesn't crash when we encounter a GPU reset.

v2: rebased on new SA interface.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: multiple ring allocator v3
Christian König [Wed, 9 May 2012 13:34:56 +0000 (15:34 +0200)]
drm/radeon: multiple ring allocator v3

A startover with a new idea for a multiple ring allocator.
Should perform as well as a normal ring allocator as long
as only one ring does somthing, but falls back to a more
complex algorithm if more complex things start to happen.

We store the last allocated bo in last, we always try to allocate
after the last allocated bo. Principle is that in a linear GPU ring
progression was is after last is the oldest bo we allocated and thus
the first one that should no longer be in use by the GPU.

If it's not the case we skip over the bo after last to the closest
done bo if such one exist. If none exist and we are not asked to
block we report failure to allocate.

If we are asked to block we wait on all the oldest fence of all
rings. We just wait for any of those fence to complete.

v2: We need to be able to let hole point to the list_head, otherwise
    try free will never free the first allocation of the list. Also
    stop calling radeon_fence_signalled more than necessary.

v3: Don't free allocations without considering them as a hole,
    otherwise we might lose holes. Also return ENOMEM instead of ENOENT
    when running out of fences to wait for. Limit the number of holes
    we try for each ring to 3.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: use one wait queue for all rings add fence_wait_any v2
Jerome Glisse [Wed, 9 May 2012 13:34:55 +0000 (15:34 +0200)]
drm/radeon: use one wait queue for all rings add fence_wait_any v2

Use one wait queue for all rings. When one ring progress, other
likely does to and we are not expecting to have a lot of waiter
anyway.

Also add a fence_wait_any that will wait until the first fence
in the fence array (one fence per ring) is signaled. This allow
to wait on all rings.

v2: some minor cleanups and improvements.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: define new SA interface v3
Christian König [Wed, 9 May 2012 13:34:54 +0000 (15:34 +0200)]
drm/radeon: define new SA interface v3

Define the interface without modifying the allocation
algorithm in any way.

v2: rebase on top of fence new uint64 patch
v3: add ring to debugfs output

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>