project/bcm63xx/atf.git
5 years agoMerge pull request #1826 from smaeul/allwinner
Antonio Niño Díaz [Wed, 27 Feb 2019 09:21:31 +0000 (09:21 +0000)]
Merge pull request #1826 from smaeul/allwinner

allwinner: A few minor improvements

5 years agoMerge pull request #1836 from Yann-lms/docs_and_m4
Antonio Niño Díaz [Fri, 22 Feb 2019 15:23:52 +0000 (15:23 +0000)]
Merge pull request #1836 from Yann-lms/docs_and_m4

Update documentation for STM32MP1 and add Cortex-M4 support

5 years agoMerge pull request #1835 from jts-arm/rename
Antonio Niño Díaz [Fri, 22 Feb 2019 13:05:37 +0000 (13:05 +0000)]
Merge pull request #1835 from jts-arm/rename

Apply official names to new Arm Neoverse cores

5 years agoMerge pull request #1828 from uarif1/master
Antonio Niño Díaz [Thu, 21 Feb 2019 13:47:08 +0000 (13:47 +0000)]
Merge pull request #1828 from uarif1/master

Introduce Versatile Express FVP platform to arm-trusted-firmware.

5 years agoMerge pull request #1833 from marex/arm/master/pci-v2.0.0
Antonio Niño Díaz [Thu, 21 Feb 2019 13:46:39 +0000 (13:46 +0000)]
Merge pull request #1833 from marex/arm/master/pci-v2.0.0

rcar_gen3: plat: Prevent PCIe hang during L1X config access

5 years agostm32mp1: add minimal support for co-processor Cortex-M4
Yann Gautier [Fri, 15 Feb 2019 16:33:27 +0000 (17:33 +0100)]
stm32mp1: add minimal support for co-processor Cortex-M4

STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4.
The support for Cortex-M4 clocks is added when configuring the clock tree.
Some minimal security features to allow communications between A7 and M4
are also added.

Change-Id: I60417e244a476f60a2758f4969700b2684056665
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agodocs: stm32mp1: add links to documentation
Yann Gautier [Wed, 20 Feb 2019 16:34:16 +0000 (17:34 +0100)]
docs: stm32mp1: add links to documentation

A link to st.com page describing STM32MP1 is added.
Add the information about Cortex-M4 embedded in STM32MP1.
Correct typo for u-boot command.

Change-Id: Ie900f6ee59461c5e7ad8a8b06854abaf41fca3ce
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agorcar_gen3: plat: Prevent PCIe hang during L1X config access
Marek Vasut [Mon, 11 Feb 2019 23:09:46 +0000 (00:09 +0100)]
rcar_gen3: plat: Prevent PCIe hang during L1X config access

In case the PCIe controller receives a L1_Enter_PM DLLP, it will
disable the internal PLLs. The system software cannot predict it
and can attempt to perform device config space access across the
PCIe link while the controller is in this transitional state. If
such condition happens, the PCIe controller register access will
trigger ARM64 SError exception.

This patch adds checks for which PCIe controller is enabled,
checks whether the PCIe controller is in such a transitional
state and if so, first completes the transition and then restarts
the instruction which caused the SError.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
5 years agoMerge pull request #1832 from jts-arm/docs
Antonio Niño Díaz [Wed, 20 Feb 2019 14:21:34 +0000 (14:21 +0000)]
Merge pull request #1832 from jts-arm/docs

docs: Document romlib design

5 years agoMerge pull request #1830 from antonio-nino-diaz-arm/an/fix-fw-design
Antonio Niño Díaz [Wed, 20 Feb 2019 14:21:25 +0000 (14:21 +0000)]
Merge pull request #1830 from antonio-nino-diaz-arm/an/fix-fw-design

docs: Update documentation about ARMv8.2-TTCNP

5 years agoDocumentation for Versatile Express Fixed Virtual Platforms
Usama Arif [Tue, 5 Feb 2019 15:44:17 +0000 (15:44 +0000)]
Documentation for Versatile Express Fixed Virtual Platforms

This documentation contains information about the boot sequence,
code location and build procedure for fvp_ve platform.

Change-Id: I339903f663cc625cfabc75ed8e4accb8b2c3917c
Signed-off-by: Usama Arif <usama.arif@arm.com>
5 years agoplat/arm: Support for Cortex A5 in FVP Versatile Express platform
Usama Arif [Wed, 12 Dec 2018 17:14:29 +0000 (17:14 +0000)]
plat/arm: Support for Cortex A5 in FVP Versatile Express platform

Cortex A5 doesnt support VFP, Large Page addressing and generic timer
which are addressed in this patch. The device tree for Cortex a5
is also included.

Change-Id: I0722345721b145dfcc80bebd36a1afbdc44bb678
Signed-off-by: Usama Arif <usama.arif@arm.com>
5 years agoDivision functionality for cores that dont have divide hardware.
Usama Arif [Wed, 12 Dec 2018 17:08:33 +0000 (17:08 +0000)]
Division functionality for cores that dont have divide hardware.

Cortex a5 doesnt support hardware division such as sdiv and udiv commands.
This commit adds a software division function in assembly as well as include
appropriate files for software divison.

The software division algorithm is a modified version obtained from:
http://www.keil.com/support/man/docs/armasm/armasm_dom1359731155623.htm

Change-Id: Ib405a330da5f1cea1e68e07e7b520edeef9e2652
Signed-off-by: Usama Arif <usama.arif@arm.com>
5 years agoARMv7: support non-LPAE mapping (not xlat_v2)
Etienne Carriere [Tue, 24 Oct 2017 20:47:59 +0000 (22:47 +0200)]
ARMv7: support non-LPAE mapping (not xlat_v2)

Support 32bit descriptor MMU table. This is required by ARMv7
architectures that do not support the Large Page Address Extensions.

nonlpae_tables.c source file is dumped from the OP-TEE project:
core_mmu_armv7.c and related header files.

Change-Id: If912d66c374290c49c5a1211ce4c5c27b2d7dc60
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Usama Arif <usama.arif@arm.com>
5 years agoplat/arm: Introduce FVP Versatile Express platform.
Usama Arif [Fri, 30 Nov 2018 15:43:56 +0000 (15:43 +0000)]
plat/arm: Introduce FVP Versatile Express platform.

This patch adds support for Versatile express FVP (Fast models).
Versatile express is a family of platforms that are based on ARM v7.
Currently this port has only been tested on Cortex A7, although it
should work with other ARM V7 cores that support LPAE, generic timers,
VFP and hardware divide. Future patches will support other
cores like Cortex A5 that dont support features like LPAE
and hardware divide. This platform is tested on and only expected to
work on single core models.

Change-Id: I10893af65b8bb64da7b3bd851cab8231718e61dd
Signed-off-by: Usama Arif <usama.arif@arm.com>
5 years agodocs: Document romlib design
Sathees Balya [Wed, 30 Jan 2019 15:56:44 +0000 (15:56 +0000)]
docs: Document romlib design

Change-Id: I2b75be16f452a8ab7c2445ccd519fb057a135812
Co-authored-by: John Tsichritzis <john.tsichritzis@arm.com>
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
5 years agodocs: Update documentation about ARMv8.2-TTCNP
Antonio Nino Diaz [Tue, 19 Feb 2019 13:14:06 +0000 (13:14 +0000)]
docs: Update documentation about ARMv8.2-TTCNP

Commit 2559b2c8256f ("xlat v2: Dynamically detect need for CnP bit")
modified the code to convert the compile-time check for ARMv8.2-TTCNP to
a runtime check, but forgot to update the documentation associated to it.

Change-Id: I6d33a4de389d976dbdcce65d8fdf138959530669
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoRename Cortex-Helios to Neoverse E1
John Tsichritzis [Tue, 19 Feb 2019 14:01:55 +0000 (14:01 +0000)]
Rename Cortex-Helios to Neoverse E1

Change-Id: I1adcf195c0ba739002f3a59e805c782dd292ccba
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
5 years agoRename Cortex-Helios filenames to Neoverse E1
John Tsichritzis [Tue, 19 Feb 2019 13:54:21 +0000 (13:54 +0000)]
Rename Cortex-Helios filenames to Neoverse E1

Change-Id: I33bdb9df0462b056adbd00922b2e73eb720560b3
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
5 years agoRename Cortex-Ares to Neoverse N1
John Tsichritzis [Tue, 19 Feb 2019 13:49:06 +0000 (13:49 +0000)]
Rename Cortex-Ares to Neoverse N1

Change-Id: Ideb49011da35f39ff1959be6f5015fa212ca2b6b
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
5 years agoRename Cortex-Ares filenames to Neoverse N1
John Tsichritzis [Tue, 19 Feb 2019 13:48:44 +0000 (13:48 +0000)]
Rename Cortex-Ares filenames to Neoverse N1

Change-Id: I0bb5aca9bb272332340b5baefc473a01f8a27896
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
5 years agoMerge pull request #1825 from antonio-nino-diaz-arm/an/csv2
Antonio Niño Díaz [Tue, 19 Feb 2019 10:04:00 +0000 (10:04 +0000)]
Merge pull request #1825 from antonio-nino-diaz-arm/an/csv2

Update macro to check need for CVE-2017-5715 mitigation

5 years agoRename PLAT_ARM_BL31_RUN_UART* variable
Usama Arif [Mon, 11 Feb 2019 16:35:42 +0000 (16:35 +0000)]
Rename PLAT_ARM_BL31_RUN_UART* variable

The variable is renamed to PLAT_ARM_RUN_UART as
the UART is used outside BL31 as well.

Change-Id: I00e3639dfb2001758b7d24548c11236c6335f64a
Signed-off-by: Usama Arif <usama.arif@arm.com>
5 years agoMerge pull request #1824 from antonio-nino-diaz-arm/an/move-dyn-xlat
Antonio Niño Díaz [Mon, 18 Feb 2019 10:52:23 +0000 (10:52 +0000)]
Merge pull request #1824 from antonio-nino-diaz-arm/an/move-dyn-xlat

fvp: trusty: Move dynamic xlat enable to platform

5 years agoMerge pull request #1823 from antonio-nino-diaz-arm/an/spm-regs
Antonio Niño Díaz [Mon, 18 Feb 2019 10:52:16 +0000 (10:52 +0000)]
Merge pull request #1823 from antonio-nino-diaz-arm/an/spm-regs

SPM: Remove unnecessary register save

5 years agoMerge pull request #1821 from Yann-lms/stm32mp1_2019-02-14
Antonio Niño Díaz [Mon, 18 Feb 2019 10:51:57 +0000 (10:51 +0000)]
Merge pull request #1821 from Yann-lms/stm32mp1_2019-02-14

Series of new patches for STM32MP1

5 years agoallwinner: Clean up CPU ops functions
Samuel Holland [Sun, 17 Feb 2019 21:33:33 +0000 (15:33 -0600)]
allwinner: Clean up CPU ops functions

Convert them to take an mpidr instead of a (cluster, core) pair. This
simplifies all of the call sites, and actually makes the functions a bit
smaller.

Signed-off-by: Samuel Holland <samuel@sholland.org>
5 years agoallwinner: Constify data structures
Samuel Holland [Sun, 17 Feb 2019 21:09:11 +0000 (15:09 -0600)]
allwinner: Constify data structures

This maximizes the amount of data protected by the MMU.

Signed-off-by: Samuel Holland <samuel@sholland.org>
5 years agoMerge pull request #1822 from antonio-nino-diaz-arm/an/plat-arm
Antonio Niño Díaz [Fri, 15 Feb 2019 11:03:06 +0000 (11:03 +0000)]
Merge pull request #1822 from antonio-nino-diaz-arm/an/plat-arm

docs: Update note about plat/arm in Porting Guide

5 years agoSPM: Remove unnecessary register save
Antonio Nino Diaz [Thu, 14 Feb 2019 11:40:19 +0000 (11:40 +0000)]
SPM: Remove unnecessary register save

Since commit 01fc1c24b9a0 ("BL31: Use helper function to save registers
in SMC handler") all the general-purpose registers are saved when
entering EL3. It isn't needed to save them here.

Change-Id: Ic540a5441b89b70888da587ab8fc3b2508cef8cc
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoUpdate macro to check need for CVE-2017-5715 mitigation
Antonio Nino Diaz [Tue, 12 Feb 2019 11:25:02 +0000 (11:25 +0000)]
Update macro to check need for CVE-2017-5715 mitigation

Armv8.5 introduces the field CSV2 to register ID_AA64PFR0_EL1. It can
have the following 3 values:

- 0: Branch targets trained in one hardware described context may affect
     speculative execution in a different hardware described context. In
     some CPUs it may be needed to apply mitigations.

- 1: Branch targets trained in one hardware described context can only
     affect speculative execution in a different hardware described
     context in a hard-to-determine way. No mitigation required.

- 2: Same as 1, but the device is also aware of SCXTNUM_ELx register
     contexts. The TF doesn't use the registers, so there is no
     difference with 1.

The field CSV2 was originally introduced in the TRM of the Cortex-A76
before the release of the Armv8.5 architecture. That TRM only mentions
the meaning of values 0 and 1. Because of this, the code only checks if
the field has value 1 to know whether to enable or disable the
mitigations.

This patch makes it aware of value 2 as well. Both values 1 and 2
disable the mitigation, and 0 enables it.

Change-Id: I5af33de25a0197c98173f52c6c8c77b51a51429f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agostm32mp1: introduce STM32MP1 discovery boards
Yann Gautier [Tue, 12 Feb 2019 18:00:29 +0000 (19:00 +0100)]
stm32mp1: introduce STM32MP1 discovery boards

Add the device tree files to support the 2 discovery boards: DK1 & DK2.

Change-Id: I90b4797dc69bd0aab1b643a72c932ead48a03c1f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: update clock driver
Yann Gautier [Thu, 14 Feb 2019 09:53:33 +0000 (10:53 +0100)]
stm32mp1: update clock driver

Remove useless private structure in function prototypes.
Add a reference counter on clocks.
Prepare for future secured/shared/non-secured clocks.

Change-Id: I3dbed81721da5ceff5e10b2c4155b1e340c036ee
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
5 years agostm32mp1: add timeout detection in reset driver
Yann Gautier [Thu, 14 Feb 2019 08:17:55 +0000 (09:17 +0100)]
stm32mp1: add timeout detection in reset driver

This change makes the platform to panic in case of peripheral reset
resource malfunction.

Change-Id: I17eb9cb045b78a4e5142a8c33b744e84992d732a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
5 years agostm32mp1: use functions to retrieve some peripheral addresses
Yann Gautier [Thu, 14 Feb 2019 10:01:20 +0000 (11:01 +0100)]
stm32mp1: use functions to retrieve some peripheral addresses

PWR, RCC, DDRPHYC & DDRCTRL addresses can be retrieved from device tree.
Platform asserts the value read from the DT are the SoC addresses.

Change-Id: I43f0890b51918a30c87ac067d3780ab27a0f59de
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
5 years agostm32mp1: split clkfunc code
Yann Gautier [Thu, 14 Feb 2019 10:15:20 +0000 (11:15 +0100)]
stm32mp1: split clkfunc code

Create a new file stm32mp_clkfunc.c to put functions that could be common
between several platforms.

Change-Id: Ica915c796b162b2345056b33328acc05035a242c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: update I2C and PMIC drivers
Yann Gautier [Thu, 14 Feb 2019 10:15:03 +0000 (11:15 +0100)]
stm32mp1: update I2C and PMIC drivers

Regulator configuration at boot takes more information from DT.
I2C configuration from DT is done in I2C driver.
I2C driver manages more transfer modes.
The min voltage of buck1 should also be increased to 1.2V,
else the platform does not boot.

Heavily modifies stm32_i2c.c since many functions move inside the source
file to remove redundant declarations.

Change-Id: I0bee5d776cf3ff15e687427cd6abc06ab237d025
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
5 years agostm32mp1: use new functions to manage timeouts
Yann Gautier [Thu, 14 Feb 2019 10:14:39 +0000 (11:14 +0100)]
stm32mp1: use new functions to manage timeouts

Remove the previously use function: get_timer, and use new functions
timeout_init_us and timeout_elapsed.

Change-Id: I4e95b123648bff7ca91e40462a2a3ae24cfe1697
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
5 years agoIntroduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT.
Yann Gautier [Thu, 14 Feb 2019 10:14:18 +0000 (11:14 +0100)]
Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT.

timeout_init_us(some_timeout_us); returns a reference to detect
timeout for the provided microsecond delay value from current time.

timeout_elapsed(reference) return true/false whether the reference
timeout is elapsed.

This change is inspired by the OP-TEE OS timeout resources [1].

 [1] https://github.com/OP-TEE/optee_os/blob/3.4.0/core/arch/arm/include/kernel/delay.h#L45

Change-Id: Id81ff48aa49693f555dc621064878417101d5587
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
5 years agostm32mp1: remove some dependencies on clocks and reset in drivers
Yann Gautier [Thu, 14 Feb 2019 10:13:50 +0000 (11:13 +0100)]
stm32mp1: remove some dependencies on clocks and reset in drivers

Include all RCC, clocks and reset headers from stm32mp1_def.h
which if exported to the firmware through platform_def.h.
The same dependency removal is done in common code as well.
Some useless includes are also removed in stm32_sdmmc2 driver.

Change-Id: I731ea5775c3fdb7f7b0c388b93923ed5e84b8d3f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
5 years agostm32mp1: make functions and macros more common
Yann Gautier [Thu, 14 Feb 2019 10:13:39 +0000 (11:13 +0100)]
stm32mp1: make functions and macros more common

Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions
that can be used in drivers shared by different platforms.

Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
5 years agostm32mp1: split code between common and private parts
Yann Gautier [Thu, 14 Feb 2019 10:13:25 +0000 (11:13 +0100)]
stm32mp1: split code between common and private parts

Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.

stm32mp_common.h is a common API aggregate.

Remove some casts where applicable.
Fix some types where applicable.
Remove also some platform includes that are already in stm32mp1_def.h.

Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
5 years agoMerge pull request #1820 from thloh85-intel/integration_mbr
Antonio Niño Díaz [Wed, 13 Feb 2019 15:53:18 +0000 (15:53 +0000)]
Merge pull request #1820 from thloh85-intel/integration_mbr

drivers: partition: Add simple MBR partition entries support

5 years agoMerge pull request #1819 from thloh85-intel/integration
Antonio Niño Díaz [Wed, 13 Feb 2019 15:53:00 +0000 (15:53 +0000)]
Merge pull request #1819 from thloh85-intel/integration

plat: intel: Fix faulty DDR calibration value

5 years agoMerge pull request #1813 from oscardagrach/hikey960-iomcu-dma
Antonio Niño Díaz [Wed, 13 Feb 2019 15:52:43 +0000 (15:52 +0000)]
Merge pull request #1813 from oscardagrach/hikey960-iomcu-dma

hikey960: enable IOMCU DMAC

5 years agodocs: Update note about plat/arm in Porting Guide
Antonio Nino Diaz [Wed, 13 Feb 2019 14:07:38 +0000 (14:07 +0000)]
docs: Update note about plat/arm in Porting Guide

Platforms are not allowed to use any file inside include/plat/arm or
plat/arm to prevent dependencies between Arm platforms and non-Arm
platforms.

Change-Id: I6dc336ab71134c8d2758761fac0e4716e2d7e6ff
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoMerge pull request #1816 from grandpaul/paulliu-warp7-multiconsoleapi
Antonio Niño Díaz [Wed, 13 Feb 2019 09:54:17 +0000 (09:54 +0000)]
Merge pull request #1816 from grandpaul/paulliu-warp7-multiconsoleapi

imx: warp7: Migrate to MULTI_CONSOLE_API

5 years agoMerge pull request #1814 from glneo/ti-sci-async
Antonio Niño Díaz [Wed, 13 Feb 2019 09:54:01 +0000 (09:54 +0000)]
Merge pull request #1814 from glneo/ti-sci-async

TI-SCI asynchronous power down sequencing

5 years agoplat: intel: Fix faulty DDR calibration value
Loh Tien Hock [Wed, 13 Feb 2019 06:39:31 +0000 (14:39 +0800)]
plat: intel: Fix faulty DDR calibration value

A DDR calibration value is missing write mask, causing ECC DDR calibration
to fail. This patch addresses the issue. ECC should also be scrubbed before
MMU initializes, thus the scrubbing is moved to ddr intialization phase.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
5 years agodrivers: partition: Add simple MBR partition entries support
Loh Tien Hock [Mon, 11 Feb 2019 02:56:28 +0000 (10:56 +0800)]
drivers: partition: Add simple MBR partition entries support

This is to add simple MBR partition entry support. This will read all four
MBR partition into the partition list, and the partition type will be saved
in the list.name[0] entry.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
5 years agoMerge pull request #1812 from antonio-nino-diaz-arm/an/fix-cortex
Antonio Niño Díaz [Tue, 12 Feb 2019 18:48:48 +0000 (18:48 +0000)]
Merge pull request #1812 from antonio-nino-diaz-arm/an/fix-cortex

Fix CPU headers' definitions

5 years agoMerge pull request #1817 from antonio-nino-diaz-arm/an/spd-includes
Antonio Niño Díaz [Tue, 12 Feb 2019 18:48:18 +0000 (18:48 +0000)]
Merge pull request #1817 from antonio-nino-diaz-arm/an/spd-includes

Sanitize SPD include paths

5 years agoMerge pull request #1818 from pbeesley-arm/doc-links
Antonio Niño Díaz [Tue, 12 Feb 2019 18:47:52 +0000 (18:47 +0000)]
Merge pull request #1818 from pbeesley-arm/doc-links

doc: Fix broken external links

5 years agofvp: trusty: Move dynamic xlat enable to platform
Antonio Nino Diaz [Tue, 12 Feb 2019 13:32:03 +0000 (13:32 +0000)]
fvp: trusty: Move dynamic xlat enable to platform

Rather than letting the Trusty makefile set the option to enable dynamic
translation tables, make platforms do it themselves.

This also allows platforms to replace the implementation of the
translation tables library as long as they use the same function
prototypes.

Change-Id: Ia60904f61709ac323addcb57f7a83391d9e21cd0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoSanitize SPD include paths
Antonio Nino Diaz [Mon, 11 Feb 2019 11:57:57 +0000 (11:57 +0000)]
Sanitize SPD include paths

Commit 09d40e0e0828 ("Sanitise includes across codebase") modified the
include paths of the TSP includes but it didn't remove the include path
from the makefile or did the same for TLK. This patch does the remaining
work.

Change-Id: Iecee2e88fabcd06989d35568c3a4c1f4e7d93572
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoimx: warp7: Migrate to MULTI_CONSOLE_API
Ying-Chun Liu (PaulLiu) [Tue, 12 Feb 2019 10:33:04 +0000 (18:33 +0800)]
imx: warp7: Migrate to MULTI_CONSOLE_API

This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board.
We also rename the functions in imx_uart driver to more specific one.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
5 years agoti: k3: common: Do not release processor control on startup
Andrew F. Davis [Mon, 11 Feb 2019 20:44:46 +0000 (14:44 -0600)]
ti: k3: common: Do not release processor control on startup

ATF should be the only host needing to control a processor that it has
started. ATF will need this control to stop the core later. Do not
relinquish control of a core after starting the core.

Signed-off-by: Andrew F. Davis <afd@ti.com>
5 years agoti: k3: drivers: ti_sci: Use non-blocking TI-SCI messages for power down
Andrew F. Davis [Mon, 11 Feb 2019 20:37:58 +0000 (14:37 -0600)]
ti: k3: drivers: ti_sci: Use non-blocking TI-SCI messages for power down

Now that we have non-blocking TI-SCI functions we can initiate the shutdown
sequence from the PSCI handler without needing the ti_sci_proc_shutdown
helper function, which is removed. This gives us the greater control and
flexibility that will be needed when cluster power down sequences are added.

Signed-off-by: Andrew F. Davis <afd@ti.com>
5 years agoti: k3: drivers: ti_sci: Add non-blocking TI-SCI messages
Andrew F. Davis [Mon, 11 Feb 2019 20:18:53 +0000 (14:18 -0600)]
ti: k3: drivers: ti_sci: Add non-blocking TI-SCI messages

Most TI-SCI functions request an ACK and wait until it is received. For
some power sequence tasks we cannot wait but instead queue messages
asynchronously. Three messages have been identified that will need to
be used in this way. Add non-waiting versions of these functions.

Signed-off-by: Andrew F. Davis <afd@ti.com>
5 years agoti: k3: drivers: ti_sci: Request and check for ACK by default
Andrew F. Davis [Mon, 11 Feb 2019 19:44:31 +0000 (13:44 -0600)]
ti: k3: drivers: ti_sci: Request and check for ACK by default

Currently almost all TI-SCI messages request and check for an ACK from
the system firmware. Move this into a common place to remove the same
from each function.

Signed-off-by: Andrew F. Davis <afd@ti.com>
5 years agoti: k3: drivers: ti_sci: Add exclusive device accessors
Andrew F. Davis [Mon, 11 Feb 2019 18:58:32 +0000 (12:58 -0600)]
ti: k3: drivers: ti_sci: Add exclusive device accessors

When a device is requested with TI-SCI its control can be made exclusive
to the requesting host. This was currently the default but is not what
is needed most of the time. Add _exclusive versions of the request
functions and remove the exclusive flag from the default version.

Signed-off-by: Andrew F. Davis <afd@ti.com>
5 years agoti: k3: drivers: ti_sci: Internalize raw get/set state functions
Andrew F. Davis [Mon, 11 Feb 2019 18:55:25 +0000 (12:55 -0600)]
ti: k3: drivers: ti_sci: Internalize raw get/set state functions

The raw get and set state functions for both devices and clocks
are only meant for use internal to the TI-SCI driver, the same
functionality is available from the other API that call into
these. Remove them from the external interface and make them
static scope to the driver.

Signed-off-by: Andrew F. Davis <afd@ti.com>
5 years agohikey960: enable IOMCU DMAC
Ryan Grachek [Mon, 11 Feb 2019 16:22:24 +0000 (10:22 -0600)]
hikey960: enable IOMCU DMAC

There exists a third DMA controller on the hi3660
SoC called the IOMCU DMAC. This controller is used by
peripherals like SPI2 and UART3. Initialize channels 4-7
as non-secure, while 0-3 remain reserved and secure.

Signed-off-by: Ryan Grachek <ryan@edited.us>
5 years agocpus: Add casts to all definitions in CPU headers
Antonio Nino Diaz [Mon, 11 Feb 2019 13:34:15 +0000 (13:34 +0000)]
cpus: Add casts to all definitions in CPU headers

There are some incorrect casts and some missing casts in the headers.
This patch fixes the ones that were 64-bit or 32-bit wide wrongly and
adds casts where they were missing.

Note that none of the changes of the patch actually changes the values
of the definitions. This patch is just for correctness.

Change-Id: Iad6458021bad521922ce4f91bafff38b116b49eb
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agocpus: Fix some incorrect definitions in CPU headers
Antonio Nino Diaz [Mon, 11 Feb 2019 13:34:54 +0000 (13:34 +0000)]
cpus: Fix some incorrect definitions in CPU headers

There are some values that should be 64-bit immediates but that resolve
to 0 because the type of the value is 32-bit wide. This patch casts the
expressions to 64-bit before the shift so that the definition has the
correct value.

The definitions are only used in assembly so far, so the code is not
actually affected by this bug. The assembler treats all values as 64-bit
values, so there are no overflows.

Change-Id: I965e4be631c1d28787c0913661d224c82a6b9155
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoMerge pull request #1810 from antonio-nino-diaz-arm/an/setjmp
Antonio Niño Díaz [Mon, 11 Feb 2019 09:58:53 +0000 (09:58 +0000)]
Merge pull request #1810 from antonio-nino-diaz-arm/an/setjmp

Make setjmp/longjmp compliant with the C standard and move them to libc

5 years agoMerge pull request #1808 from sandrine-bailleux-arm/sb/maintainers
Antonio Niño Díaz [Mon, 11 Feb 2019 09:58:43 +0000 (09:58 +0000)]
Merge pull request #1808 from sandrine-bailleux-arm/sb/maintainers

maintainers: Fix broken links to some Github accounts

5 years agoMerge pull request #1811 from sandrine-bailleux-arm/sb/doc-fixes
Antonio Niño Díaz [Mon, 11 Feb 2019 09:58:34 +0000 (09:58 +0000)]
Merge pull request #1811 from sandrine-bailleux-arm/sb/doc-fixes

Miscellaneous documentation fixes

5 years agodoc: Fix broken external links
Paul Beesley [Fri, 8 Feb 2019 16:43:05 +0000 (16:43 +0000)]
doc: Fix broken external links

Using Sphinx linkcheck on the TF-A docs revealed some broken
or permanently-redirected links. These have been updated where
possible.

Change-Id: Ie1fead47972ede3331973759b50ee466264bd2ee
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
5 years agoDoc: Remove useless escape characters
Sandrine Bailleux [Fri, 8 Feb 2019 14:26:36 +0000 (15:26 +0100)]
Doc: Remove useless escape characters

Just like has been done in the porting guide a couple of patches
earlier, kill all escaped underscore characters in all documents.

Change-Id: I7fb5b806412849761d9221a6ce3cbd95ec43d611
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
5 years agoMiscellaneous doc fixes/enhancements
Sandrine Bailleux [Fri, 8 Feb 2019 09:50:28 +0000 (10:50 +0100)]
Miscellaneous doc fixes/enhancements

Change-Id: I915303cea787d9fb188428b98ac6cfc610cc4470
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
5 years agoPorting Guide: Fix some broken links
Sandrine Bailleux [Fri, 8 Feb 2019 13:46:42 +0000 (14:46 +0100)]
Porting Guide: Fix some broken links

Fix links to SCC and FreeBSD. Direct links do not need any special
formatting.

Change-Id: I00f7343d029a30ec02dfaa0ef393b3197260cab9
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
5 years agoPorting Guide: Remove useless escape characters
Sandrine Bailleux [Fri, 8 Feb 2019 13:44:53 +0000 (14:44 +0100)]
Porting Guide: Remove useless escape characters

Replace all occurences of escaped underscore characters by plain ones.
This makes the text version of the porting guide easier to read and
grep into.

Change-Id: I7bf3b292b686be4c6d847a467b6708ac16544c90
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
5 years agoMerge pull request #1809 from antonio-nino-diaz-arm/an/fix-trusty
Antonio Niño Díaz [Fri, 8 Feb 2019 13:53:15 +0000 (13:53 +0000)]
Merge pull request #1809 from antonio-nino-diaz-arm/an/fix-trusty

trusty: Require dynamic translation tables

5 years agoMerge pull request #1759 from vwadekar/armlink-support
Antonio Niño Díaz [Fri, 8 Feb 2019 13:48:47 +0000 (13:48 +0000)]
Merge pull request #1759 from vwadekar/armlink-support

Armlink support

5 years agolibc: Move setjmp to libc folder
Antonio Nino Diaz [Fri, 8 Feb 2019 13:20:37 +0000 (13:20 +0000)]
libc: Move setjmp to libc folder

Now that setjmp() and longjmp() are compliant with the standard they can
be moved with the other libc files.

Change-Id: Iea3b91c34eb353ace5e171e72f331602d57774d5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoMake setjmp.h prototypes comply with the C standard
Antonio Nino Diaz [Fri, 8 Feb 2019 13:10:45 +0000 (13:10 +0000)]
Make setjmp.h prototypes comply with the C standard

Instead of having a custom implementation of setjmp() and longjmp() it
is better to follow the C standard.

The comments in setjmp.h are no longer needed as there are no deviations
from the expected one, so they have been removed.

All SDEI code that relied on them has been fixed to use the new function
prototypes and structs.

Change-Id: I6cd2e21cb5a5bcf81ba12283f2e4c067bd5172ca
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoxlat_tables_v2: mark 'xlat_clean_dcache_range' unused
Varun Wadekar [Wed, 30 Jan 2019 16:31:07 +0000 (08:31 -0800)]
xlat_tables_v2: mark 'xlat_clean_dcache_range' unused

The armclang compiler can warn if a variable is declared but
is never referenced. The '__attribute__((unused))' attribute
informs the compiler to expect an unused variable, and tells
it not to issue a warning.

This patch marks the 'xlat_clean_dcache_range' function as
"unused" to fix this armclang compiler warning.

Change-Id: I7623f61c2975a01db4d1b80554dd4f9a9e0f7eb6
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agolocks: linker variables to calculate per-cpu bakery lock size
Varun Wadekar [Wed, 30 Jan 2019 16:26:20 +0000 (08:26 -0800)]
locks: linker variables to calculate per-cpu bakery lock size

This patch introduces explicit linker variables to mark the start and
end of the per-cpu bakery lock section to help bakery_lock_normal.c
calculate the size of the section. This patch removes the previously
used '__PERCPU_BAKERY_LOCK_SIZE__' linker variable to make the code
uniform across GNU linker and ARM linker.

Change-Id: Ie0c51702cbc0fe8a2076005344a1fcebb48e7cca
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra186: trampoline: include bl_common.h
Varun Wadekar [Fri, 11 Jan 2019 22:48:41 +0000 (14:48 -0800)]
Tegra186: trampoline: include bl_common.h

This patch includes bl_common.h from plat_trampoline.S to link with
the __BL31_END__ symbol.

Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra186: use common 'BL31_BASE' variable
Varun Wadekar [Fri, 11 Jan 2019 18:48:47 +0000 (10:48 -0800)]
Tegra186: use common 'BL31_BASE' variable

This patch modfies the 'tegra_soc_pwr_domain_power_down_wfi' handler
to use BL31_BASE variable, provided by bl_common.h

Change-Id: I9747228d0193c1ae6999284458b9f866955a61a2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agolib: aarch64: misc_helpers: include bl_common.h
Varun Wadekar [Thu, 10 Jan 2019 23:46:34 +0000 (15:46 -0800)]
lib: aarch64: misc_helpers: include bl_common.h

This patch includes bl_common.h to get access to the linker
defined symbols.

Change-Id: I9aa4a6e730273d75a53438854f69971e485bc904
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoRemove unused function symbols
Varun Wadekar [Thu, 10 Jan 2019 23:45:15 +0000 (15:45 -0800)]
Remove unused function symbols

This patch removes the unused functions that are marked as .global
in code but not defined anywhere in the code.

Change-Id: Ia5057a77c0b0b4a61043eab868734cd3437304cc
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agolib: aarch64: fix non-code symbol errors flagged by armlink
Varun Wadekar [Thu, 10 Jan 2019 23:36:44 +0000 (15:36 -0800)]
lib: aarch64: fix non-code symbol errors flagged by armlink

This patch modifies the code to turn __1printf and __2printf into proper
functions to fix the following errors flagged by armlink.

Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.

Change-Id: I89126bc2b9db44ce8b8fc9fb1e3fc4c8c60c47a4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra: remove circular dependency with common_def.h
Varun Wadekar [Fri, 21 Dec 2018 18:55:42 +0000 (10:55 -0800)]
Tegra: remove circular dependency with common_def.h

This patch stops including common_def.h from platform_def.h to
fix a circular depoendency between them.

This means platform_def.h now has to define the linker macros:
* PLATFORM_LINKER_FORMAT
* PLATFORM_LINKER_ARCH

Change-Id: Icd540b1bd32fb37e0e455e9146c8b7f4b314e012
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra: define CACHE_WRITEBACK_GRANULE for scatterfile
Kalyani Chidambaram [Fri, 14 Dec 2018 19:36:43 +0000 (11:36 -0800)]
Tegra: define CACHE_WRITEBACK_GRANULE for scatterfile

The scatterfile to support armlink, does not seem to support
shift operator. To handle this define CACHE_WRITEBACK_GRANULE with
the direct value.

Change-Id: I19afc7cb9c55a08cb0703f284d91018d3214353f
Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>
5 years agomaintainers: Fix broken links to some Github accounts
Sandrine Bailleux [Thu, 7 Feb 2019 16:22:28 +0000 (17:22 +0100)]
maintainers: Fix broken links to some Github accounts

Change-Id: I89a451fa22d517f9c59dfa0a74f28deb6d750b8f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
5 years agotrusty: Require dynamic translation tables
Antonio Nino Diaz [Wed, 6 Feb 2019 13:27:52 +0000 (13:27 +0000)]
trusty: Require dynamic translation tables

Trusty requires dynamic translation tables support, so the makefile of
Trusty itself should request it. Not doing so causes platforms such as
FVP to fail to build with Trusty. Other platforms like Tegra still build
because they use dynamic translation tables by default.

Change-Id: Id67d3b9e1f7d0547fa81e81cefa3faf1e0e6f876
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agoMerge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19
Antonio Niño Díaz [Wed, 6 Feb 2019 10:20:25 +0000 (10:20 +0000)]
Merge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19

Tf2.0 tegra downstream rebase 1.25.19

5 years agoMerge pull request #1805 from antonio-nino-diaz-arm/an/generic-timer
Antonio Niño Díaz [Wed, 6 Feb 2019 10:20:12 +0000 (10:20 +0000)]
Merge pull request #1805 from antonio-nino-diaz-arm/an/generic-timer

drivers: generic_delay_timer: Assert presence of Generic Timer

5 years agodrivers: generic_delay_timer: Assert presence of Generic Timer
Antonio Nino Diaz [Wed, 6 Feb 2019 09:23:04 +0000 (09:23 +0000)]
drivers: generic_delay_timer: Assert presence of Generic Timer

The Generic Timer is an optional extension to an ARMv7-A implementation.
The generic delay timer can be used from any architecture supported by
the Trusted Firmware. In ARMv7 it is needed to check that this feature
is present. In ARMv8 it is always present.

Change-Id: Ib7e8ec13ffbb2f64445d4ee48ed00f26e34b79b7
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
5 years agodocs: add Tegra186 information to nvidia-tegra.rst
Varun Wadekar [Thu, 3 Jan 2019 23:09:44 +0000 (15:09 -0800)]
docs: add Tegra186 information to nvidia-tegra.rst

This patch adds information about the Tegra186 platforms to the
docs.

Change-Id: I69525c60a0126030dc15505ec7f02ccf8250be6f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra186: remove ENABLE_AFI_DEVICE macro usage
Varun Wadekar [Fri, 25 Jan 2019 17:38:14 +0000 (09:38 -0800)]
Tegra186: remove ENABLE_AFI_DEVICE macro usage

This patch removes this macro and its usage as it is used only
within the Tegra186 files and all derived platforms keep the
macro enabled.

Change-Id: Ib831b3c002ba4dedc3d5fafbb7d321daa28fa9ea
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agospd: trusty: memmap trusty's code memory before peeking
Varun Wadekar [Thu, 3 Jan 2019 18:44:22 +0000 (10:44 -0800)]
spd: trusty: memmap trusty's code memory before peeking

This patch dynamically maps the first page of trusty's code memory,
before accessing it to find out if we are running a 32-bit or 64-bit
image.

On Tegra platforms, this means we have to increase the mappings to
accomodate the new memmap entry.

Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra: initialise per-CPU GIC interface(s)
Varun Wadekar [Thu, 3 Jan 2019 18:12:55 +0000 (10:12 -0800)]
Tegra: initialise per-CPU GIC interface(s)

This patch initilises the per-CPU GIC bits during cold boot and
secondary CPU power up. Commit 80c50ee accidentally left out this
part.

Change-Id: I73ce59dbc83580a84b827cab89fe7e1f65f9f130
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra: spe: prepend '\r' to '\n'
Varun Wadekar [Mon, 7 May 2018 18:21:57 +0000 (11:21 -0700)]
Tegra: spe: prepend '\r' to '\n'

This patch udpates the SPE console driver to prepend '\r' to
'\n'. This fixes the alignment of prints seen by the host
machines on their UART ports.

Tested by collecting the logs from host PC using Cutecom

Reported by: Mustafa Bilgen <mbilgen@nvidia.com>

Change-Id: I6e0b412bd71ff5eb889582071df8c157da5175ed
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoTegra: Enable irq as wake-up event for cpu_standby
Vignesh Radhakrishnan [Fri, 20 Apr 2018 21:31:41 +0000 (14:31 -0700)]
Tegra: Enable irq as wake-up event for cpu_standby

As per ARM ARM D1.17.2, any physical IRQ interrupt received by the PE
will be treated as a wake-up event, if SCR_EL3.IRQ is set to '1',
irrespective of the value of the PSTATE.I bit value.

This patch programs the SCR_EL3.IRQ bit before entering CPU standby
state, to allow an IRQ to wake the PE. On waking up, the previous
SCR_EL3 value is restored.

Change-Id: Ie81cf3a7668f5ac35f4bf2ecc461b91b9b60650c
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
5 years agoTegra: remove unused libc files from makefile
Anthony Zhou [Mon, 2 Apr 2018 11:34:59 +0000 (19:34 +0800)]
Tegra: remove unused libc files from makefile

This patch redefines the variable LIBC_SRCS for Tegra platforms,
to remove unused libc files from the list. This patch is a building
block to eventually use other libc implementations in the future.

Change-Id: Iccde5a75f5e2d6f4e2dbc6274beb423b80e846fd
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoIntroduce build option to override libc
Varun Wadekar [Thu, 31 Jan 2019 17:22:30 +0000 (09:22 -0800)]
Introduce build option to override libc

This patch introduces a build option 'OVERRIDE_LIBC' that platforms
can set to override libc from the BL image. The default value is '0'
to keep the library.

Change-Id: I10a0b247f6a782eeea4a0359e30a8d79b1e9e4e1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
5 years agoMerge pull request #1804 from antonio-nino-diaz-arm/an/cleanup
Antonio Niño Díaz [Tue, 5 Feb 2019 11:31:15 +0000 (11:31 +0000)]
Merge pull request #1804 from antonio-nino-diaz-arm/an/cleanup

Minor cleanup