Dave Airlie [Wed, 10 Oct 2018 06:49:37 +0000 (16:49 +1000)]
Merge tag 'drm-msm-fixes-2018-10-09' of git://people.freedesktop.org/~robclark/linux into drm-next
Fix 32-bit arm build.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGt7s20e4aJmnOFM-uZHfYSsicy0E=ssse1D7LTXX4jnWQ@mail.gmail.com
Dave Airlie [Mon, 8 Oct 2018 06:45:56 +0000 (16:45 +1000)]
Merge tag 'drm-msm-next-2018-10-07' of git://people.freedesktop.org/~robclark/linux into drm-next
This time mostly further refinement of dpu1+a6xx for sdm845 and
beyond.. and hurray for more negative diffstat :-)
- Misc cleanups and fixes
- GPU preemption optimization
- a6xx perf improvements and clock fixes (ie. lets actually not run at
minimum clks)
- a6xx devfreq/DCVS
- Lots of code cleanup across dpu (Bruce, Jeykumar, Sean)
- Fixed a few crashes on startup relating to dsi (Sean)
- Add cursor support (Sravanthi, Sean)
- Properly free mdss irq on destroy (Jordan)
- Use correct encoder_type when initializing, fixes crash on boot (Stephen)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsNevCzMiLuNW1EVN6gtP3JZSir6PfnWvnCavSZM+bUFQ@mail.gmail.com
Sean Paul [Mon, 8 Oct 2018 18:24:14 +0000 (14:24 -0400)]
drm/msm: a6xx: Fix improper u64 division
This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type
Fixes: a2c3c0a54d4c drm/msm/a6xx: Add devfreq support for a6xx
Cc: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 8 Oct 2018 18:24:13 +0000 (14:24 -0400)]
drm/msm: a5xx: Remove unneeded parens
A small fixup I posted with my v2 patch [1] that was dropped.
[1]- https://lists.freedesktop.org/archives/freedreno/2018-October/003647.html
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Dave Airlie [Mon, 8 Oct 2018 06:38:48 +0000 (16:38 +1000)]
Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next
I've realised that the commit
3dae1c0919d8 ("drm/arm/malidp: Implemented
the size validation for AFBC framebuffers") got bungled up in the
upstreaming process and it was missing an important line from the
function that calculates the size of the AFBC framebuffer
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Liviu Dudau <Liviu.Dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181005152423.GF1156@e110455-lin.cambridge.arm.com
Jordan Crouse [Fri, 5 Oct 2018 20:06:05 +0000 (14:06 -0600)]
drm/msm/a6xx: Remove CP perfcounter selects from the protected list
The CP performance counter selects were accidentally marked as protected
so they couldn't be written from PM4 streams. Remove the protection
because user space does have an interest in setting up their own
counters.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Thu, 4 Oct 2018 18:09:44 +0000 (14:09 -0400)]
drm/msm: dpu: Fix memory leak caused by dropped reference
We are currently leaking a drm_crtc_commit struct for every atomic
commit containing plane state. The dpu plane destroy function cleans up
the fb reference manually, but fails to release the commit ref. As a
result, we just keep allocating drm_crtc_commits without ever freeing
them. Fortunately there's a helper function which will clean up all of
our mess at once, so use that.
Thanks to Doug Anderson for reporting the memory leak (and leaving
breadcrumbs from kmemleak!).
Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Thu, 4 Oct 2018 19:24:04 +0000 (15:24 -0400)]
drm/msm: a5xx: Fix improper u64 division
This patch uses the proper do_div() macro to perform u64 division and
guards against overflow if the result is too large for the unsigned long
return type
Fixes: de0a3d094de0 drm/msm: re-factor devfreq code
Cc: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 4 Oct 2018 19:10:30 +0000 (15:10 -0400)]
drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Liviu Dudau [Fri, 5 Oct 2018 12:30:48 +0000 (13:30 +0100)]
drm: malidp: Add the size of the superblocks when calculating total
size for AFBC buffers
The size of the superblocks being added to the total AFBC buffer size
got lost in the upstreaming process. Add it back.
Reviewed-by: Ayan Kumar Halder <ayan.halder@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Sharat Masetty [Thu, 4 Oct 2018 09:41:43 +0000 (15:11 +0530)]
drm/msm/a6xx: Add devfreq support for a6xx
Implement routines to estimate GPU busy time and fetching the
current frequency for the polling interval. This is required by
the devfreq framework which recommends a frequency change if needed.
The driver code then tries to set this new frequency on the GPU by
sending an Out Of Band(OOB) request to the GMU.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sharat Masetty [Thu, 4 Oct 2018 09:41:42 +0000 (15:11 +0530)]
drm/msm: re-factor devfreq code
The devfreq framework requires the drivers to provide busy time estimations.
The GPU driver relies on the hardware performance counteres for the busy time
estimations, but different hardware revisions have counters which can be
sourced from different clocks. So the busy time estimation will be target
dependent. Additionally on targets where the clocks are completely controlled
by the on chip microcontroller, fetching and setting the current GPU frequency
will be different. This patch aims to embrace these differences by re-factoring
the devfreq code a bit.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sharat Masetty [Thu, 4 Oct 2018 09:41:41 +0000 (15:11 +0530)]
drm/msm/a6xx: Add gmu_read64() register read op
Add a simple function to read 64 registers in the GMU domain
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sharat Masetty [Thu, 4 Oct 2018 09:41:40 +0000 (15:11 +0530)]
drm/msm: suspend devfreq on init
Devfreq turns on and starts recommending power level as soon as it is
initialized. The GPU is still not powered on by the time the devfreq
init happens and this leads to problems on GPU's where register access
is needed to get/set power levels. So we start suspended and only restart
devfreq when GPU is powered on.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Dave Airlie [Thu, 4 Oct 2018 01:30:58 +0000 (11:30 +1000)]
Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next
misc mali-dp updates.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Liviu Dudau <Liviu.Dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181003105009.GD1156@e110455-lin.cambridge.arm.com
Dave Airlie [Thu, 4 Oct 2018 01:28:54 +0000 (11:28 +1000)]
Merge tag 'tilcdc-4.20' of https://github.com/jsarha/linux into drm-next
drm/tilcdc changes for Linux v4.20
suspend/resume update.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jyri Sarha <jsarha@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bd8d6b40-d3d6-8e24-9d48-6201b860aceb@ti.com
Dave Airlie [Thu, 4 Oct 2018 01:03:34 +0000 (11:03 +1000)]
BackMerge v4.19-rc6 into drm-next
I have some pulls based on rc6, and I prefer to have an explicit backmerge.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 4 Oct 2018 00:40:35 +0000 (10:40 +1000)]
Merge tag 'exynos-drm-next-for-v4.20' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next
Add out-bridge support
- This patch series enables out-bridge for LVDS bridge device support,
and also includes two cleanups and one relevant dt binding update
for this.
Add Samsung 16x16 tiled format support
- This patch series adds Samsung 16x16 tiled format to scaler and
gsc drivers. As for this, it adds Samsung specific format to
drm_forcc.h header. For the git-pull request with relevant patches,
I requested ack-by[1] to relevant maintainers but there was no any response.
I'm pretty sure no problem to go to mainline though Exynos tree
because the only user of it is Exynos.
(airlied: this looked fine to me)
[1] https://patchwork.freedesktop.org/patch/243921/
Add configurable plane alpha and pixel blend mode support
- This patch series makes mixer driver to be configuragle for
pixel blend mode and plane alpha, which also includes one fixup
to set all default values correctly after reset.
One cleanup
- This patch replaces drm_atomic_helper_suspend/resume() with
drm_mode_config_helper_suspend/resume() to remove exynos specific
suspend_state.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Inki Dae <inki.dae@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1538380891-24040-1-git-send-email-inki.dae@samsung.com
Dave Airlie [Thu, 4 Oct 2018 00:38:23 +0000 (10:38 +1000)]
Merge tag 'omapdrm-4.20-2' of git://git./linux/kernel/git/tomba/linux into drm-next
omapdrm fixes and cleanups for 4.20
- fix memory barrier bug in DMM driver
- fix interrupt management in DMM driver
- partial workaround for errata i878
- fix use of freed memory
- some cleanups
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/36bdd576-2b5c-d69e-24af-05572652b08e@ti.com
Dave Airlie [Thu, 4 Oct 2018 00:37:30 +0000 (10:37 +1000)]
Merge tag 'drm-misc-next-fixes-2018-10-03' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
- Add EXPERT config option to allow phys mem leak from fbdev for blob drivers (Neil)
Cc: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20181003195957.GA64584@art_vandelay
Jordan Crouse [Fri, 28 Sep 2018 14:27:56 +0000 (08:27 -0600)]
drm/msm/a6xx: Add inactive_period for a6xx
The target definition for a630 didn't set a reasonable
value for inactive_period so it defaulted to zero and
we were essentially powering down after every submission.
Set it back to the default value to keep the GPU from
bouncing too much during regular workloads.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Thomas Zimmermann [Wed, 26 Sep 2018 11:48:59 +0000 (13:48 +0200)]
drm/msm: Replace drm_dev_unref with drm_dev_put
This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Thomas Zimmermann [Wed, 26 Sep 2018 11:48:58 +0000 (13:48 +0200)]
drm/msm: Replace drm_gem_object_{un/reference} with put, get functions
This patch unifies the naming of DRM functions for reference counting
of struct drm_gem_object. The resulting code is more aligned with the
rest of the Linux kernel interfaces.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Thomas Zimmermann [Wed, 26 Sep 2018 11:48:57 +0000 (13:48 +0200)]
drm/msm: Replace drm_framebuffer_{un/reference} with put, get functions
This patch unifies the naming of DRM functions for reference counting
of struct drm_framebuffer. The resulting code is more aligned with the
rest of the Linux kernel interfaces.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Thu, 20 Sep 2018 23:04:43 +0000 (17:04 -0600)]
drm/msm/a6xx: Poll for HFI responses
The only HFI communication with the GMU on sdm845 happens
during initialization and all commands are synchronous. A fancy
interrupt tasklet and associated infrastructure is entirely
not eeded and puts us at the mercy of the scheduler.
Instead poll for the message signal and handle the response
immediately and go on our way.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Fri, 14 Sep 2018 15:03:46 +0000 (09:03 -0600)]
msm/gpu/a6xx: Force of_dma_configure to setup DMA for GMU
The point of the 'force_dma' parameter for of_dma_configure
is to force the device to be set up even if DMA capability is
not described by the firmware which is exactly the use case
we have for GMU - we need SMMU to get set up but we have no
other dma capabilities since memory is managed by the GPU
driver. Currently we pass false so of_dma_configure() fails
and subsequently GMU and GPU probe does as well.
Fixes: 4b565ca5a2c ("drm/msm: Add A6XX device support")
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Tested-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sharat Masetty [Fri, 14 Sep 2018 08:38:55 +0000 (14:08 +0530)]
drm/msm/a5xx: Skip hardware preemption init if no preemption
In the case where preemption is not enabled, this patch simply skips
preemption related initialization in hardware init sequence.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Colin Ian King [Tue, 21 Aug 2018 11:55:19 +0000 (12:55 +0100)]
drm/msm: fix unsigned comparison with less than zero
The return from the call to _mixer_stages can be a negative error
code however this is being assigned to an unsigned variable 'stages'
hence the check is always false. Fix this by making 'stages' an
int.
Detected by Coccinelle ("Unsigned expression compared with zero:
stages < 0")
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Wed, 8 Aug 2018 22:39:38 +0000 (16:39 -0600)]
drm/msm/a6xx: Fix PDC register overlap
The current design greedily takes a big chunk of the PDC
register space instead of just the GPU specific sections
which conflicts with other drivers and generally makes
a mess of things.
Furthermore we only need to map the GPU PDC sections
just once during init so map the memory inside the function
that uses it and adjust the pointers and register offsets
accordingly.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Wed, 8 Aug 2018 22:38:52 +0000 (16:38 -0600)]
drm/msm/a6xx: Rename gmu phandle to qcom,gmu
>From the review for the DT bindings for the GPU/GMU it
was suggested that the phandle for the GMU be
'qcom,gmu' instead of just 'gmu'.
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Anders Roxell [Tue, 31 Jul 2018 20:45:32 +0000 (22:45 +0200)]
drm/msm/gpu: fix parameters in function msm_gpu_crashstate_capture
When CONFIG_DEV_COREDUMP isn't defined msm_gpu_crashstate_capture
doesn't pass the correct parameters.
drivers/gpu/drm/msm/msm_gpu.c: In function ‘recover_worker’:
drivers/gpu/drm/msm/msm_gpu.c:479:34: error: passing argument 2 of ‘msm_gpu_crashstate_capture’ from incompatible pointer type [-Werror=incompatible-pointer-types]
msm_gpu_crashstate_capture(gpu, submit, comm, cmd);
^~~~~~
drivers/gpu/drm/msm/msm_gpu.c:388:13: note: expected ‘char *’ but argument is of type ‘struct msm_gem_submit *’
static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm,
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/msm/msm_gpu.c:479:2: error: too many arguments to function ‘msm_gpu_crashstate_capture’
msm_gpu_crashstate_capture(gpu, submit, comm, cmd);
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/msm/msm_gpu.c:388:13: note: declared here
static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm,
In current code the function msm_gpu_crashstate_capture parameters.
Fixes: cdb95931dea3 ("drm/msm/gpu: Add the buffer objects from the submit to the crash dump")
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Reviewed-By: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sharat Masetty [Thu, 27 Sep 2018 16:46:22 +0000 (22:16 +0530)]
drm/msm/a6xx: Send the right perf index value to GMU
The index of the perf table was being set in the wrong bit position
in the register. With this fix, the GPU clock can be seen running at
desired frequency.
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 25 Sep 2018 17:54:00 +0000 (13:54 -0400)]
drm/msm/rd: fix crash with long process cmdlines
The [v]snprintf() functions return the size that *would have* been
written into the buffer, rather than the size *actually* written.
Which results in us trying to memcpy() past the end of the stack.
What we really want is [v]scnprintf().
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 17 Sep 2018 20:49:32 +0000 (16:49 -0400)]
drm/msm: dpu: Don't reset dpu_enc->cur_master on .disable()
cur_master in dpu_encoder is assigned at modeset and cleared on
.disable(). Unfortunately dpms (or enable/disable) does not guarantee a
modeset, so cur_master is NULL when we try to re-enable it.
This patch moves the NULL assignment to setup_display where it will be
re-assigned later in the function.
Tested-by: Bruce Wang <bzwang@chromium.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Tue, 25 Sep 2018 21:10:25 +0000 (17:10 -0400)]
drm/msm/dpu: Revise _dpu_plane_get_aspace
Remove unneeded checks from _dpu_plane_get_aspace.
v3: change _dpu_plane_get_aspace to return a struct
*msm_gem_address_space instead passing in a pointer of the same
type to edit. Remove uneeded arguments.
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:27 +0000 (12:22 -0400)]
drm/msm/dpu: Make dpu_plane_danger_signal_ctrl void
Removed all impossible checks from the function, which eliminates
the need for a return value. This function is also never used
outside of dpu_plane.c, so the function is made static.
v3: Using helper function _dpu_plane_get_kms() instead of doing
it locally.
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:26 +0000 (12:22 -0400)]
drm/msm/dpu: Change _dpu_crtc_vblank_enable_no_lock to void
Removes redundant tests for _dpu_crtc_vblank_enable_no_lock.
Function return type is now void and all function calls have
been changed accordingly.
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Wed, 26 Sep 2018 21:28:59 +0000 (17:28 -0400)]
drm/msm/dpu: Remove _dpu_crtc_power_enable
All checks for _dpu_crtc_power_enable are not true, so the function
can never return an error code. This removes the need for the
function as pm_runtime functions can be used instead.
v3: Separated _dpu_crtc_power_enable into _dpu_crtc_power_enable and
_dpu_crtc_power_disable for clarity.
v4: Removed both _dpu_crtc_power_enable and _dpu_crtc_power_disable
and called pm_runtime_get_sync and pm_runtime_put_sync from all
call points
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:24 +0000 (12:22 -0400)]
drm/msm/dpu: Remove unneeded checks in dpu_crtc.c
Removes impossible checks in dpu_crtc.c.
Variable assignments are moved up to be initializations where
possible. Some variables are no longer used, these are removed.
v3: reverted back to original patch
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:23 +0000 (12:22 -0400)]
drm/msm/dpu: Clean up plane atomic disable/update
Removes unnecessary checks from dpu_plane_atomic_disable, old_state
argument for both dpu_plane_atomic_disable and
dpu_plane_sspp_atomic_update is removed as it is no longer used.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:22 +0000 (12:22 -0400)]
drm/msm/dpu: Remove unneeded checks in dpu_plane.c
Removes some checks from dpu_plane.c that will never result in an error.
Subsequent variable assignments become part of the initialization wherever
possible. Unused variables are removed.
v3: removed additional impossible checks and called helper function
_dpu_plane_get_kms() where possible.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 19 Sep 2018 18:33:50 +0000 (14:33 -0400)]
drm/msm: dpu: Don't store/deref pointers in trace ringbuffer
TP_printk is not synchronous, so storing pointers and then later
dereferencing them is a Bad Idea. This patch stores everything locally to
avoid display stomped memory.
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
[seanpaul fixed up commit msg typo on apply]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 19 Sep 2018 18:33:49 +0000 (14:33 -0400)]
drm/msm: dpu: Add extra_flush_bits to trigger_flush trace
It's useful to know which bits of the flush come from extra_flush_bits
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 19 Sep 2018 18:33:48 +0000 (14:33 -0400)]
drm/msm: dpu: Clear frame_busy_mask bit after trace
We're printing the frame_busy_mask in a trace, but after it's been
cleared. This, as it turns out, is pretty pointless.
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:59 +0000 (09:54 -0400)]
drm/msm: dpu: Don't continue after error in atomic_check
There's no benefit in falling out of the if, just return directly.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:58 +0000 (09:54 -0400)]
drm/msm: dpu: Make dpu_plane_sspp_atomic_update() void
All of the checks in dpu_plane_sspp_atomic_update() are impossible, so
remove them and make the function void. This removes the need to error
check in dpu_plane_atomic_update(). Additionally, remove impossible checks
in dpu_plane_atomic_update().
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:57 +0000 (09:54 -0400)]
drm/msm: dpu: Remove dpu_plane_enabled()
plane->state->visible encompasses all of these checks and more, so we
can just check visible.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:56 +0000 (09:54 -0400)]
drm/msm: dpu: Remove dpu_plane_sspp_enabled()
It's doing the same thing dpu_plane_enabled() is.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:55 +0000 (09:54 -0400)]
drm/msm: dpu: Consolidate atomic_check functions()
dpu_plane_atomic_check() is a very thin wrapper around
dpu_plane_sspp_atomic_check(). All it does is a NULL-check of state->fb,
which is already done by drm_atomic_helper_check_plane_state(). Further,
the helper sets state->visible = false when this is true. So remove
dpu_plane_atomic_check() and just use dpu_plane_sspp_atomic_check()
directly.
Changes in v2:
- Fix spelling mistake in Subject (Jeykumar)
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:54 +0000 (09:54 -0400)]
drm/msm: dpu: Move atomic_check_plane_state() call to atomic_check
src/dst rects are checked in both atomic_check and atomic_update, with
the more comprehensive check occurring in atomic_update, which is
backwards. So consolodate the checks in atomic_check.
Changes in v2:
- Use the correct crtc state (Jeykumar)
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:53 +0000 (09:54 -0400)]
drm/msm: dpu: Remove impossible checks
This patch removes some checks which are impossible to hit. As a result,
we can move some of the local var assignments into the declarations.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Thu, 13 Sep 2018 16:46:15 +0000 (10:46 -0600)]
drm/msm/dpu: Remove an unused enum
enum dpu_ad isn't used and can be safely removed.
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Sat, 8 Sep 2018 00:24:27 +0000 (17:24 -0700)]
drm/msm/dpu: remove RM topology definition
RM maintained a redundant definition for display topology
to identify the no. of hw blocks needed for a display
and their hardware dependencies. This information can be
implicitly deduced from the msm_display_topology structure
available in RM reserve request. In addition to getting
rid of the redundant topology, this change also removes
the topology name enums and their usages.
changes in v4:
- remove the topology name enum entirely (Sean)
changes in v5:
- remove RM topology definition and their
references (Sean)
- Implement helper for dual mixer CRTC (Sean)
changes in v6:
- avoid heap memory for topology (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Sat, 8 Sep 2018 00:24:26 +0000 (17:24 -0700)]
drm/msm/dpu: relax parameter validation in encoders
DPU, being over protective, validates every parameter of a
module. This change traces the call stack for some of encoder
functions affected by previous set of clean up patches and
cleans up unwanted validations.
changes in v5:
- Introduced in the series
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Sat, 8 Sep 2018 00:24:25 +0000 (17:24 -0700)]
drm/msm/dpu: remove RM dependency on connector state
Connector states were passed around RM to update the custom
topology connector property with chosen topology data. Now that
we got rid of both custom properties and topology names, this
change cleans up the mechanism to pass connector states across
RM helpers and encoder functions.
changes in v5:
- Introduced in the series
changes in v6:
- remove parameter checking in rm reserve (Jordan)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:25 +0000 (19:08 -0700)]
drm/msm/dpu: remove display H_TILE from encoder
Encoder H_TILE values are not used for allocating the hw blocks.
no. of hw_intf blocks provides the info.
changes in v4:
- remove irrelevant changes (Sean)
- retain log macros (Sean)
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:24 +0000 (19:08 -0700)]
drm/msm/dpu: remove LOCK/CLEAR support in RM
DPU had the support to LOCK the hw resources in
atomic check and CLEAR the locked resources explicitly
through custom property values. Now that DPU is
stripped off of all the custom properties, the RM
handlers for this feature will be no-op's. This change
gets rid of all its references.
changes in v5:
- Introduced in the series.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:23 +0000 (19:08 -0700)]
drm/msm/dpu: remove cdm block support from resource manager
Support for CDM block is not present in DPU. Remove CDM
handlers from resource manager.
changes in v4:
- Introduced in the series
changes in v5:
- Remove catalog references to CDM (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:22 +0000 (19:08 -0700)]
drm/msm/dpu: clean up destination scaler residue
Destination scaling(DS) is a Snapdragon hardware feature to
scale up the display ROI after layer blending. DPU driver doesn't
support programming of DS blocks yet. This change cleans up the
residual code present in catalog and RM for DS block handling.
Support for the same can be added back when the feature is
formally implemented.
changes in v5:
- introduced in the series
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:21 +0000 (19:08 -0700)]
drm/msm/dpu: rename hw_ctl to lm_ctl
Rename hw_ctl to lm_ctl to mean the ctl associated
with the hw layer mixer block.
sed -i 's/\([*@.>]\)hw_ctl\([^s]\)/\1lm_ctl\2/g' dpu_crtc.c dpu_crtc.h
changes in v4:
- Specifiy shell command used for renaming (Sean)
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:20 +0000 (19:08 -0700)]
drm/msm/dpu: move hw resource tracking to crtc state
Prep changes for state based resource management.
Moves all the hw block tracking for the crtc to the state
object.
changes in v4:
- Serialize crtc state access in debugfs handlers (Sean)
- Split the crtc width query as a separate change (Sean)
changes in v5:
- mode set lock all before crtc state access (Sean)
- remove unwanted memset for hw mixer cache (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:19 +0000 (19:08 -0700)]
drm/msm/dpu: make crtc get_mixer_width helper static
Mark CRTC get_mixer_width helper API static as it is
not used outside the file.
changes in v4:
- Patch introduced in the series
changes in v5:
- Simplify the inline function (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:18 +0000 (19:08 -0700)]
drm/msm/dpu: avoid querying for hw intf before assignment
Resource manager assigns hw_intf blocks for the encoder only on
modeset. If queried for hw_intf objects during init, it will be
NULL. Since hw_intf objects are needed only after encoder enable,
defer the query to encoder enable which will be triggered after
modeset.
changes in v4:
- Add details on commit text on why the change is needed (Sean)
changes in v5:
- Reword commit text on the usage of hw_intf objects (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:17 +0000 (19:08 -0700)]
drm/msm/dpu: iterate for assigned hw ctl in virtual encoder
In virtual encoder modeset, DPU makes RM request to assign hw blocks
for the display. It is also expected in modeset to iterate and
associate the physical encoders with their relevant hw blocks.
Ping pong blocks are already handled here but hw ctl blocks are not.
This change moves the hw_ctl iteration and mapping from physical
encoder to virtual encoder.
changes in v4:
- Fix hw_ctl initialization (Sean)
changes in v5:
- Update commit text with details on why the change is
needed (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:16 +0000 (19:08 -0700)]
drm/msm/dpu: use kms stored hw mdp block
Avoid querying RM for hw mdp block. Use the one
stored in KMS during initialization.
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:15 +0000 (19:08 -0700)]
drm/msm/dpu: enable master-slave encoders explicitly
Identify slave-master encoders during initialization and enable
the encoders explicitly as the current logic has redundant and
ambiguous loops.
changes in v4:
- identify master/slave encoder while adding
adding physical encoders(Sean)
changes in v5:
- get rid of temporary variable for phys enc(Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:14 +0000 (19:08 -0700)]
drm/msm/dpu: remove ping pong split topology variables
removes left out variables of previous ping pong
split topology cleanup.
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:13 +0000 (19:08 -0700)]
drm/msm/dpu: remove resource pool manager
resource pool manager utility was introduced to manage
rotator sessions. Removing the support as the rotator
feature doesn't exist.
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:12 +0000 (19:08 -0700)]
drm/msm/dpu: remove scalar config definitions
cleans up left out scalar config definitions from headers
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:11 +0000 (19:08 -0700)]
drm/msm/dpu: squash power handle event types
DPU power handler maintained PRE/POST versions of power
ENABLE/DISABLE events to accommodate tasks which need be
handled before/after data bus voting. But since the bus voting
API's are deprecated and removed from the driver, squash
the events and their clients respective event handlers
to handle only ENABLE/DISABLE events.
changes in v5:
- introduced in the series
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul converted #defines to BIT(x) in dpu_power_handle.h]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:10 +0000 (19:08 -0700)]
drm/msm/dpu: remove debugfs support for misr
MISR support is the debug feature present in Snapdragon chipsets.
At the layer mixer and interfaces, MISR algorithm can generate CRC
signatures of the pixel data which can be used for validating
the frames generated. Since there are no clients for this feature,
strip down the support from the driver.
changes in v4:
- changed introduced in the series
changes in v5:
- update commit text with the need for the change(Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Tue, 28 Aug 2018 21:23:04 +0000 (15:23 -0600)]
drm/msm/dpu: Remove dpu_mdss_isr when dpu_mdss_destroy is called
The MDSS device is created before the MSM driver attempts to bind the
sub components. If any of the components return -EPROBE_DEFER the MDSS
device is destroyed and tried again later.
If this happens the dpu_mdss_isr interrupt created from the DPU MDSS
is not freed when the MDSS device is destroyed and has a risk of
triggering later and hitting a fault by accessing a mmio region that
no longer exists. Even if the interrupt isn't triggered by
accident when the device attempts to reprobe it would error out
when it tries to re-register the interrupt so unconditionally removing
it in the destroy is the right move.
Switch the device managed dpu_mdss_isr to be unmanaged and add a
free_irq() in the mdss destroy function.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 29 Aug 2018 17:49:47 +0000 (13:49 -0400)]
drm/msm: dpu: Allow planes to extend past active display
The atomic_check is a bit too aggressive with respect to planes which
leave the active area. This caused a bunch of log spew when the cursor
got to the edge of the screen and stopped it from going all the way.
This patch removes the conservative bounds checks from atomic and clips
the dst rect such that we properly display planes which go off the
screen.
Changes in v2:
- Apply the clip to src as well (taking into account scaling)
Changes in v3:
- Use drm_atomic_helper_check_plane_state() to clip src/dst
Cc: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Tue, 28 Aug 2018 23:02:18 +0000 (16:02 -0700)]
drm/msm/dpu: use encoder type to identify display type
With patch [1], DPU is broken since it continues to use
incorrect connector_type to identify the display type. Update
DPU to use the encoder type to get the info.
[1] https://patchwork.kernel.org/patch/
10568269/
Acked-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Tue, 28 Aug 2018 23:02:17 +0000 (16:02 -0700)]
drm/msm/dpu: remove unwanted encoder type mapping
This change gets rid of unwanted connector-encoder type
mapping used for dsi-staging driver. Now that DPU will
be using upstream DSI driver, remove the stale code.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Tue, 28 Aug 2018 23:02:16 +0000 (16:02 -0700)]
drm/msm/dpu: remove stale display port programming
Remove stale display port programming. It can be
added back with DPU support for display port.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sravanthi Kollukuduru [Wed, 22 Aug 2018 17:49:57 +0000 (23:19 +0530)]
drm/msm/dpu: fix for cursor blend issue
The current driver has the opaque blend mode set as the
default causing the black box effect around the cursor.
The fix enables choosing a different blend mode for alpha
enabled formats.
Changes in V2:
- Use drm_get_format_name() in the logs (Sean)
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sravanthi Kollukuduru [Wed, 22 Aug 2018 17:49:56 +0000 (23:19 +0530)]
drm/msm/dpu: enable cursor plane on dpu
Reserve DMA pipe for cursor plane and attach it to the
crtc during the initialization.
Changes in V2:
None
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephen Boyd [Thu, 16 Aug 2018 23:36:16 +0000 (16:36 -0700)]
drm/msm/disp/dpu: Use proper define for drm_encoder_init() 'encoder_type'
We got a bug report that this function oopses when trying to do a kasprintf().
PC is at string+0x2c/0x60
LR is at vsnprintf+0x28c/0x4ec
pc : [<
ffffff80088d35d8>] lr : [<
ffffff80088d5fc4>] pstate:
a0c00049
sp :
ffffff80095fb540
x29:
ffffff80095fb540 x28:
ffffff8008ad42bc
x27:
00000000ffffffd8 x26:
0000000000000000
x25:
ffffff8008c216c8 x24:
0000000000000000
x23:
0000000000000000 x22:
ffffff80095fb720
x21:
0000000000000000 x20:
ffffff80095fb720
x19:
ffffff80095fb6f0 x18:
000000000000000a
x17:
00000000b42ba473 x16:
ffffff800805bbe8
x15:
00000000000a157d x14:
000000000000000c
x13:
0000000000000000 x12:
0000ffff0000000f
x11:
0000000000000003 x10:
0000000000000001
x9 :
0000000000000040 x8 :
000000000000001c
x7 :
ffffffffffffffff x6 :
0000000000000000
x5 :
0000000000000228 x4 :
0000000000000000
x3 :
ffff0a00ffffff04 x2 :
0000000000007961
x1 :
0000000000000000 x0 :
0000000000000000
Process kworker/3:1 (pid: 61, stack limit = 0xffffff80095f8000)
Call trace:
Exception stack(0xffffff80095fb400 to 0xffffff80095fb540)
b400:
0000000000000000 0000000000000000 0000000000007961 ffff0a00ffffff04
b420:
0000000000000000 0000000000000228 0000000000000000 ffffffffffffffff
b440:
000000000000001c 0000000000000040 0000000000000001 0000000000000003
b460:
0000ffff0000000f 0000000000000000 000000000000000c 00000000000a157d
b480:
ffffff800805bbe8 00000000b42ba473 000000000000000a ffffff80095fb6f0
b4a0:
ffffff80095fb720 0000000000000000 ffffff80095fb720 0000000000000000
b4c0:
0000000000000000 ffffff8008c216c8 0000000000000000 00000000ffffffd8
b4e0:
ffffff8008ad42bc ffffff80095fb540 ffffff80088d5fc4 ffffff80095fb540
b500:
ffffff80088d35d8 00000000a0c00049 ffffff80095fb550 ffffff80080d06a4
b520:
ffffffffffffffff ffffff80088d5e0c ffffff80095fb540 ffffff80088d35d8
[<
ffffff80088d35d8>] string+0x2c/0x60
[<
ffffff80088d5fc4>] vsnprintf+0x28c/0x4ec
[<
ffffff80083973b8>] kvasprintf+0x68/0x100
[<
ffffff800839755c>] kasprintf+0x60/0x80
[<
ffffff800849cc24>] drm_encoder_init+0x134/0x164
[<
ffffff80084d9a7c>] dpu_encoder_init+0x60/0x94
[<
ffffff80084eced0>] _dpu_kms_drm_obj_init+0xa0/0x424
[<
ffffff80084ed870>] dpu_kms_hw_init+0x61c/0x6bc
[<
ffffff80084f7614>] msm_drm_bind+0x380/0x67c
[<
ffffff80085114e4>] try_to_bring_up_master+0x228/0x264
[<
ffffff80085116e8>] component_master_add_with_match+0x90/0xc0
[<
ffffff80084f722c>] msm_pdev_probe+0x260/0x2c8
[<
ffffff800851a910>] platform_drv_probe+0x58/0xa8
[<
ffffff80085185c8>] driver_probe_device+0x2d8/0x40c
[<
ffffff8008518928>] __device_attach_driver+0xd4/0x10c
[<
ffffff800851644c>] bus_for_each_drv+0xb4/0xd0
[<
ffffff8008518230>] __device_attach+0xd0/0x160
[<
ffffff8008518984>] device_initial_probe+0x24/0x30
[<
ffffff800851744c>] bus_probe_device+0x38/0x98
[<
ffffff8008517aac>] deferred_probe_work_func+0x144/0x148
[<
ffffff80080c8654>] process_one_work+0x218/0x3bc
[<
ffffff80080c883c>] process_scheduled_works+0x44/0x48
[<
ffffff80080c95bc>] worker_thread+0x288/0x32c
[<
ffffff80080cea30>] kthread+0x134/0x13c
[<
ffffff8008084750>] ret_from_fork+0x10/0x18
Code:
910003fd 2a0403e6 eb0400ff 54000060 (
38646845)
Looking at the code I see that drm_encoder_init() is called from the DPU
code with 'DRM_MODE_CONNECTOR_DSI' passed in as the 'encoder_type'
argument (follow from _dpu_kms_initialize_dsi()). That corresponds to
the integer 16. That is then indexed into drm_encoder_enum_list in
drm_encoder_init() to look up the name of the encoder. If you're still
following along, that's an encoder not a connector! We really want to
use DRM_MODE_ENCODER_DSI (integer 6) instead of DRM_MODE_CONNECTOR_DSI
here, or we'll go out of bounds of the encoder array. Pass the right
thing and everything is fine.
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Cc: Jordan Crouse <jcrouse@codeaurora.org>
Cc: Sean Paul <seanpaul@chromium.org>
Fixes: 25fdd5933e4c (drm/msm: Add SDM845 DPU support)
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 30 Jul 2018 15:26:55 +0000 (11:26 -0400)]
drm/msm: Don't fail bind if nothing connected to dsi
If there is no bridge or panel connected to a dsi node, don't fail the
entire msm bind. Just ignore the dsi block and move on.
Cc: Doug Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 30 Jul 2018 15:26:54 +0000 (11:26 -0400)]
drm/msm: dsi: Return errors whan dt parsing fails
If dt parsing fails, we should return an error instead of pretending
everything completed successfully.
Cc: Doug Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 30 Jul 2018 15:26:53 +0000 (11:26 -0400)]
drm/msm: dsi: Initialize msm_dsi->id to -1
Currently msm_dsi->id is initialized to 0 during kzalloc. If bind fails
for a secondary dsi device before its id can be properly set (such as
during dt parsing), the id will point to the primary dsi device, causing
its reference to be removed from dsi_manager's global (msm_dsim_glb)
array.
This patch initializes the id to -1 and checks for negative in the
manager cleanup.
Cc: Doug Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Dave Airlie [Thu, 4 Oct 2018 00:19:33 +0000 (10:19 +1000)]
Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next
Mostly code reorganizations and optimizations for vmwgfx.
- Move TTM code that's only used by vmwgfx to vmwgfx
- Break out the vmwgfx buffer- and resource validation code to a separate source file
- Get rid of a number of atomic operations during command buffer validation.
From: Thomas Hellstrom <thellstrom@vmware.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180928131157.2810-1-thellstrom@vmware.com
Neil Armstrong [Fri, 28 Sep 2018 12:05:55 +0000 (14:05 +0200)]
drm/fb_helper: Allow leaking fbdev smem_start
Since "drm/fb: Stop leaking physical address", the default behaviour of
the DRM fbdev emulation is to set the smem_base to 0 and pass the new
FBINFO_HIDE_SMEM_START flag.
The main reason is to avoid leaking physical addresse to user-space, and
it follows a general move over the kernel code to avoid user-space to
manipulate physical addresses and then use some other mechanisms like
dma-buf to transfer physical buffer handles over multiple subsystems.
But, a lot of devices depends on closed sources binaries to enable
OpenGL hardware acceleration that uses this smem_start value to
pass physical addresses to out-of-tree modules in order to render
into these physical adresses. These should use dma-buf buffers allocated
from the DRM display device instead and stop relying on fbdev overallocation
to gather DMA memory (some HW vendors delivers GBM and Wayland capable
binaries, but older unsupported devices won't have these new binaries
and are doomed until an Open Source solution like Lima finalizes).
Since these devices heavily depends on this kind of software and because
the smem_start population was available for years, it's a breakage to
stop leaking smem_start without any alternative solutions.
This patch adds a Kconfig depending on the EXPERT config and an unsafe
kernel module parameter tainting the kernel when enabled.
A clear comment and Kconfig help text was added to clarify why and when
this patch should be reverted, but in the meantime it's a necessary
feature to keep.
Cc: Dave Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Ben Skeggs <skeggsb@gmail.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Dave Airlie <airlied@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1538136355-15383-1-git-send-email-narmstrong@baylibre.com
Ayan Kumar Halder [Tue, 10 Jul 2018 13:18:55 +0000 (14:18 +0100)]
drm/arm/malidp: Implemented the size validation for AFBC framebuffers
AFBC buffers include additional metadata which increases the required
allocation size. Implement the appropriate size validation and sanity
checking for AFBC buffers.
Added malidp specific function for framebuffer creation. This checks
if the framebuffer has AFBC modifiers and if so, it verifies the
necessary constraints on the size, alignment, offsets and pitch.
Changes from v2:
- Replaced DRM_ERROR() with DRM_DEBUG_KMS() in
malidp_verify_afbc_framebuffer_caps() and malidp_verify_afbc_framebuffer_size()
Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Reviewed-by: Brian Starkey <brian.starkey@arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Liviu Dudau [Tue, 2 Oct 2018 11:11:00 +0000 (12:11 +0100)]
drm/arm/malidp: Validate rotations for compressed/uncompressed framebuffers for each layer
Add support for compressed framebuffers that are described using
the framebuffer's modifier field. Mali DP uses the rotation memory for
the decompressor of the format, so we need to check for space when
the modifiers are present.
Signed-off-by: Ayan Kumar Halder <ayan.halder@arm.com>
Reviewed-by: Brian Starkey <brian.starkey@arm.com>
[re-worded commit, rebased, cleaned up duplicated checks for
RGB888 and BGR888 and removed additional parameter for
rotmem_required function hook]
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Jamie Fox [Mon, 1 Oct 2018 13:39:07 +0000 (14:39 +0100)]
drm/malidp: Enable MMU prefetch on Mali-DP650
Mali-DP650 supports warming up the SMMU translations, by sending
requsts to the SMMU before a buffer is read.
There are two modes supported:
- PARTIAL: could be enabled when the buffer is composed of 4K or 64K
pages, the display hardware will send a configurable number of
requests before the actual reading.
- FULL: could be enabled when the buffer is composed of 1M or 2M
pages, the display hardware will send requests before reading for
all pages composing the buffer.
This patch adds a mechanism for detecting the page size and set the
MMU prefetch mode if possible.
Changes since v1:
- For imported buffers use the already populated
drm_gem_cma_object.sgt instead of calling
driver.gem_prime_get_sg_table, which works just for buffers
allocated through the gem_cma API.
Signed-off-by: Jamie Fox <jamie.fox@arm.com>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
[rebased and re-ordered functions]
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Lowry Li [Fri, 31 Aug 2018 11:35:30 +0000 (19:35 +0800)]
drm/mali-dp: Implement plane alpha and pixel blend on malidp
Checks the pixel blending mode and plane alpha value when
do the plane_check. Mali DP supports blending the current plane
with the background either based on the pixel alpha blending
mode or by using the layer's alpha value, but not both at the
same time. If both case, plane_check will return failed.
Sets the HW when doing plane_update accordingly. If plane alpha
is the 0xffff, set the pixel blending bits accordingly. If not
we'd set ALPHA bit as zero and layer alpha value.
Changes since v1:
- Introduces to use it in the malidp driver, which depends on
the plane alpha patch
Changes since v2:
- Refines the comments of drm/mali-dp patchset
Changes since v3:
- Adds hardware limitation check
Changes since v4:
- Updates on drm/malidp, hardware limitation check only when
the format has alpha pixel.
- Rebases on drm-misc-next.
Signed-off-by: Lowry Li <lowry.li@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Alexandru Gheorghe [Fri, 21 Sep 2018 13:39:44 +0000 (14:39 +0100)]
drm/malidp: Fix smart layer when doing pm_suspend/resume
Smart layer enable rectangles is set to 1 when the driver is probed,
however when doing pm_suspend the value is lost and it's not set again
making the SMART_LAYER unusable, fix that by initializing the number
of rectangles everytime we do a plane update.
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Alexandru Gheorghe [Wed, 22 Aug 2018 15:18:19 +0000 (16:18 +0100)]
drm/malidp: Fix writeback in NV12
When we want to writeback to memory in NV12 format we need to program
the RGB2YUV coefficients. Currently, we don't program the coefficients
and NV12 doesn't work at all.
This patchset fixes that by programming a sane default(bt709, limited
range) as rgb2yuv coefficients.
In the long run, probably we need to think of a way for userspace to
be able to program that, but for now I think this is better than not
working at all or not advertising NV12 as a supported format for
memwrite.
Changes since v1:
- Write the rgb2yuv coefficients only once, since we don't change
them at all, just write them the first time NV12 is programmed,
suggested by Brian Starkey, here [1]
[1] https://lists.freedesktop.org/archives/dri-devel/2018-August/186819.html
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Alexandru Gheorghe [Mon, 16 Jul 2018 10:07:07 +0000 (11:07 +0100)]
drm: mali-dp: Call drm_crtc_vblank_reset on device init
Currently, if userspace calls drm_wait_vblank before the crtc is
activated the crtc vblank_enable hook is called, which in case of
malidp driver triggers some warninngs. This happens because on
device init we don't inform the drm core about the vblank state
by calling drm_crtc_vblank_on/off/reset which together with
drm_vblank_get have some magic that prevents calling drm_vblank_enable
when crtc is off.
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
Tomi Valkeinen [Wed, 26 Sep 2018 10:02:56 +0000 (13:02 +0300)]
drm/omap: fix use of freed memory
omap_connector_destroy() does:
kfree(omap_connector);
omapdss_device_put(omap_connector->output);
omapdss_device_put(omap_connector->display);
Fix this by moving the kfree after the omapdss_device_puts.
This bug was introduced in
949ea2ef3fed4e1d0f9b80ec21ed81a9833ac248
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thomas Zimmermann [Mon, 18 Jun 2018 13:07:27 +0000 (15:07 +0200)]
drm/omap: Replace drm_dev_unref with drm_dev_put
This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.
Signed-off-by: Thomas Zimmermann <tdz@users.sourceforge.net>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Thomas Zimmermann [Mon, 18 Jun 2018 13:07:26 +0000 (15:07 +0200)]
drm/omap: Replace drm_gem_object_unreference_unlocked with put function
This patch unifies the naming of DRM functions for reference counting
of struct drm_gem_object. The resulting code is more aligned with the
rest of the Linux kernel interfaces.
Signed-off-by: Thomas Zimmermann <tdz@users.sourceforge.net>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Thomas Zimmermann [Mon, 18 Jun 2018 13:07:25 +0000 (15:07 +0200)]
drm/omap: Replace drm_gem_object_{un/reference} with put,get functions
This patch unifies the naming of DRM functions for reference counting
of struct drm_gem_object. The resulting code is more aligned with the
rest of the Linux kernel interfaces.
Signed-off-by: Thomas Zimmermann <tdz@users.sourceforge.net>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Ayan Kumar Halder [Tue, 17 Jul 2018 17:13:45 +0000 (18:13 +0100)]
drm/omap: Substitute format_is_yuv() with format->is_yuv
drm_format_info table has a field 'is_yuv' to denote if the format
is yuv or not. The driver is expected to use this instead of
having a function for the same purpose.
Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Wed, 26 Sep 2018 09:11:30 +0000 (12:11 +0300)]
drm/omap: partial workaround for DRA7xx DMM errata i878
Errata i878 says that MPU should not be used to access RAM and DMM at
the same time. As it's not possible to prevent MPU accessing RAM, we
need to access DMM via a proxy.
This patch changes DMM driver to access DMM registers via sDMA. Instead
of doing a normal readl/writel call to read/write a register, we use
sDMA to copy 4 bytes from/to the DMM registers.
This patch provides only a partial workaround for i878, as not only DMM
register reads/writes are affected, but also accesses to the DMM mapped
buffers (framebuffers, usually).
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Peter Ujfalusi [Wed, 26 Sep 2018 09:11:29 +0000 (12:11 +0300)]
drm/omap: dmm_tiler: Fix interrupt request/free sequence during probe/remove
The interrupts should be enabled after the driver initialization to avoid
early interrupts while the driver is not yet ready to handle them.
On removal the interrupts must be disabled before other resources are
released, freed up.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Peter Ujfalusi [Wed, 26 Sep 2018 09:11:28 +0000 (12:11 +0300)]
drm/omap: dmm_tiler: No need to check if irq is valid in omap_dmm_remove
The driver probe would fail if the irq is not available.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tomi Valkeinen [Wed, 26 Sep 2018 09:11:27 +0000 (12:11 +0300)]
drm/omap: fix memory barrier bug in DMM driver
A DMM timeout "timed out waiting for done" has been observed on DRA7
devices. The timeout happens rarely, and only when the system is under
heavy load.
Debugging showed that the timeout can be made to happen much more
frequently by optimizing the DMM driver, so that there's almost no code
between writing the last DMM descriptors to RAM, and writing to DMM
register which starts the DMM transaction.
The current theory is that a wmb() does not properly ensure that the
data written to RAM is observable by all the components in the system.
This DMM timeout has caused interesting (and rare) bugs as the error
handling was not functioning properly (the error handling has been fixed
in previous commits):
* If a DMM timeout happened when a GEM buffer was being pinned for
display on the screen, a timeout error would be shown, but the driver
would continue programming DSS HW with broken buffer, leading to
SYNCLOST floods and possible crashes.
* If a DMM timeout happened when other user (say, video decoder) was
pinning a GEM buffer, a timeout would be shown but if the user
handled the error properly, no other issues followed.
* If a DMM timeout happened when a GEM buffer was being released, the
driver does not even notice the error, leading to crashes or hang
later.
This patch adds wmb() and readl() calls after the last bit is written to
RAM, which should ensure that the execution proceeds only after the data
is actually in RAM, and thus observable by DMM.
The read-back should not be needed. Further study is required to understand
if DMM is somehow special case and read-back is ok, or if DRA7's memory
barriers do not work correctly.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>