Ashok Kumar Reddy [Sat, 8 Sep 2012 12:26:51 +0000 (17:56 +0530)]
mx6qsabrelite:Use IMX_GPIO_NR Macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Stefano Babic [Wed, 5 Sep 2012 20:16:36 +0000 (20:16 +0000)]
MX: set a common place to share code for Freescale i.MX
Up now only MX5 and MX6 can share code, because they have
a common source directory in cpu/armv7. Other not armv7
i.MX can profit of the same shared code. Move these files
into a directory accessible for all, similar to plat-mxc
in linux.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Ashok Kumar Reddy [Wed, 5 Sep 2012 16:39:37 +0000 (22:09 +0530)]
ima3-mx53:Rename CONFIG_PRIME => CONFIG_ETHPRME, remove
unused macro CONFIG_DISCOVER_PHY
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 21 Aug 2012 11:06:03 +0000 (11:06 +0000)]
mx31: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX31 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Helmut Raiger <helmut.raiger@hale.at>
Marek Vasut [Fri, 31 Aug 2012 16:18:10 +0000 (16:18 +0000)]
MX28: MMC: Avoid DMA DCache race condition
This patch prevents dcache-related problem. The problem manifested
itself on the SPI driver, this is just a port to the MMC driver.
The scenario is the same. In case an "mmc read" is issued to a
buffer which was written right before it and data cache is enabled,
the cache eviction might happen during the DMA transfer into the
buffer, therefore corrupting the buffer. Clear any cache lines that
might contain the buffer to prevent such issue.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Fri, 31 Aug 2012 16:08:00 +0000 (16:08 +0000)]
MX28: SPI: Fix the DMA chaining
It turns out that in order for the SPI DMA to properly support
continuous transfers longer than 65280 bytes, there are some very
important parts that were left out from the documentation.
Firstly, the XFER_SIZE register is not written with the whole length
of a transfer, but is written by each and every chained descriptor
with the length of the descriptors data buffer.
Next, unlike the demo code supplied by FSL, which only writes one PIO
word per descriptor, this does not apply if the descriptors are chained,
since the XFER_SIZE register must be written. Therefore, it is essential
to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are
written with zero, since they don't apply. The DMA programs the PIO words
in an incrementing order, so four PIO words.
Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC
must not be set during the whole transfer, but it must be set only on the
last descriptor in the chain.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Fri, 31 Aug 2012 16:07:59 +0000 (16:07 +0000)]
MX28: SPI: Fix the DMA DCache race condition
This patch fixes dcache-related problem. The problem manifested
when dcache was enabled and the following command issued twice:
mw 0x42000000 0 0x4000 ; sf probe ; sf read 0x42000000 0x0 0x10000 ; sha1sum 0x42000000 0x10000
The SHA1 checksum was correct during the first call. Yet with
every subsequent call of the above command, it differed and was
wrong.
It turns out this was because of a race condition. On the first
time the command was called, no cacheline contained any data from
the destination memory location. The DMA transfered data into the
location and the cache above the location was invalidated. Then the
checksum was computed, but that meant the data were loaded into data
cache.
On any subsequent call, the DMA again transfered data into the same
destination. Yet during the transfer, some of the DCache lines were
evicted and written back into the main memory. Once the DMA transfer
completed, the data cache was invalidated over the memory location as
usual. But the data that were to be loaded back into the data cache
by subsequent SHA1 checksuming were corrupted.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 08:43:47 +0000 (08:43 +0000)]
Fix mx31_decode_pll
The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 21 Aug 2012 11:07:54 +0000 (11:07 +0000)]
mx35 timer: Switch to 32-kHz source
Switch the mx35 timer driver to the 32-kHz clock source to avoid calling
mxc_get_clock() again and again, and to be consistent with the timer drivers of
other i.MX SoCs.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 21 Aug 2012 11:07:20 +0000 (11:07 +0000)]
mx35: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX35 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 21 Aug 2012 11:05:12 +0000 (11:05 +0000)]
mx25: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX25 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Matthias Weisser <weisserm@arcor.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 10:33:27 +0000 (10:33 +0000)]
mx35: Fix clock dividers
The clock dividers that were used do not match at all the reference manual. They
were either completely broken, or came from an early silicon revision
incompatible with the current one.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 10:33:06 +0000 (10:33 +0000)]
mx35: Add definitions for clock gate values
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 10:32:54 +0000 (10:32 +0000)]
mx35: Fix decode_pll
The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Matt Sealey [Thu, 23 Aug 2012 04:52:33 +0000 (04:52 +0000)]
efikamx: refine USB support
Because of the way USB pad settings are handled it doesn't make sense to
be able to build the Efika MX board support without CONFIG_CMD_USB turned
on. So, we change the build to always compile in USB support.
We do not need to check for CONFIG_CMD_USB like we do with CONFIG_MXC_SPI
since the USB subsystem will error out of the compile for us.
Additionally, the following behaviors have changed;
* Smartbook "preboot" should not set input and output to USB keyboard as
there is no display support
* board_eth_init is implemented such that it does not cause U-Boot to
report an explicit failure ("CPU Net Initialization Failed").
Since Ethernet is implemented via USB (fixed on Smarttop, pluggable on
Smartbook, and handled by "usb start") - the warning that is left
("No ethernet found") is perfectly reasonable at the point it is printed
since the USB system hasn't been started and nothing has been probed yet.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 30 Aug 2012 13:41:15 +0000 (13:41 +0000)]
SCSPS1: Enable caches
Enable caches, make it faster!
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Fabio Estevam [Wed, 29 Aug 2012 06:20:03 +0000 (06:20 +0000)]
mx28evk: Add USB Ethernet support
Add USB Ethernet support.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 28 Aug 2012 15:15:53 +0000 (15:15 +0000)]
MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDS
Use proper struct-based access for this register in the SPL code.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 28 Aug 2012 15:15:52 +0000 (15:15 +0000)]
MX28: Cleanup mxsboot within make mrproper
Delete the "mxsboot" binary if make mrproper is called.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 28 Aug 2012 15:12:48 +0000 (15:12 +0000)]
M28: Fix the use of gpmi-nand in mtdparts
The mtd name of the NAND in Linux is "gpmi-nand", not "gpmi-nand.0" as
it would be expected, since the controller doesn't support multiple NANDs
attached to it as of now. Rectify this flub by adjusting default mtdparts.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Tue, 28 Aug 2012 09:29:06 +0000 (09:29 +0000)]
mx28evk: Convert to mxs_adjust_memory_params()
Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params
missed to update mx28evk, which caused the board not to boot.
Apply the conversion so that the board can boot again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Otavio Salvador [Mon, 27 Aug 2012 23:56:41 +0000 (23:56 +0000)]
MX28: mx28evk: Enable SPI DMA
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Otavio Salvador [Mon, 27 Aug 2012 23:56:40 +0000 (23:56 +0000)]
MX28: mx28evk: Align SSP clock speed
Align the SSP clock speed with oscilator to achieve higher transfer
stability.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Michael Walle [Mon, 30 Jul 2012 10:47:12 +0000 (10:47 +0000)]
lsxl: support power switch
This patch restores the Linkstation's original behaviour when powering off.
Once the (soft) power switch is turned off, linux will reboot and the
bootloader turns off HDD and USB power. Then it loops as long as the switch
is in the off position, before continuing the boot process again.
Additionally, this patch fixes the board function set_led(LED_OFF).
Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Karl O. Pinc [Thu, 2 Aug 2012 16:51:56 +0000 (16:51 +0000)]
cosmetic: Better explain how to use the kirkwood kwbimage.cfg file.
Hi,
This adds to the documenation to explain how to use the
kwbimage.cfg file necessary to generate an image with
prefixed board setup values necessary for the kirkwood
boards.
Signed-off-by: Karl O. Pinc <kop@meme.com>
Karl O. Pinc [Thu, 2 Aug 2012 16:09:32 +0000 (16:09 +0000)]
Cosmetic doc typo fixes to the kwbimage feature docs
Signed-off-by: Karl O. Pinc <kop@meme.com>
Holger Brunck [Thu, 9 Aug 2012 01:37:47 +0000 (01:37 +0000)]
arm/km: remove unused code
For some reasons we had an own implementaion of dram_init and
dram_init_banksize. This is not needed anymore, use the standard
kirkwood functions instead.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Valentin Longchamp [Tue, 14 Aug 2012 01:37:11 +0000 (01:37 +0000)]
arm/km: fix frequency of the SPI NOR Flash
According to our last HW measures, this could be raised while still
compatible with the potential delays on the lines.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Valentin Longchamp [Tue, 14 Aug 2012 01:16:36 +0000 (01:16 +0000)]
km/ivm: fix string len check to support 7 char board names
The fanless boards now have a 7-digit (XXXXX-F) board name. This
triggers a border condition when reading this string in the IVM although
this string is smaller than the currenly read string size, but only by 1
character.
This patch corrects this by changing the size check condition for string
length. It is the same change that was done in the platform for this
same bug.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Stefan Bigler <stefan.bigler@keymile.com>
Valentin Longchamp [Wed, 15 Aug 2012 05:31:49 +0000 (05:31 +0000)]
kw_spi: fix clock prescaler computation
The computation was not correct with low clock values: setting a 1MHz
clock would result in an overlap that would then configure a 25Mhz
clock.
This patch implements a correct computation method according to the
kirkwood functionnal spec. table 600 (Serial Memory Interface
Configuration Register).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Valentin Longchamp [Tue, 14 Aug 2012 01:39:10 +0000 (01:39 +0000)]
km/arm: set SPI NOR Flash default parameters
These parameters are used by the the sf probe command that are used by
our update script and they therefore need to be set for all of our
boards.
The timing is the same as for the ENV SPI NOR Flash (since it's the
same physical device) and takes the boco2 delay on the bus into account.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Albert ARIBAUD [Thu, 16 Aug 2012 06:35:21 +0000 (06:35 +0000)]
edminiv2: orion5x: fix GPIO inits and values
Orion5x did not actually write GPIO output values
or input polarities, and ED Mini V2 had bad or
missing values for GPIO settings.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
Wolfgang Denk [Sat, 1 Sep 2012 22:44:09 +0000 (00:44 +0200)]
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
tx25: Use generic gpio_* calls
config: Always use GNU ld
tools: add kwboot binary to .gitignore file
fdt: Include arch specific gpio.h instead of asm-generic/gpio.h
serial: CONSOLE macro is not used
Conflicts:
board/karo/tx25/tx25.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wu, Josh [Thu, 23 Aug 2012 00:05:38 +0000 (00:05 +0000)]
at91: 9x5: Enable PMECC for 5series ek board.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Wu, Josh [Thu, 23 Aug 2012 00:05:37 +0000 (00:05 +0000)]
at91: 9x5: change SMC config timing that both works for PMECC & non-PMECC.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Tested-by: voice.shen@atmel.com
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Wu, Josh [Thu, 23 Aug 2012 00:05:36 +0000 (00:05 +0000)]
at91: atmel_nand: Update driver to support Programmable Multibit ECC controller
The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.
To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.
This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Wu, Josh [Thu, 23 Aug 2012 00:05:35 +0000 (00:05 +0000)]
at91: atmel_nand: remove unused variables.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Wu, Josh [Thu, 23 Aug 2012 00:05:34 +0000 (00:05 +0000)]
at91: atmel_nand: extract HWECC initialization code into one function: atmel_hw_nand_init_param().
This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Sun, 19 Aug 2012 20:32:24 +0000 (20:32 +0000)]
atmel: at91sam9x5: add spi flash boot support
Add at91sam9x5 series spi flash boot support
Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321
serial flash
SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on
atmel_spi patch, or else, it will occur receive overrun
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Mon, 27 Aug 2012 00:04:34 +0000 (00:04 +0000)]
arm: sam9g10/sam9m10g45: remove CONFIG_ARCH_CPU_INIT
Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on TOT]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Thu, 16 Aug 2012 06:01:51 +0000 (06:01 +0000)]
arm:at91-boards: remove console_init_f where unnecessary
A lot of at91 boards have the console_init_f in board_init. This is useless
cause it was called before by generic code in lib/board.c.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Jens Scharsig <esw@bus-elektronik.de>
cc: Stelian Pop <stelian@popies.net>
cc: Sedji Gaouaou<sedji.gaouaou@atmel.com>
cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
cc: Eric Benard <eric@eukrea.com>
Tested-by: voice.shen@atmel.com
Tested-by: voice.shen@atmel.com
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Andreas Bießmann [Wed, 15 Aug 2012 22:18:56 +0000 (22:18 +0000)]
at91sam9263ek: remove unnecessary console_init_f
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Stelian Pop <stelian@popies.net>
Bo Shen [Sun, 19 Aug 2012 20:32:22 +0000 (20:32 +0000)]
spi: atmel: add WDRBT bit to avoid receive overrun
The atmel at91sam9x5 series spi has feature to avoid receive overren
Using the patch to enable it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Sun, 19 Aug 2012 20:32:23 +0000 (20:32 +0000)]
atmel: at91sam9x5: fix name error for spi
Fix the name error
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Sun, 19 Aug 2012 23:01:50 +0000 (23:01 +0000)]
Take over the maintainer for sam9g10 and sam9m10g45
As the maintainer for at91sam9g10ek and at91sam9m10g45ek can not reach
any more.
So I wish to take over the maintainer for sam9g10 and sam9m10g45
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Wed, 15 Aug 2012 18:44:27 +0000 (18:44 +0000)]
arm : at91sam9x5 : fix a small bug for NAND
fix a bug:
when not boot from NAND, the NAND flash can not be detected.
Using this to fix it
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Xu, Hong [Tue, 2 Aug 2011 01:05:04 +0000 (01:05 +0000)]
AT91: Small fix on AT91 USART initialization code
Before reset dbgu transmitter, we just wait TXEMPTY to drain the
transmitter register(Just in case). If not doing this, we may sometimes
see several weird characters from DBGU.
A short delay is also added to make sure the new serial settings are
settled.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
[cherry-picked from u-boot-atmel/old-next]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Thu, 28 Jun 2012 02:32:32 +0000 (02:32 +0000)]
at91sam9263ek: fix 'update' script
The old update script uses 'load_addr' which is never set. Use 'fileaddr'
instead which is automagically set by e.g. dhcp.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Stelian Pop <stelian@popies.net>
Bo Shen [Tue, 14 Aug 2012 16:48:05 +0000 (16:48 +0000)]
ARM : at91sam9x5 : Remove CONFIG_ARCH_CPU_INIT
Remove CONFIG_ARCH_CPU_INIT, no need it anymore
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Benoît Thébaudeau [Mon, 13 Aug 2012 07:28:16 +0000 (07:28 +0000)]
fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Benoît Thébaudeau [Mon, 13 Aug 2012 07:27:58 +0000 (07:27 +0000)]
mxc: Define architecture identifier
Define ARCH_MXC for i.MX devices. This is useful to identify features or
behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like imx/mxc
vs. mxs in Linux).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Kim Phillips <kim.phillips@freescale.com>
Stefano Babic [Tue, 28 Aug 2012 03:10:51 +0000 (03:10 +0000)]
MX5: efikamx: substitutes GPIO_NUMBER with IMX_GPIO_NR
The macro to get the gpio number id was renamed to
IMX_GPIO_NR as in kernel. Fix the wrong name in efika.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matt Sealey <matt@genesi-usa.com>
Acked-by: Matt Sealey <matt@genesi-usa.com>
Ashok Kumar Reddy [Tue, 28 Aug 2012 02:09:38 +0000 (07:39 +0530)]
mx5:Use IMX_GPIO_NR macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Matt Sealey [Fri, 24 Aug 2012 06:44:24 +0000 (06:44 +0000)]
efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot
We have no idea where the DCD was derived from for Smartbook support, but they
differ from the Smarttop settings, MX51EVK settings and certainly don't
correspond to any shipped or development version of U-Boot that Genesi has ever
had on any Smartbook.
So, copy the calibrated, verified settings from the U-Boot as shipped with every
Smartbook since retail production. Remove those few settings that just set the
POR defaults which have already been confirmed for the previous Smarttop DCD
change.
One of the lines is specific to i.MX51 TO3 designs and therefore TO2 Smartbooks
will possibly not work so reliably with this new DCD; that said, TO2 Smartbooks
basically don't exist at retail and the number of units in the world is less
than 5 (3 of which are at the Genesi office or owned by Genesi employees).
Many hours of memory testing confirms the new settings are stable.
Patch v2:
* picked the correct commit from our development tree, correcting tuned DDR ODF setting
(which was correct anyway)
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Matt Sealey [Mon, 27 Aug 2012 05:58:30 +0000 (05:58 +0000)]
efikamx: update to Efika MX Smarttop and Smartbook boards
This is a rework of a previously submitted patchset and bundles the
main board support and USB support into a single commit.
It requires the patch "mx5: add iomux-mx51.h include"
* Use iomux-mx51.h include to simplify board configuration.
* Simplify LED support (remove efikamx_toggle_led, change lit LEDs).
* Simplify MMC support for CD and WP pin differences.
* Fix broken CPU voltage setting - comment said 1.1V but the code set to
1.2V. It should never have been set to 1.2V even on i.MX51 TO2 and
all available Linux kernels would drop the voltage to 1.1V anyway and
work reliably. This should lower power consumption during the boot
process.
* Function renames for readability.
* Some board identification string changes to match actual product names.
* Passes checkpatch (v2)
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
fabio.estevam@freescale.com [Wed, 22 Aug 2012 10:10:11 +0000 (10:10 +0000)]
mxs: Convert timeout parameter to 'unsigned int'
For representing a timeout value, it makes more sense to pass it as
'unsigned int'.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Thu, 23 Aug 2012 04:56:19 +0000 (04:56 +0000)]
efikamx: update MAINTAINERS for Genesi Efika MX systems
Update maintainer for "efikamx" and "efikasb" to myself.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:25:40 +0000 (09:25 +0000)]
efikamx: configure Smarttop PCBID and LED pads in DCD for convenience
PCBID pads seem to need time to settle due to external pulldowns, otherwise
we are reading floating GPIO pins with implicit pad pullups and get the wrong
data. However we can't "wait" at the time we need them before relocation,
since timers are not available. The time taken to get from DCD to the code
requiring the pads set seems to be more than long enough (even with caches
enabled).
We have space in the DCD due to the DDR settings changes to configure all
the pad settings we need for this, plus the LED pad settings too which
reduces the amount of code required later on.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:25:39 +0000 (09:25 +0000)]
efikamx: remove drive strength function and roll its functionality into the DCD
Efika MX boards configure their DDR pad settings twice, one in the DCD generated
from imximage_*.cfg and again in init_drive_strength called before relocation.
Rather than doing this, roll the changes it makes into the DCD so DDR is set up
before a single line of code in U-Boot is run.
The settings are identical with this DCD block which is shorter (by 7 entries)
than the old one, and after the output of init_drive_strength since a lot of the
functionality in the existing DCD and init_drive_strength function was just
setting the POR defaults. This goes to explain some now-missing entries.
Several hundred rounds of mtest have been run to test the settings before and
after to confirm DDR is stable and no ill-effects have been found.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:25:38 +0000 (09:25 +0000)]
efikamx: move and rename Efika MX directories and config files to prepare for new boards
* Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory
* Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 21 Aug 2012 16:17:29 +0000 (16:17 +0000)]
MX28: m28evk: Enable SPI DMA
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 21 Aug 2012 16:17:28 +0000 (16:17 +0000)]
MX28: m28evk: Align SSP clock speed
Align the SSP clock speed with oscilator to achieve
higher transfer stability.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 21 Aug 2012 16:17:27 +0000 (16:17 +0000)]
MX28: SPI: Supercharge the SPI driver
This change implements DMA chaining into SPI driver. This allows
the transfers to go much faster, while also fixing SF issues.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 21 Aug 2012 16:17:26 +0000 (16:17 +0000)]
MX28: DMA: Prolong the DMA timeout
Load from SPI flash can create a long DMA chain, which can take long
time to transfer. Change the DMA timeout to roughly 10s to prevent
such long chains misreporting errors.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Tue, 21 Aug 2012 16:17:25 +0000 (16:17 +0000)]
MX28: DMA: Align the struct mxs_dma_desc
Align this structure to DMA alignment size.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Ashok Kumar Reddy [Thu, 23 Aug 2012 15:31:34 +0000 (21:01 +0530)]
mx6qarm2:Use IMX_GPIO_NR macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
trem [Sat, 25 Aug 2012 05:30:34 +0000 (05:30 +0000)]
imx27lite: update with gpio api change (v4)
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
trem [Sat, 25 Aug 2012 05:30:33 +0000 (05:30 +0000)]
gpio: add gpio api support to mx27 (v4)
The gpio api has been tested on an armadeus apf27.
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:24:06 +0000 (09:24 +0000)]
mx5: add iomux-mx51.h include
Allow usage of the imx-common/iomux-v3.h framework by including pad settings
for the i.MX51. The content of the file is taken from Linux kernel at
commit
5d23b39 plus the required changes to make it work in U-Boot.
The contained pad settings are the minimum required to make an Efika MX boot
and get all the currently-implemented peripherals working in U-Boot.
It is recommended that this file not be just a dumping ground for pins but
only contain the settings required for all the boards using it.
Changes for v2:
* reference commit id from Linux kernel
* additionally roll in the USB pads
* removed GPIO_NUMBER define
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Otavio Salvador [Sun, 19 Aug 2012 04:58:30 +0000 (04:58 +0000)]
mxs: Rename 'mx28_dram_init' to 'mxs_dram_init'
The DRAM initialization, after SPL has complete, is exactly the same
for all mxs SoCs so we should name it accordinly.
The following boards has been changed:
* apx4devkit
* m28evk
* mx28evk
* sc_sps_1
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Otavio Salvador [Sun, 19 Aug 2012 04:58:29 +0000 (04:58 +0000)]
mxs: Only build internal Ethernet controller for i.MX28
The internal Ethernet controller is only available on i.MX28
processors so it needs to use CONFIG_MX28 guardian to avoid having
this code called in others.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Otavio Salvador [Sun, 19 Aug 2012 04:58:28 +0000 (04:58 +0000)]
mxs: Replace i.MX233 by i.MX23 on copyright header
All other header are going to use i.MX23 so we change this for
consistency.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Benoît Thébaudeau [Mon, 20 Aug 2012 10:55:41 +0000 (10:55 +0000)]
mxc: Make gpio_get_value() use PSR
gpio_get_value() should use PSR like Linux, not DR, because DR does not always
reflect the pin state, while PSR does. This is especially useful to detect a
short circuit on a GPIO pin configured as output, or to read the level of a pin
controlled by a non-GPIO IOMUX function.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Tue, 21 Aug 2012 10:01:58 +0000 (10:01 +0000)]
mx53ard: Use IMX_GPIO_NR macro
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Tue, 21 Aug 2012 10:01:57 +0000 (10:01 +0000)]
mx51evk: Use IMX_GPIO_NR macro
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Tue, 21 Aug 2012 10:01:56 +0000 (10:01 +0000)]
mx53loco: Use IMX_GPIO_NR macro
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Benoît Thébaudeau [Tue, 14 Aug 2012 10:32:40 +0000 (10:32 +0000)]
mx35: Remove declaration of non-existing function
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 10:32:21 +0000 (10:32 +0000)]
mx35: Move clock enums to clock.h
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 09:40:02 +0000 (09:40 +0000)]
mx35: Remove declaration of non-existing function
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 09:39:49 +0000 (09:39 +0000)]
mx35: Fix broken pin definitions
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 09:39:16 +0000 (09:39 +0000)]
mx35 iomux: Remove unused macro
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 08:06:23 +0000 (08:06 +0000)]
mx5: Undeclare imx_decode_pll()
The imx_decode_pll() function does not exist for mx5, so remove its declaration.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Stefano Babic [Sun, 19 Aug 2012 21:33:50 +0000 (21:33 +0000)]
MX: Set a common gpio.h for all i.MX
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
Fabio Estevam [Sat, 18 Aug 2012 13:28:12 +0000 (13:28 +0000)]
mxs: Use correct function name to initialize dram
commit
d92591a (mxs: Convert sys_proto.h prefixes to 'mxs') introduced
a mxs_dram_init() function, which is not used anywhere.
Fix it, so that the following warning goes away:
mx28evk.c: In function ‘dram_init’:
mx28evk.c:67:2: warning: implicit declaration of function ‘mx28_dram_init’ [-Wimplicit-function-declaration]
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Fabio Estevam [Sat, 18 Aug 2012 13:28:11 +0000 (13:28 +0000)]
mx28evk: Remove unneeded 'undef'
There is no need to undef an option that is not enabled by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Otavio Salvador [Sat, 18 Aug 2012 07:25:26 +0000 (07:25 +0000)]
MX28: Move "regs-base.h" include after SoC type configuration
For i.MX233 addition the base registers need to be change so the SoC
definition needs to be known before the header include.
The following boards has been changed:
* apx4devkit
* m28evk
* mx28evk
* sc_sps_1
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
Otavio Salvador [Sat, 18 Aug 2012 07:25:25 +0000 (07:25 +0000)]
MX28: config: Allow different target generation in elftosb call
The elftosb call needs to use a target param specific for i.MX28. This
patch allow for later addition of i.MX233.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Benoît Thébaudeau [Fri, 17 Aug 2012 10:43:48 +0000 (10:43 +0000)]
mx35: Add cpu_mmc_init()
Add cpu_mmc_init() function to make it easy to init a single eSDHC instance.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Fri, 17 Aug 2012 10:42:55 +0000 (10:42 +0000)]
mx5/6: Fix cpu_mmc_init() return value
Do not pretend to have initialized mmc successfully if CONFIG_FSL_ESDHC is not
defined. Instead, only implement a custom cpu_mmc_init() when it does something.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Fri, 17 Aug 2012 08:15:11 +0000 (08:15 +0000)]
spi: fix mxs_spi_slave structure allocation to clear memory
Use calloc() instead of malloc() to allocate the mxs_spi_slave structure.
Clearing the memory is necessary since most of the time this gets done
super early in boot, but on warm reboots, and when SPI probing is done
long after the init stages it could actually pick up previously used memory,
and things like the chipselect polarity and other data end up being filled
with trash data if not explicitly set by the board files.
This solves a semi-random, almost unreproducable error whereby SPI devices
act very, very strangly on boot.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Fri, 17 Aug 2012 08:15:10 +0000 (08:15 +0000)]
spi: fix mxc_spi_slave structure allocation to clear memory
Use calloc() instead of malloc() to allocate the mxc_spi_slave structure.
Clearing the memory is necessary since most of the time this gets done
super early in boot, but on warm reboots, and when SPI probing is done
long after the init stages it could actually pick up previously used memory,
and things like the chipselect polarity and other data end up being filled
with trash data if not explicitly set by the board files.
This solves a semi-random, almost unreproducable error whereby SPI devices
act very, very strangly on boot. Tested on Efika MX over several years..
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Troy Kisky [Wed, 15 Aug 2012 10:31:22 +0000 (10:31 +0000)]
mx53evk: add boot_mode support
This allows a watchdog reset to start the ROM's
usb/serial downloader, or boot from an sdcard.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Troy Kisky [Wed, 15 Aug 2012 10:31:21 +0000 (10:31 +0000)]
mx6qsabrelite: add boot_mode support
This allows a watchdog reset to start the ROM's
usb downloader, or boot from an sdcard.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Troy Kisky [Wed, 15 Aug 2012 10:31:20 +0000 (10:31 +0000)]
imx-common/cmd_bmode.c: add imx bmode (bootmode) command
This is useful for forcing the ROM's
usb downloader to activate upon a watchdog reset.
Or, you can boot from either SD Card.
Currently, support added for MX53 and MX6Q
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Note: MX53 support untested.
Acked-by: Stefano Babic <sbabic@denx.de>
Troy Kisky [Wed, 15 Aug 2012 10:27:11 +0000 (10:27 +0000)]
iomux: move IOMUX_GPR13_xxx defines
Move mx6 specific defines to arch-mx6 directory.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 11:03:34 +0000 (11:03 +0000)]
mx35: Remove duplicate GPIO3_BASE_ADDR
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 05:18:43 +0000 (05:18 +0000)]
mx5: cosmetic: Clean up lowlevel_init
Coding style cleanup:
- Remove useless parentheses.
- Use tabs for indentations and alignments.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 05:01:21 +0000 (05:01 +0000)]
mx5/6 timer: Round up tick_to_time() value
Round up tick_to_time() value instead of truncating it. This avoids stopping
waits instantly for low usec values, and this generally guarantees that the code
always waits for at least the requested duration.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 03:33:52 +0000 (03:33 +0000)]
mx3: Fix typo on IPU_CONF_CSI_EN
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 03:28:24 +0000 (03:28 +0000)]
mx35: Fix typo on EDIO
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>