Vignesh R [Mon, 26 Mar 2018 07:57:01 +0000 (13:27 +0530)]
board: ti: am43xx: Define embedded_dtb_select for runtime DTB selection in U-boot
AM437x QSPI boot is a single stage boot and hence needs runtime DTB
selection to support AM437x-SK and AM437x-IDK with DM enabled. This is
required to move am43xx_evm_qspiboot_defconfig to use DM/DT.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Sjoerd Simons [Thu, 22 Mar 2018 21:53:50 +0000 (22:53 +0100)]
env: Properly check for BLK support
Use CONFIG_IS_ENABLED to see if CONFIG_BLK is enabled. Otherwise
SPL compilation breaks on boards which do have CONFIG_BLK enabled but
not DM_MMC for the SPL as follows:
env/mmc.c: In function ‘init_mmc_for_env’:
env/mmc.c:164:6: warning: implicit declaration of function ‘blk_get_from_parent’; did you mean ‘efi_get_ram_base’? [-Wimplicit-function-declaration]
if (blk_get_from_parent(mmc->dev, &dev))
^~~~~~~~~~~~~~~~~~~
efi_get_ram_base
env/mmc.c:164:29: error: ‘struct mmc’ has no member named ‘dev’
if (blk_get_from_parent(mmc->dev, &dev))
^~
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andrew F. Davis [Thu, 22 Mar 2018 20:44:40 +0000 (15:44 -0500)]
configs: k2hk_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh vutla <lokeshvutla@ti.com>
Andrew F. Davis [Thu, 22 Mar 2018 20:44:39 +0000 (15:44 -0500)]
configs: k2e_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis [Thu, 22 Mar 2018 20:44:38 +0000 (15:44 -0500)]
configs: k2g_hs_evm: Resync defconfig with non-HS defconfig
Signed-off-by: Andrew F. Davis <afd@ti.com>
Chris Packham [Wed, 21 Mar 2018 02:40:37 +0000 (15:40 +1300)]
rtc: rx8025: remove redundant code in rtc_reset
As of commit
1a1fa2406689 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the rx8025 implementation of
rtc_reset() does not need to call rtc_set().
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Chris Packham [Wed, 21 Mar 2018 02:40:36 +0000 (15:40 +1300)]
rtc: rs5c372: remove redundant code in rtc_reset
As of commit
1a1fa2406689 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the rs5c372 implementation of
rtc_reset() does not need to call rtc_set().
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Chris Packham [Wed, 21 Mar 2018 02:40:35 +0000 (15:40 +1300)]
rtc: mx27rtc: remove redundant code in rtc_reset
As of commit
1a1fa2406689 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the mx27rtc implementation of
rtc_reset() can be an empty stub function.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Chris Packham [Wed, 21 Mar 2018 02:40:34 +0000 (15:40 +1300)]
rtc: ds1374: remove redundant code in rtc_reset
As of commit
1a1fa2406689 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the ds1374 implementation of
rtc_reset() doesn't need to call rtc_set().
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Chris Packham [Wed, 21 Mar 2018 02:40:33 +0000 (15:40 +1300)]
rtc: ds1307: remove redundant code in rtc_reset
As of commit
1a1fa2406689 ("rtc: Set valid date after reset") the
command "date reset" will set the date/time to 2000-01-01 0:00:00 after
calling rtc_reset(). This means that the ds1307 implementation of
rtc_reset() doesn't need to call rtc_set().
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Christian Gmeiner [Tue, 20 Mar 2018 13:18:25 +0000 (14:18 +0100)]
bootvx: use program header for loading
The section header address is a VMA whereas the address found in
the program header is a physical one. With this change it is
possible to load and start a vx7 intel generic based image.
$ readelf -l /tmp/vx7
Elf file type is EXEC (Executable file)
Entry point 0x408000
There are 2 program headers, starting at offset 52
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x001000 0x00408000 0x00408000 0x04000 0x04000 RWE 0x1000
LOAD 0x005000 0xe040c000 0x0040c000 0x583a84 0x5ccc70 RWE 0x1000
Section to Segment mapping:
Segment Sections...
00 .text.locore .data.locore
01 .text .eh_frame .wrs_build_vars .data .tls_data .tls_vars .bss
$ readelf -S /tmp/vx7
There are 13 section headers, starting at offset 0x588af8:
Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL
00000000 000000 000000 00 0 0 0
[ 1] .text.locore PROGBITS
00408000 001000 00011e 00 AX 0 0 16
[ 2] .data.locore PROGBITS
00409000 002000 003000 00 WA 0 0 4096
[ 3] .text PROGBITS
e040c000 005000 4802a0 00 WAX 0 0 32
[ 4] .eh_frame PROGBITS
e088c2a0 4852a0 0a1ed0 00 A 0 0 4
[ 5] .wrs_build_vars PROGBITS
e092e170 527170 000190 00 Ax 0 0 1
[ 6] .data PROGBITS
e092f000 528000 060a70 00 WA 0 0 4096
[ 7] .tls_data PROGBITS
e098fa70 588a70 000004 00 A 0 0 4
[ 8] .tls_vars PROGBITS
e098fa78 588a78 00000c 00 WA 0 0 4
[ 9] .bss NOBITS
e098faa0 588a84 0491d0 00 WA 0 0 32
[10] .shstrtab STRTAB
00000000 588a84 000074 00 0 0 1
[11] .symtab SYMTAB
00000000 588d00 056ee0 10 12 9758 4
[12] .strtab STRTAB
00000000 5dfbe0 05f48a 00 0 0 1
Key to Flags:
W (write), A (alloc), X (execute), M (merge), S (strings)
I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
O (extra OS processing required) o (OS specific), p (processor specific)
For completeness here are the same information for an old vx5 based image. After
this change it is possible to boot vx5 and vx7 (intel generic) images.
$ readelf -l /tmp/vx5
Elf file type is EXEC (Executable file)
Entry point 0x308000
There are 1 program headers, starting at offset 52
Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
LOAD 0x000060 0x00308000 0x00308000 0x3513a0 0x757860 RWE 0x20
Section to Segment mapping:
Segment Sections...
00 .text .data .bss
[christian@chgm-pc ~]$ readelf -S /tmp/vx5
There are 12 section headers, starting at offset 0x356580:
Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL
00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS
00308000 000060 319b10 00 WAX 0 0 32
[ 2] .data PROGBITS
00621b20 319b80 037880 00 WA 0 0 32
[ 3] .bss NOBITS
006593a0 351400 4064c0 00 WA 0 0 16
[ 4] .debug_aranges PROGBITS
00000000 351400 000060 00 0 0 1
[ 5] .debug_pubnames PROGBITS
00000000 351460 00018b 00 0 0 1
[ 6] .debug_info PROGBITS
00000000 3515eb 003429 00 0 0 1
[ 7] .debug_abbrev PROGBITS
00000000 354a14 000454 00 0 0 1
[ 8] .debug_line PROGBITS
00000000 354e68 0016a4 00 0 0 1
[ 9] .shstrtab STRTAB
00000000 35650c 000071 00 0 0 1
[10] .symtab SYMTAB
00000000 356760 0440e0 10 11 8574 4
[11] .strtab STRTAB
00000000 39a840 03e66c 00 0 0 1
Key to Flags:
W (write), A (alloc), X (execute), M (merge), S (strings)
I (info), L (link order), G (group), T (TLS), E (exclude), x (unknown)
O (extra OS processing required) o (OS specific), p (processor specific)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Patrick Delaunay [Tue, 20 Mar 2018 13:15:06 +0000 (14:15 +0100)]
stm32mp: handle SYSRESET
Add support of sysreset with generic driver "syscon-reboot"
provided by RCC, for U-boot and for SPL.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 20 Mar 2018 10:45:14 +0000 (11:45 +0100)]
stm32mp: add syscon for STGEN
Add STGEN as SYSCON device: allow access to device address
defined in device tree
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 20 Mar 2018 10:41:26 +0000 (11:41 +0100)]
stm32mp1: change STGEN clock source to HSE
No more use static frequency HSI = 64MHz for STGEN clock
but HSE (with higher accurency) by default.
Need to remove CONFIG_SYS_HZ_CLOCK as arch timer frequency
is provided at boot by BootRom and cp15 cntfrq and modified
during clock tree initialization if needed.
When HSI is no more used by any device, this internal
oscillator can be switched off to reduce consumption.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 20 Mar 2018 10:41:25 +0000 (11:41 +0100)]
clock: stm32mp1: add stgen clock source change support
The STGEN is the clock source for the Cortex A7 arch timer.
So after modification of its frequency, CP15 cntfreq is updated
and a new timer init is performed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 20 Mar 2018 10:41:23 +0000 (11:41 +0100)]
arm: timer: get frequency for arch timer armv7 in cp15 cntfrq
Manage dynamic value for armv7 arch clock timer,
when CONFIG_SYS_HZ_CLOCK is not defined.
Get frequency from CP15 cntfrq information, initialized for example
by first boot stage, clock driver or by BootRom.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Rasmus Villemoes [Tue, 20 Mar 2018 10:38:45 +0000 (11:38 +0100)]
Allow providing default environment from file
Modifying the default environment via CONFIG_EXTRA_ENV_SETTINGS is
somewhat inflexible, partly because the cpp language does not allow
appending to an existing macro. This prevents reuse of "environment
fragments" for different boards, which in turn makes maintaining that
environment consistently tedious and error-prone.
This implements a Kconfig option for allowing one to define the entire
default environment in an external file, which can then, for example, be
generated programmatically as part of a Yocto recipe, or simply be kept
in version control separately from the U-boot repository.
Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Tue, 20 Mar 2018 09:54:54 +0000 (10:54 +0100)]
stm32mp1: select boot device and partition
Bootrom loads SPL from SDCARD or eMMC
according BootPin selection.
Then SPL loads U-Boot on the same mmc device
with the following predefined GPT partitioning:
on SDCARD: gpt partitioning
1: SPL
2: SPL#2
3: U-Boot
4: bootable partition
on eMMC:
The 2 boot partitions are used for SPL (2 copy)
boot1: SPL
boot2: SPL#2
The user partition use gpt partitioning
1: U-Boot
2: bootable partition
This patch select the correct SPL partition
(3 for SDCARD on mmc0 and 1 for eMMC on mmc1)
according the BootRom information saved in TAMP register
and based on configuration flasg:
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
=> for BOOT_DEVICE_MMC1 or mmc 0 in U-Boot
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 (new)
=> for BOOT_DEVICE_MMC2 or mmc 1 in U-Boot
And the correct boot_targets is selected according the environment
variables boot_device and boot_instance, with preboot command,
to search the bootable partition with kernel on this device
(generic distro support).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 20 Mar 2018 09:54:53 +0000 (10:54 +0100)]
stm32mp1: get boot mode from BootRom
SPL copy BootRom boot mode information
in TAMP register 21.
This TAMP register information is used
after relocation to set 2 env variables
- boot_device
- boot_instance
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 20 Mar 2018 09:54:52 +0000 (10:54 +0100)]
stm32mp1: add eMMC support for ED1
Add command GPT support
Add EMMC boot support
Add the 2 other SDMMC instances for ED1:
- SDMMC2 = mmc 1, eMMC on the ED1 board
- SDMMC3 = extension connector, deactivated by default
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 20 Mar 2018 09:54:51 +0000 (10:54 +0100)]
spl: spl_mmc: provide one weak function spl_boot_partition
The spl_boot_partition function has been added in order to have
the possibility to boot on a same binary from different mmc devices
with different partitions.
By default keep the current behavior, SPL use the partition defined
by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Klaus Goger [Mon, 19 Mar 2018 19:32:05 +0000 (20:32 +0100)]
rtc: rewrite isl1208 to support DM
Adds devicemodel support to the ISL1208 driver.
This patch drops the non-dm API as no board was using it anyway.
Also add it to Kconfig.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 19 Mar 2018 18:09:21 +0000 (19:09 +0100)]
stm32mp: add check of cpu identifier
Add support of DBGMCU_IDC for cpu identifier
and revision
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 19 Mar 2018 18:09:20 +0000 (19:09 +0100)]
stm32mp: cleanup cpu.c
Move all defines at the beginning of the file
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Hauke Mehrtens [Sun, 18 Mar 2018 15:03:47 +0000 (16:03 +0100)]
tools/mxsimage: Support building with LibreSSL
The mxsimage utility fails to compile against LibreSSL version < 2.7.0
because LibreSSL says it is OpenSSL 2.0, but it does not support the
complete OpenSSL 1.1 interface.
LibreSSL defines OPENSSL_VERSION_NUMBER with 0x20000000L and therefor
claims to have an API compatible with OpenSSL 2.0, but it implements
EVP_MD_CTX_new(), EVP_MD_CTX_free() and EVP_CIPHER_CTX_reset() only
starting with version 2.7.0, which is not yet released. OpenSSL
implements this function since version 1.1.0.
This commit will activate the compatibility code meant for
OpenSSL < 1.1.0 also for LibreSSL version < 2.7.0.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
Heinrich Schuchardt [Sun, 18 Mar 2018 11:01:06 +0000 (12:01 +0100)]
regulator: pbias: don't evaluate variable before assignment
We should not evaluate the value of reg before its value is set.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Mon, 26 Mar 2018 15:24:12 +0000 (10:24 -0500)]
omap3_logic: Fix FDT ADDR for ramdisk booting
The boot scripts for booting from ramdisk are using
${fdtimage} when they really should be using ${fdtaddr}
This patch will fix it so the RAMdisk bootscripts operate
correctly.
Signed-off-by: Adam Ford <aford173@gmail.com>
Simon Glass [Mon, 19 Mar 2018 21:20:25 +0000 (15:20 -0600)]
input: Drop PS/2 keyboard support
This is not used by any current board and has not been converted to driver
model. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Marek Behún [Mon, 19 Mar 2018 11:02:11 +0000 (12:02 +0100)]
fs: btrfs: Remove unused debug code left from development
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Russ Dill [Tue, 20 Mar 2018 06:53:00 +0000 (12:23 +0530)]
ARM: am33xx: Inhibit re-initialization of DDR during RTC-only
This inhibits the re-inititialization of DDR during an RTC-only resume. If
this is not done, an L3 NOC error is produced as the DDR gets accessed
before the re-init has time to complete. Tested on AM437x GP EVM.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
[j-keerthy@ti.com Ported to Latest Master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Dave Gerlach [Sat, 17 Mar 2018 07:54:30 +0000 (13:24 +0530)]
am43xx: Do not allow EMIF to control DDR_RESET in rtconly config
Prevent EMIF control of DDR_RESET line on DDR3 am43xx platforms for
am43xx_evm_rtconly_config. Without this DDR is unstable and can become
corrupted after multiple iterations of RTC+DDR mode.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[j-keerthy@ti.com Ported to latest master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tero Kristo [Sat, 17 Mar 2018 08:02:52 +0000 (13:32 +0530)]
ARM: AM43xx: Add support for RTC only + DDR in self-refresh mode
Kernel stores information to the RTC_SCRATCH0 and RTC_SCRATCH1 registers
for wakeup from RTC-only mode with DDR in self-refresh. Parse these
registers during SPL boot and jump to the kernel resume vector if the
device is waking up from RTC-only modewith DDR in Self-refresh.
The RTC scratch register layout used is:
SCRATCH0 : bits00-31 : kernel resume address
SCRATCH1 : bits00-15 : RTC magic value used to detect valid config
SCRATCH1 : bits16-31 : board type information populated by bootloader
During the normal boot path the SCRATCH1 : bits16-31 are updated with
the eeprom read board type data. In the rtc_only boot path the rtc
scratchpad register is read and the board type is determined and
correspondingly ddr dpll parameters are set. This is done so as to avoid
costly i2c read to eeprom.
RTC-only +DRR in self-refresh mode support is currently only enabled for
am43xx_evm_rtconly_config.
This is not to be used with epos evm builds.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
[j-keerthy@ti.com Rebased to latest u-boot master branch]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Christophe Leroy [Fri, 16 Mar 2018 15:55:02 +0000 (16:55 +0100)]
drivers: serial: remove nonexisting initialisation functions
This patch removes call of serial initialisation functions that
are not implemented anymore.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Jason Kridner [Wed, 7 Mar 2018 10:40:44 +0000 (05:40 -0500)]
am335x: am335x_evm_usbspl_defconfig: NETCONSOLE
Enable NETCONSOLE by default. Still requires changes to the boot
environment to enable on the platform.
Signed-of-by: Jason Kridner <jdk@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jason Kridner [Wed, 7 Mar 2018 10:40:43 +0000 (05:40 -0500)]
Handle NETCONSOLE and SPL enabled
NETCONSOLE isn't compiled in with SPL, so the include file needs to recognize that.
Signed-off-by: Jason Kridner <jdk@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jason Kridner [Wed, 7 Mar 2018 10:40:41 +0000 (05:40 -0500)]
Add support for BeagleBoard.org PocketBeagle
Texas Instruments AM3358 based low-cost board using Octavo Systems OSD3358 SIP
with built-in TPS65217 PMIC and 512MB DDR3. Board features small 35mm x
55mm size, high-speed USB OTG, microSD and 72 0.1" expansion header
pins with 2xSPI, 2xI2C, 2xUART, USB, 8xADC, up-to-44 GPIO, PRU pins and much more.
https://beagleboard.org/pocket
This was tested using the am335x_evm_usbspl_defconfig.
Note that MII pins are enabled despite not having Ethernet on this
board. This avoids an issue where otherwise many timeout errors would be
generated. See https://e2e.ti.com/support/arm/sitara_arm/f/791/t/298976
for some related discussion.
Signed-off-by: Jason Kridner <jdk@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alex Kiernan [Thu, 15 Mar 2018 22:11:46 +0000 (22:11 +0000)]
Migrate CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
This converts CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC to Kconfig
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Christophe Leroy [Fri, 16 Mar 2018 16:21:01 +0000 (17:21 +0100)]
powerpc: mpc8xx: move watchdog into drivers/watchdog
In preparation of DM watchdog, move basic actions into drivers/watchdog
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:59 +0000 (17:20 +0100)]
powerpc: mpc8xx: cleaning up watchdog
In preparation of migration to DM watchdog, clean up a bit.
The 8xx watchdog really is a HW watchdog, so declare it as is
then it goes through Kconfig
And the watchdog reset doesn't mind getting interrupted, so
no need to disable interrupts
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:57 +0000 (17:20 +0100)]
powerpc: mpc8xx: refactorise reginfo
reginfo is redundant with some of the commands in immap.c, so
move reginfo into that file and remove duplicated info.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:55 +0000 (17:20 +0100)]
board: MCR3000: Use smaller flash sector for environment
Latest versions of u-boot have increased in size and require more
than the 256kb allocated to it.
The MCR3000 board is equipped with an AM29LV160DB boot flash which
is organised as follows:
- One 16kb block
- Two 8kb block
- One 32kb block
- Thirty one 64kb blocks
At the time being, u-boot is a single piece occupying the 256 first
kbytes, then the environment is stored in the following 64kb block
The environment being quite tiny, we save one 64kb block by embedding
the environment in the first 8kb block, hence allowing to increase
the monitor size to 320kb.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:53 +0000 (17:20 +0100)]
common: env_embedded: allow fine placement of environment object
Commit
7653942b10e9e ("common/env_embedded.c: drop support for
CONFIG_SYS_USE_PPCENV") dropped the .ppcenv section which was
used in linking scripts to allow fine placement of embedded
environment sections.
This implies that GCC randomly places objects from env/embedded.o
and environment is not guaranteed to be located at the correct address:
04003df8 g F .text
00000038 mii_init
04004000 g O .text
00000004 env_size
04004004 g O .text
00002000 environment
04006004 g F .text
00000040 .hidden __lshrdi3
This patch restores this capability by allocating each object marked
with __UBOOT_ENV_SECTION__ into a different section. Hence
'environment' will be alone in .text.environment, allowing a
fine placement in u-boot.lds with:
. = DEFINED(env_offset) ? env_offset : .;
env/embedded.o (.text.environment)
Fixes: 7653942b10e9e ("common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENV")
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:51 +0000 (17:20 +0100)]
board: MCR3000: cleanup config
Some config is redundant with Kconfig. Fix it.
Also remove unused configs
Move SDRAM_MAX_SIZE in the only place it is used
include/environment.h already defines CONFIG_ENV_SIZE
from CONFIG_ENV_SECT_SIZE and defines CONFIG_ENV_ADDR as
(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
remove BOOTARGS as bootargs is set by the different boot commands
Fix CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE to be in
line with CPM DPRAM organisation
Remove CONFIG_SYS_GBL_DATA_SIZE, CONFIG_SYS_GBL_DATA_OFFSET and
CONFIG_SYS_INIT_SP_OFFSET which are unused
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:49 +0000 (17:20 +0100)]
board: MCR3000: replace mtd->priv by mtd_to_nand()
Since commit
17cb4b8f327eb ("mtd: nand: Add+use mtd_to/from_nand and
nand_get/set_controller_data"), mtd_to_nand() has to be used instead
of mtd->priv
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:47 +0000 (17:20 +0100)]
powerpc: mpc8xx: initialisation of initial RAM
u-boot requires some RAM at startup, to store global data structure.
RAM is also needed when we migrate to DM for some initial malloc
This patch implements the proper init of that RAM by calling
board_init_f_alloc_reserve() and board_init_f_init_reserve()
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:45 +0000 (17:20 +0100)]
powerpc: mpc8xx: redistribute data in CPM dpram
Some malloc memory is needed at startup for DM model.
Lets reorganise the use of the CPM dpram.
The MPC866/885 dpram, we have 8kbytes dual port RAM, which is usable as:
IMMR + 0x2000..0x2800: BD/Data/Microcode
IMMR + 0x2800..0x2e00: BD/Data
IMMR + 0x2e00..0x3800: BD/Data/Microcode
IMMR + 0x3800..0x3a00: BD/Data
IMMR + 0x3a00..0x3c00: BD/Data/Microcode
IMMR + 0x3c00..0x4000: Parameters for the Peripheral Controllers
Lets reallocate all BDs in the 3800..3a00 area and give the full
2800..2e00 for dynamic RAM allocation including global data
That way, the microcode areas remain available if needed one day.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:43 +0000 (17:20 +0100)]
powercp: mpc8xx: move commproc.h
include/commproc.h is dedicated to the 8xx, rename it cpm_8xx.h and
move it into arch/powerpc/include/asm
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:41 +0000 (17:20 +0100)]
powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx
CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:39 +0000 (17:20 +0100)]
powerpc: mpc8xx: remove get_immr() argument
get_immr() is always called with 0 as an argument, so it is useless.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:37 +0000 (17:20 +0100)]
powerpc: mpc8xx: make get_immr() independent of CONFIG_8xx
SPRN_IMMR is defined regardless of the CPU. Therefore, there
is no point in enclosing get_immr() inside a #ifdef CONFIG_8xx
As it a static inline function, it will in any case only be
compiled in functons using it.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:35 +0000 (17:20 +0100)]
powerpc: mpc8xx: get rid of the multiple PVR_ values
Avoid hardcoding the PVR values in C since they are defined
in processor.h
At the same time, remove those multiple PVR values for 8xx and
keep only one that we call PVR_8xx
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:33 +0000 (17:20 +0100)]
powerpc: mpc8xx: harmonise initialisation of the immap local pointer
In most places, immap local pointer is defined as
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
In a few places, it is defined as
immap_t __iomem *immap = (immap_t __iomem *)(immr & 0xFFFF0000);
This patch replaces the few of the latest form by the other one.
The two are fully equivalent since SPRN_IMMR is set with CONFIG_SYS_IMMR
very early in start.S
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Christophe Leroy [Fri, 16 Mar 2018 16:20:31 +0000 (17:20 +0100)]
soft_i2c: cleanup - no mpc8xx support
commit
907208c452999 ("powerpc: Partialy restore core of mpc8xx")
didn't bring back support for I2C on the mpc8xx
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Jagan Teki [Wed, 14 Mar 2018 13:16:44 +0000 (18:46 +0530)]
spi: atmel: default y if DM_SPI && ARCH_AT91
ATMEL_SPI is now fully converted to driver-model and
respective boards switch to DM_SPI as well,
so make default y for ARCH_AT91
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:43 +0000 (18:46 +0530)]
spi: atmel: Drop atmel_spi.h
atmel_spi.h has register offsets, and atmel_spi_slave
structure, move it into .c file for better readability
and drop atmel_spi.h
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:42 +0000 (18:46 +0530)]
spi: atmel: Drop non-dm code
All board configs are now enabled DM_SPI for SPL and
U-Boot proper, so now its time to drop non-dm code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:41 +0000 (18:46 +0530)]
at91: ma5d4evk: Enable SPL_DM and SPL_OF_CONTROL
Enable SPL Driver model and FDT support for AT91 ma5d4evk boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:40 +0000 (18:46 +0530)]
at91: ma5d4evk: Enable DM_SPI
AT91 ma5d4evk board uses atmel spi driver, enable DM_SPI to
use dm functionality.
Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:39 +0000 (18:46 +0530)]
at91: ma5d4evk: Add FDT support
Sync DTS from Linux and add FDT support for AT91 ma5d4evk board.
usb0, usb1, usb2 and hlcdc_pwm nodes removed, since there is no support it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:38 +0000 (18:46 +0530)]
at91: ma5d4evk: Enable DM
Enable Driver model for AT91 ma5d4evk boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:37 +0000 (18:46 +0530)]
at91: vinco: Enable DM_SPI
AT91 Vinco board uses atmel spi driver, enable DM_SPI to
use dm functionality.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:36 +0000 (18:46 +0530)]
at91: vinco: Add FDT support
Sync DTS from Linux and add FDT support for AT91 vinco board.
usb0, usb1, and usb2 nodes removed, since there is no support it.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:35 +0000 (18:46 +0530)]
at91: vinco: Enable DM
Enable Driver model for AT91 Vinco boards.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:34 +0000 (18:46 +0530)]
at91: taurus: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on taurus board.
Kept few functions related to non-dm and gpio on board
files for reference and will be remove once code moved
to relevant drivers.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:33 +0000 (18:46 +0530)]
configs: gurnard: Move CONFIG_ATMEL_SPI to defconfigs
Now CONFIG_ATMEL_SPI is defined in Kconfig, so move the
same into defconfig file.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:32 +0000 (18:46 +0530)]
at91: gurnard: Enable DM_SPI
Enable DM_SPI for atmel SPI driver on gurnard board.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 14 Mar 2018 13:16:31 +0000 (18:46 +0530)]
spi: atmel: Add ifdef for DM_GPIO code
Few boards are configuring gpio directly from board instead
using drivers/gpio so add ifdef for DM_GPIO to compatible
for both the cases.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Wenyou Yang <wenyouya@gmail.com>
Tom Rini [Fri, 6 Apr 2018 12:30:10 +0000 (08:30 -0400)]
Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Patch queue for rpi - 2018-04-06
Highlights this time around:
- Support for new RPi3 B+ model
- Fix for some SD cards on newer RPi firmware
Jonathan Gray [Fri, 6 Apr 2018 08:45:49 +0000 (18:45 +1000)]
rpi: Complete table of models with new revision code scheme
In the model table for the new revision code encoding documented in
https://www.raspberrypi.org/documentation/hardware/raspberrypi/revision-codes/README.md
add the entries for old models with the new scheme and add CM3 which
only appears in the new scheme.
A device tree for CM3 is not currently upstreamed in linux. When that
happens the name will likely have to be adjusted in the table.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Jonathan Gray [Sat, 17 Mar 2018 05:15:48 +0000 (16:15 +1100)]
mmc: use core clock frequency in bcm2835 sdhost
In raspberrypi-firmware
7fdcd00e00a42a1c91e8bd6f5eb8352fe9358557 and
later start.elf now sets the EMMC clock to 200 MHz.
According to Phil Elwell in
https://github.com/raspberrypi/firmware/issues/953
the SDHost controller shares the core/VPU clock and doesn't use
the EMMC clock.
Use the core clock id when determining the frequency to allow
U-Boot to work with recent versions of raspberrypi-firmware.
Otherwise U-Boot hangs at:
U-Boot 2018.03 (Mar 14 2018 - 20:36:00 +1100)
DRAM: 948 MiB
RPI 3 Model B (0xa02082)
MMC: mmc@
7e202000: 0, sdhci@
7e300000: 1
Loading Environment from FAT...
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
Peter Robinson [Fri, 16 Mar 2018 06:26:29 +0000 (06:26 +0000)]
rpi3_32b: Enable lan78xx driver
The new Raspberry Pi B 3+ has a lan78xx device attached to it. Let's add
driver support in U-Boot for it.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Thu, 15 Mar 2018 14:05:37 +0000 (15:05 +0100)]
rpi: Add identifier for the new RPi3 B+
The Raspberr Pi Foundation released a new RPi3 version which we want
to detect as well, so we can enable ethernet on it and know the correct
device tree file name.
Add an identifier for it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Thu, 15 Mar 2018 14:05:36 +0000 (15:05 +0100)]
rpi3: Enable lan78xx driver
The new Raspberry Pi B 3+ has a lan78xx device attached to it. Let's add
driver support in U-Boot for it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Thu, 5 Apr 2018 09:36:22 +0000 (11:36 +0200)]
rpi: Allow to boot without serial
When we enable CONFIG_OF_BOARD on Raspberry Pis, we may end up without
serial console support in early boot. Hence we need to make the serial
port optional, otherwise we will never get to the point where serial
would be probed.
Signed-off-by: Alexander Graf <agraf@suse.de>
Tom Rini [Wed, 4 Apr 2018 13:18:38 +0000 (09:18 -0400)]
Merge git://git.denx.de/u-boot-sunxi
Signed-off-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:23 +0000 (01:31 +0100)]
Revert "sunxi: Pine64: temporarily remove extra Pine64 non-plus DT"
Now with the MMC environment gone, we have enough space to accommodate
the Pine64 "non-plus" .dtb again.
This reverts commit
47952b8e42c2790150e16d3d4235b3a1ee0ba9bb.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:22 +0000 (01:31 +0100)]
sunxi: revert disabling of features
In January some commits were introduced to mitigate the U-Boot image
size issues we encountered on sunxi builds.
Now with the MMC environment removed we can bring them back, as we
practically don't have a size limit anymore.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:21 +0000 (01:31 +0100)]
sunxi: disable direct MMC environment
Since the dawn of time for the Allwinner support in mainline U-Boot
we store the environment to the SD card and write directly at
544KB from the beginning of the device. This leads to problems when
the U-Boot proper image grows beyond 504KB and eventually overlaps.
With one release of having the environment preferably in a FAT
partition, let's now turn off the MMC variant fallback, so we get back
all the space we need to implement features.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:20 +0000 (01:31 +0100)]
net: sun8i-emac: remove support for old binding
The original DT binding used by U-Boot's sun8i-emac driver was not really
agreed upon, and deviated from the "official" binding now used by the
kernel. Since now all U-Boot users have been converted to the new
binding, we can remove support for the old DT nodes from the driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:19 +0000 (01:31 +0100)]
arm: dts: sunxi: update H5 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
OrangePi PC2 over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:18 +0000 (01:31 +0100)]
arm: dts: sunxi: update H3 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
various H3 boards over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:17 +0000 (01:31 +0100)]
arm: dts: sunxi: update A64 to new EMAC binding
The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used for the
Pine64+ board over to the new bindings used by the kernel.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:16 +0000 (01:31 +0100)]
net: sun8i-emac: add support for new EMAC DT binding
The Ethernet MAC used in newer Allwinner SoCs (H3, A64, H5) got an
upstream Linux driver in v4.15.
This one uses a slightly different binding from the original one used
by the U-Boot driver.
The differences to the old binding are:
- The "syscon" address is held in a separate node, referenced via a
phandle in the "syscon" property.
- The reference to the PHY is held in a property called "phy-handle",
not "phy".
- The PHY register is at offset 0x30 in the syscon device, not at 0.
- The internal PHY is activated when the node, which phy-handle points
to, is a child node of an "allwinner,sun8i-h3-mdio-internal" node.
Teach the U-Boot driver how to find its resources in a "new-style" DT,
so that we can use a Linux kernel compatible DT for U-Boot as well.
This keeps support for the old binding for now, to allow a smooth
transition.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:15 +0000 (01:31 +0100)]
net: sun8i-emac: support new pinctrl DT bindings
The Linux kernel driver for the Allwinner pin controller gained support
for generic properties, which are now also used in the DTs.
The sun8i-emac Ethernet driver for new Allwinner MACs reads the pins from
the DT, but so far only supported the old binding.
Update the parsing routine to cope with both the old and new bindings,
so that the newer DTs can be used with U-Boot and its Ethernet driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:14 +0000 (01:31 +0100)]
sunxi: gpio: add missing compatible strings
The sunxi GPIO driver is missing some compatible strings for recent
SoCs. While most of the sunxi GPIO code seems to not rely on this (and
so works anyway), the sunxi_name_to_gpio() function does and fails at
the moment (for instance when resolving the MMC CD pin name).
Add the compatible strings for the A64 and V3s, which were missing
from the list. This now covers all pinctrl nodes in our own DTs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Apr 2018 00:31:13 +0000 (01:31 +0100)]
sunxi: README.sunxi64: Add hint about non-debug of ARM Trusted Firmware
As we are running into issues where the final U-Boot FIT image file is
exceeding our size limit, add a hint to the README.sunxi64 file
to point out the possibility of building non-debug versions of the ATF
binary. These are about 12KB smaller than the standard debug build, and
so allow successful U-Boot builds for many boards with the Allwinner H5
SoC.
Please note that under normal circumstances the debug build is still
recommended, as it gives valuable clues in case something goes wrong in
the ATF.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Alexey Brodkin [Mon, 2 Apr 2018 09:18:02 +0000 (12:18 +0300)]
Makefile: Disable stack-usage check for ARC
With the most recent tools for ARC (arc-2017.09) in case of
"naked" function compiler throws a warning:
---------------------------------->8-----------------------------
board/synopsys/hsdk/hsdk.c: In function 'hsdk_core_init_f':
board/synopsys/hsdk/hsdk.c:345:1: warning: stack usage computation not supported for this target
}
^
---------------------------------->8-----------------------------
That happens because the compiler doesn't handle "naked" functions
as a special case where stack calculation shouldn't be done.
But for now until this is fixed in GCC to get clean buildman output
we're disabling stack-usage check for ARC.
See https://lists.denx.de/pipermail/u-boot/2018-April/324455.html
for more background.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 3 Apr 2018 12:33:15 +0000 (08:33 -0400)]
Merge tag 'arc-for-2018.05' of git://git.denx.de/u-boot-arc
More ARC changes and fixes for v2018.05
* Update of ARC tools to the most recent arc-2017.09
* Fix for compile-time warning for AXS10x
* Add support of platform-specific commands for HSDK
* Add support for on-board SPI flash on HSDK
Note though that for write support another series [1]
is required. I hope that Jagan will be able to review and
act on SPI flash improvement series before we get beyond RC1.
Also note that to get clean build for HSDK we need to disable
stack-usage check [2] as our current GCC erroneously tries to calculate
stack-usage on a naked function which leads to warning.
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796
[2] https://patchwork.ozlabs.org/patch/894139/
Miquel Raynal [Wed, 28 Feb 2018 19:52:02 +0000 (20:52 +0100)]
configs: add NAND support for NES Classic
Add NAND parameters to the Nintendo NES Classic configuration file which
features a Macronix NAND flash chip with 128kiB blocks of 2kiB pages
plus 64 OOB bytes.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:52:01 +0000 (20:52 +0100)]
sunxi: move the NAND parameters to Kconfig
Move the NAND parameters from defconfig files to Kconfig for SUNXI
architecture only. Fort now only the CHIP pro is migrated.
It would have been better to convert this defconfig entry to Kconfig for
all supported machines/architectures but it has been abandoned due to a
fairly high amount of errors reported by the moveconfig.py tool. This is
due to defines quite often being multiplications of values/other defines
not correctly handled.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:52:00 +0000 (20:52 +0100)]
sunxi: make NAND_SUNXI use ARCH_SUNXI as default in Kconfig
Remove NAND_SUNXI from the CHIP pro defconfig to be automatically
selected depending on the state of ARCH_SUNXI.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:59 +0000 (20:51 +0100)]
sunxi: automatically select SPL_NAND_SUPPORT in Kconfig
Make SUNXI_NAND select SPL_NAND_SUPPORT in Kconfig, this limit the
number of entries to add in defconfig files when adding NAND support.
For now, the only board using it is the CHIP pro.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:58 +0000 (20:51 +0100)]
sunxi: dts: enable NAND on NES classic
Let the Nintendo NES Classic use the Macronix NAND chip on it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:57 +0000 (20:51 +0100)]
sunxi: allow NAND support to be compiled for sun8i platforms
Add some clocks/PLL definitions as well as the dependency on MACH_SUN8I
in Kconfig.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:56 +0000 (20:51 +0100)]
sunxi: spl: remove DMA related settings of the NAND controller
Code has been changed to do not use DMA anymore with the NAND
controller, instead PIO is used. Then, DMA-specific initialization may
be dropped.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:55 +0000 (20:51 +0100)]
spl: nand: sunxi: use PIO instead of DMA
SPL support was first written to support only the earlier generations of
Allwinner SoCs, and was only really enabled on the A13 / GR8. However,
those old SoCs had a DMA engine that has been replaced since the A31 by
another DMA controller that is no longer compatible.
Since the code directly uses that DMA controller, it cannot operate
properly on the later SoCs, while the NAND controller has not changed.
There's two paths forward, the first one would have been to add support
for that DMA controller too, the second to just remove the DMA usage
entirely and rely on PIO.
The later has been chosen because CPU overload at this stage is not an
issue and it makes the driver more generic, and easier to understand.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:54 +0000 (20:51 +0100)]
spl: nand: sunxi: declare the ecc_bytes array globally
Move the ecc_bytes array out of nand_max_ecc_strength() for future use
by nand_read_page().
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:53 +0000 (20:51 +0100)]
sunxi: spl: deassert the NAND controller reset line
Ensure the NAND controller reset line is deasserted before use.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:52 +0000 (20:51 +0100)]
spl: nand: sunxi: make the reset column helper more generic
Prepare the future use of an helper to move the data pointer (the
column) of the NAND chip by renaming nand_reset_column() to
nand_change_column(). Resetting the column is just a matter of giving 0
as argument.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Miquel Raynal [Wed, 28 Feb 2018 19:51:51 +0000 (20:51 +0100)]
spl: nand: sunxi: ensure enough time has passed after changing the column
When changing the column, the ONFI specification states that a minimum
time of tCCS (Change Column Setup time) must elapse between the last
address cycle is asserted on the bus and the first data cycle is
clocked. An usual value for average NANDs is 500 nanoseconds. Round it
up to 1 microsecond to be safe.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>