openwrt/staging/blogic.git
6 years agodrm/amd/include:cleanup raven1 nbio header files.
Feifei Xu [Mon, 27 Nov 2017 09:29:29 +0000 (17:29 +0800)]
drm/amd/include:cleanup raven1 nbio header files.

Cleanup asic_reg/raven1/NBIO folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup raven1 mp header files.
Feifei Xu [Mon, 27 Nov 2017 09:20:55 +0000 (17:20 +0800)]
drm/amd/include:cleanup raven1 mp header files.

Cleanup asic_reg/raven1/MP folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup raven1 mmhub header files.
Feifei Xu [Mon, 27 Nov 2017 09:16:06 +0000 (17:16 +0800)]
drm/amd/include:cleanup raven1 mmhub header files.

Cleanup asic_reg/raven1/MMHUB folder.Remove unused mmhub_9_1_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup raven1 gc header files.
Feifei Xu [Mon, 27 Nov 2017 09:00:12 +0000 (17:00 +0800)]
drm/amd/include:cleanup raven1 gc header files.

Cleanup asic_reg/raven1/GC folder. Remove unused files:
    gc_9_1_default.h  gc_9_1_sh_mask.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup raven1 dcn header files.
Feifei Xu [Mon, 27 Nov 2017 10:59:10 +0000 (18:59 +0800)]
drm/amd/include:cleanup raven1 dcn header files.

Cleanup asic_reg/raven1/DCN folder.Remove unused
dcn_1_0_default.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup raven1 sdma header files.
Feifei Xu [Mon, 27 Nov 2017 10:40:15 +0000 (18:40 +0800)]
drm/amd/include:cleanup raven1 sdma header files.

Cleanup asic_reg/raven1/SDMA0 folder.Remove unused sdma0_4_1_sh_mask.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 header files.
Feifei Xu [Fri, 24 Nov 2017 04:31:36 +0000 (12:31 +0800)]
drm/amd/include:cleanup vega10 header files.

Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 osssys header files.
Feifei Xu [Fri, 24 Nov 2017 02:46:24 +0000 (10:46 +0800)]
drm/amd/include:cleanup vega10 osssys header files.

Cleanup asic_reg/vega10/OSSSYS folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 smuio header files.
Feifei Xu [Thu, 23 Nov 2017 07:09:51 +0000 (15:09 +0800)]
drm/amd/include:cleanup vega10 smuio header files.

Cleanup asic_reg/vega10/SMUIO folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 nbif header files.
Feifei Xu [Thu, 23 Nov 2017 07:02:23 +0000 (15:02 +0800)]
drm/amd/include:cleanup vega10 nbif header files.

Cleanup asic_reg/vega10/NBIF folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 nbio header files.
Feifei Xu [Thu, 23 Nov 2017 06:54:48 +0000 (14:54 +0800)]
drm/amd/include:cleanup vega10 nbio header files.

Cleanup asic_reg/vega10/NBIO folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 mmhub header files.
Feifei Xu [Thu, 23 Nov 2017 06:30:43 +0000 (14:30 +0800)]
drm/amd/include:cleanup vega10 mmhub header files.

Cleanup asic_reg/vega10/MMHUB folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 gc header files.
Feifei Xu [Fri, 24 Nov 2017 02:29:00 +0000 (10:29 +0800)]
drm/amd/include:cleanup vega10 gc header files.

Cleanup asic_reg/vega10/GC folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 vce header files.
Feifei Xu [Thu, 23 Nov 2017 06:08:34 +0000 (14:08 +0800)]
drm/amd/include:cleanup vega10 vce header files.

Cleanup asic_reg/vega10/VCE folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 uvd header files.
Feifei Xu [Thu, 23 Nov 2017 03:09:07 +0000 (11:09 +0800)]
drm/amd/include:cleanup vega10 uvd header files.

Cleanup asic_reg/vega10/UVD folder,remove unused uvd_7_0_default.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 dce header files.
Feifei Xu [Thu, 23 Nov 2017 10:18:14 +0000 (18:18 +0800)]
drm/amd/include:cleanup vega10 dce header files.

Cleanup asic_reg/vega10/DC folder.Remove dce_12_0_default.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include: cleanup vega10 umc header files.
Feifei Xu [Wed, 22 Nov 2017 07:23:20 +0000 (15:23 +0800)]
drm/amd/include: cleanup vega10 umc header files.

Remove asic/vega10/UMC folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 thm header files.
Feifei Xu [Wed, 22 Nov 2017 06:57:05 +0000 (14:57 +0800)]
drm/amd/include:cleanup vega10 thm header files.

Cleanup asic_reg/vega10/THM folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 athub header files.
Feifei Xu [Thu, 16 Nov 2017 09:50:10 +0000 (17:50 +0800)]
drm/amd/include:cleanup vega10 athub header files.

Cleanup asic_reg/vega10/ATHUB folder,remove unused files.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 mp header files.
Feifei Xu [Wed, 15 Nov 2017 10:39:21 +0000 (18:39 +0800)]
drm/amd/include:cleanup vega10 mp header files.

Cleanup asic_reg/vega10/MP folder, remove mp_9_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 hdp header files.
Feifei Xu [Wed, 15 Nov 2017 10:09:33 +0000 (18:09 +0800)]
drm/amd/include:cleanup vega10 hdp header files.

Cleanup asic_reg/vega10/HDP folder, remove hdp_4_0_default.h

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/include:cleanup vega10 sdma0/1 header files.
Feifei Xu [Wed, 15 Nov 2017 08:01:30 +0000 (16:01 +0800)]
drm/amd/include:cleanup vega10 sdma0/1 header files.

To remove include/asic_reg/vega10 folder,create IP folders sdma0/1.
This patch cleanup asic_reg/vega10/SDMA folders.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:partially revert 1cfd8e237f0318e330190ac21d63c58ae6a1f66c
Monk Liu [Tue, 21 Nov 2017 05:29:14 +0000 (13:29 +0800)]
drm/amdgpu:partially revert 1cfd8e237f0318e330190ac21d63c58ae6a1f66c

found RING0 test fail after S3 resume regression, which is
introduced by 1cfd8e237f0318e330190ac21d63c58ae6a1f66c

Because after suspend VRAM will be cleared, so driver must
unpin the GART table(resident in VRAM) during suspend so it
can be evicted to system ram and must correspondingly pin it
during resume so the GART table could be restored to VRAM.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: roundup the shrink request to prevent skip huge pool
Roger He [Tue, 21 Nov 2017 08:47:16 +0000 (16:47 +0800)]
drm/ttm: roundup the shrink request to prevent skip huge pool

e.g. shrink reqeust is less than 512, the logic will skip huge pool

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add page order support in ttm_pages_put
Roger He [Tue, 21 Nov 2017 06:24:48 +0000 (14:24 +0800)]
drm/ttm: add page order support in ttm_pages_put

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add set_pages_wb for handling page order more than zero
Roger He [Wed, 22 Nov 2017 07:09:33 +0000 (15:09 +0800)]
drm/ttm: add set_pages_wb for handling page order more than zero

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.20
Tony Cheng [Wed, 15 Nov 2017 03:11:05 +0000 (22:11 -0500)]
drm/amd/display: dal 3.1.20

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Set OPP default values in init_hw
Andrew Jiang [Tue, 14 Nov 2017 17:40:20 +0000 (12:40 -0500)]
drm/amd/display: Set OPP default values in init_hw

On S3 resume, we do not reconstruct OPP, but we do need to
reinitialize some of its values to the default ones.
Therefore, move those lines out of the OPP constructor and
into init_hw.

Also reset the hubp power gated flag, since nothing is
power gated at init_hw.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.19
Tony Cheng [Mon, 13 Nov 2017 23:49:33 +0000 (18:49 -0500)]
drm/amd/display: dal 3.1.19

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: DMCU and ABM maintenance and refactor
Anthony Koo [Mon, 13 Nov 2017 15:54:59 +0000 (10:54 -0500)]
drm/amd/display: DMCU and ABM maintenance and refactor

Remove some globals that should really be per block state.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Only program watermark for full update.
Yongqiang Sun [Mon, 13 Nov 2017 22:22:17 +0000 (17:22 -0500)]
drm/amd/display: Only program watermark for full update.

For scaling and position change, it isn't necessary to program
watermark and check P-State as well.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.18
Tony Cheng [Mon, 13 Nov 2017 23:02:57 +0000 (18:02 -0500)]
drm/amd/display: dal 3.1.18

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Set full update flag in dcn_validate_bandwidth
Andrew Jiang [Mon, 13 Nov 2017 22:09:12 +0000 (17:09 -0500)]
drm/amd/display: Set full update flag in dcn_validate_bandwidth

Doing bandwidth validation implies that this is a full update. Set the
flag inside the function in case whatever is calling
dcn_validate_bandwidth doesn't set it.

Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Do not program front-end twice
Leo (Sunpeng) Li [Fri, 10 Nov 2017 21:12:08 +0000 (16:12 -0500)]
drm/amd/display: Do not program front-end twice

The sequence of front-end > back-end > front-end programming will
program the front-end more than once. Add a mode_changed flag, and use
it to determine whether the front-end should be programmed before, or
after back-end.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Trigger full update on plane change
Leo (Sunpeng) Li [Thu, 9 Nov 2017 20:33:43 +0000 (15:33 -0500)]
drm/amd/display: Trigger full update on plane change

With the optimized DCN10 frontend programming code, things are
programmed only when requested. For now, trigger a full update on all
plane changes.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Rename output_bpc to opp_input_bpc
Dmytro Laktyushkin [Thu, 9 Nov 2017 21:02:56 +0000 (16:02 -0500)]
drm/amd/display: Rename output_bpc to opp_input_bpc

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix refclk conversion from khz int to mhz float
Dmytro Laktyushkin [Thu, 9 Nov 2017 20:05:52 +0000 (15:05 -0500)]
drm/amd/display: fix refclk conversion from khz int to mhz float

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix mpo validation failure
Dmytro Laktyushkin [Mon, 6 Nov 2017 18:50:06 +0000 (13:50 -0500)]
drm/amd/display: fix mpo validation failure

There was an error in translation of mode support check.
"N/A" is a failure condition while "" was a special case.
This change will differentiate between the two by using a
define.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: move csc matrix to hw_shared
Yue Hin Lau [Mon, 13 Nov 2017 19:55:07 +0000 (14:55 -0500)]
drm/amd/display: move csc matrix to hw_shared

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.17
Tony Cheng [Sat, 11 Nov 2017 04:23:24 +0000 (23:23 -0500)]
drm/amd/display: dal 3.1.17

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: update output csc matrix values
Yue Hin Lau [Thu, 9 Nov 2017 22:03:00 +0000 (17:03 -0500)]
drm/amd/display: update output csc matrix values

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Only update output transfer function for full type.
Yongqiang Sun [Fri, 10 Nov 2017 20:40:52 +0000 (15:40 -0500)]
drm/amd/display: Only update output transfer function for full type.

dcn10_translate_regamma_to_hw_format costs 750us to run, it cannot be
called within isr, check update flag before calling, only do it for
full update.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: performance profiling instrumentation
Tony Cheng [Wed, 8 Nov 2017 21:07:53 +0000 (16:07 -0500)]
drm/amd/display: performance profiling instrumentation

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove unnecessary dc_link vtable
Harry Wentland [Wed, 1 Nov 2017 16:05:35 +0000 (12:05 -0400)]
drm/amd/display: Remove unnecessary dc_link vtable

None of this needs to be a function table or dynamic in any way.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix opp header register define
Yue Hin Lau [Thu, 9 Nov 2017 20:56:25 +0000 (15:56 -0500)]
drm/amd/display: fix opp header register define

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Update dchub and dpp as per update flags.
Yongqiang Sun [Wed, 8 Nov 2017 22:24:54 +0000 (17:24 -0500)]
drm/amd/display: Update dchub and dpp as per update flags.

Check update flags and update dchub and dpp as per flags,
reduce reg access from 347 to 200, duration time reduce
to 170us.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Move update_plane_addr to apply_ctx_for_surface for dce.
Yongqiang Sun [Thu, 9 Nov 2017 18:55:46 +0000 (13:55 -0500)]
drm/amd/display: Move update_plane_addr to apply_ctx_for_surface for dce.

Move update_plane_addr to apply_ctx_for_surface, address update will
just be called once, not twice for updat type is full and medium.
This will reduce some reg access and duration time.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: call set_mpc_output_csc from hwsequencer
Yue Hin Lau [Wed, 1 Nov 2017 20:48:52 +0000 (16:48 -0400)]
drm/amd/display: call set_mpc_output_csc from hwsequencer

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix description of module parameter dc_log
Michel Dänzer [Wed, 22 Nov 2017 14:55:22 +0000 (15:55 +0100)]
drm/amd/display: Fix description of module parameter dc_log

It was incorrectly referencing the dc parameter, resulting in an empty
description of the dc_log parameter.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_map
Michel Dänzer [Wed, 22 Nov 2017 14:55:21 +0000 (15:55 +0100)]
drm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_map

Prevent buggy userspace from spamming dmesg.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: expose the VA above the hole to userspace
Christian König [Tue, 7 Nov 2017 11:03:31 +0000 (12:03 +0100)]
drm/amdgpu: expose the VA above the hole to userspace

Let userspace know how much area we have above the 48bit VA hole on
Vega10.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use dev_dbg instead of dev_err in the VA IOCTL
Christian König [Mon, 13 Nov 2017 12:58:17 +0000 (13:58 +0100)]
drm/amdgpu: use dev_dbg instead of dev_err in the VA IOCTL

Userspace buggy userspace can spam the logs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix VA hole handling on Vega10 v3
Christian König [Mon, 6 Nov 2017 14:37:01 +0000 (15:37 +0100)]
drm/amdgpu: fix VA hole handling on Vega10 v3

Similar to the CPU address space the VA on Vega10 has a hole in it.

v2: use dev_dbg instead of dev_err
v3: add some more comments to explain how the hw works

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use the new TTM bytes moved counter v2
Christian König [Thu, 27 Apr 2017 16:20:47 +0000 (18:20 +0200)]
drm/amdgpu: use the new TTM bytes moved counter v2

Instead of the global statistics use the per context bytes moved counter.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: forward operation context to ttm_bo_mem_space
Christian König [Wed, 26 Apr 2017 14:44:41 +0000 (16:44 +0200)]
drm/amdgpu: forward operation context to ttm_bo_mem_space

This way we can finally use some more stats.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agostaging: vboxvideo: adapt to new TTM interface
Christian König [Fri, 24 Nov 2017 10:32:59 +0000 (11:32 +0100)]
staging: vboxvideo: adapt to new TTM interface

Fixes interface changes done in the following commits:
drm/ttm: add operation ctx to ttm_bo_validate v2
drm/ttm: add context to driver move callback as well

I missed this driver because it is in the staging area.

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add number of bytes moved to the operation context
Christian König [Thu, 27 Apr 2017 16:19:46 +0000 (18:19 +0200)]
drm/ttm: add number of bytes moved to the operation context

Add some statistics how many bytes we have moved.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add context to driver move callback as well
Christian König [Wed, 26 Apr 2017 14:31:14 +0000 (16:31 +0200)]
drm/ttm: add context to driver move callback as well

Instead of passing the parameters manually.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: use the operation context inside TTM
Christian König [Wed, 12 Apr 2017 14:48:39 +0000 (16:48 +0200)]
drm/ttm: use the operation context inside TTM

Instead of passing down the parameters manually to every function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: use an operation context for ttm_bo_mem_space v2
Christian König [Wed, 12 Apr 2017 13:33:00 +0000 (15:33 +0200)]
drm/ttm: use an operation context for ttm_bo_mem_space v2

Instead of specifying interruptible and no_wait_gpu manually.

v2: rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: use an operation ctx for ttm_bo_init_reserved
Christian König [Wed, 12 Apr 2017 12:41:43 +0000 (14:41 +0200)]
drm/ttm: use an operation ctx for ttm_bo_init_reserved

Instead of specifying if sleeping should be interruptible.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add operation ctx to ttm_bo_validate v2
Christian König [Wed, 12 Apr 2017 12:24:39 +0000 (14:24 +0200)]
drm/ttm: add operation ctx to ttm_bo_validate v2

Give moving a BO into place an operation context to work with.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: add page order in page pool
Roger He [Tue, 21 Nov 2017 01:37:52 +0000 (09:37 +0800)]
drm/ttm: add page order in page pool

to indicate page order for each element in the pool

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: use NUM_PAGES_TO_ALLOC always
Roger He [Tue, 21 Nov 2017 01:58:26 +0000 (09:58 +0800)]
drm/ttm: use NUM_PAGES_TO_ALLOC always

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: Followup fixes to mc_reg_address
Ernst Sjöstrand [Sun, 19 Nov 2017 17:52:46 +0000 (18:52 +0100)]
drm/amd/powerplay: Followup fixes to mc_reg_address

This is a followup to:
drm/amd/powerplay: Fix buffer overflows with mc_reg_address

Rework *_set_mc_special_registers for the other architectures to
use the same logic as the first patch. This allows the last entry
of the array to be filled without an error message for example.
This doesn't fix any known problems, perhaps avoided by luck.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: Fix buffer overflows with mc_reg_address
Ernst Sjöstrand [Sun, 19 Nov 2017 17:52:45 +0000 (18:52 +0100)]
drm/amd/powerplay: Fix buffer overflows with mc_reg_address

Smatch warned about the following lines:
ci_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16
tonga_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16

Change the logic to check before access instead of after incrementing.
It's fine if j reaches max after we're done. This allows the last entry
of the array to be filled without an error message for example.
Changed some whitespace to clarify grouping.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/amdgpu: Fix missing null check in atombios_i2c.c
Ernst Sjöstrand [Sun, 19 Nov 2017 17:52:44 +0000 (18:52 +0100)]
drm/amd/amdgpu: Fix missing null check in atombios_i2c.c

Reported by smatch:
amdgpu_atombios_i2c_process_i2c_ch() error: we previously assumed 'buf' could be null

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: Fix missing newlines at end of file
Ernst Sjöstrand [Sun, 19 Nov 2017 17:52:43 +0000 (18:52 +0100)]
drm/amd/powerplay: Fix missing newlines at end of file

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: Minor fixes in processpptables.c (v2)
Ernst Sjöstrand [Sun, 19 Nov 2017 17:52:42 +0000 (18:52 +0100)]
drm/amd/powerplay: Minor fixes in processpptables.c (v2)

Reported by smatch:
init_overdrive_limits() error: uninitialized symbol 'result'.
get_clock_voltage_dependency_table() warn: inconsistent indenting

v2: set result to 0 (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix VCE buffer placement restrictions v2
Christian König [Fri, 17 Nov 2017 10:09:43 +0000 (11:09 +0100)]
drm/amdgpu: fix VCE buffer placement restrictions v2

Turned out that VCE still has a placement restriction that BOs can't
cross a 4GB boundary.

Fix this by adding a command submission parser prepass to correctly
place the buffers.

v2: add function description

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: align GTT start to 4GB v2
Christian König [Thu, 16 Nov 2017 19:12:51 +0000 (20:12 +0100)]
drm/amdgpu: align GTT start to 4GB v2

For VCE to work properly the start of the GTT space must be aligned to a
4GB boundary.

v2: add comment why we do this

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove VRAM size reduction v2
Christian König [Thu, 16 Nov 2017 18:36:10 +0000 (19:36 +0100)]
drm/amdgpu: remove VRAM size reduction v2

Remove some outdated comments and all code which tries to reduce the VRAM size
mapped into the MC.

This is superfluous and misleading since we never actually program the size.

v2: handle gmc_v6_0.c as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm: amd: Fix line continuation formats
Joe Perches [Thu, 16 Nov 2017 15:27:27 +0000 (07:27 -0800)]
drm: amd: Fix line continuation formats

Line continuations with excess spacing causes unexpected output.

Miscellanea:

o Added missing '\n' to a few of the coalesced pr_<level> formats

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display/dc/dce110/dce110_mem_input_v: use swap macro in program_size_and_rotation
Gustavo A. R. Silva [Fri, 10 Nov 2017 22:31:09 +0000 (16:31 -0600)]
drm/amd/display/dc/dce110/dce110_mem_input_v: use swap macro in program_size_and_rotation

Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable swap.

This makes the code easier to read and maintain.

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display/dc/core/dc_resource: use swap macro in rect_swap_helper
Gustavo A. R. Silva [Fri, 10 Nov 2017 22:38:13 +0000 (16:38 -0600)]
drm/amd/display/dc/core/dc_resource: use swap macro in rect_swap_helper

Make use of the swap macro instead of _manually_ swapping values
and remove unnecessary variable temp.

This makes the code easier to read and maintain.

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/gmc9: make some ECC messages debug only
Alex Deucher [Fri, 17 Nov 2017 16:40:58 +0000 (11:40 -0500)]
drm/amdgpu/gmc9: make some ECC messages debug only

To avoid spamming the logs on non-ECC boards.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: always make gart.table_addr 64bit
Christian König [Thu, 16 Nov 2017 17:29:51 +0000 (18:29 +0100)]
drm/amdgpu: always make gart.table_addr 64bit

Fixing warning/compile errors on 32bit kernels.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: remove unnecessary cast and use kcalloc instead of kzalloc
Colin Ian King [Wed, 15 Nov 2017 15:45:09 +0000 (15:45 +0000)]
drm/amd/display: remove unnecessary cast and use kcalloc instead of kzalloc

Use kcalloc instead of kzalloc and the cast on the return from kzalloc is
unnecessary and can be removed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: remove cur_placement
Christian König [Thu, 27 Apr 2017 15:38:54 +0000 (17:38 +0200)]
drm/ttm: remove cur_placement

Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: cleanup ttm_bo_driver.h
Christian König [Wed, 12 Apr 2017 13:08:17 +0000 (15:08 +0200)]
drm/ttm: cleanup ttm_bo_driver.h

Extern is the default for function declerations anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: cleanup coding style in ttm_bo_api.h
Christian König [Thu, 16 Feb 2017 13:25:30 +0000 (14:25 +0100)]
drm/ttm: cleanup coding style in ttm_bo_api.h

Extern is the default for function declerations anyway and this
solves a bunch of 80char per line issues.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: completely rework ttm_bo_delayed_delete
Christian König [Wed, 15 Nov 2017 12:20:09 +0000 (13:20 +0100)]
drm/ttm: completely rework ttm_bo_delayed_delete

There is no guarantee that the next entry on the ddelete list stays on
the list when we drop the locks.

Completely rework this mess by moving processed entries on a temporary
list.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: fix ttm_mem_evict_first once more
Christian König [Wed, 15 Nov 2017 10:05:17 +0000 (11:05 +0100)]
drm/ttm: fix ttm_mem_evict_first once more

The code path isn't hit at the moment, but we need to take the lock to
add the BO back to the LRU.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: require a root bus window above 4GB for BAR resize
Christian König [Wed, 15 Nov 2017 19:07:38 +0000 (20:07 +0100)]
drm/amdgpu: require a root bus window above 4GB for BAR resize

Don't even try to resize the BAR when there is no window above 4GB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix static checker warning
Shirish S [Tue, 7 Nov 2017 03:26:25 +0000 (08:56 +0530)]
drm/amd/display: fix static checker warning

This patch fixes static checker warning of
"warn: cast after binop" introduced by
56087b31 drm/amd/display: fix high part address in dm_plane_helper_prepare_fb()

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:cancel timer of virtual DCE(v2)
Monk Liu [Thu, 16 Nov 2017 03:11:39 +0000 (11:11 +0800)]
drm/amdgpu:cancel timer of virtual DCE(v2)

virtual DCE Timer structure is already released
after its sw_fini(), so we need to cancel the
its Timer in hw_fini() otherwise the Timer canceling
is missed.

v2:
use for loop and num_crtc to replace original code

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:fix virtual dce bug
Monk Liu [Wed, 15 Nov 2017 09:10:13 +0000 (17:10 +0800)]
drm/amdgpu:fix virtual dce bug

this fix the issue that access memory after freed
after driver unloaded.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:show error message if fail on event4
Monk Liu [Tue, 14 Nov 2017 08:56:55 +0000 (16:56 +0800)]
drm/amdgpu:show error message if fail on event4

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:cleanup firmware.fw_buf alloc/free
Monk Liu [Tue, 14 Nov 2017 08:53:51 +0000 (16:53 +0800)]
drm/amdgpu:cleanup firmware.fw_buf alloc/free

use bo_create/free_kernel instead of manually doing it

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:free CSA in unified place
Monk Liu [Tue, 14 Nov 2017 08:52:14 +0000 (16:52 +0800)]
drm/amdgpu:free CSA in unified place

instead of doing it in each GFX ip's sw_fini

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:cleanup unused stack var
Monk Liu [Tue, 14 Nov 2017 08:50:31 +0000 (16:50 +0800)]
drm/amdgpu:cleanup unused stack var

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:fix NULL pointer access during drv remove
Monk Liu [Tue, 14 Nov 2017 03:55:50 +0000 (11:55 +0800)]
drm/amdgpu:fix NULL pointer access during drv remove

NULL pointer is because original logic will step into
set_pde_pte() even after the gart.ptr is freed due to
there are twice gart_unbind() on all gart area.

also, there are other minor fixes:
1,since gart_init only create dummy page, the corresponding
gart_fini shouldn't do more like unbinding all GART, this is
unnecessary because in driver fini stage all GART unbinding
had already been done during each IP's SW_FINI (GMC's
SW_FINI is the last one called), so remove the step
for the GART unbinding in gart_fini().

2,gart_fini() is already invoked during each GMC IP's gart_fini
routine,e.g. gmc_vx_0_gart_fini(), so no need to manually
call it during ttm_fini().

3,amdgpu_gem_force_release() should be put ahead of
amdgpu_vm_manager_fini()

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:cleanup GMC & gart garbage function
Monk Liu [Tue, 14 Nov 2017 03:52:35 +0000 (11:52 +0800)]
drm/amdgpu:cleanup GMC & gart garbage function

for gart_ram_alloc/free, they are never used in driver thus
ripe them out totally.

for gart_vram_pin/unpin, they are not needed becuase we can
use bo_creat_kernel/free to replace the original manual way
in the gart_vram_alloc/free, thus gart_vram_pin/unpin can
also be riped out.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu:cleanup stolen vga memory finish
Monk Liu [Mon, 13 Nov 2017 12:41:56 +0000 (20:41 +0800)]
drm/amdgpu:cleanup stolen vga memory finish

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: Don't use DRM_ERROR when failing to allocate a BO
Michel Dänzer [Wed, 15 Nov 2017 10:37:23 +0000 (11:37 +0100)]
amdgpu: Don't use DRM_ERROR when failing to allocate a BO

This can be triggered by userspace, e.g. trying to allocate too large a
BO, so it shouldn't log anything by default.

Callers need to handle failure anyway.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/amdgpu: not allow gtt size exceed 75%*system memory size
Roger He [Fri, 10 Nov 2017 11:05:13 +0000 (19:05 +0800)]
drm/amd/amdgpu: not allow gtt size exceed 75%*system memory size

keep consistency with threshold of swapout

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add ability to determine and report if board supports ECC.
David Panariti [Fri, 15 Sep 2017 20:30:08 +0000 (16:30 -0400)]
drm/amdgpu: Add ability to determine and report if board supports ECC.

Make initialization code check the ECC related registers, which are initialized
by the VBIOS, to see if ECC is present and initialized and DRM_INFO() the
result.

Signed-off-by: David Panariti <David.Panariti@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: New header for fields needed to determine state of ECC.
David Panariti [Fri, 15 Sep 2017 17:25:38 +0000 (13:25 -0400)]
drm/amdgpu: New header for fields needed to determine state of ECC.

Add header files with ECC related definitions
(MASKs, SHIFTs, DEFAULTs and OFFSETS).

Signed-off-by: David Panariti <David.Panariti@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: optimize ttm_mem_evict_first v5
Christian König [Wed, 8 Nov 2017 14:55:44 +0000 (15:55 +0100)]
drm/ttm: optimize ttm_mem_evict_first v5

Deleted BOs with the same reservation object can be reaped even if they
can't be reserved.

v2: rebase and we still need to remove/add the BO from/to the LRU.
v3: fix remove/add one more time, cleanup the logic a bit
v4: we should still check if the eviction is valuable
v5: add comment suggested by Michel

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/gfx6: use cached values for raster config in clear state
Alex Deucher [Mon, 13 Nov 2017 20:48:37 +0000 (15:48 -0500)]
drm/amdgpu/gfx6: use cached values for raster config in clear state

Use the cached values rather than hardcoding it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>