Aric Cyr [Mon, 3 Jun 2019 15:30:43 +0000 (11:30 -0400)]
drm/amd/display: 3.2.37
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dmytro Laktyushkin [Thu, 30 May 2019 19:47:51 +0000 (15:47 -0400)]
drm/amd/display: fix dsc disable
A regression caused dsc to never get disabled in certain situations.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jun Lei [Mon, 3 Jun 2019 12:13:12 +0000 (08:13 -0400)]
drm/amd/display: fix up HUBBUB hw programming for VM
[why]
Some values were not being converted or bit-shifted properly for
HW registers, causing black screen
[how]
Fix up the values before programming HW
Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Mon, 3 Jun 2019 13:12:55 +0000 (09:12 -0400)]
drm/amd/display: 3.2.36
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Galiffi [Thu, 30 May 2019 15:56:39 +0000 (11:56 -0400)]
drm/amd/display: Add ability to set preferred link training parameters.
[WHY]
To add support for OS requirement to set preferred link training
parameters.
[HOW]
Create new structure of dp link training overrides. During link training
processes, these values should be used instead of the default training
parameters.
Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jun Lei [Fri, 31 May 2019 19:14:13 +0000 (15:14 -0400)]
drm/amd/display: initialize p_state to proper value
[why]
On some modes SMU will be in infinite loop state at boot, this is
because driver assumes p_state_support is false, but this is the
opposite of the assumed boot state by SMU. we optimize away
notifying SMU about no pstate, and so they will get stuck
[how]
when we init clk manager, init pstate to true, so it matches driver load
assumption
Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 18 Jul 2019 15:38:46 +0000 (11:38 -0400)]
drm/amdgpu: use VCN firmware offset for cache window
Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fuqian Huang [Thu, 11 Jul 2019 03:10:21 +0000 (11:10 +0800)]
drm/ttm: use the same attributes when freeing d_page->vaddr
In function __ttm_dma_alloc_page(), d_page->addr is allocated
by dma_alloc_attrs() but freed with use dma_free_coherent() in
__ttm_dma_free_page().
Use the correct dma_free_attrs() to free d_page->vaddr.
Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kevin Wang [Thu, 18 Jul 2019 07:46:55 +0000 (15:46 +0800)]
drm/amd/powerplay: change sysfs pp_dpm_xxx format for navi10
v2:
set average clock value on level 1 when current clock equal
min or max clock (fine grained dpm support).
the navi10 gfxclk (sclk) support fine grained DPM,
so use level 1 to show current dpm freq in sysfs pp_dpm_xxx
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 18 Jul 2019 08:03:46 +0000 (16:03 +0800)]
drm/amdgpu: drop ras self test
this function is not needed any more. error injection is
the only way to validate ras but it can't be executed in
amdgpu_ras_init, where gpu is even not initialized
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 18 Jul 2019 05:59:38 +0000 (13:59 +0800)]
drm/amdgpu: only allow error injection to UMC IP block
error injection to other IP blocks (except UMC) will be enabled
until RAS feature stablize on those IP blocks
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 18 Jul 2019 04:52:56 +0000 (12:52 +0800)]
drm/amdgpu: disable GFX RAS by default
GFX RAS has not been stablized yet. disable GFX ras until
it is fully funcitonal.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 18 Jul 2019 04:49:15 +0000 (12:49 +0800)]
drm/amdgpu: do not create ras debugfs/sysfs node for ASICs that don't have ras ability
driver shouldn't init any ras debugfs/sysfs node for ASICs that don't have ras
hardware ability
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Wed, 17 Jul 2019 08:32:27 +0000 (16:32 +0800)]
drm/amd/powerplay: report bootup clock as max supported on dpm disabled
With gfxclk or uclk dpm disabled, it's reasonable to report bootup clock
as the max supported.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Joseph Greathouse [Wed, 17 Jul 2019 16:55:22 +0000 (11:55 -0500)]
drm/amdgpu: Default disable GDS for compute VMIDs
The GDS and GWS blocks default to allowing all VMIDs to
access all entries. Graphics VMIDs can handle setting
these limits when the driver launches work. However,
compute workloads under HWS control don't go through the
kernel driver. Instead, HWS firmware should set these
limits when a process is put into a VMID slot.
Disable access to these devices by default by turning off
all mask bits (for OA) and setting BASE=SIZE=0 (for GDS
and GWS) for all compute VMIDs. If a process wants to use
these resources, they can request this from the HWS
firmware (when such capabilities are enabled). HWS will
then handle setting the base and limit for the process when
it is assigned to a VMID.
This will also prevent user kernels from getting 'stuck' in
GWS by accident if they write GWS-using code but HWS
firmware is not set up to handle GWS reset. Until HWS is
enabled to handle GWS properly, all GWS accesses will
MEM_VIOL fault the kernel.
v2: Move initialization outside of SRBM mutex
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jonathan Kim [Thu, 11 Jul 2019 16:19:44 +0000 (12:19 -0400)]
drm/amdgpu: exposing fica registers to df offsets
exposing fica registers to poll df pie data for xgmi error counters for
vega20.
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Alexander Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 11 Jul 2019 06:36:44 +0000 (14:36 +0800)]
drm/amd/powerplay: input check for unsupported message/clock index
This can avoid them to be handled in a wrong way without notice.
Since not all SMU messages/clocks are supported on every SMU11 ASIC.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Thu, 11 Jul 2019 02:23:17 +0000 (10:23 +0800)]
drm/amd/powerplay: correct SW SMU valid mapping check
Current implementation is not actually able to detect
invalid message/table/workload mapping.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 15 Jul 2019 21:16:00 +0000 (16:16 -0500)]
drm/amdgpu: flag arcturus as experimental for now
Current support will only work in internal engineering
boards.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 12 Jul 2019 03:10:31 +0000 (22:10 -0500)]
drm/amdgpu: drop unused function definitions
These were dropped and the headers never got cleaned up.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 1 Jul 2019 23:12:14 +0000 (19:12 -0400)]
drm/amdgpu:add all VCN rings into schedule request queue
Add all VCN instances' decode/encode/jpeg decode rings into
drm_sched_rq list.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Wed, 3 Jul 2019 03:01:59 +0000 (22:01 -0500)]
drm/amdkfd: Increase vcrat size for GPU
GPU cache info (part of virtual CRAT) size depends on CU number.
For arcturus, CU number has been increased. So the required memory
for vcrat also increases.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 2 Jul 2019 03:15:37 +0000 (11:15 +0800)]
drm/amdgpu: enable all 8 sdma instances for Arcturus silicon
The more 6 sdma instances work fine now with DF fix in vbios:
* mmDF_PIE_AON_MiscClientsEnable(0x1c728)=0x3fe(DF_ALL_INSTANCE)
[9:4]MmhubsEnable=3f (change from 0)
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jay Cornwall [Mon, 1 Jul 2019 20:46:56 +0000 (15:46 -0500)]
drm/amdkfd: Merge gfx9/arcturus trap handlers, add ACC VGPR save
ACC VGPRs are a secondary VGPR set of same size as the primary VGPRs.
Save them as a block immediately following VGPRs.
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Mon, 1 Jul 2019 04:48:40 +0000 (00:48 -0400)]
drm/amdgpu: Add more detail to the VM fault printing
With the printing, we don't need to parse the value on our own any more.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Tue, 9 Jul 2019 18:16:37 +0000 (13:16 -0500)]
drm/amdkfd: Add device id for real asics
Add pci device ids.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Sun, 30 Jun 2019 03:35:32 +0000 (11:35 +0800)]
drm/amdgpu: limit sdma instances to 2 for Arcturus in BU phase
Another 6 sdma instances do not work at present. Disable them to unblock KFD
for silicon bringup as a workaround
Signed-off-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Sat, 29 Jun 2019 14:22:13 +0000 (22:22 +0800)]
drm/amdgpu: skip gfx 9 common golden settings for arct
They are not needed by arct
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Tue, 9 Jul 2019 18:13:33 +0000 (13:13 -0500)]
drm/amdkfd: Add arcturus CWSR trap handler
CWSR (compute wave save/restore) is used for
preempting compute queues.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Fri, 28 Jun 2019 09:45:39 +0000 (05:45 -0400)]
amd/powerplay: No SW XGMI dpm for Arcturus rev 2
xgmi dpm is handled by the SMU.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Fri, 28 Jun 2019 07:08:04 +0000 (15:08 +0800)]
drm/amdgpu: clean up nonexistent firmware declaration for Arcturus
CPG firmwares are not used.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 28 Jun 2019 05:22:32 +0000 (13:22 +0800)]
drm/amdgpu: init gds config for arct
arct has 4KB gds (4 banks inside) so the max_wave_id
should be 0xfff
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 28 Jun 2019 03:07:53 +0000 (11:07 +0800)]
drm/amdgpu: keep stolen memory for arct
Any dce register read back from arct is invalid. use hard code
stolen memory for arct until we validate the s3.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 27 Jun 2019 10:05:30 +0000 (18:05 +0800)]
drm/amdgpu: init arct external rev id
Properly set the external silicon revision id.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 27 Jun 2019 07:08:48 +0000 (15:08 +0800)]
drm/amdgpu: add arct gc golden settings
Golden GC register settings from the hw team.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 27 Jun 2019 06:47:42 +0000 (14:47 +0800)]
drm/amdgpu: add arct sdma golden settings
Golden SDMA register settings from the hw team.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu [Tue, 9 Jul 2019 18:10:53 +0000 (13:10 -0500)]
drm/amdgpu: add pci DID for Arcturus GL-XL.
Add device ids for Arcturus.
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Mon, 22 Apr 2019 09:14:59 +0000 (17:14 +0800)]
drm/amdgpu: assign fb_start/end in mmhub v9.4 interface
Align with mmhub v1.0.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 10 Jul 2019 17:07:29 +0000 (12:07 -0500)]
drm/amdgpu: add harvest support for Arcturus
Add VCN harvest support for Arcturus
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 10 Jul 2019 16:06:37 +0000 (11:06 -0500)]
drm/amdgpu: add multiple instances support for Arcturus
Arcturus has dual-VCN. Need add multiple instances support for Arcturus.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 10 Jul 2019 15:53:34 +0000 (10:53 -0500)]
drm/amdgpu: modify amdgpu_vcn to support multiple instances
Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support
multiple vcns. There are no any logical changes here
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 10 Jul 2019 15:50:24 +0000 (10:50 -0500)]
drm/amdgpu: add vcn nbio doorbell range setting for 2nd vcn instance
add vcn nbio doorbell range setting for 2nd vcn instance
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Tue, 9 Jul 2019 16:07:51 +0000 (11:07 -0500)]
drm/amdgpu/: increase AMDGPU_MAX_RINGS to add 2nd vcn instance
increase AMDGPU_MAX_RINGS to add 2nd vcn instance
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Tue, 4 Jun 2019 18:47:10 +0000 (14:47 -0400)]
drm/amdgpu/: add doorbell assignment for 2nd vcn instance
add doorbell assignment for 2nd vcn instance
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Tue, 4 Jun 2019 18:44:33 +0000 (14:44 -0400)]
drm/amdgpu/: add ucodeID for 2nd vcn instance
add ucodeID for 2nd vcn instance
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Tue, 4 Jun 2019 18:41:48 +0000 (14:41 -0400)]
drm/amdgpu/: add clientID for 2nd vcn instance
add clientID for 2nd vcn instance, remove unused SOC15_IH_CLIENTID_SYSHUB.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Wed, 5 Jun 2019 20:45:26 +0000 (15:45 -0500)]
drm/amdkfd: Set number of xgmi optimized SDMA engines for arcturus
some sdma engines are optimized for xgmi on arcturus.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Mon, 20 May 2019 09:04:05 +0000 (17:04 +0800)]
drm/amdgpu: correct ip for mmHDP_READ_CACHE_INVALIDATE register access
Use the proper IP index for HDP registers.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Fri, 26 Apr 2019 08:36:44 +0000 (16:36 +0800)]
drm/amdgpu: set system aperture to cover whole FB region in mmhub v9.4
In XGMI configuration, the FB region covers vram region from peer
device, adjust system aperture to cover all of them
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 4 Jun 2019 06:58:49 +0000 (14:58 +0800)]
drm/amdgpu: skip get/update xgmi topology info when no psp exists
We don't currently have psp support for arcturus so provide a alternative
mechanism in the meantime.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Tue, 9 Jul 2019 16:04:17 +0000 (11:04 -0500)]
drm/amd/powerplay: get smc firmware and pptable
get smc firmware and pptable for arcturus
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Mon, 27 May 2019 11:01:39 +0000 (19:01 +0800)]
drm/amdgpu/powerplay: add smu11 driver interface for arcturus. (v2)
add smu11_driver_if_arcturus.h file.
v2: add license, fix header guard (Alex)
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chengming Gui [Tue, 9 Jul 2019 15:52:20 +0000 (10:52 -0500)]
drm/amdgpu/powerplay: add arcturus ppt functions
add arcturus_ppsmc.h arcturus_ppt.c and arcturus_ppt.h files.
This is the initial power management support for Arcturus.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Fri, 26 Apr 2019 17:46:21 +0000 (13:46 -0400)]
drm/amdgpu: enable the Doorbell support for VCN2.5
Including decode, encode, and JPEG decode rings
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 9 Jul 2019 15:18:36 +0000 (10:18 -0500)]
drm/amdgpu: add vcn doorbell range function to nbio7.4 (v2)
To setup the aperture for VCN2.5
v2: setup vcn doorbells in vcn2.5 hw_init (Alex)
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 16 Apr 2019 15:42:56 +0000 (11:42 -0400)]
drm/amdgpu: enable VCN2.5 on Arcturus
VCN is the video decode and encode engine on Arcturus
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 22 Apr 2019 16:21:16 +0000 (12:21 -0400)]
drm/amdgpu/VCN2.5: set JPEG decode ring functions
Also reuse most of the JPEG2.0 decode ring functions
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 16 Apr 2019 15:32:22 +0000 (11:32 -0400)]
drm/amdgpu: add JPEG2.5 HW start and stop
JPEG engine initialization and suspend sequences
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 22 Apr 2019 16:17:38 +0000 (12:17 -0400)]
drm/amdgpu/VCN2.5: set encode ring functions
Also reuse most of the VCN2.0 encode ring functions
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 16 Apr 2019 15:17:46 +0000 (11:17 -0400)]
drm/amdgpu/VCN2.5: set decode ring functions
Also reuse most of the VCN2.0 decode ring functions
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 9 Jul 2019 15:09:06 +0000 (10:09 -0500)]
drm/amdgpu: add Arcturus to the VCN family
including firmware support etc.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Apr 2019 16:41:09 +0000 (12:41 -0400)]
drm/amdgpu: add VCN2.5 VCPU start and stop
HW engine initialization and suspend sequences.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Apr 2019 16:21:42 +0000 (12:21 -0400)]
drm/amdgpu: add VCN2.5 basic supports
i.e. basic VCN IP SW structures
VCN is the video codec block on the GPU.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Tue, 9 Jul 2019 15:04:39 +0000 (10:04 -0500)]
drm/amdgpu/VCN2: expose rings functions
They can be reused by VCN2.x family
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Apr 2019 13:39:06 +0000 (09:39 -0400)]
drm/amdgpu/VCN2: put IB internal registers offset to structure
So the ring functions can be shared with different VCN versions
with different internal registers offsets
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 21 May 2019 11:34:41 +0000 (19:34 +0800)]
drm/amdgpu: declare sdma firmware binary files for Arcturus
So that they are properly picked up as a driver dependency.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Tue, 9 Jul 2019 15:01:35 +0000 (10:01 -0500)]
drm/amdgpu: Clear build undefined warning
Add amdgpu_amdkfd_arcturus_get_functions stub when
CONFIG_HSA_AMD is undefinded.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Wed, 20 Mar 2019 21:04:10 +0000 (16:04 -0500)]
drm/amdgpu: Enable xgmi support for Arcturus
xgmi is a high performance cross-GPU communication channel.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Thu, 14 Mar 2019 16:44:24 +0000 (11:44 -0500)]
drm/amdgpu: Hack xgmi topology info when there is no psp fw
This is only needed on emulation platform where psp fw might
not be available, to hack xgmi topology info such as hive id and
node id.
v2: Add offset to hacked hive/node id
v3: Don't use introduce new module parameter.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Sat, 9 Feb 2019 04:06:55 +0000 (23:06 -0500)]
drm/amdkfd: Support MMHUB1 in kfd interrupt path
Handle interrupts for second mmhub.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Fri, 15 Mar 2019 00:28:50 +0000 (20:28 -0400)]
drm/amdgpu: Set VM_L2_CNTL.PDE_FAULT_CLASSIFICATION to 0 for MMHUB 9.4
Should be set to 0 for mmhub 9.4.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Tue, 9 Jul 2019 14:59:30 +0000 (09:59 -0500)]
drm/amdkfd: Implement kfd2kgd_calls for Arcturus
Arcturus shares most of the kfd2kgd_calls with gfx9. But due to
SDMA register address change, it can't share SDMA related functions.
Export gfx9 kfd2kgd_calls and implement SDMA related functions
for Arcturus.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Tue, 9 Jul 2019 14:40:15 +0000 (09:40 -0500)]
drm/amdkfd: Fix sdma_bitmap overflow issue
In the original formula, when sdma queue number is 64,
the left shift overflows. Use an equivalence that won't
overflow.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Wed, 12 Dec 2018 22:33:56 +0000 (16:33 -0600)]
drm/amdkfd: Change arcturus sdma engines number
Arcturus has 8 sdma engines
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Yong Zhao <yong.zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Fri, 12 Oct 2018 20:16:15 +0000 (16:16 -0400)]
drm/amdkfd: Support two MMHUBs when setting up page table base in KFD
2 mmhubs on arcturus.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Thu, 15 Nov 2018 17:59:34 +0000 (12:59 -0500)]
drm/amdkfd: Expose function mmhub_v9_4_setup_vm_pt_regs() for kfd to use
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Tue, 9 Jul 2019 14:37:04 +0000 (09:37 -0500)]
amd/amdkfd: Add ASIC ARCTURUS to kfd
Add initial support for ARCTURUS to kfd.
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Tue, 19 Feb 2019 20:59:51 +0000 (14:59 -0600)]
drm/amdkfd: Support bigger gds size
Extend map_process and set_resources pm4 packet to support
bigger gds size for arcturus.
v2: Only make the change for v9
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Thu, 14 Feb 2019 20:53:15 +0000 (14:53 -0600)]
drm/amdkfd: Extend PM4 packets to support 8 SDMA
Extend map_queue and unmap_queue PM4 packets to support 8
SDMA engines. The new format is backward compatible.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Wed, 19 Dec 2018 14:44:38 +0000 (08:44 -0600)]
drm/amdgpu: Initialize asic functions for Arcturus
After cherry-picking doorbell rework changes from drm-next
branch, Arcturus asic functions pointer need to be initialized
to init doorbell index for Arcturus.
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 16 Jul 2019 18:39:42 +0000 (13:39 -0500)]
drm/amdgpu: add paging queue support for 8 SDMA instances on Arcturus
Properly enable all 8 instances for paging queue.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 26 Feb 2019 12:37:17 +0000 (20:37 +0800)]
drm/amdgpu: correct programming of ih_chicken for Arcturus
ih_chicken is a register that is not allowed to access by driver
in the L0 security policy.
psp bl need to enable field to allow driver to use physical
bus address for ih ring on secure part.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Snow Zhang <snow.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Thu, 15 Nov 2018 10:54:35 +0000 (18:54 +0800)]
drm/amdgpu: add Arcturus chip_name for init sdma microcode
So we load the proper firmware for arcturus.
Signed-off-by: Le Ma <le.ma@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 20 Nov 2018 07:15:31 +0000 (15:15 +0800)]
drm/amdgpu: enable 8 SDMA instances for Arcturus
All the 8 SDMA instances work fine on the latest Gopher build model.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Thu, 15 Nov 2018 10:56:17 +0000 (18:56 +0800)]
drm/amdgpu: correct Arcturus SDMA address space base index
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 19 Sep 2018 06:17:37 +0000 (14:17 +0800)]
drm/amdgpu: support sdma 2~7 doorbell range register offset
Update the doorbell range registers to support additional
SDMA rings.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 18 Sep 2018 09:39:59 +0000 (17:39 +0800)]
drm/amdgpu: skip all gfx ring settings for Arcturus
Not needed on Arcturus.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 18 Sep 2018 09:04:42 +0000 (17:04 +0800)]
drm/amdgpu: skip load cp gfx firmware for Arcturus
Arcturus has no CPG component any more.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 18 Sep 2018 08:11:44 +0000 (16:11 +0800)]
drm/amdgpu: optimize gfx9 init_microcode function
Split each type of firmware into single function for easy to maintain.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 9 Jul 2019 14:30:19 +0000 (09:30 -0500)]
drm/amdgpu: add Arcturus gpu info firmware
Add GPU info firmware for Arcturus.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 05:11:28 +0000 (13:11 +0800)]
drm/amdgpu: skip pasid mapping for second mmhub on Arcturus
There's no LUT register for second mmhub to convert pasid since it has no ATC.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 04:33:11 +0000 (12:33 +0800)]
drm/amdgpu: skip to get 3D engine clockgating state for Arcturus
It's because Arcturus has not 3D engine.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 04:14:37 +0000 (12:14 +0800)]
drm/amdgpu: add to set rlc funcs for Arcturus
Shared with other gfx9 parts so use the same functions.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 04:13:41 +0000 (12:13 +0800)]
drm/amdgpu: add number of mec for Arcturus
MEC is the CP compute microcontroller.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 04:11:36 +0000 (12:11 +0800)]
drm/amdgpu: add gfx config for Arcturus
Add Arcturus GFX config.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 03:58:48 +0000 (11:58 +0800)]
drm/amdgpu: add support for Arcturus firmware
Add support for Arcturus gfx firmwares.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 9 Jul 2019 14:23:11 +0000 (09:23 -0500)]
drm/amdgpu/dce_virtual: add Arcturus virtual display support
Virtual dce is a sw only display driver for emulation and
virtualization and cases where we want to use a virtual
display subsystem.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 03:35:34 +0000 (11:35 +0800)]
drm/amdgpu: set Arcturus fw load type as direct
We currently only support direct firmware loading.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 03:20:18 +0000 (11:20 +0800)]
drm/amdgpu: add to set Arcturus ip blocks
Add IP blocks for Arcturus.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Tue, 11 Sep 2018 03:07:09 +0000 (11:07 +0800)]
drm/amdgpu/soc15: add Arcturus common ip blocks
Add common IP blocks for Arcturus.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / openwrt / staging / blogic.git / log