Stephen Boyd [Wed, 15 Aug 2018 05:58:49 +0000 (22:58 -0700)]
Merge branches 'clk-qcom-rpmh', 'clk-qcom-spdx', 'clk-con-id-leak', 'clk-fixed-factor-populated' and 'clk-mvebu-periph-parent' into clk-next
* clk-qcom-rpmh:
: - Qualcomm RPMh clk driver
clk: qcom: clk-rpmh: Add QCOM RPMh clock driver
* clk-qcom-spdx:
: - SPDX tagging for qcom
clk: qcom: Update SPDX headers for common files
* clk-con-id-leak:
: - Stop leaking con ids in __clk_put()
clk: core: Potentially free connection id
* clk-fixed-factor-populated:
: - Fix a corner case in fixed factor clk probing where node is in DT but
: parent clk is registered much later
clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failure
* clk-mvebu-periph-parent:
: - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value
clk: mvebu: armada-37xx-periph: Remove unused var num_parents
clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent
Stephen Boyd [Wed, 15 Aug 2018 05:58:45 +0000 (22:58 -0700)]
Merge branches 'clk-mvebu-spdx', 'clk-meson', 'clk-imx7d-mu', 'clk-imx-init-array-cleanup' and 'clk-rockchip' into clk-next
* clk-mvebu-spdx:
clk: mvebu: armada-37xx-periph: switch to SPDX license identifier
* clk-meson:
clk: meson: add gen_clk
clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition
clk: meson-axg: add clocks required by pcie driver
clk: meson: remove unused clk-audio-divider driver
clk: meson: stop rate propagation for audio clocks
clk: meson: axg: add the audio clock controller driver
clk: meson: add axg audio sclk divider driver
clk: meson: add triple phase clock driver
clk: meson: add clk-phase clock driver
clk: meson: clean-up meson clock configuration
clk: meson: remove obsolete register access
clk: meson: expose GEN_CLK clkid
clk: meson-axg: add pcie and mipi clock bindings
dt-bindings: clock: add meson axg audio clock controller bindings
clk: meson: audio-divider is one based
clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL
* clk-imx7d-mu:
: - i.MX7D mailbox clk support
clk: imx7d: add IMX7D_MU_ROOT_CLK
* clk-imx-init-array-cleanup:
: - i.MX clk init arrays removed in place of CLK_IS_CRITICAL
clk: imx6sx: remove clks_init_on array
clk: imx6sl: remove clks_init_on array
clk: imx6q: remove clks_init_on array
* clk-rockchip:
clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
clk: rockchip: fix clk_i2sout parent selection bits on rk3399
clk: rockchip: add clock controller for px30
clk: rockchip: add support for half divider
dt-bindings: add bindings for px30 clock controller
clk: rockchip: add dt-binding header for px30
Stephen Boyd [Wed, 15 Aug 2018 05:58:42 +0000 (22:58 -0700)]
Merge branches 'clk-imx-critical', 'clk-tegra-bpmp', 'clk-tegra-124', 'clk-tegra-critical' and 'clk-tegra-emc-oob' into clk-next
* clk-imx-critical:
: - Convert to CLK_IS_CRITICAL for i.MX51/53 driver
clk: imx51-imx53: Include sizes.h to silence compile errors
clk: imx51-imx53: Annotate critical clocks as CLK_IS_CRITICAL
* clk-tegra-bpmp:
: - Fix Tegra BPMP driver oops when some xlating a NULL clk
clk: tegra: bpmp: Don't crash when a clock fails to register
* clk-tegra-124:
: - Proper default configuration for vic03 and vde clks on Tegra124
clk: tegra: Make vde a child of pll_c3
clk: tegra: Make vic03 a child of pll_c3
* clk-tegra-critical:
: - Mark Tegra memory controller clks as critical
clk: tegra: Mark Memory Controller clock as critical
* clk-tegra-emc-oob:
: - Fix array bounds clamp in Tegra's emc determine_rate() op
clk: tegra: emc: Avoid out-of-bounds bug
Stephen Boyd [Wed, 15 Aug 2018 05:58:39 +0000 (22:58 -0700)]
Merge branches 'clk-ingenic-fixes', 'clk-max9485', 'clk-pxa-32k-pll', 'clk-aspeed' and 'clk-imx6sll-gpio' into clk-next
* clk-ingenic-fixes:
: - Ingenic i2s bit update and allow UDC clk to gate
clk: ingenic: Add missing flag for UDC clock
clk: ingenic: Fix incorrect data for the i2s clock
* clk-max9485:
: - Maxim 9485 Programmable Clock Generator
clk: Add driver for MAX9485
dts: clk: add devicetree bindings for MAX9485
* clk-pxa-32k-pll:
: - Expose 32 kHz PLL on PXA SoCs
clk: pxa: export 32kHz PLL
* clk-aspeed:
: - Fix name of aspeed SDC clk define to have only one 'CLK'
clk: aspeed: Fix SDCLK name
* clk-imx6sll-gpio:
: - imx6sll GPIO clk gate support
clk: imx6sll: add GPIO LPCGs
Stephen Boyd [Wed, 15 Aug 2018 05:58:35 +0000 (22:58 -0700)]
Merge branches 'clk-imx6-video-parent', 'clk-qcom-sdm845-criticals', 'clk-renesas', 'clk-stratix10-fixes' and 'clk-atmel-i2s' into clk-next
* clk-imx6-video-parent:
: - Fix i.MX6QDL video clk parent
clk: imx6: fix video_27m parent for IMX6QDL_CLK_CKO1_SEL
* clk-qcom-sdm845-criticals:
: - critical clk markings for qcom SDM845
clk: qcom: Enable clocks which needs to be always on for SDM845
* clk-renesas:
clk: renesas: Renesas R9A06G032 clock driver
dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
dt-bindings: clock: Add the r9a06g032-sysctrl.h file
clk: renesas: r8a7795: Add CCREE clock
clk: renesas: r8a7795: Add CR clock
* clk-stratix10-fixes:
: - Fix Stratix10 mpu_free_clk and sdmmc_free_clk parents
clk: socfpga: stratix10: fix the sdmmc_free_clk mux
clk: socfpga: stratix10: fix the parents of mpu_free_clk
* clk-atmel-i2s:
: - Atmel at91 I2S audio clk support
clk: at91: add I2S clock mux driver
dt-bindings: clk: at91: add an I2S mux clock
Stephen Boyd [Wed, 15 Aug 2018 05:58:30 +0000 (22:58 -0700)]
Merge branches 'clk-qcom-set-rate-gate', 'clk-core-set-rate-gate', 'clk-core-duty-cycle', 'clk-si-prepare' and 'clk-imx-gpio-gates' into clk-next
* clk-qcom-set-rate-gate:
clk: qcom: drop CLK_SET_RATE_GATE from sdc clocks
* clk-core-set-rate-gate:
clk: fix CLK_SET_RATE_GATE with clock rate protection
* clk-core-duty-cycle:
clk: add duty cycle support
* clk-si-prepare:
: - SI544/SI514 clk on/off support
clk-si514, clk-si544: Implement prepare/unprepare/is_prepared operations
* clk-imx-gpio-gates:
: - i.MX6UL GPIO clock gates in CCM CCGR
clk: imx6ul: remove clks_init_on array
clk: imx6ul: add GPIO clock gates
dt-bindings: clock: imx6ul: Do not change the clock definition order
Stephen Boyd [Wed, 8 Aug 2018 05:53:37 +0000 (22:53 -0700)]
Merge tag 'v4.19-rockchip-clk2' of git://git./linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull one final rockchip update from Heiko Stuebner:
pclk_rkpwm_pmu as critical clock, due to it supplying the pwm
used to drive the logic supply of the rk3399 core.
* tag 'v4.19-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
Levin Du [Sat, 4 Aug 2018 07:31:02 +0000 (15:31 +0800)]
clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399
PWM2 is commonly used to control voltage of PWM regulator of VDD_LOG in
RK3399. On the Firefly-RK3399 board, PWM2 outputs 40 KHz square wave
from power on and the VDD_LOG is about 0.9V. When the kernel boots
normally into the system, the PWM2 keeps outputing PWM signal.
But the kernel hangs randomly after "Starting kernel ..." line on that
board. When it happens, PWM2 outputs high level which causes VDD_LOG
drops to 0.4V below the normal operating voltage.
By adding "pclk_rkpwm_pmu" to the rk3399_pmucru_critical_clocks array,
PWM clock is ensured to be prepared at startup and the PWM2 output is
normal. After repeated tests, the early boot hang is gone.
This patch works on both Firefly-RK3399 and ROC-RK3399-PC boards.
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Anders Roxell [Thu, 26 Jul 2018 22:27:21 +0000 (00:27 +0200)]
clk: mvebu: armada-37xx-periph: Remove unused var num_parents
When building armada-37xx-periph, num_parents isn't used in function
clk_pm_cpu_get_parent:
drivers/clk/mvebu/armada-37xx-periph.c: In function ‘clk_pm_cpu_get_parent’:
drivers/clk/mvebu/armada-37xx-periph.c:419:6: warning: unused variable ‘num_parents’ [-Wunused-variable]
int num_parents = clk_hw_get_num_parents(hw);
^~~~~~~~~~~
Remove the declaration of num_parents to dispose the warning.
Fixes: 616bf80d381d ("clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent")
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Gregory CLEMENT [Fri, 13 Jul 2018 10:27:26 +0000 (12:27 +0200)]
clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent
The return value of the get_parent operation is a u8, whereas a -EINVAL
was returned. This wrong value was return if the value was bigger that
the number of parent but this case was already handled by the core.
So we can just remove this chunk of code to fix the issue.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Fixes: 9818a7a4fd10 ("clk: mvebu: armada-37xx-periph: prepare cpu clk to
be used with DVFS")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Rajan Vaja [Tue, 17 Jul 2018 13:17:00 +0000 (06:17 -0700)]
clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failure
Fixed factor clock has two initializations at of_clk_init() time
and during platform driver probe. Before of_clk_init() call,
node is marked as populated and so its probe never gets called.
During of_clk_init() fixed factor clock registration may fail if
any of its parent clock is not registered. In this case, it doesn't
get chance to retry registration from probe. Clear OF_POPULATED
flag if fixed factor clock registration fails so that clock
registration is attempted again from probe.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Mikko Perttunen [Wed, 11 Jul 2018 08:21:04 +0000 (11:21 +0300)]
clk: core: Potentially free connection id
Patch "clk: core: Copy connection id" made it so that the connector id
'con_id' is kstrdup_const()ed to cater to drivers that pass non-constant
connection ids. The patch added the corresponding kfree_const to
__clk_free_clk(), but struct clk's can be freed also via __clk_put().
Add the kfree_const call to __clk_put() and add comments to both
functions to remind that the logic in them should be kept in sync.
Fixes: 253160a8ad06 ("clk: core: Copy connection id")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Mon, 16 Jul 2018 05:54:32 +0000 (11:24 +0530)]
clk: qcom: Update SPDX headers for common files
SPDX headers updated for common/branch/pll/regmap files.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Wed, 9 May 2018 05:56:07 +0000 (11:26 +0530)]
clk: qcom: clk-rpmh: Add QCOM RPMh clock driver
Add the RPMh clock driver to control the RPMh managed clock resources on
some of the Qualcomm Technologies, Inc. SoCs.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
[sboyd@kernel.org: Clean up whitespace, indentation, remove
cmd_db_ready check]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Wed, 11 Jul 2018 17:31:52 +0000 (10:31 -0700)]
Merge tag 'v4.19-rockchip-clk1' of git://git./linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner:
Support for Rockchip's PX30 SoC including its new half-divider
clock type that is doing freq_out = 2*freq_in / (2*div + 3).
As well as a register-bit fix for the rk3399 i2sout clock.
* tag 'v4.19-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: fix clk_i2sout parent selection bits on rk3399
clk: rockchip: add clock controller for px30
clk: rockchip: add support for half divider
dt-bindings: add bindings for px30 clock controller
clk: rockchip: add dt-binding header for px30
Oleksij Rempel [Fri, 15 Jun 2018 09:51:04 +0000 (11:51 +0200)]
clk: imx7d: add IMX7D_MU_ROOT_CLK
This clock is needed for iMX mailbox driver
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Mon, 9 Jul 2018 16:47:55 +0000 (09:47 -0700)]
Merge tag 'meson-clk-4.19-1' of https://github.com/BayLibre/clk-meson into clk-meson
Pull first round of updates for meson clocks from Jerome Brunet:
- Remove legacy register access (finish moving to syscon)
- Clean up configuration flags
- Add axg PCIe clocks
- Add GEN CLK on gxbb, gxl and axg
- Remove clk_audio_divider driver
- Add axg audio clock controller
* tag 'meson-clk-4.19-1' of https://github.com/BayLibre/clk-meson:
clk: meson: add gen_clk
clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition
clk: meson-axg: add clocks required by pcie driver
clk: meson: remove unused clk-audio-divider driver
clk: meson: stop rate propagation for audio clocks
clk: meson: axg: add the audio clock controller driver
clk: meson: add axg audio sclk divider driver
clk: meson: add triple phase clock driver
clk: meson: add clk-phase clock driver
clk: meson: clean-up meson clock configuration
clk: meson: remove obsolete register access
clk: meson: expose GEN_CLK clkid
clk: meson-axg: add pcie and mipi clock bindings
dt-bindings: clock: add meson axg audio clock controller bindings
clk: meson: audio-divider is one based
clk: add duty cycle support
clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL
Gregory CLEMENT [Tue, 19 Jun 2018 12:34:46 +0000 (14:34 +0200)]
clk: mvebu: armada-37xx-periph: switch to SPDX license identifier
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Jerome Brunet [Wed, 4 Jul 2018 16:54:58 +0000 (18:54 +0200)]
clk: meson: add gen_clk
GEN_CLK is able to route several internal clocks to one of the SoC
pads. In the future, even more clocks could be made accessible using
cts_msr_clk - the clock measure block.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Wed, 4 Jul 2018 16:54:56 +0000 (18:54 +0200)]
clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition
HHI_GEN_CLK_CTNL is defined twice, just remove the duplicate definition
Fixes: 738f66d3211d ("clk: gxbb: add AmLogic GXBB clk controller driver")
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Yixun Lan [Mon, 2 Jul 2018 21:31:18 +0000 (21:31 +0000)]
clk: meson-axg: add clocks required by pcie driver
Adding clocks for the pcie driver. Due to the ASIC design,
the pcie controller re-use part of the mipi clock logic,
so the mipi clock is also added.
Tested-by: Jianxin Qin <jianxin.qin@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[amended to remove unnecessary locales]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Wed, 20 Jun 2018 10:06:10 +0000 (12:06 +0200)]
clk: meson: remove unused clk-audio-divider driver
clk-audio-divider is no longer used, we can remove it.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Wed, 20 Jun 2018 10:06:09 +0000 (12:06 +0200)]
clk: meson: stop rate propagation for audio clocks
It is actually a lot easier to setup the PLL with carefully chosen rates
than relying on CCF clock propagation for this audio use case.
This way, we can make sure we will always be able to provide the common
audio clock rates, while having the PLL in the optimal operating range.
For this, we stop the rate propagation at the mux picking the
PLL and let it round to the closest matching PLL.
Doing so, we can use the generic divider for the i2s clock.
clk-audio-divider is no longer required. It was a (poor) attempt
to use CCF rate propagation while making sure the PLL rate would
be high enough to work with audio use cases.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Tue, 22 May 2018 16:34:57 +0000 (18:34 +0200)]
clk: meson: axg: add the audio clock controller driver
The axg audio clock controller is the clock generation unit for the
amlogic audio subsystem of A113 based SoCs. It may be clocked by 8
different plls provided by the primary clock controller and also by
10 slave bit clocks and 10 slave sample clocks which may be provided
by external components, such as audio codecs, through the SoC pads.
It contains several muxes, dividers and gates which are fed into the
the different devices of the audio subsystem.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Tue, 22 May 2018 16:34:55 +0000 (18:34 +0200)]
clk: meson: add axg audio sclk divider driver
Add a driver to control the clock divider found in the sample clock
generator of the axg audio clock controller.
The sclk divider accumulates specific features which make the generic
divider unsuitable to control it:
- zero based divider (div = val + 1), but zero value gates the clock,
so minimum divider value is 2.
- lrclk variant may adjust the duty cycle depending the divider value
and the 'hi' value.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Mon, 9 Jul 2018 11:47:38 +0000 (13:47 +0200)]
Merge remote-tracking branch 'clk/clk-core-duty-cycle' into next/drivers
Jerome Brunet [Tue, 22 May 2018 16:34:54 +0000 (18:34 +0200)]
clk: meson: add triple phase clock driver
Add a driver to control the output of the sample clock generator found
in the axg audio clock controller.
The goal of this driver is to coherently control the phase provided to
the different element using the sample clock generator. This simplify
the usage of the sample clock generator a lot, without comprising the
ability of the SoC.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Tue, 22 May 2018 16:34:53 +0000 (18:34 +0200)]
clk: meson: add clk-phase clock driver
Add a driver based meson clk-regmap to control clock phase on
amlogic SoCs
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Mon, 9 Jul 2018 11:46:33 +0000 (13:46 +0200)]
Merge branch 'next/dt' into next/drivers
Jerome Brunet [Tue, 22 May 2018 16:34:52 +0000 (18:34 +0200)]
clk: meson: clean-up meson clock configuration
Clean the dependencies in meson clock Kconfig.
CLK_AMLOGIC should actually select CLK_REGMAP_MESON which it uses. Also,
each platform should select CLK_AMLOGIC, so everything is properly turned
on when the platform Kconfig enable each configuration flag
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Tue, 19 Jun 2018 16:00:50 +0000 (18:00 +0200)]
clk: meson: remove obsolete register access
The legacy method to access the hhi register space is not longer used.
We can safely drop it now.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Wed, 4 Jul 2018 16:54:57 +0000 (18:54 +0200)]
clk: meson: expose GEN_CLK clkid
Expose GEN_CLK clock id
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Dmitry Osipenko [Tue, 5 Jun 2018 12:12:32 +0000 (15:12 +0300)]
clk: tegra: emc: Avoid out-of-bounds bug
Apparently there was an attempt to avoid out-of-bounds accesses when there
is only one memory timing available, but there is a typo in the code that
neglects that attempt.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Dmitry Osipenko [Sun, 3 Jun 2018 22:48:05 +0000 (01:48 +0300)]
clk: tegra: Mark Memory Controller clock as critical
Memory Controller should be always-on. Currently the sibling EMC clock is
marked as critical, let's mark MC clock too for consistency.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Thierry Reding [Mon, 11 Jun 2018 08:20:37 +0000 (10:20 +0200)]
clk: tegra: Make vde a child of pll_c3
The current default is to leave the VDE clock's parent at the default,
which is clk_m. However, that is not a configuration that will allow the
VDE to function. Reparent it to pll_c3 instead to make sure the hardware
can actually decode video content.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Thierry Reding [Mon, 11 Jun 2018 08:18:53 +0000 (10:18 +0200)]
clk: tegra: Make vic03 a child of pll_c3
By default, the vic03 clock is a child of pll_m but that runs at 924 MHz
which is too fast for VIC. Make vic03 a child of pll_c3 by default so it
will run at a supported frequency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Mikko Perttunen [Fri, 29 Jun 2018 14:38:14 +0000 (17:38 +0300)]
clk: tegra: bpmp: Don't crash when a clock fails to register
When registering clocks, we just skip any that fail to register
(leaving a NULL hole in the clock table). However, our of_xlate
function still tries to dereference each entry while looking for
the clock with the requested id, causing a crash if any clocks
failed to register. Add a check to of_xlate to skip any NULL
clocks.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Alberto Panizzo [Fri, 6 Jul 2018 13:18:51 +0000 (15:18 +0200)]
clk: rockchip: fix clk_i2sout parent selection bits on rk3399
Register, shift and mask were wrong according to datasheet.
Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399")
Cc: stable@vger.kernel.org
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Signed-off-by: Anthony Brandon <anthony@amarulasolutions.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Stephen Boyd [Fri, 6 Jul 2018 21:08:04 +0000 (14:08 -0700)]
clk: imx51-imx53: Include sizes.h to silence compile errors
This driver uses sizes.h, but relies on it being implicitly included
somewhere else breaking random direct compilation of the file. Include
sizes.h so we can build it those configurations too for better compile
coverage.
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Fabio Estevam [Wed, 4 Jul 2018 13:49:23 +0000 (10:49 -0300)]
clk: imx51-imx53: Annotate critical clocks as CLK_IS_CRITICAL
Instead of explicitly enabling critical clocks via clk_prepare_enable(),
let's use the standard CLK_IS_CRITICAL flag instead, which makes the code
a bit shorter.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Anson Huang [Fri, 22 Jun 2018 06:32:33 +0000 (14:32 +0800)]
clk: imx6sll: add GPIO LPCGs
According to Reference Manual Rev.0, 06/2017, there are GPIO LPCGs
defined in CCM CCGRs, add them into clock tree.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Lei YU [Tue, 26 Jun 2018 01:55:25 +0000 (09:55 +0800)]
clk: aspeed: Fix SDCLK name
The SDCLK was named SDCLKCLK, and no one has used this yet.
Fix it.
Signed-off-by: Lei YU <mine260309@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Robert Jarzmik [Wed, 27 Jun 2018 19:41:23 +0000 (21:41 +0200)]
clk: pxa: export 32kHz PLL
This clock is especially used by the RTC driver, so export it so that
devicetree users can use it.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Fri, 6 Jul 2018 18:53:03 +0000 (20:53 +0200)]
clk: Add driver for MAX9485
This patch adds a driver for MAX9485, a programmable audio clock generator.
The device requires a 27.000 MHz clock input. It can provide a gated
buffered output of its input clock and two gated outputs of a PLL that can
generate one out of 16 discrete frequencies. There is only one PLL however,
so the two gated outputs will always have the same frequency but they can
be switched individually.
The driver for this device exposes 4 clocks in total:
- MAX9485_MCLKOUT: A gated, buffered output of the input clock
- MAX9485_CLKOUT: A PLL that can be configured to 16 different
discrete frequencies
- MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT
Some PLL output frequencies can be achieved with different register
settings. The driver will select the one with lowest jitter in such cases.
Signed-off-by: Daniel Mack <daniel@zonque.org>
[sboyd@kernel.org: Use local variable for val in max9485_clkout_recalc_rate()
and shorten line of max9485_of_clk_get()]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Paul Cercueil [Wed, 27 Jun 2018 12:14:59 +0000 (14:14 +0200)]
clk: ingenic: Add missing flag for UDC clock
The UDC clock of the JZ4740 SoC can be gated, but the data structure
representing it was missing the CGU_CLK_GATE flag to make it work.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Paul Cercueil [Wed, 27 Jun 2018 12:14:58 +0000 (14:14 +0200)]
clk: ingenic: Fix incorrect data for the i2s clock
The register field for configuring the divider for the i2s clock
occupies the bits [8-0], which means 9 bits and not 8.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Sun, 17 Jun 2018 12:05:34 +0000 (14:05 +0200)]
dts: clk: add devicetree bindings for MAX9485
This patch adds the devicetree bindings for MAX9485, a programmable audio
clock generator.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Codrin Ciubotariu [Mon, 18 Jun 2018 14:12:36 +0000 (17:12 +0300)]
clk: at91: add I2S clock mux driver
This driver is a simple muxing driver that controls the
I2S's clock input by using syscon/regmap to change the parent.
The available inputs can be peripheral clock and generated clock.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
[sboyd@kernel.org: Fix SPDX tag comment style]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Codrin Ciubotariu [Mon, 18 Jun 2018 14:12:35 +0000 (17:12 +0300)]
dt-bindings: clk: at91: add an I2S mux clock
The I2S mux clock can be used to select the I2S input clock. The
available parents are the peripheral and the generated clocks.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Dinh Nguyen [Tue, 26 Jun 2018 13:28:10 +0000 (08:28 -0500)]
clk: socfpga: stratix10: fix the sdmmc_free_clk mux
The first parent of the sdmmc_free_clk should be the main_sdmmc_clk.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Dinh Nguyen [Tue, 26 Jun 2018 13:28:09 +0000 (08:28 -0500)]
clk: socfpga: stratix10: fix the parents of mpu_free_clk
Add a clock mux that is used as a parent for the mpu_free_clk.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Fri, 6 Jul 2018 17:58:51 +0000 (10:58 -0700)]
Merge tag 'clk-renesas-for-v4.19-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates for v4.19 from Geert Uytterhoeven:
- Add support for Crypto Engine clocks on R-Car H3
- Add support for the new RZ/N1D SoC
* tag 'clk-renesas-for-v4.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: Renesas R9A06G032 clock driver
dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
dt-bindings: clock: Add the r9a06g032-sysctrl.h file
clk: renesas: r8a7795: Add CCREE clock
clk: renesas: r8a7795: Add CR clock
Elaine Zhang [Fri, 15 Jun 2018 02:16:51 +0000 (10:16 +0800)]
clk: rockchip: add clock controller for px30
Add the clock tree definition for the new px30 SoC.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Elaine Zhang [Fri, 15 Jun 2018 02:16:50 +0000 (10:16 +0800)]
clk: rockchip: add support for half divider
The new Rockchip socs have optional half divider:
The formula is shown as:
freq_out = 2*freq_in / (2*div + 3)
Is this the same for all of new SoCs.
So we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \
DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV"
to hook that special divider clock-type into our clock-tree.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Tue, 3 Jul 2018 18:50:49 +0000 (20:50 +0200)]
Merge branch 'v4.19-shared/clkids' into v4.19-clk/next
Elaine Zhang [Fri, 15 Jun 2018 02:16:48 +0000 (10:16 +0800)]
dt-bindings: add bindings for px30 clock controller
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Elaine Zhang [Fri, 15 Jun 2018 02:16:49 +0000 (10:16 +0800)]
clk: rockchip: add dt-binding header for px30
Add the dt-bindings header for the px30, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for px30.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Amit Nischal [Mon, 11 Jun 2018 06:38:15 +0000 (12:08 +0530)]
clk: qcom: Enable clocks which needs to be always on for SDM845
There are certain clocks which needs to be always enabled for system
operation. Add support for the same by adding 'CLK_IS_CRITICAL' flag
for such clocks.
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Yixun Lan [Mon, 2 Jul 2018 21:31:17 +0000 (21:31 +0000)]
clk: meson-axg: add pcie and mipi clock bindings
Add the pcie and mipi clock dt-bindings for the pcie driver.
Since the mipi clock isalso used by the pcie driver,
we add it together in this patch.
Tested-by: Jianxin Qin <jianxin.qin@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Philipp Puschmann [Fri, 8 Jun 2018 10:19:24 +0000 (12:19 +0200)]
clk: imx6: fix video_27m parent for IMX6QDL_CLK_CKO1_SEL
q/dl datasheets list the 5th selection value for ck01_sel as
video_27M_clk_root.
By replacing the dummy value we then can set IMX6QDL_CLK_VIDEO_27M
as parent for IMX6QDL_CLK_CKO1_SEL.
Signed-off-by: Philipp Puschmann <pp@emlix.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Anson Huang [Mon, 4 Jun 2018 01:06:46 +0000 (09:06 +0800)]
clk: imx6ul: remove clks_init_on array
Clock framework will enable those clocks registered
with CLK_IS_CRITICAL flag, so no need to have
clks_init_on array during clock initialization now.
ARM clock is busy divider type which has the
CLK_IS_CRITICAL flag set by default when registered.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Anson Huang [Sun, 3 Jun 2018 01:44:04 +0000 (09:44 +0800)]
clk: imx6ul: add GPIO clock gates
i.MX6UL has GPIO clock gates in CCM CCGR,
add them into clock tree for clock management.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Fabio Estevam [Sat, 2 Jun 2018 14:02:02 +0000 (11:02 -0300)]
dt-bindings: clock: imx6ul: Do not change the clock definition order
Commit
f5a4670de966 ("clk: imx: Add new clo01 and clo2 controlled
by CCOSR") introduced the CLK_CLKO definitions, but didn't put them
at the end of the list, which may cause dtb breakage when running an old
dtb with a newer kernel.
In order to avoid that, simply add the new CLK_CKO clock definitions
at the end of the list.
Fixes: f5a4670de966 ("clk: imx: Add new clo01 and clo2 controlled by CCOSR")
Reported-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Anson Huang [Mon, 4 Jun 2018 01:06:45 +0000 (09:06 +0800)]
clk: imx6sx: remove clks_init_on array
Clock framework will enable those clocks registered
with CLK_IS_CRITICAL flag, so no need to have
clks_init_on array during clock initialization now.
ARM clock is busy divider type which has the
CLK_IS_CRITICAL flag set by default when registered.
IPG clock has no clock gate and its parent AHB clock
is busy divider type, so no need to add CLK_IS_CRITICAL
flag for IPG clock.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Anson Huang [Mon, 4 Jun 2018 01:06:44 +0000 (09:06 +0800)]
clk: imx6sl: remove clks_init_on array
Clock framework will enable those clocks registered
with CLK_IS_CRITICAL flag, so no need to have
clks_init_on array during clock initialization now.
ARM clock is busy divider type which has the
CLK_IS_CRITICAL flag set by default when registered.
IPG clock has no clock gate and its parent AHB clock
is busy divider type, so no need to add CLK_IS_CRITICAL
flag for IPG clock.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Anson Huang [Mon, 4 Jun 2018 01:06:43 +0000 (09:06 +0800)]
clk: imx6q: remove clks_init_on array
Clock framework will enable those clocks registered
with CLK_IS_CRITICAL flag, so no need to have
clks_init_on array during clock initialization now.
ARM clock is busy divider type which has the
CLK_IS_CRITICAL flag set by default when registered.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Mike Looijmans [Mon, 4 Jun 2018 05:34:39 +0000 (07:34 +0200)]
clk-si514, clk-si544: Implement prepare/unprepare/is_prepared operations
This adds prepare/unprepare/is_prepared functionality to the drivers for
the SI544 and SI514 chips, allowing the clock output to be disabled when
the clock is not in use.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michel Pollet [Thu, 14 Jun 2018 10:56:34 +0000 (11:56 +0100)]
clk: renesas: Renesas R9A06G032 clock driver
This provides a clock driver for the Renesas R09A06G032.
This uses a structure derived from both the R-Car Gen2 driver as well as
the renesas-cpg-mssr driver.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Michel Pollet [Thu, 14 Jun 2018 10:56:31 +0000 (11:56 +0100)]
dt-bindings: clock: renesas,r9a06g032-sysctrl: documentation
The Renesas R9A06G032 SYSCTRL node description.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Michel Pollet [Thu, 14 Jun 2018 10:56:30 +0000 (11:56 +0100)]
dt-bindings: clock: Add the r9a06g032-sysctrl.h file
This adds the constants necessary to use the renesas,r9a06g032-sysctrl node.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jerome Brunet [Tue, 22 May 2018 16:34:56 +0000 (18:34 +0200)]
dt-bindings: clock: add meson axg audio clock controller bindings
Export the clock ids dt-bindings usable by the consumers of the clock
controller and add the documentation for the device tree bindings of
the audio clock controller of the A113 based SoCs.
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Tue, 19 Jun 2018 15:47:53 +0000 (17:47 +0200)]
clk: meson: audio-divider is one based
The audio divider is one based. This offset was mistakenly dropped from
recalc_rate() when migrating to clk_regmap.
Fixes: 88a4e1283681 ("clk: meson: migrate the audio divider clock to clk_regmap")
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Jerome Brunet [Tue, 19 Jun 2018 14:41:41 +0000 (16:41 +0200)]
clk: add duty cycle support
Add the possibility to apply and query the clock signal duty cycle ratio.
This is useful when the duty cycle of the clock signal depends on some
other parameters controlled by the clock framework.
For example, the duty cycle of a divider may depends on the raw divider
setting (ratio = N / div) , which is controlled by the CCF. In such case,
going through the pwm framework to control the duty cycle ratio of this
clock would be a burden.
A clock provider is not required to implement the operation to set and get
the duty cycle. If it does not implement .get_duty_cycle(), the ratio is
assumed to be 50%.
This change also adds a new flag, CLK_DUTY_CYCLE_PARENT. This flag should
be used to indicate that a clock, such as gates and muxes, may inherit
the duty cycle ratio of its parent clock. If a clock does not provide a
get_duty_cycle() callback and has CLK_DUTY_CYCLE_PARENT, then the call
will be directly forwarded to its parent clock, if any. For
set_duty_cycle(), the clock should also have CLK_SET_RATE_PARENT for the
call to be forwarded
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/
20180619144141.8506-1-jbrunet@baylibre.com
Jerome Brunet [Tue, 19 Jun 2018 13:40:51 +0000 (15:40 +0200)]
clk: fix CLK_SET_RATE_GATE with clock rate protection
CLK_SET_RATE_GATE should prevent any operation which may result in a rate
change or glitch while the clock is prepared/enabled.
IOW, the following sequence is not allowed anymore with CLK_SET_RATE_GATE:
* clk_get()
* clk_prepare_enable()
* clk_get_rate()
* clk_set_rate()
At the moment this is enforced on the leaf clock of the operation, not
along the tree. This problematic because, if a PLL has the CLK_RATE_GATE,
it won't be enforced if the clk_set_rate() is called on its child clocks.
Using clock rate protection, we can now enforce CLK_SET_RATE_GATE along the
clock tree
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/
20180619134051.16726-3-jbrunet@baylibre.com
Jerome Brunet [Tue, 19 Jun 2018 13:40:50 +0000 (15:40 +0200)]
clk: qcom: drop CLK_SET_RATE_GATE from sdc clocks
the mmci driver (drivers/mmc/host/mmci.c) does the following sequence:
* clk_prepare_enable()
* clk_set_rate()
on SDCx_clk which is a children of SDCx_src. SDCx_src has
CLK_SET_RATE_GATE so this sequence should not be allowed but this was not
enforced. IOW, the flag is ignored. Dropping the flag won't change
anything to the current behaviour of the platform.
CLK_SET_RATE_GATE is being fixed and enforced now. If the flag was kept,
the mmci driver would receive -EBUSY when calling clk_set_rate()
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/
20180619134051.16726-2-jbrunet@baylibre.com
Neil Armstrong [Wed, 13 Jun 2018 12:20:21 +0000 (14:20 +0200)]
clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL
On Amlogic Meson GXBB & GXL platforms, the SCPI Cortex-M4 Co-Processor
seems to be dependent on the FCLK_DIV2 to be operationnal.
The issue occurred since v4.17-rc1 by freezing the kernel boot when
the 'schedutil' cpufreq governor was selected as default :
[ 12.071837] scpi_protocol scpi: SCP Protocol 0.0 Firmware 0.0.0 version
domain-0 init dvfs: 4
[ 12.087757] hctosys: unable to open rtc device (rtc0)
[ 12.087907] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[ 12.102241] cfg80211: Loaded X.509 cert 'sforshee:
00b28ddf47aef9cea7'
But when disabling the MMC driver, the boot finished but cpufreq failed to
change the CPU frequency :
[ 12.153045] cpufreq: __target_index: Failed to change cpu frequency: -5
A bisect between v4.16 and v4.16-rc1 gave
05f814402d61 ("clk: meson: add fdiv clock gates") to be the first bad commit.
This commit added support for the missing clock gates before the fixed PLL
fixed dividers (FCLK_DIVx) and the clock framework basically disabled
all the unused fixed dividers, thus disabled a critical clock path for
the SCPI Co-Processor.
This patch simply sets the FCLK_DIV2 gate as critical to ensure
nobody can disable it.
Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[few corrections in the commit description]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Gilad Ben-Yossef [Thu, 24 May 2018 14:19:09 +0000 (15:19 +0100)]
clk: renesas: r8a7795: Add CCREE clock
This patch adds the clock used by the CryptoCell 630p instance in the
SoC.
Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Thu, 17 May 2018 09:04:15 +0000 (11:04 +0200)]
clk: renesas: r8a7795: Add CR clock
Add the CR core clock, which is used by the Secure Engine (SCEG).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Gilad Ben-Yossef <gilad@benyossef.com>
Linus Torvalds [Sat, 16 Jun 2018 23:04:49 +0000 (08:04 +0900)]
Linux 4.18-rc1
Linus Torvalds [Sat, 16 Jun 2018 20:37:55 +0000 (05:37 +0900)]
Merge tag 'for-linus-
20180616' of git://git.kernel.dk/linux-block
Pull block fixes from Jens Axboe:
"A collection of fixes that should go into -rc1. This contains:
- bsg_open vs bsg_unregister race fix (Anatoliy)
- NVMe pull request from Christoph, with fixes for regressions in
this window, FC connect/reconnect path code unification, and a
trace point addition.
- timeout fix (Christoph)
- remove a few unused functions (Christoph)
- blk-mq tag_set reinit fix (Roman)"
* tag 'for-linus-
20180616' of git://git.kernel.dk/linux-block:
bsg: fix race of bsg_open and bsg_unregister
block: remov blk_queue_invalidate_tags
nvme-fabrics: fix and refine state checks in __nvmf_check_ready
nvme-fabrics: handle the admin-only case properly in nvmf_check_ready
nvme-fabrics: refactor queue ready check
blk-mq: remove blk_mq_tagset_iter
nvme: remove nvme_reinit_tagset
nvme-fc: fix nulling of queue data on reconnect
nvme-fc: remove reinit_request routine
blk-mq: don't time out requests again that are in the timeout handler
nvme-fc: change controllers first connect to use reconnect path
nvme: don't rely on the changed namespace list log
nvmet: free smart-log buffer after use
nvme-rdma: fix error flow during mapping request data
nvme: add bio remapping tracepoint
nvme: fix NULL pointer dereference in nvme_init_subsystem
blk-mq: reinit q->tag_set_list entry only after grace period
Linus Torvalds [Sat, 16 Jun 2018 20:25:18 +0000 (05:25 +0900)]
Merge tag 'docs-broken-links' of git://linuxtv.org/mchehab/experimental
Pull documentation fixes from Mauro Carvalho Chehab:
"This solves a series of broken links for files under Documentation,
and improves a script meant to detect such broken links (see
scripts/documentation-file-ref-check).
The changes on this series are:
- can.rst: fix a footnote reference;
- crypto_engine.rst: Fix two parsing warnings;
- Fix a lot of broken references to Documentation/*;
- improve the scripts/documentation-file-ref-check script, in order
to help detecting/fixing broken references, preventing
false-positives.
After this patch series, only 33 broken references to doc files are
detected by scripts/documentation-file-ref-check"
* tag 'docs-broken-links' of git://linuxtv.org/mchehab/experimental: (26 commits)
fix a series of Documentation/ broken file name references
Documentation: rstFlatTable.py: fix a broken reference
ABI: sysfs-devices-system-cpu: remove a broken reference
devicetree: fix a series of wrong file references
devicetree: fix name of pinctrl-bindings.txt
devicetree: fix some bindings file names
MAINTAINERS: fix location of DT npcm files
MAINTAINERS: fix location of some display DT bindings
kernel-parameters.txt: fix pointers to sound parameters
bindings: nvmem/zii: Fix location of nvmem.txt
docs: Fix more broken references
scripts/documentation-file-ref-check: check tools/*/Documentation
scripts/documentation-file-ref-check: get rid of false-positives
scripts/documentation-file-ref-check: hint: dash or underline
scripts/documentation-file-ref-check: add a fix logic for DT
scripts/documentation-file-ref-check: accept more wildcards at filenames
scripts/documentation-file-ref-check: fix help message
media: max2175: fix location of driver's companion documentation
media: v4l: fix broken video4linux docs locations
media: dvb: point to the location of the old README.dvb-usb file
...
Linus Torvalds [Sat, 16 Jun 2018 20:06:18 +0000 (05:06 +0900)]
Merge tag 'fsnotify_for_v4.18-rc1' of git://git./linux/kernel/git/jack/linux-fs
Pull fsnotify updates from Jan Kara:
"fsnotify cleanups unifying handling of different watch types.
This is the shortened fsnotify series from Amir with the last five
patches pulled out. Amir has modified those patches to not change
struct inode but obviously it's too late for those to go into this
merge window"
* tag 'fsnotify_for_v4.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux-fs:
fsnotify: add fsnotify_add_inode_mark() wrappers
fanotify: generalize fanotify_should_send_event()
fsnotify: generalize send_to_group()
fsnotify: generalize iteration of marks by object type
fsnotify: introduce marks iteration helpers
fsnotify: remove redundant arguments to handle_event()
fsnotify: use type id to identify connector object type
Linus Torvalds [Sat, 16 Jun 2018 20:00:24 +0000 (05:00 +0900)]
Merge tag 'fbdev-v4.18' of git://github.com/bzolnier/linux
Pull fbdev updates from Bartlomiej Zolnierkiewicz:
"There is nothing really major here, few small fixes, some cleanups and
dead drivers removal:
- mark omapfb drivers as orphans in MAINTAINERS file (Tomi Valkeinen)
- add missing module license tags to omap/omapfb driver (Arnd
Bergmann)
- add missing GPIOLIB dependendy to omap2/omapfb driver (Arnd
Bergmann)
- convert savagefb, aty128fb & radeonfb drivers to use msleep & co.
(Jia-Ju Bai)
- allow COMPILE_TEST build for viafb driver (media part was reviewed
by media subsystem Maintainer)
- remove unused MERAM support from sh_mobile_lcdcfb and shmob-drm
drivers (drm parts were acked by shmob-drm driver Maintainer)
- remove unused auo_k190xfb drivers
- misc cleanups (Souptick Joarder, Wolfram Sang, Markus Elfring, Andy
Shevchenko, Colin Ian King)"
* tag 'fbdev-v4.18' of git://github.com/bzolnier/linux: (26 commits)
fb_omap2: add gpiolib dependency
video/omap: add module license tags
MAINTAINERS: make omapfb orphan
video: fbdev: pxafb: match_string() conversion fixup
video: fbdev: nvidia: fix spelling mistake: "scaleing" -> "scaling"
video: fbdev: fix spelling mistake: "frambuffer" -> "framebuffer"
video: fbdev: pxafb: Convert to use match_string() helper
video: fbdev: via: allow COMPILE_TEST build
video: fbdev: remove unused sh_mobile_meram driver
drm: shmobile: remove unused MERAM support
video: fbdev: sh_mobile_lcdcfb: remove unused MERAM support
video: fbdev: remove unused auo_k190xfb drivers
video: omap: Improve a size determination in omapfb_do_probe()
video: sm501fb: Improve a size determination in sm501fb_probe()
video: fbdev-MMP: Improve a size determination in path_init()
video: fbdev-MMP: Delete an error message for a failed memory allocation in two functions
video: auo_k190x: Delete an error message for a failed memory allocation in auok190x_common_probe()
video: sh_mobile_lcdcfb: Delete an error message for a failed memory allocation in two functions
video: sh_mobile_meram: Delete an error message for a failed memory allocation in sh_mobile_meram_probe()
video: fbdev: sh_mobile_meram: Drop SUPERH platform dependency
...
Linus Torvalds [Sat, 16 Jun 2018 07:32:04 +0000 (16:32 +0900)]
Merge branch 'afs-proc' of git://git./linux/kernel/git/viro/vfs
Pull AFS updates from Al Viro:
"Assorted AFS stuff - ended up in vfs.git since most of that consists
of David's AFS-related followups to Christoph's procfs series"
* 'afs-proc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
afs: Optimise callback breaking by not repeating volume lookup
afs: Display manually added cells in dynamic root mount
afs: Enable IPv6 DNS lookups
afs: Show all of a server's addresses in /proc/fs/afs/servers
afs: Handle CONFIG_PROC_FS=n
proc: Make inline name size calculation automatic
afs: Implement network namespacing
afs: Mark afs_net::ws_cell as __rcu and set using rcu functions
afs: Fix a Sparse warning in xdr_decode_AFSFetchStatus()
proc: Add a way to make network proc files writable
afs: Rearrange fs/afs/proc.c to remove remaining predeclarations.
afs: Rearrange fs/afs/proc.c to move the show routines up
afs: Rearrange fs/afs/proc.c by moving fops and open functions down
afs: Move /proc management functions to the end of the file
Linus Torvalds [Sat, 16 Jun 2018 07:21:50 +0000 (16:21 +0900)]
Merge branch 'work.compat' of git://git./linux/kernel/git/viro/vfs
Pull compat updates from Al Viro:
"Some biarch patches - getting rid of assorted (mis)uses of
compat_alloc_user_space().
Not much in that area this cycle..."
* 'work.compat' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
orangefs: simplify compat ioctl handling
signalfd: lift sigmask copyin and size checks to callers of do_signalfd4()
vmsplice(): lift importing iovec into vmsplice(2) and compat counterpart
Linus Torvalds [Sat, 16 Jun 2018 07:11:40 +0000 (16:11 +0900)]
Merge branch 'work.aio' of git://git./linux/kernel/git/viro/vfs
Pull aio fixes from Al Viro:
"Assorted AIO followups and fixes"
* 'work.aio' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
eventpoll: switch to ->poll_mask
aio: only return events requested in poll_mask() for IOCB_CMD_POLL
eventfd: only return events requested in poll_mask()
aio: mark __aio_sigset::sigmask const
Linus Torvalds [Fri, 15 Jun 2018 22:39:34 +0000 (07:39 +0900)]
Merge git://git./linux/kernel/git/davem/net
Pull networking fixes from David Miller:
1) Various netfilter fixlets from Pablo and the netfilter team.
2) Fix regression in IPVS caused by lack of PMTU exceptions on local
routes in ipv6, from Julian Anastasov.
3) Check pskb_trim_rcsum for failure in DSA, from Zhouyang Jia.
4) Don't crash on poll in TLS, from Daniel Borkmann.
5) Revert SO_REUSE{ADDR,PORT} change, it regresses various things
including Avahi mDNS. From Bart Van Assche.
6) Missing of_node_put in qcom/emac driver, from Yue Haibing.
7) We lack checking of the TCP checking in one special case during SYN
receive, from Frank van der Linden.
8) Fix module init error paths of mac80211 hwsim, from Johannes Berg.
9) Handle 802.1ad properly in stmmac driver, from Elad Nachman.
10) Must grab HW caps before doing quirk checks in stmmac driver, from
Jose Abreu.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (81 commits)
net: stmmac: Run HWIF Quirks after getting HW caps
neighbour: skip NTF_EXT_LEARNED entries during forced gc
net: cxgb3: add error handling for sysfs_create_group
tls: fix waitall behavior in tls_sw_recvmsg
tls: fix use-after-free in tls_push_record
l2tp: filter out non-PPP sessions in pppol2tp_tunnel_ioctl()
l2tp: reject creation of non-PPP sessions on L2TPv2 tunnels
mlxsw: spectrum_switchdev: Fix port_vlan refcounting
mlxsw: spectrum_router: Align with new route replace logic
mlxsw: spectrum_router: Allow appending to dev-only routes
ipv6: Only emit append events for appended routes
stmmac: added support for 802.1ad vlan stripping
cfg80211: fix rcu in cfg80211_unregister_wdev
mac80211: Move up init of TXQs
mac80211_hwsim: fix module init error paths
cfg80211: initialize sinfo in cfg80211_get_station
nl80211: fix some kernel doc tag mistakes
hv_netvsc: Fix the variable sizes in ipsecv2 and rsc offload
rds: avoid unenecessary cong_update in loop transport
l2tp: clean up stale tunnel or session in pppol2tp_connect's error path
...
Linus Torvalds [Fri, 15 Jun 2018 22:36:39 +0000 (07:36 +0900)]
Merge tag 'modules-for-v4.18' of git://git./linux/kernel/git/jeyu/linux
Pull module updates from Jessica Yu:
"Minor code cleanup and also allow sig_enforce param to be shown in
sysfs with CONFIG_MODULE_SIG_FORCE"
* tag 'modules-for-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/jeyu/linux:
module: Allow to always show the status of modsign
module: Do not access sig_enforce directly
Linus Torvalds [Fri, 15 Jun 2018 21:50:51 +0000 (06:50 +0900)]
Merge branch 'for-linus-4.18-rc1' of git://git./linux/kernel/git/rw/uml
Pull uml updates from Richard Weinberger:
"Minor updates for UML:
- fixes for our new vector network driver by Anton
- initcall cleanup by Alexander
- We have a new mailinglist, sourceforge.net sucks"
* 'for-linus-4.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml:
um: Fix raw interface options
um: Fix initialization of vector queues
um: remove uml initcalls
um: Update mailing list address
Linus Torvalds [Fri, 15 Jun 2018 21:42:43 +0000 (06:42 +0900)]
Merge tag 'riscv-for-linus-4.18-merge_window' of git://git./linux/kernel/git/palmer/riscv-linux
Pull RISC-V updates from Palmer Dabbelt:
"This contains some small RISC-V updates I'd like to target for 4.18.
They are all fairly small this time. Here's a short summary, there's
more info in the commits/merges:
- a fix to __clear_user to respect the passed arguments.
- enough support for the perf subsystem to work with RISC-V's ISA
defined performance counters.
- support for sparse and cleanups suggested by it.
- support for R_RISCV_32 (a relocation, not the 32-bit ISA).
- some MAINTAINERS cleanups.
- the addition of CONFIG_HVC_RISCV_SBI to our defconfig, as it's
always present.
I've given these a simple build+boot test"
* tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig
RISC-V: Handle R_RISCV_32 in modules
riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't set
riscv: add riscv-specific predefines to CHECKFLAGS
riscv: split the declaration of __copy_user
riscv: no __user for probe_kernel_address()
riscv: use NULL instead of a plain 0
perf: riscv: Add Document for Future Porting Guide
perf: riscv: preliminary RISC-V support
MAINTAINERS: Update Albert's email, he's back at Berkeley
MAINTAINERS: Add myself as a maintainer for SiFive's drivers
riscv: Fix the bug in memory access fixup code
Linus Torvalds [Fri, 15 Jun 2018 21:37:04 +0000 (06:37 +0900)]
Merge tag 'for-linus' of git://git./virt/kvm/kvm
Pull more kvm updates from Paolo Bonzini:
"Mostly the PPC part of the release, but also switching to Arnd's fix
for the hyperv config issue and a typo fix.
Main PPC changes:
- reimplement the MMIO instruction emulation
- transactional memory support for PR KVM
- improve radix page table handling"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (63 commits)
KVM: x86: VMX: redo fix for link error without CONFIG_HYPERV
KVM: x86: fix typo at kvm_arch_hardware_setup comment
KVM: PPC: Book3S PR: Fix failure status setting in tabort. emulation
KVM: PPC: Book3S PR: Enable use on POWER9 bare-metal hosts in HPT mode
KVM: PPC: Book3S PR: Don't let PAPR guest set MSR hypervisor bit
KVM: PPC: Book3S PR: Fix failure status setting in treclaim. emulation
KVM: PPC: Book3S PR: Fix MSR setting when delivering interrupts
KVM: PPC: Book3S PR: Handle additional interrupt types
KVM: PPC: Book3S PR: Enable kvmppc_get/set_one_reg_pr() for HTM registers
KVM: PPC: Book3S: Remove load/put vcpu for KVM_GET_REGS/KVM_SET_REGS
KVM: PPC: Remove load/put vcpu for KVM_GET/SET_ONE_REG ioctl
KVM: PPC: Move vcpu_load/vcpu_put down to each ioctl case in kvm_arch_vcpu_ioctl
KVM: PPC: Book3S PR: Enable HTM for PR KVM for KVM_CHECK_EXTENSION ioctl
KVM: PPC: Book3S PR: Support TAR handling for PR KVM HTM
KVM: PPC: Book3S PR: Add guard code to prevent returning to guest with PR=0 and Transactional state
KVM: PPC: Book3S PR: Add emulation for tabort. in privileged state
KVM: PPC: Book3S PR: Add emulation for trechkpt.
KVM: PPC: Book3S PR: Add emulation for treclaim.
KVM: PPC: Book3S PR: Restore NV regs after emulating mfspr from TM SPRs
KVM: PPC: Book3S PR: Always fail transactions in guest privileged state
...
Linus Torvalds [Fri, 15 Jun 2018 21:35:02 +0000 (06:35 +0900)]
Merge tag 'for_linus' of git://git./linux/kernel/git/mst/vhost
Pull virtio updates from Michael Tsirkin:
"virtio, vhost: features, fixes
- PCI virtual function support for virtio
- DMA barriers for virtio strong barriers
- bugfixes"
* tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:
virtio: update the comments for transport features
virtio_pci: support enabling VFs
vhost: fix info leak due to uninitialized memory
virtio_ring: switch to dma_XX barriers for rpmsg
Mauro Carvalho Chehab [Thu, 14 Jun 2018 15:34:32 +0000 (12:34 -0300)]
fix a series of Documentation/ broken file name references
As files move around, their previous links break. Fix the
references for them.
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Mauro Carvalho Chehab [Thu, 14 Jun 2018 15:33:06 +0000 (12:33 -0300)]
Documentation: rstFlatTable.py: fix a broken reference
The old HOWTO was removed a long time ago. The flat table
version is not metioned elsewhere, so just get rid of the
text.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Mauro Carvalho Chehab [Thu, 14 Jun 2018 15:32:05 +0000 (12:32 -0300)]
ABI: sysfs-devices-system-cpu: remove a broken reference
This file doesn't exist anymore:
Documentation/cpu-freq/user-guide.txt
As the ABI already points to Documentation/cpu-freq, just
remove the broken link and the associated text.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Mauro Carvalho Chehab [Thu, 14 Jun 2018 15:30:30 +0000 (12:30 -0300)]
devicetree: fix a series of wrong file references
As files got renamed, their references broke.
Manually fix a series of broken refs at the DT bindings.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Mauro Carvalho Chehab [Thu, 14 Jun 2018 15:24:41 +0000 (12:24 -0300)]
devicetree: fix name of pinctrl-bindings.txt
Rename:
pinctrl-binding.txt -> pinctrl-bindings.txt
In order to match the current name of this file.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Mauro Carvalho Chehab [Thu, 14 Jun 2018 12:39:01 +0000 (09:39 -0300)]
devicetree: fix some bindings file names
There were some file movements that changed the location for
some DT bindings. Fix them with:
scripts/documentation-file-ref-check --fix
After manually checking if the new file makes sense.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Mauro Carvalho Chehab [Thu, 14 Jun 2018 11:59:37 +0000 (08:59 -0300)]
MAINTAINERS: fix location of DT npcm files
The specified locations are not right. Fix the wildcard logic
to point to the correct directories.
Without that, get-maintainer won't get things right:
$ ./scripts/get_maintainer.pl --no-git-fallback --no-r --no-n --no-l -f Documentation/devicetree/bindings/arm/cpu-enable-method/nuvoton,npcm750-smp
robh+dt@kernel.org (maintainer:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS)
mark.rutland@arm.com (maintainer:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS)
After the patch, it will properly point to NPCM arch maintainers:
$ ./scripts/get_maintainer.pl --no-git-fallback --no-r --no-n --no-l -f Documentation/devicetree/bindings/arm/cpu-enable-method/nuvoton,npcm750-smp
avifishman70@gmail.com (supporter:ARM/NUVOTON NPCM ARCHITECTURE)
tmaimon77@gmail.com (supporter:ARM/NUVOTON NPCM ARCHITECTURE)
robh+dt@kernel.org (maintainer:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS)
mark.rutland@arm.com (maintainer:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS)
Cc: Avi Fishman <avifishman70@gmail.com>
Cc: Tomer Maimon <tmaimon77@gmail.com>
Cc: Patrick Venture <venture@google.com>
Cc: Nancy Yuen <yuenn@google.com>
Cc: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Mauro Carvalho Chehab [Thu, 14 Jun 2018 11:01:00 +0000 (08:01 -0300)]
MAINTAINERS: fix location of some display DT bindings
Those files got a manufacturer's name prepended and were moved around.
Adjust their references accordingly.
Also, due those movements, Documentation/devicetree/bindings/video
doesn't exist anymore.
Cc: David Airlie <airlied@linux.ie>
Cc: David Lechner <david@lechnology.com>
Cc: Peter Senna Tschudin <peter.senna@collabora.com>
Cc: Martin Donnelly <martin.donnelly@ge.com>
Cc: Martyn Welch <martyn.welch@collabora.co.uk>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Jonathan Corbet <corbet@lwn.net>