openwrt/staging/blogic.git
6 years agodrm/amd/pp: Allow underclocking when od table is empty in vbios
Rex Zhu [Wed, 30 May 2018 08:52:22 +0000 (16:52 +0800)]
drm/amd/pp: Allow underclocking when od table is empty in vbios

if max od engine clock limit and memory clock limit are not set
in vbios. driver will allow underclocking instand of disable od feature
completely.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/display: check if ppfuncs exists before using it
Alex Deucher [Wed, 30 May 2018 14:34:23 +0000 (09:34 -0500)]
drm/amdgpu/display: check if ppfuncs exists before using it

Fixes a crash on asics without powerplay yet (e.g., vega20).

Reviewed-by: Rex Zhu<rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Connect display_clock_voltage_request to a function pointer
Mikita Lipski [Tue, 29 May 2018 21:44:36 +0000 (17:44 -0400)]
drm/amd/pp: Connect display_clock_voltage_request to a function pointer

Get rid of an empty dublicate of smu10_display_clock_voltage_request

Add display_clock_voltage_request to smu10 functions struct so it
can be called from outside the class and connect the pointer to
the function.

That way Display driver can finally apply clock voltage requests
when needed.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: typo fix for vega20 cg flags
Evan Quan [Mon, 28 May 2018 01:22:09 +0000 (09:22 +0800)]
drm/amdgpu: typo fix for vega20 cg flags

The AMD_CG_SUPPORT_HDP_LS was wrongly written as
AMD_CG_SUPPORT_BIF_LS.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: bug fixs for getsmuclockinfo
Evan Quan [Mon, 28 May 2018 00:55:09 +0000 (08:55 +0800)]
drm/amd/powerplay: bug fixs for getsmuclockinfo

The .syspll_id and .dfsdid are not initialzed correctly. And
le32_to_cpu transfer is needed on the output.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: correct SMU11 SYSPLL0 clock id values
Evan Quan [Mon, 28 May 2018 00:53:03 +0000 (08:53 +0800)]
drm/amdgpu: correct SMU11 SYSPLL0 clock id values

The SMU11 SYSPLL0 clock ids were assigned wrong values.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: gds bo must not be per-vm-bo
Chunming Zhou [Wed, 30 May 2018 03:12:08 +0000 (11:12 +0800)]
drm/amdgpu: gds bo must not be per-vm-bo

In per-vm-bo case, there could be no bo list.
But gds bo created from user space  must be passed to bo list.
So adding a check to prevent to creat gds bo as per-vm-bo.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: To get gds, gws and oa from adev->gds (v2)
Emily Deng [Wed, 30 May 2018 02:04:25 +0000 (10:04 +0800)]
drm/amdgpu: To get gds, gws and oa from adev->gds (v2)

As now enabled per vm bo feature, the user mode driver won't supply the
bo_list generally, for this case, the gdb_base, gds_size, gws_base, gws_size and
oa_base, oa_size won't be set.

v2: fix warning (Chunming)

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix BUG_ON during CRTC atomic check update
Leo (Sunpeng) Li [Tue, 29 May 2018 13:51:51 +0000 (09:51 -0400)]
drm/amd/display: Fix BUG_ON during CRTC atomic check update

For cases where the CRTC is inactive (DPMS off), where a modeset is not
required, yet the CRTC is still in the atomic state, we should not
attempt to update anything on it.

Previously, we were relying on the modereset_required() helper to check
the above condition. However, the function returns false immediately if
a modeset is not required, ignoring the CRTC's enable/active state
flags. The correct way to filter is by looking at these flags instead.

Fixes: e277adc5a06c "drm/amd/display: Hookup color management functions"
Bugzilla: https://bugs.freedesktop.org/106194

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Read DP_SINK_COUNT_ESI range on HPD for DP 1.4
Nikola Cornij [Wed, 9 May 2018 17:11:35 +0000 (13:11 -0400)]
drm/amd/display: Read DP_SINK_COUNT_ESI range on HPD for DP 1.4

DP 1.4 compliance now requires that registers at DP_SINK_COUNT_ESI range
(0x2002-0x2003, 0x200c-0x200f) are read instead of DP_SINK_COUNT range
(0x200-0x2005.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Read DPCD link caps up to and including DP_ADAPTER_CAP
Nikola Cornij [Mon, 7 May 2018 19:35:15 +0000 (15:35 -0400)]
drm/amd/display: Read DPCD link caps up to and including DP_ADAPTER_CAP

DP 1.4 compliance requires 16 bytes to be read when reading link caps,
i.e. it requires DP_ADAPTER_CAP to be included. Included it for all DP
versions because reading more than required won't fail.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Do not program interrupt status on disabled crtc
Mikita Lipski [Thu, 3 May 2018 21:08:51 +0000 (17:08 -0400)]
drm/amd/display: Do not program interrupt status on disabled crtc

Prevent interrupt programming of a crtc on which the stream is disabled and
it doesn't have an OTG to reference.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix dscl_manual_ratio_init
Dmytro Laktyushkin [Thu, 17 May 2018 14:08:10 +0000 (10:08 -0400)]
drm/amd/display: fix dscl_manual_ratio_init

This change will fix wb and display scaling when ratios of
4 or more are involved

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Destroy connector state on reset
Leo (Sunpeng) Li [Wed, 16 May 2018 14:31:30 +0000 (10:31 -0400)]
drm/amd/display: Destroy connector state on reset

When a DRM mode reset is called on resume, the connector state's
destructor is not called. This leaves a dangling reference on the CRTC
commit object, which was obtained by the connector state during commit
setup.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Set TMZ and DCC for secondary surface
Eric Bernstein [Mon, 14 May 2018 20:55:07 +0000 (16:55 -0400)]
drm/amd/display: Set TMZ and DCC for secondary surface

Add register programming to support TMZ and DCC on
secondary surfaces.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: DP component depth 16 bpc
Eric Bernstein [Thu, 10 May 2018 19:12:09 +0000 (15:12 -0400)]
drm/amd/display: DP component depth 16 bpc

Add register programming to support 16bpc component
depth for DP.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: check if audio clk enable is applicable
Roman Li [Thu, 17 May 2018 22:08:54 +0000 (18:08 -0400)]
drm/amd/display: check if audio clk enable is applicable

Fixing warning on dce10 with HDMI display.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add register offset != 0 check.
Charlene Liu [Tue, 1 May 2018 23:49:03 +0000 (19:49 -0400)]
drm/amd/display: add register offset != 0 check.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Release fake sink
Mikita Lipski [Tue, 1 May 2018 15:33:25 +0000 (11:33 -0400)]
drm/amd/display: Release fake sink

If connector doesn't have a sink, fake sink is created, but
never released as it assumed that its destroyed with the
stream it is used for. But now sink is released before the
stream maintaing refcount consistency.

This way we also avoid assigning anything to connector keeping
all the operation local.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: replace msleep with udelay in fbc path
Roman Li [Thu, 3 May 2018 17:29:42 +0000 (13:29 -0400)]
drm/amd/display: replace msleep with udelay in fbc path

FBC enabling and disabling path has msleep which leads to
BUG hit when called in atomic context, hence this patch
replaces msleeps with udelays appropriately.

Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Do not limit color depth to 8bpc
Mikita Lipski [Wed, 16 May 2018 20:46:18 +0000 (16:46 -0400)]
drm/amd/display: Do not limit color depth to 8bpc

Delete if statement that would force any display's color depth higher
than 8 bpc to 8

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove unnecessary scheduler entity for VCN
Leo Liu [Fri, 25 May 2018 14:53:39 +0000 (10:53 -0400)]
drm/amdgpu: remove unnecessary scheduler entity for VCN

It should be stateless, and no need for scheduler to take care specially.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add helper function to get buffer domain
Deepak Sharma [Sat, 26 May 2018 00:12:29 +0000 (17:12 -0700)]
drm/amdgpu: Add helper function to get buffer domain

Move logic of getting supported domain to a helper
function

Signed-off-by: Deepak Sharma <Deepak.Sharma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Use GTT for dumb buffer if sg display enabled (v2)
Deepak Sharma [Tue, 22 May 2018 22:31:23 +0000 (15:31 -0700)]
drm/amdgpu: Use GTT for dumb buffer if sg display enabled (v2)

When vram size <= THRESHOLD(256M) lets use GTT for dumb buffer
allocation. As SG will be enabled with vram size <= 256M
scan out will not be an issue.

v2: Use amdgpu_display_supported_domains to get supported domain.

Signed-off-by: Deepak Sharma <Deepak.Sharma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add cases for getting phys and disp clks for SMU10
Mikita Lipski [Mon, 28 May 2018 15:22:17 +0000 (11:22 -0400)]
drm/amd/pp: Add cases for getting phys and disp clks for SMU10

Add case options to retrieve either physical or display clocks with
voltage from SMU controller that are needed by display driver.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix wrong latency assignment for VEGA clock levels
Harry Wentland [Tue, 29 May 2018 13:59:13 +0000 (09:59 -0400)]
drm/amd/display: Fix wrong latency assignment for VEGA clock levels

Also drop wrong 10kHz comment

Fixes: drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: fix a corner case in dependency optimization
Nayan Deshmukh [Fri, 25 May 2018 04:45:46 +0000 (10:15 +0530)]
drm/scheduler: fix a corner case in dependency optimization

When checking for a dependency fence for belonging to the same entity
compare it with scheduled as well finished fence. Earlier we were only
comparing it with the scheduled fence.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: vcn_v1_0_is_idle() can be static
kbuild test robot [Thu, 24 May 2018 18:54:45 +0000 (02:54 +0800)]
drm/amdgpu: vcn_v1_0_is_idle() can be static

Fixes: 9b4c412a654c ("drm/amdgpu: Add static CG control for VCN on RV")
Signed-off-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency
Harry Wentland [Fri, 18 May 2018 21:07:06 +0000 (17:07 -0400)]
drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency

This is required so we use the correct minimum clocks for Vega. Without
this pplib will never be able to enter the lowest clock states.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoMerge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Fri, 25 May 2018 00:28:14 +0000 (10:28 +1000)]
Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next

Last feature request for 4.18.  Mostly vega20 support.
- Vega20 support
- clock and powergating for VCN
- misc bug fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180524152427.32713-1-alexander.deucher@amd.com
6 years agodrm/amd/display: Remove use of division operator for long longs
David Francis [Thu, 24 May 2018 14:40:12 +0000 (10:40 -0400)]
drm/amd/display: Remove use of division operator for long longs

In fixed31_32.h, in dc_fixpt_shl,'/' was used for division of one long
long int by another long long int.  As there is no inbuilt long long
int division function in c, gcc inserted its own.  However, gcc does not
link the library that contains this function.  To avoid this, use
bitwise operators instead of /

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Update GFX info structure to match what vega20 used
Shaoyun Liu [Tue, 22 May 2018 15:45:41 +0000 (11:45 -0400)]
drm/amdgpu: Update GFX info structure to match what vega20 used

Update to the latest version from the vbios team.

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pp: remove duplicate assignment
Alex Deucher [Mon, 21 May 2018 15:16:28 +0000 (10:16 -0500)]
drm/amdgpu/pp: remove duplicate assignment

is_dpm_running callback was assigned to the same value
twice.  Drop the duplicate.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/sched: add rcu_barrier after entity fini
Emily Deng [Wed, 23 May 2018 07:53:03 +0000 (15:53 +0800)]
drm/sched: add rcu_barrier after entity fini

To free the fence from the amdgpu_fence_slab, need twice call_rcu, to avoid
the amdgpu_fence_slab_fini call kmem_cache_destroy(amdgpu_fence_slab) before
kmem_cache_free(amdgpu_fence_slab, fence), add rcu_barrier after drm_sched_entity_fini.

The kmem_cache_free(amdgpu_fence_slab, fence)'s call trace as below:
1.drm_sched_entity_fini ->
drm_sched_entity_cleanup ->
dma_fence_put(entity->last_scheduled) ->
drm_sched_fence_release_finished ->
drm_sched_fence_release_scheduled ->
call_rcu(&fence->finished.rcu, drm_sched_fence_free)

2.drm_sched_fence_free ->
dma_fence_put(fence->parent) ->
amdgpu_fence_release ->
call_rcu(&f->rcu, amdgpu_fence_free) ->
kmem_cache_free(amdgpu_fence_slab, fence);

v2:put the barrier before the kmem_cache_destroy
v3:put the dma_fence_put(fence->parent) before call_rcu in
drm_sched_fence_release_scheduled

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move VM BOs on LRU again
Christian König [Thu, 19 Apr 2018 13:01:12 +0000 (15:01 +0200)]
drm/amdgpu: move VM BOs on LRU again

Move all BOs belonging to a VM on the LRU with every submission.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: consistenly use VM moved flag
Christian König [Thu, 19 Apr 2018 12:22:56 +0000 (14:22 +0200)]
drm/amdgpu: consistenly use VM moved flag

Instead of sometimes checking if the vm_status is empty use the moved
flag and also reset it when the BO leaves the state machine.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: kmap PDs/PTs in amdgpu_vm_update_directories
Christian König [Thu, 19 Apr 2018 11:58:42 +0000 (13:58 +0200)]
drm/amdgpu: kmap PDs/PTs in amdgpu_vm_update_directories

In theory it is possible that PDs/PTs can move without eviction.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: further optimize amdgpu_vm_handle_moved
Christian König [Thu, 19 Apr 2018 09:08:24 +0000 (11:08 +0200)]
drm/amdgpu: further optimize amdgpu_vm_handle_moved

Splice the moved list to a local one to avoid taking the lock over and
over again.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: cleanup amdgpu_vm_validate_pt_bos v2
Christian König [Thu, 19 Apr 2018 09:02:54 +0000 (11:02 +0200)]
drm/amdgpu: cleanup amdgpu_vm_validate_pt_bos v2

Use list_for_each_entry_safe here.

v2: Drop the optimization, it doesn't work as expected.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: rework VM state machine lock handling v2
Christian König [Thu, 19 Apr 2018 08:56:02 +0000 (10:56 +0200)]
drm/amdgpu: rework VM state machine lock handling v2

Only the moved state needs a separate spin lock protection. All other
states are protected by reserving the VM anyway.

v2: fix some more incorrect cases

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add runtime VCN PG support
Rex Zhu [Wed, 16 May 2018 12:18:22 +0000 (20:18 +0800)]
drm/amdgpu: Add runtime VCN PG support

Enable support for dynamically powering up/down VCN on demand.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Enable VCN static PG by default on RV
Rex Zhu [Thu, 17 May 2018 08:03:47 +0000 (16:03 +0800)]
drm/amdgpu: Enable VCN static PG by default on RV

Enable static VCN powergating by default on Raven.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add VCN static PG support on RV
Rex Zhu [Thu, 17 May 2018 08:07:02 +0000 (16:07 +0800)]
drm/amdgpu: Add VCN static PG support on RV

Implement static powergating suport on VCN.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Enable VCN CG by default on RV
Rex Zhu [Thu, 17 May 2018 03:13:51 +0000 (11:13 +0800)]
drm/amdgpu: Enable VCN CG by default on RV

Enable VCN clockgating by default on Raven.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add static CG control for VCN on RV
Rex Zhu [Thu, 17 May 2018 03:11:22 +0000 (11:11 +0800)]
drm/amdgpu: Add static CG control for VCN on RV

Implement proper static clockgating support for VCN.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add SOC15_WAIT_ON_RREG macro define
Rex Zhu [Thu, 17 May 2018 07:58:53 +0000 (15:58 +0800)]
drm/amdgpu: Add SOC15_WAIT_ON_RREG macro define

Add new macro to wait on a register field to be a specific
value.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add CG/PG flags for VCN
Rex Zhu [Wed, 16 May 2018 12:10:25 +0000 (20:10 +0800)]
drm/amdgpu: Add CG/PG flags for VCN

Define new clock and powergating flags for VCN block.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add smu support for VCN powergating on RV
Rex Zhu [Wed, 16 May 2018 12:09:09 +0000 (20:09 +0800)]
drm/amd/pp: Add smu support for VCN powergating on RV

Add the powerplay callback for powergating VCN (same
as UVD and VCE).

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: skip CG for VCN when late_init/fini
Rex Zhu [Wed, 16 May 2018 12:06:53 +0000 (20:06 +0800)]
drm/amdgpu: skip CG for VCN when late_init/fini

VCN clockgating is handled manually like VCE and UVD.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: fix a couple locking issues
Rex Zhu [Fri, 18 May 2018 06:59:46 +0000 (14:59 +0800)]
drm/amd/pp: fix a couple locking issues

We should return unlock on the error path

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix static checker warning
Rex Zhu [Fri, 18 May 2018 06:24:44 +0000 (14:24 +0800)]
drm/amd/pp: Fix static checker warning

error: uninitialized symbol 'xxxx'

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/gmc9: disable partial wr rmw if ECC is not enabled
Alex Deucher [Thu, 10 May 2018 20:15:12 +0000 (15:15 -0500)]
drm/amdgpu/gmc9: disable partial wr rmw if ECC is not enabled

The vbios mistakenly sets this bit on some boards without ECC.
This can lead to reduced performance in some workloads.  Disable
the bit if the board does not have ECC.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add a df 1.7 implementation of enable_ecc_force_par_wr_rmw
Alex Deucher [Thu, 10 May 2018 20:06:55 +0000 (15:06 -0500)]
drm/amdgpu: add a df 1.7 implementation of enable_ecc_force_par_wr_rmw

Needed for proper memory setup depending on whether ECC is
enabled on a particular board.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add new DF callback for ECC setup
Alex Deucher [Thu, 10 May 2018 19:59:31 +0000 (14:59 -0500)]
drm/amdgpu: add new DF callback for ECC setup

The ForceParWrRMW setting needs to be enabled for ECC, but disabled
when ECC is not enabled.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add new DF 1.7 register defs
Alex Deucher [Thu, 10 May 2018 19:45:12 +0000 (14:45 -0500)]
drm/amdgpu: add new DF 1.7 register defs

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoRemove calls to suspend/resume atomic helpers from amdgpu_device_gpu_recover. (v2)
Andrey Grodzovsky [Thu, 17 May 2018 15:18:34 +0000 (11:18 -0400)]
Remove calls to suspend/resume atomic helpers from amdgpu_device_gpu_recover. (v2)

First of all it's already being called from the display code from amd_ip_funcs.suspend/resume hooks.
Second of all, the place in amdgpu_device_gpu_recover it's being called is wrong for GPU stalls since
it is called BEFORE we cancel and force completion of all in flight jobs which were not yet processed.
So, as Bas pointed in the ticket we will try to wait for fence  in amdgpu_pm_compute_clocks but the pipe
is hanged so we end up in deadlock.

v2: remove unused variable

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106500
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoMerge tag 'drm/tegra/for-4.18-rc1' of git://anongit.freedesktop.org/tegra/linux into...
Dave Airlie [Tue, 22 May 2018 00:45:42 +0000 (10:45 +1000)]
Merge tag 'drm/tegra/for-4.18-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.18-rc1

This set enables IOMMU support in the gr2d and gr3d drivers and adds
support for the zpos property on older Tegra generations. It also
enables scaling filters and incorporates some rework to eliminate a
private wrapper around struct drm_framebuffer.

The remainder is mostly a random assortment of fixes and cleanups, as
well as some preparatory work for destaging the userspace ABI, which
is almost ready and is targetted for v4.19-rc1.

Signed-off-by: Dave Airlie <airlied@redhat.com>
# gpg: Signature made Sat 19 May 2018 08:31:00 AEST
# gpg:                using RSA key DD23ACD77F3EB3A1
# gpg: Can't check signature: public key not found
Link: https://patchwork.freedesktop.org/patch/msgid/20180518224523.30982-1-thierry.reding@gmail.com
6 years agoMerge tag 'drm-fsl-dcu-fixes-for-v4.18' of http://git.agner.ch/git/linux-drm-fsl...
Dave Airlie [Tue, 22 May 2018 00:44:52 +0000 (10:44 +1000)]
Merge tag 'drm-fsl-dcu-fixes-for-v4.18' of git.agner.ch/git/linux-drm-fsl-dcu into drm-next

drm/fsl-dcu updates

- Update MAINTAINERS file to reflect correct email address

Signed-off-by: Dave Airlie <airlied@redhat.com>
# gpg: Signature made Mon 21 May 2018 05:52:58 AEST
# gpg:                using RSA key 4FC170DF4AEFC52F
# gpg: Can't check signature: public key not found
Link: https://patchwork.freedesktop.org/patch/msgid/20180520220238.5187-1-stefan@agner.ch
6 years agoMerge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm...
Dave Airlie [Tue, 22 May 2018 00:37:07 +0000 (10:37 +1000)]
Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next

So what we have for this cycle is a bit of spring cleaning with removal
of unused register logging code and getting rid of the license text in
favor of SPDX, a few smaller MMU handling improvements and a timeout
calculation change, fixing premature fence wait timeouts after 50 days
of uptime.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1526652437.28565.2.camel@pengutronix.de
6 years agoMerge branch 'drm-tda998x-devel' of git://git.armlinux.org.uk/~rmk/linux-arm into...
Dave Airlie [Tue, 22 May 2018 00:20:45 +0000 (10:20 +1000)]
Merge branch 'drm-tda998x-devel' of git://git.armlinux.org.uk/~rmk/linux-arm into drm-next

Please incorporate support for TDA998x I2C driver CEC

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180424095456.GA32460@rmk-PC.armlinux.org.uk
6 years agoMAINTAINERS: drm: fsl-dcu: Update to Alison's NXP email address
Fabio Estevam [Sun, 20 May 2018 15:03:54 +0000 (12:03 -0300)]
MAINTAINERS: drm: fsl-dcu: Update to Alison's NXP email address

The freescale.com email domain is not valid anymore, so use
the nxp.com domain instead.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
6 years agodrm/tegra: Add kerneldoc for UAPI
Thierry Reding [Wed, 16 May 2018 14:43:11 +0000 (16:43 +0200)]
drm/tegra: Add kerneldoc for UAPI

Document the userspace ABI with kerneldoc to provide some information on
how to use it.

v3:
- reword description of arrays and array lengths

v2:
- keep GEM object creation flags for ABI compatibility
- fix typo in struct drm_tegra_syncpt_incr kerneldoc
- fix typos in struct drm_tegra_submit kerneldoc
- reworded some descriptions as suggested

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
6 years agodrm/amdgpu: fix insert nop for UVD4.2 ring
Leo Liu [Thu, 17 May 2018 17:54:21 +0000 (13:54 -0400)]
drm/amdgpu: fix insert nop for UVD4.2 ring

NO_OP register should be writen to 0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix insert nop for UVD5 ring
Leo Liu [Thu, 17 May 2018 17:52:00 +0000 (13:52 -0400)]
drm/amdgpu: fix insert nop for UVD5 ring

NO_OP register should be writen to 0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix insert nop for UVD6 ring
Leo Liu [Thu, 17 May 2018 17:44:28 +0000 (13:44 -0400)]
drm/amdgpu: fix insert nop for UVD6 ring

NO_OP register should be writen to 0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix insert nop for UVD7 ring
Leo Liu [Thu, 17 May 2018 17:37:50 +0000 (13:37 -0400)]
drm/amdgpu: fix insert nop for UVD7 ring

NO_OP register should be writen to 0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix insert nop for VCN decode ring
Leo Liu [Thu, 17 May 2018 17:31:49 +0000 (13:31 -0400)]
drm/amdgpu: fix insert nop for VCN decode ring

NO_OP register should be writen to 0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix build warning in vegam
Rex Zhu [Thu, 17 May 2018 12:21:42 +0000 (20:21 +0800)]
drm/amd/pp: Fix build warning in vegam

warning: missing braces around initializer [-Wmissing-braces]

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Clear connector's edid pointer
Mikita Lipski [Fri, 27 Apr 2018 13:09:52 +0000 (09:09 -0400)]
drm/amd/display: Clear connector's edid pointer

Clear connector's edid pointer on coonnector update, when unplugging
the display.

Fix poison EDID when hotplugging on previously used connector.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix memory leaks
Anthony Koo [Sat, 28 Apr 2018 00:50:07 +0000 (20:50 -0400)]
drm/amd/display: fix memory leaks

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: DCN1 link encoder
Eric Bernstein [Thu, 26 Apr 2018 18:06:00 +0000 (14:06 -0400)]
drm/amd/display: DCN1 link encoder

Create DCN1 link encoder files and update AUX and HPD register access.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Clear underflow status for debug purposes
Nikola Cornij [Fri, 27 Apr 2018 21:26:25 +0000 (17:26 -0400)]
drm/amd/display: Clear underflow status for debug purposes

We want to keep underflow sticky bit on for the longevity tests outside
of test environment. For debug purposes it is, however, useful to clear
underflow status after the test that caused it so that the following
tests are not affected. This change fullfils both requirements by clearing
the underflow only from within Windows or Diags test environment.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix bug with index check
Anthony Koo [Fri, 27 Apr 2018 19:23:23 +0000 (15:23 -0400)]
drm/amd/display: fix bug with index check

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add fullscreen transitions to log
Anthony Koo [Thu, 26 Apr 2018 14:03:44 +0000 (10:03 -0400)]
drm/amd/display: Add fullscreen transitions to log

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: constify a few dc_surface_update fields
Jun Lei [Thu, 26 Apr 2018 14:24:25 +0000 (10:24 -0400)]
drm/amd/display: constify a few dc_surface_update fields

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Only limit VSR downscaling when actually downscaling
Xingyue Tao [Thu, 19 Apr 2018 20:23:12 +0000 (16:23 -0400)]
drm/amd/display: Only limit VSR downscaling when actually downscaling

Signed-off-by: Xingyue Tao <xingyue.tao@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: don't create new dc_sink if nothing changed at detection
Samson Tam [Fri, 13 Apr 2018 22:38:56 +0000 (18:38 -0400)]
drm/amd/display: don't create new dc_sink if nothing changed at detection

Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: use macro for logs
Anthony Koo [Tue, 24 Apr 2018 19:36:27 +0000 (15:36 -0400)]
drm/amd/display: use macro for logs

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix up dm logging functionality
Anthony Koo [Tue, 24 Apr 2018 19:21:33 +0000 (15:21 -0400)]
drm/amd/display: Fix up dm logging functionality

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: update dml to allow sync with DV
Dmytro Laktyushkin [Tue, 20 Mar 2018 12:25:16 +0000 (08:25 -0400)]
drm/amd/display: update dml to allow sync with DV

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Log DTN only after the atomic commit in Diag
Nikola Cornij [Mon, 23 Apr 2018 19:55:36 +0000 (15:55 -0400)]
drm/amd/display: Log DTN only after the atomic commit in Diag

Also print HUBP info only if pipe enabled. This fixes having different
DTN logs for different test sequences.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: disable mpo if brightness adjusted
Yue Hin Lau [Wed, 18 Apr 2018 20:07:04 +0000 (16:07 -0400)]
drm/amd/display: disable mpo if brightness adjusted

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add dc cap to restrict VSR downscaling src size
Xingyue Tao [Thu, 19 Apr 2018 20:23:12 +0000 (16:23 -0400)]
drm/amd/display: Add dc cap to restrict VSR downscaling src size

- Adds int max_downscale_src_width in dc struct
- Checks and does not support if downscale size is more than 4k (width > 3840)

Signed-off-by: Xingyue Tao <xingyue.tao@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix a 32 bit shift meant to be 64 warning
Dmytro Laktyushkin [Mon, 23 Apr 2018 18:39:23 +0000 (14:39 -0400)]
drm/amd/display: fix a 32 bit shift meant to be 64 warning

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix 31_32_fixpt shift functions
Dmytro Laktyushkin [Mon, 23 Apr 2018 16:41:34 +0000 (12:41 -0400)]
drm/amd/display: fix 31_32_fixpt shift functions

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Update HW sequencer initialization
Eric Bernstein [Tue, 17 Apr 2018 20:50:28 +0000 (16:50 -0400)]
drm/amd/display: Update HW sequencer initialization

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: underflow/blankscreen recovery
Charlene Liu [Wed, 18 Apr 2018 18:31:41 +0000 (14:31 -0400)]
drm/amd/display: underflow/blankscreen recovery

[Description]
for any reason, if driver detects HUBP underflow,
if a debug option enabled to enable recovery.
it will kick in a sequence of recovery.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: truncate scaling ratios and inits to 19 bit precision
Dmytro Laktyushkin [Wed, 18 Apr 2018 18:19:23 +0000 (14:19 -0400)]
drm/amd/display: truncate scaling ratios and inits to 19 bit precision

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add fixed point fractional bit truncation function
Dmytro Laktyushkin [Wed, 18 Apr 2018 18:11:43 +0000 (14:11 -0400)]
drm/amd/display: add fixed point fractional bit truncation function

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Make DisplayStats work with just DC DisplayStats minor
Anthony Koo [Thu, 19 Apr 2018 14:05:22 +0000 (10:05 -0400)]
drm/amd/display: Make DisplayStats work with just DC DisplayStats minor

Remove dependency on the old FREESYNC_SW_STATS log mask used by DAL2
Also rename from profiling to displaystats

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: inline more of fixed point code
Dmytro Laktyushkin [Wed, 18 Apr 2018 17:54:24 +0000 (13:54 -0400)]
drm/amd/display: inline more of fixed point code

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: get rid of 32.32 unsigned fixed point
Dmytro Laktyushkin [Wed, 18 Apr 2018 15:37:53 +0000 (11:37 -0400)]
drm/amd/display: get rid of 32.32 unsigned fixed point

32.32 is redundant, 31.32 does everything we use 32.32 for

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Cleanup unused SetPlaneConfig
Anthony Koo [Fri, 13 Apr 2018 02:40:02 +0000 (22:40 -0400)]
drm/amd/display: Cleanup unused SetPlaneConfig

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Take vcn encode rings into account in idle work
Alex Deucher [Thu, 17 May 2018 18:03:05 +0000 (13:03 -0500)]
drm/amdgpu: Take vcn encode rings into account in idle work

Take the encode rings into account in the idle work handler.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Take uvd encode rings into account in idle work (v2)
Alex Deucher [Thu, 17 May 2018 17:45:52 +0000 (12:45 -0500)]
drm/amdgpu: Take uvd encode rings into account in idle work (v2)

Take the encode rings into account in the idle work handler.

v2: fix typo: s/num_uvd_inst/num_enc_rings/

Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: count fences from all uvd instances in idle handler
Alex Deucher [Thu, 17 May 2018 17:33:34 +0000 (12:33 -0500)]
drm/amdgpu: count fences from all uvd instances in idle handler

Current multi-UVD hardware uses a single clock and power source
so handle all instances in the idle handler.

Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: fix function name prefix in comments
Nayan Deshmukh [Wed, 16 May 2018 13:24:18 +0000 (18:54 +0530)]
drm/scheduler: fix function name prefix in comments

That got missed while moving the files outside of amdgpu.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/amdgpu: Code comments for the amdgpu_ttm.c driver. (v2)
Tom St Denis [Wed, 9 May 2018 18:22:29 +0000 (14:22 -0400)]
drm/amd/amdgpu:  Code comments for the amdgpu_ttm.c driver. (v2)

NFC just comments.

(v2):  Updated based on feedback from Alex Deucher.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: missing curly braces in smu7_enable_sclk_mclk_dpm()
Dan Carpenter [Thu, 17 May 2018 12:56:05 +0000 (15:56 +0300)]
drm/amd/pp: missing curly braces in smu7_enable_sclk_mclk_dpm()

We added some more lines of code to this if statement but forgot to add
curly braces.

Fixes: 0c24e7ef233b ("drm/amd/powerplay: add specific changes for VEGAM in smu7_hwmgr.c")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/display: fix vega12/20 handling in dal_asic_id.h
Alex Deucher [Wed, 16 May 2018 20:34:19 +0000 (15:34 -0500)]
drm/amdgpu/display: fix vega12/20 handling in dal_asic_id.h

- Remove unused ASICREV_IS_VEGA12_p() macro
- Fix ASICREV_IS_VEGA12_P() macro to properly check against vega20

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>