Arnd Bergmann [Mon, 8 Apr 2013 15:52:35 +0000 (17:52 +0200)]
Merge tag 'renesas-intc-external-irq2-for-v3.10' of git://git./linux/kernel/git/horms/renesas into next/drivers
From Simon Horman <horms+renesas@verge.net.au>:
Update for Renesas INTC External IRQ pin driver for v3.10
This adds support for shared interrupt lines to the
Renesas INTC External IRQ pin driver which has already
been queued up for v3.10 (tag renesas-intc-external-irq-for-v3.10).
* tag 'renesas-intc-external-irq2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
irqchip: intc-irqpin: Add support for shared interrupt lines
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Bastian Hecht [Wed, 27 Mar 2013 13:54:03 +0000 (14:54 +0100)]
irqchip: intc-irqpin: Add support for shared interrupt lines
On some hardware we don't have a 1-1 mapping from the external
interrupts coming from INTC to the GIC SPI pins. We can however
share lines to demux incoming IRQs on these SoCs.
This patch enables the intc_irqpin driver to detect requests for shared
interrupt lines and demuxes them properly by querying the INTC INTREQx0A
registers.
If you need multiple shared intc_irqpin device instances, be sure to mask
out all interrupts on the INTC that share the one line before you start
to register them. Else you run into IRQ floods that would be caused by
interrupts for which no handler has been set up yet when the first
intc_irqpin device is registered.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Arnd Bergmann [Fri, 22 Mar 2013 12:38:06 +0000 (13:38 +0100)]
Merge tag 'renesas-clocksource-for-v3.10' of git://git./linux/kernel/git/horms/renesas into next/drivers
From Simon Horman <horms@verge.net.au>:
Renesas ARM and SH based SoC clocksource update for v3.10
I has been agreed by Paul Mundt and myself, that it would be best to take
these changes through the renesas tree and in turn the arm-soc tree.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* tag 'renesas-clocksource-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
clocksource: sh_mtu2: Set initcall level to subsys
clocksource: em_sti: Set initcall level to subsys
clocksource: sh_tmu: Set initcall level to subsys
clocksource: sh_cmt: Set initcall level to subsys
clocksource: sh_cmt: Add CMT register layout comment
clocksource: sh_cmt: Add control register callbacks
clocksource: sh_cmt: CMCNT and CMCOR register access update
clocksource: sh_cmt: CMSTR and CMCSR register access update
clocksource: sh_cmt: Consolidate platform_set_drvdata() call
clocksource: sh_cmt: Introduce per-register functions
clocksource: sh_cmt: Initialize 'max_match_value' and 'lock' in sh_cmt_setup()
clocksource: sh_cmt: Take care of clk_put() when setup_irq() fails
Arnd Bergmann [Thu, 21 Mar 2013 17:02:40 +0000 (18:02 +0100)]
Merge tag 'renesas-intc-external-irq-for-v3.10' of git://git./linux/kernel/git/horms/renesas into next/drivers
From Simon Horman <horms+renesas@verge.net.au>:
Renesas INTC External IRQ pin driver
This provides two new INTC drivers for use with Renesas ARM-based SoCs and
makes use of them on the r8a7779 and sh73a0 SoCs.
It has been agreed by the relevant parties, Thomas Gleixner, Magnus Damm,
and myself that it would be best to merge this code through the renesas
tree and thus through the arm-soc tree.
This is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc-v3.10
* tag 'renesas-intc-external-irq-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
irqchip: irqc: Add DT support
irqchip: intc-irqpin: Initial DT support
ARM: shmobile: Make r8a7779 INTC irqpin platform data static
ARM: shmobile: Make sh73a0 INTC irqpin platform data static
irqchip: Renesas IRQC driver
irqchip: intc-irqpin: GPL header for platform data
irqchip: intc-irqpin: Make use of devm functions
irqchip: intc-irqpin: Add force comments
irqchip: intc-irqpin: Cache mapped IRQ
irqchip: intc-irqpin: Whitespace fixes
ARM: shmobile: INTC External IRQ pin driver on r8a7779
ARM: shmobile: INTC External IRQ pin driver on sh73a0
ARM: shmobile: irq_pin() for static IRQ pin assignment
irqchip: Renesas INTC External IRQ pin driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Magnus Damm [Wed, 6 Mar 2013 06:23:39 +0000 (15:23 +0900)]
irqchip: irqc: Add DT support
Add DT support to the IRQC External IRQ Pin driver.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 6 Mar 2013 06:16:08 +0000 (15:16 +0900)]
irqchip: intc-irqpin: Initial DT support
Add initial DT support to the INTC External IRQ Pin
driver. At this point only hardware with 4-bit wide
sense registers is supported via DT.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 6 Mar 2013 06:10:06 +0000 (15:10 +0900)]
ARM: shmobile: Make r8a7779 INTC irqpin platform data static
The platform data for the INTC irq pin driver
seems to be global symbols, make it static to
allow multi-soc build.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 6 Mar 2013 06:08:31 +0000 (15:08 +0900)]
ARM: shmobile: Make sh73a0 INTC irqpin platform data static
The platform data for the INTC irq pin driver
seems to be global symbols, make it static to
allow multi-soc build.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 27 Feb 2013 08:15:01 +0000 (17:15 +0900)]
irqchip: Renesas IRQC driver
This patch adds a driver for external IRQ pins connected
to the IRQC hardware block on recent SoCs from Renesas.
The IRQC hardware block is used together with more
recent ARM based SoCs using the GIC. As usual the GIC
requires external IRQ trigger setup somewhere else
which in this particular case happens to be IRQC.
This driver implements the glue code needed to configure
IRQ trigger and also handle mask/unmask and demux of
external IRQ pins hooked up from the IRQC to the GIC.
Tested on r8a73a4 but is designed to work with a wide
range of SoCs. The driver requires one GIC SPI per
external IRQ pin to operate. Each driver instance
will handle up to 32 external IRQ pins.
The SoCs using this driver are currently mainly used
together with regular platform devices so this driver
allows configuration via platform data to support things
like static interrupt base address. DT support will
be added incrementally in the not so distant future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 11:59:23 +0000 (20:59 +0900)]
irqchip: intc-irqpin: GPL header for platform data
Add GPL header to platform data include file.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 11:59:13 +0000 (20:59 +0900)]
irqchip: intc-irqpin: Make use of devm functions
Use devm_kzalloc(), devm_ioremap_nocache()
and devm_request_irq() to simplify error
handling.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 11:59:04 +0000 (20:59 +0900)]
irqchip: intc-irqpin: Add force comments
Add comments to describe the special case for
"force" versions of enable and disable functions.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 11:58:54 +0000 (20:58 +0900)]
irqchip: intc-irqpin: Cache mapped IRQ
Cache IRQ in domain_irq variable instead of
making use of irq_find_mapping(). While at it
rename the irq variable to requested_irq.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 11:58:44 +0000 (20:58 +0900)]
irqchip: intc-irqpin: Whitespace fixes
Remove whitespace damage and add newline
between variables and code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 03:01:18 +0000 (12:01 +0900)]
ARM: shmobile: INTC External IRQ pin driver on r8a7779
Update the r8a7779 IRQ code to make use of the
INTC External IRQ pin driver for external
interrupt pins IRQ0 -> IRQ3.
The r8a7779 SoC can like older SH SoCs configure
to use the IRQ0 -> IRQ3 signals as individual
interrupts or a combined IRL mode.
Without this patch the r8a7779 SoC code does
not fully support external IRQ pins in individual
IRQ mode. The r8a7779 PFC code does not yet have
gpio_to_irq() support so no need to update such
code.
At this point the DT reference implementations
are not covered. In the future such code shall
tie in the INTC External IRQ pin driver via
DT, so this kind of verbose code is not needed
for the long term DT case.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 03:01:09 +0000 (12:01 +0900)]
ARM: shmobile: INTC External IRQ pin driver on sh73a0
Adjust the sh73a0 IRQ code to make use of the
INTC External IRQ pin driver for external
interrupt pins IRQ0 -> IRQ31.
This removes quite a bit of special-case code
in intc-sh73a0.c but the number of lines get
replaced with platform device information in
setup-sh73a0.c. The PFC code is also adjusted
to make gpio_to_irq() return the correct
interrupt number.
At this point the DT reference implementations
are not covered. In the future such code shall
tie in the INTC External IRQ pin driver via
DT, so this kind of verbose code is not needed
for the long term DT case.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 26 Feb 2013 03:00:59 +0000 (12:00 +0900)]
ARM: shmobile: irq_pin() for static IRQ pin assignment
Add the macro irq_pin() to let board-specific code using
platform devices tie in external IRQn pins in a common way.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 14:28:34 +0000 (23:28 +0900)]
irqchip: Renesas INTC External IRQ pin driver
This patch adds a driver for external IRQ pins connected
to the INTC block on recent SoCs from Renesas.
The INTC hardware block usually contains a rather wide
range of features ranging from external IRQ pin handling
to legacy interrupt controller support. On older SoCs
the INTC is used as a general purpose interrupt controller
both for external IRQ pins and on-chip devices.
On more recent ARM based SoCs with Cortex-A9 the main
interrupt controller is the GIC, but IRQ trigger setup
still need to happen in the INTC hardware block.
This driver implements the glue code needed to configure
IRQ trigger and also handle mask/unmask and demux of
external IRQ pins hooked up from the INTC to the GIC.
Tested on sh73a0 and r8a7779. The hardware varies quite
a bit with SoC model, for instance register width and
bitfield widths vary wildly. The driver requires one GIC
SPI per external IRQ pin to operate. Each driver instance
will handle up to 8 external IRQ pins.
The SoCs using this driver are currently mainly used
together with regular platform devices so this driver
allows configuration via platform data to support things
like static interrupt base address. DT support will
be added incrementally in the not so distant future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Phil Edworthy [Thu, 31 Jan 2013 01:45:01 +0000 (02:45 +0100)]
r8a7779: Add Display Unit clock support
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
[Rename device from to rcarfb to rcar-du]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[Manual conflict resolution]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Arnd Bergmann [Fri, 15 Mar 2013 22:08:09 +0000 (23:08 +0100)]
Merge tag 'at91-driversLCD' of git://github.com/at91linux/linux-at91 into next/drivers
From Nicolas Ferre <nicolas.ferre@atmel.com>:
Some Atmel framebuffer driver enhancements with modification
of configuration data in ARM/AT91 and AVR32/AP7 trees.
A merge of these modifications seems easier through arm-soc
git tree nowadays.
* tag 'at91-driversLCD' of git://github.com/at91linux/linux-at91:
ARM: at91/avr32/atmel_lcdfb: add platform device-id table
atmel_lcdfb: move lcdcon2 register access to compute_hozval
ARM: at91/avr32/atmel_lcdfb: add bus-clock entry
ARM: at91: fix LCD-wiring mode
atmel_lcdfb: fix 16-bpp modes on older SOCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Mar 2013 21:51:54 +0000 (22:51 +0100)]
Merge branch 'next/pinctrl-exynos' of git://git./linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim <kgene.kim@samsung.com>:
Here is support pinctrl-exynos5250 and that already got ack from Linus Walleij.
* 'next/pinctrl-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: skip wakeup interrupt registration for exynos5250 if pinctrl is enabled
gpio: samsung: skip gpiolib registration if pinctrl support is enabled for exynos5250
pinctrl: exynos: add exynos5250 SoC specific data
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Mar 2013 21:46:51 +0000 (22:46 +0100)]
Merge branch 'next/irq-s3c24xx' of git://git./linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim <kgene.kim@samsung.com>:
Here is finish the irq rework for s3c2412, s3c2440 and s3c2442 into the new
structure and eint0 to 3 on the s3c2412.
* 'next/irq-s3c24xx' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
gpio: samsung: fixes build warning with s3c2410_defconfig
ARM: S3C24XX: handle s3c2412 eints using new infrastructure
ARM: S3C24XX: add soc_is_s3c2412 option
ARM: S3C24XX: include first 4 bits of the eint register in irq mapping
ARM: S3C24XX: transform s3c2412 irqs into new structure
ARM: S3C24XX: modify s3c2412 irq init to initialize all irqs
ARM: S3C24XX: move s3c2412 irq init to common code
ARM: S3C24XX: use samsung_sync_wakemask in s3c2412 pm
ARM: S3C24XX: transform s3c2440 irqs into new structure
ARM: S3C24XX: transform s3c2442 irqs into new structure
ARM: S3C24XX: integrate s3c2440 irqs into common init
ARM: S3C24XX: move s3c2440 irqs to common irq code
ARM: S3C24XX: create dedicated irq init functions for s3c2440 and s3c2442
ARM: S3C24XX: move s3c244x irq init to common irq code
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Mar 2013 21:45:05 +0000 (22:45 +0100)]
Merge branch 'next/timer-samsung' of git://git./linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim <kgene.kim@samsung.com>:
Here is re-work samsung-time which was s5p-time to support
clocksource/clockevent API for s3c and s5pc100 timer driver. And this enables to
support high resolution timer and tickles mode on them.
Note, this depends on previous pull request (cleanup-s3c) because of touching
while s3c stuff.
* 'next/timer-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: Remove unused plat-samsung/time.c
ARM: S5PC100: Add samsung-time support for s5pc100
ARM: S3C64XX: Add samsung-time support for s3c64xx
ARM: S3C24XX: Add samsung-time support for s3c24xx
ARM: SAMSUNG: Rename s5p-time to samsung-time
ARM: S3C24XX: cleanup the included soc init functions in common.h
ARM: S3C24XX: move plat-samsung/s3c24XX headers to local common.h
ARM: S3C24XX: remove plat/irq.h in plat-samsung
ARM: S3C24XX: plat/common-smdk.h local
mmc: s3cmci: moved mach/regs-sdi.h into s3cmci device driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Johan Hovold [Thu, 7 Feb 2013 15:31:58 +0000 (16:31 +0100)]
ARM: at91/avr32/atmel_lcdfb: add platform device-id table
Add platform device-id table in order to identify the controller and
determine its configuration.
The currently used configuration parameters are:
have_alt_pixclock
- SOC uses an alternate pixel-clock calculation formula (at91sam9g45
non-ES)
have_hozval
- SOC has a HOZVAL field in LCDFRMCFG which is used to determine the
linesize for STN displays (at91sam9261, at921sam9g10 and at32ap)
have_intensity_bit
- SOC uses IBGR:555 rather than BGR:565 16-bit pixel layout
(at91sam9261, at91sam9263 and at91sam9rl)
This allows us to remove all the remaining uses of cpu_is macros from
the driver.
Tested on at91sam9263 and at91sam9g45, compile-tested for other
AT91-SOCs, and untested for AVR32.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Johan Hovold [Thu, 7 Feb 2013 15:31:57 +0000 (16:31 +0100)]
atmel_lcdfb: move lcdcon2 register access to compute_hozval
Pass atmel_lcd_info structure to compute_hozval and only do the register
access on SOCs that actually use it.
This will also simplify the removal of the cpu_is macros.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Johan Hovold [Thu, 7 Feb 2013 15:31:56 +0000 (16:31 +0100)]
ARM: at91/avr32/atmel_lcdfb: add bus-clock entry
Add hclk entry for the atmel_lcdfb bus clock.
On at91sam9261, at91sam9g10 and at32ap the bus clock has to be enabled
as well as the peripheral clock. Add the appropriate lookup entries to
these SOCs and fake clocks to the SOCs that do not use it.
This allows us to get rid of the conditional enabling of the clocks in
the driver which relied on the cpu_is macros.
Tested on at91sam9263 and at91sam9g45, compile-tested for other
AT91-SOCs, and untested for AVR32.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Johan Hovold [Wed, 13 Mar 2013 09:56:13 +0000 (10:56 +0100)]
ARM: at91: fix LCD-wiring mode
Fix regression introduced by commit
787f9fd23283 ("atmel_lcdfb: support
16bit BGR:565 mode, remove unsupported 15bit modes") which broke 16-bpp
modes for older SOCs which use IBGR:555 (msb is intensity) rather than
BGR:565.
The above commit removes the RGB:555-wiring hack by
removing the no longer used ATMEL_LCDC_WIRING_RGB555 define.
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Johan Hovold [Tue, 5 Feb 2013 13:35:11 +0000 (14:35 +0100)]
atmel_lcdfb: fix 16-bpp modes on older SOCs
Fix regression introduced by commit
787f9fd23283 ("atmel_lcdfb: support
16bit BGR:565 mode, remove unsupported 15bit modes") which broke 16-bpp
modes for older SOCs which use IBGR:555 (msb is intensity) rather
than BGR:565.
Use SOC-type to determine the pixel layout.
Tested on at91sam9263 and at91sam9g45.
Cc: <stable@vger.kernel.org>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Simon Horman [Tue, 5 Mar 2013 06:40:42 +0000 (15:40 +0900)]
clocksource: sh_mtu2: Set initcall level to subsys
The reason for this is to ensure that MTU2 is probed earlier
than with its previous initcall level, module init.
This came up as a problem with using CMT as a clock source kzm9g-reference
which does not make use of early timers or devices. In that scenario
initialisation of SDHI and MMCIF both stall on msleep() calls due to the
absence of a initialised clock source.
The purpose of this change is to keep the MTU2 code in sync with the CMT code
which has been modified in a similar manner..
Compile tested only using se7206_defconfig.
I do not believe I have any boards that support the MTU2.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 5 Mar 2013 06:40:42 +0000 (15:40 +0900)]
clocksource: em_sti: Set initcall level to subsys
The reason for this is to ensure that STI is probed earlier
than with its previous initcall level, module init.
This came up as a problem with using CMT as a clock source kzm9g-reference
which does not make use of early timers or devices. In that scenario
initialisation of SDHI and MMCIF both stall on msleep() calls due to the
absence of a initialised clock source.
The purpose of this change is to keep the STI code in sync with the CMT code
which has been modified in a similar manner..
Boot tested on: kzm9d.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 5 Mar 2013 06:40:42 +0000 (15:40 +0900)]
clocksource: sh_tmu: Set initcall level to subsys
The reason for this is to ensure that TMU is probed earlier
than with its previous initcall level, module init.
This came up as a problem with using CMT as a clock source kzm9g-reference
which does not make use of early timers or devices. In that scenario
initialisation of SDHI and MMCIF both stall on msleep() calls due to the
absence of a initialised clock source.
The purpose of this change is to keep the TMU code in sync with the CMT code
which has been modified in a similar manner..
Boot tested on: mackerel.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 5 Mar 2013 06:40:42 +0000 (15:40 +0900)]
clocksource: sh_cmt: Set initcall level to subsys
The reason for this is to ensure that CMT is probed earlier
than with its previous initcall level, module init.
This came up as a problem with using kzm9g-reference which does
not make use of early timers or devices. In that scenario initialisation
of SDHI and MMCIF both stall on msleep() calls due to the absence
of a initialised clock source.
Boot tested on: armadillo800eva, mackerel and kzm9g
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:54:37 +0000 (14:54 +0900)]
clocksource: sh_cmt: Add CMT register layout comment
Add a comment about different register layouts
supported by the CMT driver.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:54:28 +0000 (14:54 +0900)]
clocksource: sh_cmt: Add control register callbacks
This patch adds control register callbacks for the CMT
driver. At this point only 16-bit access is supported
but in the future this will be updated to allow 32-bit
access as well.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:54:19 +0000 (14:54 +0900)]
clocksource: sh_cmt: CMCNT and CMCOR register access update
Break out the CMCNT and CMCOR register access code
into separate 16-bit and 32-bit functions that are
hooked into callbacks at init time. This reduces
the amount of software calculations happening at
runtime.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:54:10 +0000 (14:54 +0900)]
clocksource: sh_cmt: CMSTR and CMCSR register access update
Update hardware register access code for CMSTR and CMCSR
from using sh_cmt_read() and sh_cmt_write() to make use
of 16-bit register access functions such as sh_cmt_read16()
and sh_cmt_write16(). Also update sh_cmt_read() and
sh_cmt_write() now when the special cases are gone.
This patch moves us one step closer to the goal of separating
counter register access functions from control control register
functions.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:53:51 +0000 (14:53 +0900)]
clocksource: sh_cmt: Consolidate platform_set_drvdata() call
Cleanup the use of platform_set_drvdata() to reduce code size
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:54:00 +0000 (14:54 +0900)]
clocksource: sh_cmt: Introduce per-register functions
Introduce sh_cmt_read_cmstr/cmcsr/cmcnt() and
sh_cmt_write_cmstr/cmcsr/cmcnt/cmcor() to in the
future allow us to split counter registers from
control registers and reduce code complexity by
removing sh_cmt_read() and sh_cmt_write().
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:53:41 +0000 (14:53 +0900)]
clocksource: sh_cmt: Initialize 'max_match_value' and 'lock' in sh_cmt_setup()
Move the setup of spinlock and max_match_value to sh_cmt_setup().
There's no need to defer those steps until sh_cmt_register().
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Fri, 14 Dec 2012 05:53:32 +0000 (14:53 +0900)]
clocksource: sh_cmt: Take care of clk_put() when setup_irq() fails
Make sure clk_put() is called in case of failure in sh_cmt_setup().
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <john.stultz@linaro.org>
Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Thu, 7 Mar 2013 23:31:03 +0000 (02:31 +0300)]
ARM: shmobile: R8A7779: use gic_iid() in SATA IRQ resource
Commit "ARM: shmobile: r8a7779: use gic_iid macro" switched R8A7779 platform
devices to using gic_iid() macro instead of gic_spi() but commit "ARM: mach-
shmobile: r8a7779: add SATA support" added another use of gic_spi(). Convert
the SATA IRQ resource to using gic_iid().
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Wed, 27 Feb 2013 20:39:14 +0000 (23:39 +0300)]
ARM: mach-shmobile: r8a7779: add SATA support
Add SATA clock for r8a7779 SoC (for both device tree and usual cases).
Register SATA controller as a "late" platform device on r8a7779 SoC.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Wed, 27 Feb 2013 20:34:36 +0000 (23:34 +0300)]
ARM: mach-shmobile: r8a7779: SATA DT configuration
Allow configuration of the r8a7779 SoC SATA controller using a flattened device
tree.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Mon, 4 Mar 2013 08:32:16 +0000 (00:32 -0800)]
ARM: shmobile: r8a7779: add Thermal support on DT
76cc1887496fe80138c6b07c37d7f81e4cf27cde
(thermal: rcar: add Device Tree support)
supported rcar_thermal DT probing.
rcar thermal driver doesn't support IRQ on r8a7779 chip
since it is using old design IRQ.
R-Car/R-Mobile next generation chips are using new design IRQ,
and rcar thermal driver is supporting these.
This patch adds rcar_thermal DT support for r8a7779 without IRQ.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Mon, 4 Mar 2013 07:30:19 +0000 (23:30 -0800)]
ARM: shmobile: tidyup chip series definition order for r8a7740/r8a7779
move r8a7740_meram_workaround() to r8a7740 area
from r8a7779 area
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Mon, 4 Mar 2013 07:11:41 +0000 (23:11 -0800)]
ARM: shmobile: r8a7779: use gic_iid macro
"ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID"
enabled to use gic_iid macro.
This patch exchange current GIC interrupt setting
from gic_spi() to gic_iid()
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[ horms+renesas@verge.net.au: Updated git commit id in changelog ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Mon, 4 Mar 2013 07:11:20 +0000 (23:11 -0800)]
ARM: shmobile: r8a7779: fixup DT machine name
r8a7779 is not sh73a0
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Mon, 4 Mar 2013 07:11:03 +0000 (23:11 -0800)]
ARM: shmobile: r8a7779: fixup dtsi typo
r8a7779 is not r8a7740 chip
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Kuninori Morimoto [Mon, 25 Feb 2013 09:39:44 +0000 (01:39 -0800)]
ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID
R-Car H1 datasheet GIC number is indicating
GIC ICCIAR / interrupt ID number, not SPI number,
but current marzen board code is using gic_spi() with
un-understandable calculation.
This patch adds new gic_iid() macro which means
ICCIAR / interrupt ID, and used the number
currently written on datasheet.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[ horms+renesas@verge.net.au: Split board-marzen.c portion into a separate patch ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Bastian Hecht [Tue, 26 Feb 2013 17:03:27 +0000 (11:03 -0600)]
ARM: mach-shmobile: r8a7740: Add DT names to clock list
This adds temporarily the alternative device names to the clock list
that are used when booting via Device Tree setup.
Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:48:03 +0000 (22:48 +0900)]
ARM: shmobile: Remove unused hotplug.c
Each CPU Hotplug implementation for mach-shmobile
is now self-contained, so this change removes unused
helper code in hotplug.c. The two CPU Hotplug capable
SoCs sh73a0 and r8a7779 remain unchanged.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:47:54 +0000 (22:47 +0900)]
ARM: shmobile: Rearrange r8a7779 cpu hotplug code
Update the r8a7779 SMP code and CPU Hotplug in particular
to follow the same style as sh73a0. This means dropping
__maybe_unused for #ifdef CONFIG_HOTPLUG_CPU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:47:44 +0000 (22:47 +0900)]
ARM: shmobile: Use sh73a0-specific cpu disable code
Convert the sh73a0 CPU Hotplug code to use a local
implementation of ->cpu_disable(). With this change
in place the sh73a0 SMP code does no longer depend
on hotplug.c.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:47:35 +0000 (22:47 +0900)]
ARM: shmobile: Update r8a7779 to use scu_power_mode()
Update the SMP code for R8A7779 to make use of the
shared SCU function scu_power_mode() together with
the early setup code in shmobile_secondary_vector_scu.
With this patch in place the secondary CPUs modify the
SCU setting during early boot instead of letting other
CPUs deal with the coherency setting before boot. In
other words, we used to setup coherency before boot
in r8a7779_boot_secondary() but that bit is now instead
handled by the code in shmobile_secondary_vector_scu.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:47:25 +0000 (22:47 +0900)]
ARM: shmobile: Update r8a7779 to check SCU for hotplug
Update the r8a7779 CPU Hotplug code to use SCU PSR
to wait for the target CPU core. Previously the
shared code in hotplug.c was used to let cpu_kill()
wait for cpu_die(). With this change in place the
r8a7779 SMP code does not depend on hotplug.c anymore.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:47:16 +0000 (22:47 +0900)]
ARM: shmobile: Use R8A7779_SCU_BASE with TWD
Rework the IOMEM() usage for the SCU base address in the
case of r8a7779. Adjusts the TWD to use R8A7779_SCU_BASE.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:47:07 +0000 (22:47 +0900)]
ARM: shmobile: Rework SH73A0_SCU_BASE IOMEM() usage
Rework the IOMEM() usage for the SCU base address in the
case of sh73a0. Removes recently introduced build warnings:
arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default]
arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].start') [enabled by default]
arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default]
/arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].end') [enabled by default]
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Mon, 18 Feb 2013 13:46:57 +0000 (22:46 +0900)]
ARM: shmobile: Fix base address readout in headsmp-scu.S
Rework the early SCU setup code in headsmp-scu.S to read
the base address in the same way as we use to fetch the
address of the invalidation function.
Reported-by: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 19 Feb 2013 02:32:36 +0000 (11:32 +0900)]
ARM: shmobile: r8a7779: Remove lan from dtsi
The ethernet controller is not part of the r8a7779 SoC.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 19 Feb 2013 01:53:05 +0000 (10:53 +0900)]
ARM: shmobile: r8a7779: Do not initialise i2c as an early device
It is sufficient to initialise i2c as a late device.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 19 Feb 2013 01:53:05 +0000 (10:53 +0900)]
ARM: shmobile: r8a7779: Do not use early devices with DT reference
Do not initialise any early devices when using the minimal DT reference
code. Only the delay needs to be initialised.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 19 Feb 2013 01:53:05 +0000 (10:53 +0900)]
ARM: shmobile: sh73a0: Do not use early devices with DT reference
Do not initialise any early devices when using the minimal DT reference
code. Only the delay needs to be initialised.
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Fri, 15 Feb 2013 12:38:20 +0000 (21:38 +0900)]
ARM: shmobile: sh73a0: Remove warning about SMP
Remove warning about SMP not working with the
clock initialisation sheme used for reference DT.
This is resolved by not selecting CONFIG_PREEMPT.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Fri, 15 Feb 2013 12:38:20 +0000 (21:38 +0900)]
ARM: shmobile: sh73a0: Add smp ops to DT_MACHINE_START
This a board to be brought up with SMP enabled
without a board file present.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Fri, 15 Feb 2013 12:38:20 +0000 (21:38 +0900)]
ARM: shmobile: sh73a0: Remove sh73a0_init_irq_dt()
This is not needed as irq_set_wake is
only used for suspend to ram which is not
a requirement for bringing up boards using DT.
Reported-by: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Guennadi Liakhovetski [Fri, 22 Feb 2013 17:17:51 +0000 (18:17 +0100)]
ARM: shmobile: sh73a0: fix Z and ZG clock hierarchy
Z and ZG clocks on sh73a0 have pll0 as their parent, not pll1.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 13 Feb 2013 13:49:47 +0000 (22:49 +0900)]
ARM: shmobile: Make EMEV2 setup functions static
Adjust emev2_init_delay() and emev2_add_standard_devices_dt()
to become static. They are not used outside this file anyway.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 13 Feb 2013 13:47:27 +0000 (22:47 +0900)]
ARM: shmobile: Update EMEV2 to use scu_power_mode()
Update the SMP code for EMEV2 to make use of the
shared SCU function scu_power_mode() together with
the early setup code in shmobile_secondary_vector_scu.
With this patch in place the secondary CPUs modify the
SCU setting during early boot instead of letting other
CPUs deal with the coherency setting before boot. In
other words, we used to setup coherency before boot
in emev2_boot_secondary() but that bit is now instead
handled by the code in shmobile_secondary_vector_scu.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 13 Feb 2013 13:47:17 +0000 (22:47 +0900)]
ARM: shmobile: Common shmobile_scu_base in headsmp-scu.S
Update the code in headsmp-scu.S to use a global
shmobile_scu_base variable both for convenient SCU
base address storage and for the early SCU setup
code in shmobile_secondary_vector_scu.
With this patch applied r8a7779, sh73a0 and EMEV2
all make use of the global shmobile_scu_base
variable. However only sh73a0 makes use of the SCU
bring up code in shmobile_secondary_vector_scu.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 13 Feb 2013 13:47:07 +0000 (22:47 +0900)]
ARM: shmobile: Move headsmp-sh73a0.S to headsmp-scu.S
Rename headsmp-sh73a0.S into headsmp-scu.S and
introduce shmobile_secondary_vector_scu().
The goal is to be able to share the function
above between all mach-shmobile SoCs that use
SCU for SMP. So far only sh73a0 use this.
At this time the SCU base address is still hard
coded in headsmp-scu.S to 0xf0000000, but this
will be changed in the future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 13 Feb 2013 13:46:57 +0000 (22:46 +0900)]
ARM: shmobile: Rework EMEV2 scu_base variable
Rename the static scu_base variable into shmobile_scu_base.
Later in the series the shmobile_scu_base variable will be
made into a global variable so this is preparation only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 13 Feb 2013 13:46:48 +0000 (22:46 +0900)]
ARM: shmobile: Kill off r8a7779 scu_base_addr() function
Replace scu_base_addr() with a static shmobile_scu_base
variable and introduce R8A7779_SCU_BASE.
Later in the series the shmobile_scu_base variable will be
made into a global variable so this is preparation only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 13 Feb 2013 13:46:38 +0000 (22:46 +0900)]
ARM: shmobile: Kill off sh73a0 scu_base_addr() function
Replace scu_base_addr() with a static shmobile_scu_base
variable and introduce SH73A0_SCU_BASE.
Later in the series the shmobile_scu_base variable will be
made into a global variable so this is preparation only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Wed, 21 Nov 2012 13:00:15 +0000 (22:00 +0900)]
ARM: mach-shmobile: r8a7779: Minimal setup using DT
Allow a minimal setup of the r8a7779 SoC using a flattened device tree.
In particular, configure the i2c and ethernet controllers using a
flattened device tree.
SCI serial controller and TMU clock source, whose drivers do not yet
support configuration using a flattened device tree, are still configured
using C code in order to allow booting of a board with this SoC.
The ethernet controller also requires a regulator which is a board property.
A sample snippet DT for the marzen board is as follows:
/dts-v1/;
/include/ "r8a7779.dtsi"
/ {
fixedregulator3v3: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <
3300000>;
regulator-max-microvolt = <
3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&lan0 {
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
};
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 29 Jan 2013 05:21:46 +0000 (14:21 +0900)]
ARM: mach-shmobile: r8a7779: Allow initialisation of GIC by DT
This allows the GIC interrupt controller of the r8a7779 SoC to be
initialised using a flattened device tree blob.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v3
* Fix copy-paste error and use unique reg values for each CPU
v2
As suggested by Mark Rutland
* Add reg and device_type to cpus
* Remove #address-cells from gic
Guennadi Liakhovetski [Fri, 8 Feb 2013 18:38:25 +0000 (19:38 +0100)]
ARM: shmobile: add MMCIF and SDHI DT clock aliases to sh73a0 and r8a7740
Add clock lookup entries for SDHI and MMCIF device names, for the FDT case.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[horms+renesas@verge.net.au: resolved trivial conflict in clock-r8a7740.c]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 12 Feb 2013 15:45:34 +0000 (00:45 +0900)]
ARM: shmobile: Remove emev2_get_core_count()
Reduce the number of lines of code in smp-emev2.c
by getting rid of the emev2_get_core_count() function.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 12 Feb 2013 15:45:25 +0000 (00:45 +0900)]
ARM: shmobile: Remove r8a7779_get_core_count()
Reduce the number of lines of code in smp-r8a7779.c
by getting rid of the r8a7779_get_core_count() function.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 12 Feb 2013 15:45:16 +0000 (00:45 +0900)]
ARM: shmobile: Remove sh73a0_get_core_count()
Reduce the number of lines of code in smp-sh73a0.c
by getting rid of the sh73a0_get_core_count() function.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 12 Feb 2013 15:45:06 +0000 (00:45 +0900)]
ARM: shmobile: Move EMEV2 CPU boot vector setup code
Move the boot vector setup code for the EMEV2 SoC to match
the sh73a0 and r8a7779 implementations. With this in place
all SoC specific SMP implementations for mach-shmobile uses
the ->smp_prepare_cpus() callback to setup the boot vector.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 12 Feb 2013 15:44:57 +0000 (00:44 +0900)]
ARM: shmobile: Remove partial CPU Hotplug from EMEV2
Remove partial CPU hotplug support from EMEV2 SMP code.
The upstream EMEV2 SMP support code has no CPU shutdown or
reset ability so we cannot reboot the secondary CPU cores.
Regular SMP operation is however still working as expected.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Tue, 12 Feb 2013 15:44:48 +0000 (00:44 +0900)]
ARM: shmobile: Remove unused headers from hotplug.c
This file has no SoC-specific references in it, and
fortunately it is still independent of OF so there
is no real reason to drag in these headers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Linus Torvalds [Sun, 10 Mar 2013 23:54:19 +0000 (16:54 -0700)]
Linux 3.9-rc2
Linus Torvalds [Sun, 10 Mar 2013 00:51:13 +0000 (16:51 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/ebiederm/user-namespace
Pull namespace bugfixes from Eric Biederman:
"This is three simple fixes against 3.9-rc1. I have tested each of
these fixes and verified they work correctly.
The userns oops in key_change_session_keyring and the BUG_ON triggered
by proc_ns_follow_link were found by Dave Jones.
I am including the enhancement for mount to only trigger requests of
filesystem modules here instead of delaying this for the 3.10 merge
window because it is both trivial and the kind of change that tends to
bit-rot if left untouched for two months."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace:
proc: Use nd_jump_link in proc_ns_follow_link
fs: Limit sys_mount to only request filesystem modules (Part 2).
fs: Limit sys_mount to only request filesystem modules.
userns: Stop oopsing in key_change_session_keyring
Linus Torvalds [Sat, 9 Mar 2013 18:31:01 +0000 (10:31 -0800)]
Atmel MXT touchscreen: increase reset timeouts
There is a more complete atmel patch-series out by Nick Dyer that fixes
this and other things, but in the meantime this is the minimal thing to
get the touchscreen going on (at least my) Pixel Chromebook.
Not that I want my dirty fingers near that beautiful screen, but it
seems that a non-initialized touchscreen will also end up being a
constant wakeup source, so you have to disable it to go to sleep. And
it's easier to just fix the initialization sequence.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Eric W. Biederman [Sat, 9 Mar 2013 08:14:45 +0000 (00:14 -0800)]
proc: Use nd_jump_link in proc_ns_follow_link
Update proc_ns_follow_link to use nd_jump_link instead of just
manually updating nd.path.dentry.
This fixes the BUG_ON(nd->inode != parent->d_inode) reported by Dave
Jones and reproduced trivially with mkdir /proc/self/ns/uts/a.
Sigh it looks like the VFS change to require use of nd_jump_link
happend while proc_ns_follow_link was baking and since the common case
of proc_ns_follow_link continued to work without problems the need for
making this change was overlooked.
Cc: stable@vger.kernel.org
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Linus Torvalds [Sat, 9 Mar 2013 01:33:20 +0000 (17:33 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/mason/linux-btrfs
Pull btrfs fixes from Chris Mason:
"These are scattered fixes and one performance improvement. The
biggest functional change is in how we throttle metadata changes. The
new code bumps our average file creation rate up by ~13% in fs_mark,
and lowers CPU usage.
Stefan bisected out a regression in our allocation code that made
balance loop on extents larger than 256MB."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs:
Btrfs: improve the delayed inode throttling
Btrfs: fix a mismerge in btrfs_balance()
Btrfs: enforce min_bytes parameter during extent allocation
Btrfs: allow running defrag in parallel to administrative tasks
Btrfs: avoid deadlock on transaction waiting list
Btrfs: do not BUG_ON on aborted situation
Btrfs: do not BUG_ON in prepare_to_reloc
Btrfs: free all recorded tree blocks on error
Btrfs: build up error handling for merge_reloc_roots
Btrfs: check for NULL pointer in updating reloc roots
Btrfs: fix unclosed transaction handler when the async transaction commitment fails
Btrfs: fix wrong handle at error path of create_snapshot() when the commit fails
Btrfs: use set_nlink if our i_nlink is 0
Benson Leung [Fri, 8 Mar 2013 03:43:34 +0000 (19:43 -0800)]
Platform: x86: chromeos_laptop : Add basic platform data for atmel devices
Add basic platform data to get the current upstream driver working
with the 224s touchpad and 1664s touchscreen.
We will be using NULL config so we will use the settings from the
devices' NVRAMs.
Signed-off-by: Benson Leung <bleung@chromium.org>
Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Daniel Kurtz [Fri, 8 Mar 2013 03:43:33 +0000 (19:43 -0800)]
Input: atmel_mxt_ts - Support for touchpad variant
This same driver can be used by atmel based touchscreens and touchpads
(buttonpads). Platform data may specify a device is a touchpad
using the is_tp flag.
This will cause the driver to perform some touchpad specific
initializations, such as:
* register input device name "Atmel maXTouch Touchpad" instead of
Touchscreen.
* register BTN_LEFT & BTN_TOOL_* event types.
* register axis resolution (as a fixed constant, for now)
* register BUTTONPAD property
* process GPIO buttons using reportid T19
Input event GPIO mapping is done by the platform data key_map array.
key_map[x] should contain the KEY or BTN code to send when processing
GPIOx from T19. To specify a GPIO as not an input source, populate
with KEY_RESERVED, or 0.
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Nick Dyer <nick.dyer@itdev.co.uk>
Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Fri, 8 Mar 2013 23:22:08 +0000 (15:22 -0800)]
Merge branch 'for-next' of git://git.samba.org/sfrench/cifs-2.6
Pull CIFS fixes from Steve French:
"A small set of cifs fixes which includes one for a recent regression
in the write path (pointed out by Anton), some fixes for rename
problems and as promised for 3.9 removing the obsolete sockopt mount
option (and the accompanying deprecation warning)."
* 'for-next' of git://git.samba.org/sfrench/cifs-2.6:
CIFS: Fix missing of oplock_read value in smb30_values structure
cifs: don't try to unlock pagecache page after releasing it
cifs: remove the sockopt= mount option
cifs: Check server capability before attempting silly rename
cifs: Fix bug when checking error condition in cifs_rename_pending_delete()
Linus Torvalds [Fri, 8 Mar 2013 23:05:42 +0000 (15:05 -0800)]
Merge branch 'akpm' (fixes from Andrew)
Merge misc fixes from Andrew Morton.
* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
alpha: boot: fix build breakage introduced by system.h disintegration
memcg: initialize kmem-cache destroying work earlier
Randy has moved
ksm: fix m68k build: only NUMA needs pfn_to_nid
dmi_scan: fix missing check for _DMI_ signature in smbios_present()
Revert parts of "hlist: drop the node parameter from iterators"
idr: remove WARN_ON_ONCE() on negative IDs
mm/mempolicy.c: fix sp_node_init() argument ordering
mm/mempolicy.c: fix wrong sp_node insertion
ipc: don't allocate a copy larger than max
ipc: fix potential oops when src msg > 4k w/ MSG_COPY
Will Deacon [Fri, 8 Mar 2013 20:43:37 +0000 (12:43 -0800)]
alpha: boot: fix build breakage introduced by system.h disintegration
Commit
ec2212088c42 ("Disintegrate asm/system.h for Alpha") removed the
system.h include from boot/head.S, which puts the PAL_* asm constants
out of scope.
Include <asm/pal.h> so we can get building again.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: David Rusling <david.rusling@linaro.org>
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Konstantin Khlebnikov [Fri, 8 Mar 2013 20:43:36 +0000 (12:43 -0800)]
memcg: initialize kmem-cache destroying work earlier
Fix a warning from lockdep caused by calling cancel_work_sync() for
uninitialized struct work. This path has been triggered by destructon
kmem-cache hierarchy via destroying its root kmem-cache.
cache
ffff88003c072d80
obj
ffff88003b410000 cache
ffff88003c072d80
obj
ffff88003b924000 cache
ffff88003c20bd40
INFO: trying to register non-static key.
the code is fine but needs lockdep annotation.
turning off the locking correctness validator.
Pid: 2825, comm: insmod Tainted: G O 3.9.0-rc1-next-
20130307+ #611
Call Trace:
__lock_acquire+0x16a2/0x1cb0
lock_acquire+0x8a/0x120
flush_work+0x38/0x2a0
__cancel_work_timer+0x89/0xf0
cancel_work_sync+0xb/0x10
kmem_cache_destroy_memcg_children+0x81/0xb0
kmem_cache_destroy+0xf/0xe0
init_module+0xcb/0x1000 [kmem_test]
do_one_initcall+0x11a/0x170
load_module+0x19b0/0x2320
SyS_init_module+0xc6/0xf0
system_call_fastpath+0x16/0x1b
Example module to demonstrate:
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/workqueue.h>
int __init mod_init(void)
{
int size = 256;
struct kmem_cache *cache;
void *obj;
struct page *page;
cache = kmem_cache_create("kmem_cache_test", size, size, 0, NULL);
if (!cache)
return -ENOMEM;
printk("cache %p\n", cache);
obj = kmem_cache_alloc(cache, GFP_KERNEL);
if (obj) {
page = virt_to_head_page(obj);
printk("obj %p cache %p\n", obj, page->slab_cache);
kmem_cache_free(cache, obj);
}
flush_scheduled_work();
obj = kmem_cache_alloc(cache, GFP_KERNEL);
if (obj) {
page = virt_to_head_page(obj);
printk("obj %p cache %p\n", obj, page->slab_cache);
kmem_cache_free(cache, obj);
}
kmem_cache_destroy(cache);
return -EBUSY;
}
module_init(mod_init);
MODULE_LICENSE("GPL");
Signed-off-by: Konstantin Khlebnikov <khlebnikov@openvz.org>
Cc: Glauber Costa <glommer@parallels.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Randy Dunlap [Fri, 8 Mar 2013 20:43:35 +0000 (12:43 -0800)]
Randy has moved
Update email address and CREDITS info. xenotime.net is defunct.
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Harry Wei <harryxiyou@gmail.com>
Cc: Keiichi KII <k-keiichi@bx.jp.nec.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Hugh Dickins [Fri, 8 Mar 2013 20:43:34 +0000 (12:43 -0800)]
ksm: fix m68k build: only NUMA needs pfn_to_nid
A CONFIG_DISCONTIGMEM=y m68k config gave
mm/ksm.c: In function `get_kpfn_nid':
mm/ksm.c:492: error: implicit declaration of function `pfn_to_nid'
linux/mmzone.h declares it for CONFIG_SPARSEMEM and CONFIG_FLATMEM, but
expects the arch's asm/mmzone.h to declare it for CONFIG_DISCONTIGMEM
(see arch/mips/include/asm/mmzone.h for example).
Or perhaps it is only expected when CONFIG_NUMA=y: too much of a maze,
and m68k got away without it so far, so fix the build in mm/ksm.c.
Signed-off-by: Hugh Dickins <hughd@google.com>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Petr Holasek <pholasek@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Ben Hutchings [Fri, 8 Mar 2013 20:43:32 +0000 (12:43 -0800)]
dmi_scan: fix missing check for _DMI_ signature in smbios_present()
Commit
9f9c9cbb6057 ("drivers/firmware/dmi_scan.c: fetch dmi version
from SMBIOS if it exists") hoisted the check for "_DMI_" into
dmi_scan_machine(), which means that we don't bother to check for
"_DMI_" at offset 16 in an SMBIOS entry. smbios_present() may also call
dmi_present() for an address where we found "_SM_", if it failed further
validation.
Check for "_DMI_" in smbios_present() before calling dmi_present().
[akpm@linux-foundation.org: fix build]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Reported-by: Tim McGrath <tmhikaru@gmail.com>
Tested-by: Tim Mcgrath <tmhikaru@gmail.com>
Cc: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Arnd Bergmann [Fri, 8 Mar 2013 20:43:31 +0000 (12:43 -0800)]
Revert parts of "hlist: drop the node parameter from iterators"
Commit
b67bfe0d42ca ("hlist: drop the node parameter from iterators")
did a lot of nice changes but also contains two small hunks that seem to
have slipped in accidentally and have no apparent connection to the
intent of the patch.
This reverts the two extraneous changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Peter Senna Tschudin <peter.senna@gmail.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Sasha Levin <sasha.levin@oracle.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Tejun Heo [Fri, 8 Mar 2013 20:43:30 +0000 (12:43 -0800)]
idr: remove WARN_ON_ONCE() on negative IDs
idr_find(), idr_remove() and idr_replace() used to silently ignore the
sign bit and perform lookup with the rest of the bits. The weird behavior
has been changed such that negative IDs are treated as invalid. As the
behavior change was subtle, WARN_ON_ONCE() was added in the hope of
determining who's calling idr functions with negative IDs so that they can
be examined for problems.
Up until now, all two reported cases are ID number coming directly from
userland and getting fed into idr_find() and the warnings seem to cause
more problems than being helpful. Drop the WARN_ON_ONCE()s.
Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: <markus@trippelsdorf.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
KOSAKI Motohiro [Fri, 8 Mar 2013 20:43:29 +0000 (12:43 -0800)]
mm/mempolicy.c: fix sp_node_init() argument ordering
Currently, n_new is wrongly initialized. start and end parameter are
inverted. Let's fix it.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Cc: Hillf Danton <dhillf@gmail.com>
Cc: Sasha Levin <sasha.levin@oracle.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Dave Jones <davej@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Hillf Danton [Fri, 8 Mar 2013 20:43:28 +0000 (12:43 -0800)]
mm/mempolicy.c: fix wrong sp_node insertion
n->end is accessed in sp_insert(). Thus it should be update
before calling sp_insert(). This mistake may make kernel panic.
Signed-off-by: Hillf Danton <dhillf@gmail.com>
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Cc: Sasha Levin <sasha.levin@oracle.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Dave Jones <davej@redhat.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
projects / openwrt / staging / blogic.git / log