kevin.morfitt@fearnside-systems.co.uk [Sat, 10 Oct 2009 04:34:09 +0000 (13:34 +0900)]
Clean-up of s3c24x0 nand driver
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4, 2/4 and 3/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
kevin.morfitt@fearnside-systems.co.uk [Sat, 10 Oct 2009 04:33:11 +0000 (13:33 +0900)]
Clean-up of s3c24x0 drivers excluding nand driver
This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
kevin.morfitt@fearnside-systems.co.uk [Sat, 10 Oct 2009 04:32:01 +0000 (13:32 +0900)]
Clean-up of s3c24x0 header files
This patch re-formats the arm920t s3c24x0 header files in preparation for
changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patch 1/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
kevin.morfitt@fearnside-systems.co.uk [Sat, 10 Oct 2009 04:30:22 +0000 (13:30 +0900)]
Clean-up of cpu_arm920t and cpu_arm920t_s3c24x0 code
This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in
preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no
new warnings or errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
kevin.morfitt@fearnside-systems.co.uk [Sat, 5 Sep 2009 15:33:13 +0000 (00:33 +0900)]
CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards
This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
too short.
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't
have any s3c2400 or s3c2410 boards but need this patch applying before I can
submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets
and no new warnings or errors were found.
It was originally submitted on 21/06/2009 but didn't get into the 2009.08
release, and Jean-Pierre made one comment on the original patch (see
http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two
changes to the original patch:
- it's been re-based to the current release
- I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment
This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it
directly to the maintainers of all except the sbc2410 which doesn't have an
entry in MAINTAINERS.
Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain>
Tested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Minkyu Kang [Thu, 1 Oct 2009 08:20:40 +0000 (17:20 +0900)]
s5pc1xx: add support SMDKC100 board
Adds new board SMDKC100 that uses s5pc100 SoC
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Minkyu Kang [Thu, 1 Oct 2009 08:20:28 +0000 (17:20 +0900)]
s5pc1xx: support serial driver
This patch includes the serial driver for s5pc1xx.
s5pc1xx uart driver needs own register setting and clock configuration.
So, need to special driver.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Minkyu Kang [Thu, 1 Oct 2009 08:20:08 +0000 (17:20 +0900)]
s5pc1xx: support onenand driver
This patch includes the onenand driver for s5pc100
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Minkyu Kang [Thu, 1 Oct 2009 08:20:01 +0000 (17:20 +0900)]
s5pc1xx: support Samsung s5pc1xx SoC
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Daniel Gorsulowski [Tue, 29 Sep 2009 06:03:12 +0000 (08:03 +0200)]
at91: Update MEESC board support
This patch implements several updates:
-disable CONFIG_ENV_OVERWRITE
-add new hardware style variants and set the arch numbers appropriate
-pass the serial# and hardware revision to the kernel
-removed unused macros from include/configs/meesc.h
-fixed multiline comment style
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Simon Kagstrom [Thu, 1 Oct 2009 14:11:50 +0000 (19:41 +0530)]
arm: Correct build with CONFIG_SYS_HUSH_PARSER set
FLAG_PARSE_SEMICOLON is not defined without hush.h, so include that.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Olof Johansson [Tue, 29 Sep 2009 14:22:45 +0000 (10:22 -0400)]
TI: OMAP3: Overo Tobi ethernet support
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.
This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Olof Johansson [Tue, 29 Sep 2009 14:21:29 +0000 (10:21 -0400)]
SMC911X: Add chip auto detection
Refactor the smc911x driver to allow for detecting when the chip is missing.
I.e. the detect_chip() function is called earlier and will abort gracefully
when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Tom Rix [Tue, 29 Sep 2009 14:19:49 +0000 (10:19 -0400)]
TI OMAP3 Use arm init sequence to initialize i2c
This changes fixes an early i2c error.
It appears that I2C is working because once a read or write
error is detected, the omap24xx_i2c driver calls i2c_init
inside its error handling check.
While it is ok to attempt error handling this way, the boards
must not depend on this side effect to initialize it's i2c.
Instead of explicitly calling i2c_init for every board, use
the generic arm initialization in lib_arm/board.c. By defining
the config variable CONFIG_HARD_I2C, the omap3 i2c initialization
is included in the init_sequence table.
Run tested on Beagle.
Compile tested on the omap3's
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Sandeep Paulraj [Tue, 29 Sep 2009 13:43:04 +0000 (09:43 -0400)]
TI: DaVinci DM365: Enabling network Support on DM365 EVM
This patch enables EMAC on the DM365 EVM.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Tue, 29 Sep 2009 14:02:38 +0000 (10:02 -0400)]
TI: DaVinci: GPIO header file and definitions
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Fri, 18 Sep 2009 21:30:05 +0000 (17:30 -0400)]
TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Olof Johansson [Mon, 28 Sep 2009 12:19:30 +0000 (08:19 -0400)]
OMAP3: Clean up whitespace in mux configs
Switch from space-based indentation to tab-based in mux configs, as pointed
out by WD at:
http://lists.denx.de/pipermail/u-boot/2009-September/061241.html
Nothing but whitespace changes in this patch (diff -w gives no output).
Signed-off-by: Olof Johansson <olof@lixom.net>
Dirk Behme [Mon, 28 Sep 2009 12:17:50 +0000 (08:17 -0400)]
OMAP3 MMC: Fix warning dereferencing type-punned pointer
Fix warning
Dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Steve Sakoman <sakoman@gmail.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Simon Kagstrom [Mon, 21 Sep 2009 22:31:01 +0000 (04:01 +0530)]
Support for the OpenRD base board
The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Prafulla Wadaskar [Mon, 21 Sep 2009 14:45:17 +0000 (20:15 +0530)]
Kirkwood: mv88f6281gtw_ge: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on mv88f6281gtw_ge board.
To create Kirkwood boot image to be flashed on SPI Flash,
additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Prafulla Wadaskar [Mon, 21 Sep 2009 12:53:11 +0000 (18:23 +0530)]
Kirkwood: rd6281a: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on rd6281a platform.
To create Kirkwood boot image to be flashed on NAND,
additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Tom Rix [Sun, 27 Sep 2009 16:10:09 +0000 (11:10 -0500)]
Add support for Eukrea CPU9260/CPU9G20 SBC
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Tom Rix [Sun, 27 Sep 2009 12:47:24 +0000 (07:47 -0500)]
Add support for Eukrea CPUAT91 SBC
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR
flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII
mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Mon, 14 Sep 2009 18:57:47 +0000 (14:57 -0400)]
TI: DaVinci DM365: Minor config cleanup
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
This is already included when we include the
config_cmd_default.h header file. So this flag is removed.
Also another flag to enable NAND functions was being
enabled incorrectly.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Mon, 14 Sep 2009 19:03:06 +0000 (15:03 -0400)]
TI DaVinci DM365: Removing header file which does not exist
The DaVinci DM365 EVM board specific code was including a header file
which does not exist. So removing this header file.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Tue, 8 Sep 2009 22:08:06 +0000 (18:08 -0400)]
TI DaVinci: DM355: Config Cleanup and Update
This patch does the following
1) Enables the NAND driver which is now available.
2) Enables the 'CONFIG_MTD_DEVICE' as without this the
compilation will fail
3) We now have a safe place to store environment and defines
an offset where this can be stored. This offset value is such that it is after
the location where U-Boot is flashed using TI flash utilities.
4) Enables Bootdelay
5) Increases malloc() arena size. Manufacturers are coming out with
NAND with large blocks sizes of upto 1 MiB. It has been noticed that
as the block size of the NAND used is increased, if this particular
value is not increased, the NAND driver will output out of memory
errors.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Tue, 8 Sep 2009 15:37:39 +0000 (11:37 -0400)]
TI DaVinci: DM646x: Initial Support for DM646x SOC
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Wed, 9 Sep 2009 19:26:00 +0000 (15:26 -0400)]
TI DaVinci: DM6446: Fix Compilation error in NAND mode
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Tom Rix [Thu, 10 Sep 2009 19:27:57 +0000 (15:27 -0400)]
OMAP3 Move cache routine to cache.S
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.
The conversion from cache.c to cache.S was done most through
disassembling the uboot binary. The only significant change was
to change the comparision for the return of get_cpu_rev from
cmp r0, #0
beq earlier_than_label
Which was lost information to
cmp r0, #CPU_3XX_ES20
blt earlier_than_label
The paths through the enable routine were verified by
adding an infinite loop and seeing the hang. Then
removing the infinite loop and seeing it continue.
The disable routine is similar enough that it was not
tested with this method.
Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Tue, 8 Sep 2009 21:09:52 +0000 (17:09 -0400)]
TI DaVinci: Remove references to SZ_xx
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 12 Oct 2009 21:40:27 +0000 (23:40 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Ed Swarthout [Thu, 9 Oct 2008 06:27:18 +0000 (01:27 -0500)]
Leave x86emu op code tables in default section
Forcing the tables into got2 caused extra relocation when using -mrelocatable.
This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Jin Zhengxiong <Jason.Jin@freescale.com>
Luigi 'Comio' Mantellini [Sat, 10 Oct 2009 10:42:22 +0000 (12:42 +0200)]
Update all board to support new bbmiiphy driver (with multibus support)
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Luigi 'Comio' Mantellini [Sat, 10 Oct 2009 10:42:21 +0000 (12:42 +0200)]
Add bb_miiphy_init call before any ethernet bring-up code.
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Luigi 'Comio' Mantellini [Sat, 10 Oct 2009 10:42:20 +0000 (12:42 +0200)]
Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an arbitrary number of mii buses.
This feature is useful when your board uses different mii buses for different
phys and all (or a part) of these buses are implemented via bit-banging mode.
The driver requires that the following macros should be defined into the board
configuration file:
CONFIG_BITBANGMII - Enable the miiphybb driver
CONFIG_BITBANGMII_MULTI - Enable the multi bus support
If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
to define at least the following macros:
MII_INIT - Generic code to enable the MII bus (optional)
MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional)
MDIO_ACTIVE - Activate the MDIO pin as out pin
MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
MDIO_READ - Read the MDIO pin
MDIO(v) - Write v on the MDIO pin
MDC_DECLARE - Declaration needed to access to the MDC pin (optional)
MDC(v) - Write v on the MDC pin
The previous macros make the driver compatible with the previous version
(that didn't support the multi-bus).
When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
the bb_miiphy_buses[] array with a record for each required bus and declare
the bb_miiphy_buses_num variable with the number of mii buses.
The record (struct bb_miiphy_bus) has the following fields/callbacks (see
miiphy.h for details):
char name[] - The symbolic name that must be equal to the MII bus
registered name
int (*init)() - Initialization function called at startup time (just
before the Ethernet initialization)
int (*mdio_active)() - Activate the MDIO pin as output
int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
int (*set_mdio)() - Write the MDIO pin
int (*get_mdio)() - Read the MDIO pin
int (*set_mdc)() - Write the MDC pin
int (*delay)() - Delay function
void *priv - Private data used by board specific code
The board code will look like:
struct bb_miiphy_bus bb_miiphy_buses[] = {
{ .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... },
{ .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... },
...
int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
sizeof(bb_miiphy_buses[0]);
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Wolfgang Denk [Thu, 8 Oct 2009 22:03:18 +0000 (00:03 +0200)]
Merge branch 'reloc'
Joakim Tjernlund [Thu, 8 Oct 2009 00:03:51 +0000 (02:03 +0200)]
relocation: Do not relocate NULL pointers.
NULL is an absolute value and should not be relocated.
After this correction code like:
void weak_fun(void) __attribute__((weak));
printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Peter Tyser [Wed, 7 Oct 2009 16:45:00 +0000 (11:45 -0500)]
85xx: Ensure BSS segment isn't linked at address 0
When U-Boot is relocated from flash to RAM pointers are modified
accordingly. However, pointers initialzed with NULL values should not
be modified so that they maintain their intended NULL value. If the
BSS segment is linked at address 0 its address will not be
updated as necessary during relocation.
This is a temporary workaround. The end goal is to add support to
U-Boot to dynamically locate the BSS at an arbitrary address at
runtime. When the ability to fixup the BSS inteligently is
added, this workaround can be removed and the 85xx link script
can put the BSS at a fixed address at link time.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Detlev Zundel [Wed, 7 Oct 2009 14:38:05 +0000 (16:38 +0200)]
tqm5200: Correct comment and code in post_hotkeys_pressed.
This fixes the code and the comment according to the original intent of
doing an intensive memory test when PSC6_3 is pulled low on the STK52xx.
Notably PORT_CONFIG will be overridden with this correct code now,
so beware.
The original code only worked by coincidence depending on the PORT_CONFIG
setting from the header file. The new code was tested to ensure that the
(undocumented) memory test still works on the STK52x.
Signed-off-by: Detlev Zundel <dzu@denx.de>
CC: Martin Krause <Martin.Krause@tqs.de>
Minor white-space cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 4 Oct 2009 20:56:08 +0000 (22:56 +0200)]
mpc512x: fix fixed_sdram() init code.
Commit
054197ba and later fixes used an array to initialize some of
the MDDRC parameters; however, the use of an array turned out to be a
bad idea as it was not possible to correlate structure entries to
array indices in readable and reliable way. Now we use a struct
instead, which makes this self-explanatory.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:22 +0000 (20:04 +0200)]
ppc4xx: respect 80-chars per line in ppc*.h files
After running checkstyle.pl on the three previous patches I noted that in
the *.h files there were a lot of long lines. This patch solves this problem.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:21 +0000 (20:04 +0200)]
ppc4xx: Rework cmd reginfo
The command "reginfo" got an overhaul for the ppc4xx. It dumps all the
relevant HW configuration registers (address, symbolic name, content).
This allows to easily detect errors in *.h files and changes in the HW
configuration.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:20 +0000 (20:04 +0200)]
ppc_4xx: Apply new HW register names
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:19 +0000 (20:04 +0200)]
ppc4xx: Cleanup some HW register names
Here you find all the changes in the include directory for new register names
and adapting other ones to the names used by AMCC in their manuals, e.g.
For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008
For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 6 Oct 2009 05:21:08 +0000 (07:21 +0200)]
ppc4xx: Add PPC405EX(r) Rev D support
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
405EX(r) parts. Here a list:
0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec
Since there are only a few older parts in the field, this patch now
changes the PVR's above to represent the new Rev D versions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phong Vo" <pvo@amcc.com>
Stefan Roese [Fri, 2 Oct 2009 12:35:16 +0000 (14:35 +0200)]
ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scan
This message is printed upon PCIe bus scan, not only upon error, but also
if no PCIe device is detected at all. Since this is not an error, let's
remove this message in this case. We already have the message
"link is not up." if there is no PCIe device present.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Mike Nuss [Mon, 5 Oct 2009 16:33:28 +0000 (12:33 -0400)]
PPC4xx: Denali core: Fix incorrect DDR row bits
The SPD detection code for the Denali memory controller used on some
ppc4xx
processors incorrectly encodes DDR0_42. With certain memory
configurations,
this can cause the bootwrapper to incorrectly calculate the installed
memory
size, because the number of row bits is wrong. This patch fixes that
encoding.
Signed-off-by: Mike Nuss <mike@terascala.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ben Warren [Mon, 5 Oct 2009 07:02:51 +0000 (00:02 -0700)]
Add information about return values of xxx_eth_register() in documentation
As discussed on mailing list, <0 indicates failure, >=0 indicates number
of interfaces found.
Also added blurb about private data
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Wed, 9 Sep 2009 18:41:22 +0000 (14:41 -0400)]
document network driver framework
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Prafulla Wadaskar [Wed, 9 Sep 2009 10:29:19 +0000 (15:59 +0530)]
net: kirkwood_egiga.c: fixed build warning
if link up detection code is disabled through config option, it gives build warning.
This patch fixes the same
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ben Warren [Mon, 5 Oct 2009 05:37:03 +0000 (22:37 -0700)]
Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI
added
Also:
- changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111
- cleaned up line lengths
- modified all boards that override weak function in this driver
- modified all eeprom standalone apps to work with new driver
- updated blackfin standalone EEPROM app after testing
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Prafulla Wadaskar [Mon, 21 Sep 2009 14:58:18 +0000 (20:28 +0530)]
net: phy: mv88e61xx.c : fixed build warning
following build warning was observed
mv88e61xx.c: In function ‘mv88e61xx_busychk’:
mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules
This patch fixes the same
Patch tested for rd6281a board build
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
James Clough [Thu, 10 Sep 2009 07:11:50 +0000 (09:11 +0200)]
net: Fix problem with 405EZ ethernet interrupt
On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the
UIC. We need to acknowledge the RX-/TX-interrupts in the
SDR0_ICINTSTAT reg as well.
This problem was introduced with commit
d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines]
Signed-off-by: James Clough <james@rtetc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Wed, 2 Sep 2009 08:18:55 +0000 (04:18 -0400)]
net: add random_port() prototype
The random_port() is meant to be used by other net code, but without a
prototype, we get fun warnings like:
dns.c: In function 'DnsSend':
dns.c:89: warning: implicit declaration of function 'random_port'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Wolfgang Denk [Sat, 3 Oct 2009 21:40:35 +0000 (23:40 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Sat, 3 Oct 2009 21:38:55 +0000 (23:38 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Peter Tyser [Mon, 21 Sep 2009 16:20:37 +0000 (11:20 -0500)]
ppc: Remove reloc_off field from global_data structure
Now that proper relocation is supported, the reloc_off field is no longer
necessary.
Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot.
We therefore increment XF_VERSION to 6
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Peter Tyser [Tue, 22 Sep 2009 14:27:55 +0000 (09:27 -0500)]
arm/microblaze/nios/nios2/sh: Remove relocation fixups
These architectures don't need relocation fixups, so reduce their
codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS.
Also remove the reloc_off field from their global data structures
as it is no longer needed.
Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot. We will therefore increment XF_VERSION in the next commit,
which also touches this area.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Peter Tyser [Mon, 21 Sep 2009 16:20:36 +0000 (11:20 -0500)]
Conditionally perform common relocation fixups
Add #ifdefs where necessary to not perform relocation fixups. This
allows boards/architectures which support relocation to trim a decent
chunk of code.
Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:35 +0000 (11:20 -0500)]
p3mx: Remove serial relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:34 +0000 (11:20 -0500)]
lwmon, lwmon5: Remove sysmon POST relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:33 +0000 (11:20 -0500)]
mpl: Remove memory test relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:32 +0000 (11:20 -0500)]
fpga: Remove relocation fixups
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups. Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:31 +0000 (11:20 -0500)]
tsec: Remove PHY command relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:30 +0000 (11:20 -0500)]
ppc: Remove board-specific command table relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:29 +0000 (11:20 -0500)]
ppc: Remove extable relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:28 +0000 (11:20 -0500)]
ppc: Remove pci config table pointer relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:27 +0000 (11:20 -0500)]
ppc: Remove board.c relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:26 +0000 (11:20 -0500)]
ppc: Check for compilers that don't support relocation
Certain ppc compilers are known not to generate the .fixup section
properly. The .fixup section is necessary to create a relocatable
U-Boot image. A basic check for the existence of the .fixup section
should hopefully catch the majority of broken compilers which don't
support relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:25 +0000 (11:20 -0500)]
ppc: Enable full relocation to RAM
The following changes allow U-Boot to fully relocate from flash to
RAM:
- Remove linker scripts' .fixup sections from the .text section
- Add -mrelocatable to PLATFORM_RELFLAGS for all boards
- Define CONFIG_RELOC_FIXUP_WORKS for all boards
Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Matthias Fuchs [Wed, 30 Sep 2009 09:55:04 +0000 (11:55 +0200)]
ppc4xx: Add SDRAM detection for PMC440 boards
This patch adds support to detect the amount of DDR2 SDRAM
on PMC440 modules. Detection is done by probing through
a list of available and supported hardware configurations
from 1GByte down to 256MB.
The static TLB entry is replaced by dynamically created entries.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 28 Sep 2009 15:33:45 +0000 (17:33 +0200)]
ppc4xx: Merge PPC4xx DDR and DDR2 ECC handling
This patch merges the ECC handling (ECC parity byte writing) into one
file (ecc.c) for all PPC4xx SDRAM controllers except for PPC440EPx/GRx.
This exception is because only those PPC's use the completely different
Denali SDRAM controller core.
Previously we had two routines to generate/write the ECC parity bytes.
With this patch we now only have one core function left.
Tested on Kilauea (no ECC) and Katmai (with and without ECC).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Felix Radensky <felix@embedded-sol.com>
Cc: Grant Erickson <gerickson@nuovations.com>
Cc: Pieter Voorthuijsen <pv@prodrive.nl>
Felix Radensky [Sun, 27 Sep 2009 21:56:12 +0000 (23:56 +0200)]
ppc4xx: Reorganize DDR2 ECC handling
Reorganize DDR2 ECC handling to use common code for
SPD DIMMs and soldered SDRAM. Also, use common code
to display SDRAM info (ECC, CAS latency) for SPD and
soldered SDRAM variants.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Wed, 30 Sep 2009 21:39:36 +0000 (23:39 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Wolfgang Denk [Wed, 30 Sep 2009 21:34:36 +0000 (23:34 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
Wolfgang Denk [Wed, 30 Sep 2009 21:28:18 +0000 (23:28 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi
Wolfgang Denk [Wed, 30 Sep 2009 21:26:59 +0000 (23:26 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Wed, 30 Sep 2009 21:24:10 +0000 (23:24 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
Wolfgang Denk [Wed, 30 Sep 2009 21:22:46 +0000 (23:22 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Wolfgang Denk [Wed, 30 Sep 2009 21:16:49 +0000 (23:16 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt
Mike Frysinger [Wed, 30 Sep 2009 07:09:16 +0000 (03:09 -0400)]
Blackfin: update default console= settings
The Linux kernel has changed the way it numbers serial ports, so update
the default command line to match it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 21 Sep 2009 22:04:49 +0000 (18:04 -0400)]
Blackfin: bf533-ezkit: update env location
The u-boot image has outgrown the current space and overflowed into the
env sector. So move the env to the next available sector (we've already
allocated the first few sectors anyways for u-boot).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Kumar Gala [Wed, 30 Sep 2009 13:39:44 +0000 (08:39 -0500)]
ppc/85xx: get_law_entry isn't used in CONFIG_NAND_SPL
Don't include get_law_entry as part of the NAND_SPL build since the
code isnt used.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mingkai Hu [Wed, 23 Sep 2009 07:20:39 +0000 (15:20 +0800)]
Add README.mpc8536ds
Add boot from NAND/eSDHC/eSPI description
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mingkai Hu [Wed, 23 Sep 2009 07:20:38 +0000 (15:20 +0800)]
On-chip ROM boot: MPC8536DS support
The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
L2SRAM, then boot from it.
The memory device should contain a specific data structure with control
word and config word at the fixed address. The config word direct the
process how to config the memory device, and the control word direct
the processor where to find the image on the memory device, or where
copy the main image to. The user can use any method to store the data
structure to the memory device, only if store it on the assigned address.
The on-chip ROM code will map the whole 4GB address space by setting
entry0 in the TLB1, so the main image need to switch to Address space 1
to disable this mapping and map the address space again.
This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mingkai Hu [Wed, 23 Sep 2009 07:20:37 +0000 (15:20 +0800)]
NAND boot: MPC8536DS support
MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with the
code twisted by CONFIG_NAND_SPL. The main U-Boot image just
like a general U-Boot image except the parts that included by
CONFIG_SYS_RAMBOOT.
When power on, eLBC will automatically load from bank 0 the
4K NAND loader into the FCM buffer RAM where CPU can execute
the boot code directly. In the first stage, the NAND loader
copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
then loads the main image from NAND flash to RAM or L2SRAM
and boot from it.
This patch implements the NAND loader to load the main image
into L2SRAM, so the main image can configure the RAM by using
SPD EEPROM. In the first stage, the NAND loader copies itself
to the second to last 4K address space, and uses the last 4K
address space as the initial RAM for stack.
Obviously, the size of L2SRAM shouldn't be less than the size
of the image used. If so, the workaround is to generate another
image that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mingkai Hu [Wed, 23 Sep 2009 07:19:32 +0000 (15:19 +0800)]
mpc8536: fix board config file line length
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Fri, 25 Sep 2009 15:14:11 +0000 (11:14 -0400)]
sbc8548: reclaim wasted sector in boot flash
By nature of being based off the MPC8548CDS board, this
board inherited an ENV_SIZE setting of 256k. But since
it has a smaller flash device (8MB soldered on), it has
a native sector size of 128k, and hence the ENV_SIZE was
causing 2 sectors to be used for the environment.
By removing the unused sector, we can push TEXT_BASE up
closer to the end of address space and reclaim that
sector for any other application. This also fixes the
mismatch between TEXT_BASE and MONITOR_LEN reported by
Kumar earlier.
Since this board also supports the ability to boot off
the 64MB SODIMM flash, this change is forward looking
with that in mind; i.e. the settings for MONITOR_LEN
and ENV_SIZE will work when the 512k sectors of the
SODIMM flash are used for alternate boot in the future.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 29 Sep 2009 02:38:00 +0000 (21:38 -0500)]
ppc/85xx: Clean up immap_85xx.h
* Converted all white space to tabs
* Converted all types to u8/u16/u32
* Reduce lines to fit in 80 columns
* Renamed MPC85xx_{Q,B}MAN -> FSL_CORENET_{Q,B}MAN
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Scott Wood [Mon, 28 Sep 2009 21:33:18 +0000 (16:33 -0500)]
NAND: davinci: Fix warnings when 4-bit ECC not used
I accidentally left v2 of "NAND: DaVinci:Adding 4 BIT ECC support"
applied when I pushed the tree last merge window, and missed these fixes
which were in v3 of that patch.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kyungmin Park [Tue, 22 Sep 2009 00:05:00 +0000 (09:05 +0900)]
Refactor OneNAND IPL code
Refactoring the OneNAND IPL code
and some minor fixed:
- Remove unnecessary header file
- Fix wrong access at read interrupt
- The recent OneNAND has 4KiB pagesize
Also Board can override OneNAND IPL image
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Shinya Kuribayashi [Sat, 12 Sep 2009 09:01:40 +0000 (18:01 +0900)]
MIPS: VCT: Remove read_spareram reference
The commit
ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove
unused read_spareram and add unlock_all as kernel does) forgot to remove
a local reference to read_spareram in board/micronas/vct/ebi_onenand.c,
which causes the following build failure when configured with OneNAND:
ebi_onenand.c: In function 'onenand_board_init':
ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 'read_spareram'
make[1]: *** [ebi_onenand.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [board/micronas/vct/libvct.a] Error 2
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Simon Kagstrom [Fri, 25 Sep 2009 12:05:57 +0000 (14:05 +0200)]
ubifs: Correct dereferencing of files-after-symlinks
Files in directories which are symlinked to were not dereferenced
correctly in last commit. E.g., with a symlink
/boot/lnk -> /boot/real_dir
loading
/boot/lnk/uImage
will fail. This patch fixes that by simply seeing to it that the target
base directory has a slash after it.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 24 Sep 2009 12:10:30 +0000 (14:10 +0200)]
ppc4xx: Remove mtsdram0() marcos and use common mtsdram() instead
Additionally some whitespace coding style fixes.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 24 Sep 2009 11:59:57 +0000 (13:59 +0200)]
ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case
The latest PPC4xx register cleanup patch missed some SDRAM defines.
This patch now changes lower case UIC defines to upper case. Also
some names are changed to match the naming in the IBM/AMCC users
manuals (e.g. mem_mcopt1 -> SDRAM0_CFG).
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 24 Sep 2009 07:55:50 +0000 (09:55 +0200)]
ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.
Signed-off-by: Stefan Roese <sr@denx.de>
Joakim Tjernlund [Tue, 22 Sep 2009 11:40:44 +0000 (13:40 +0200)]
fsl_i2c: Do not generate STOP after read.
__i2c_read always ends with a STOP condition thereby releasing
the bus. It is cleaner to do the STOP magic in i2c_read(), like
i2c_write() does. This may also help future multimaster systems which
wants to hold on to the bus until all transactions are finished.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Joakim Tjernlund [Thu, 17 Sep 2009 09:07:17 +0000 (11:07 +0200)]
fsl_i2c: Impl. AN2919, rev 5 to calculate FDR/DFSR
The latest AN2919 has changed the way FDR/DFSR should be calculated.
Update the driver according to spec. However, Condition 2
is not accounted for as it is not clear how to do so.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
Joakim Tjernlund [Thu, 17 Sep 2009 09:07:16 +0000 (11:07 +0200)]
fsl_i2c: Add CONFIG_FSL_I2C_CUSTOM_{DFSR/FDR}
Some boards need a higher DFSR value than the spec currently
recommends so give these boards the means to define there own.
For completeness, add CONFIG_FSL_I2C_CUSTOM_FDR too.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
projects / project / bcm63xx / u-boot.git / log