openwrt/staging/blogic.git
5 years agodrm/amdpgu: add common functions for BACO feature in PP (v2)
Jim Qu [Tue, 20 Nov 2018 02:58:25 +0000 (10:58 +0800)]
drm/amdpgu: add common functions for BACO feature in PP (v2)

V2: squash in crash fix for non-register commands (Alex)

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add BACO interfaces in pm and hwmgr function table
Jim Qu [Mon, 5 Nov 2018 09:45:56 +0000 (17:45 +0800)]
drm/amdgpu: add BACO interfaces in pm and hwmgr function table

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: update nbio v6.1 register/master to support BACO
Jim Qu [Wed, 7 Nov 2018 02:54:18 +0000 (10:54 +0800)]
drm/amdgpu: update nbio v6.1 register/master to support BACO

Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fully remove i2caux folder
Leo Li [Fri, 11 Jan 2019 15:41:17 +0000 (10:41 -0500)]
drm/amd/display: Fully remove i2caux folder

This is a follow up to:
e28e1490794d ("drm/amd/display: Remove i2caux folder")

Some files were still left, so delete all of them.

CC: David Francis <David.Francis@amd.com>
CC: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: 3.2.14
Steven Chiu [Fri, 4 Jan 2019 15:28:52 +0000 (10:28 -0500)]
drm/amd/display: 3.2.14

Signed-off-by: Steven Chiu <steven.chiu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Check for NULL when creating gamma struct
Krunoslav Kovac [Wed, 2 Jan 2019 19:12:53 +0000 (14:12 -0500)]
drm/amd/display: Check for NULL when creating gamma struct

[Wjy&How] Some stress test is causing unexpected memory allocation
failure. This prevents null dereference but there will likely be problems
later, hard to gracefully handle memalloc fail for critical objects.

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Reza Amini <Reza.Amini@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Check if registers are available before accessing
Eric Bernstein [Mon, 19 Nov 2018 15:52:10 +0000 (10:52 -0500)]
drm/amd/display: Check if registers are available before accessing

Check if VERT_FILTER_INIT_BOT and BLACK_OFFSET registers
exists in the DCN SCL IP block before trying to access.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add new infopacket definition
Bayan Zabihiyan [Thu, 27 Dec 2018 13:43:45 +0000 (08:43 -0500)]
drm/amd/display: Add new infopacket definition

Modify freesync module to build VTEM infopackets when in HdmiVRR mode

Signed-off-by: Bayan Zabihiyan <Bayan.Zabihiyan@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Rename configure_encoder to enc1_configure_encoder
Dmytro Laktyushkin [Mon, 3 Dec 2018 18:56:40 +0000 (13:56 -0500)]
drm/amd/display: Rename configure_encoder to enc1_configure_encoder

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add workaround for 4k video underflow
Eric Yang [Mon, 17 Dec 2018 23:28:59 +0000 (18:28 -0500)]
drm/amd/display: add workaround for 4k video underflow

[Why]
On DCN1, there is an issue where on high BW config on single channel
systems, underflow will be observed if DCC is disabled. This issue
can be observed on several use cases. For this particular case,
it is observed when playing 4k video on 4k desktop with video downscaled
to a certain size.

[How]
Block MPO for this particular case, this will prevent extra BW consumed
from downscaling, working around the underflow.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: dp interlace MSA timing programming for Interlace mode.
Charlene Liu [Wed, 19 Dec 2018 18:47:19 +0000 (13:47 -0500)]
drm/amd/display: dp interlace MSA timing programming for Interlace mode.

[Why]
DP compliance box shows wrong MSA data.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix warning on raven hotplug
Roman Li [Wed, 19 Dec 2018 14:24:06 +0000 (09:24 -0500)]
drm/amd/display: fix warning on raven hotplug

[Why]
Hotplug on raven results in REG_WAIT_TIMEOUT warning
due to failing attempt to lock disabled otg for the hubp
interdependent pipes programming.

[How]
Don't setup pipe interdependencies for disabled otg.
Also removed the unnecessary duplicate logic checks.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: dal-pplib interface refactor dal part
hersen wu [Wed, 28 Nov 2018 21:57:56 +0000 (16:57 -0500)]
drm/amd/display: dal-pplib interface refactor dal part

[WHY] clarify dal input parameters to pplib interface, remove
un-used parameters. dal knows exactly which parameters needed
and their effects at pplib and smu sides.

current dal sequence for dcn1_update_clock to pplib:

1.smu10_display_clock_voltage_request for dcefclk
2.smu10_display_clock_voltage_request for fclk
3.phm_store_dal_configuration_data {
   set_min_deep_sleep_dcfclk
   set_active_display_count
   store_cc6_data --- this data never be referenced

new sequence will be:

1. set_display_count  --- need add new pplib interface
2. set_min_deep_sleep_dcfclk -- new pplib interface
3. set_hard_min_dcfclk_by_freq
4. set_hard_min_fclk_by_freq

after this code refactor, smu10_display_clock_voltage_request,
phm_store_dal_configuration_data will not be needed for rv.

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Remove i2caux folder
David Francis [Fri, 30 Nov 2018 16:02:59 +0000 (11:02 -0500)]
drm/amd/display: Remove i2caux folder

[Why]
It is huge, unmaintainable, needlessly layered, and obsolete

[How]
Remove it.  All of it.  Also remove the i2caux struct in
dc_context and the code that created and destructed it

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Change from aux_engine to dce_aux
David Francis [Fri, 30 Nov 2018 15:32:01 +0000 (10:32 -0500)]
drm/amd/display: Change from aux_engine to dce_aux

[Why]
The aux_engine struct is needlessly complex and
is defined multiple times.  It contains function pointers
that each have only one version and are called only from
inside dce_aux.

[How]
Replace aux_engine with a new struct called dce_aux.
Remove all function pointers and call functions directly.
Remove unused functions

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Switch ddc to new aux interface
David Francis [Thu, 29 Nov 2018 19:36:25 +0000 (14:36 -0500)]
drm/amd/display: Switch ddc to new aux interface

[Why]
The old aux interface goes through i2caux and the aux_engine
and engine function pointers.  The multiple layers of indirection
make it hard to tell waht is happening.  The aux algorithm
does not need to be this complicated: attempt to submit the
request.  If you get an ack (reply = 0), stop.  Otherwise,
retry, up to 7 times.

[How]
Add a new helper function in dce_aux that performs aux retries

Move the plumbing of the aux calling code into dce_aux

Add functions in ddc that redirect directly to dce_aux

Make all aux calls use these functions

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Shift dc link aux to aux_payload
David Francis [Thu, 29 Nov 2018 18:40:03 +0000 (13:40 -0500)]
drm/amd/display: Shift dc link aux to aux_payload

[Why]
aux_payload should be the struct used inside dc to start
aux transactions.  This will allow the old aux interface
to be seamlessly replaced.

[How]
Add three fields to aux_payload: reply, mot, defer_delay
This will mean that aux_payload has all data required
to submit a request.  Shift dc_link to use this struct

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: 3.2.13
Steven Chiu [Fri, 14 Dec 2018 14:33:30 +0000 (09:33 -0500)]
drm/amd/display: 3.2.13

Signed-off-by: Steven Chiu <steven.chiu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix disabled cursor on top screen edge
Nicholas Kazlauskas [Tue, 11 Dec 2018 17:35:56 +0000 (12:35 -0500)]
drm/amd/display: Fix disabled cursor on top screen edge

[Why]
The cursor vanishes when touching the top of edge of the screen for
Raven on Linux.

This occurs because the cursor height is not taken into account when
deciding to disable the cursor.

[How]
Factor in the cursor height into the cursor calculations - and mimic
the existing x position calculations.

Fixes: 94a4ffd1d40b ("drm/amd/display: fix PIP bugs on Dal3")
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Set link rate set if eDP ver >= 1.4.
Derek Lai [Tue, 11 Dec 2018 08:27:09 +0000 (16:27 +0800)]
drm/amd/display: Set link rate set if eDP ver >= 1.4.

[Why]
If eDP ver >= 1.4,
the Source device must use LINK_RATE_SET.

[How]
Get LINK_RATE_SET by reading DPCD 10h-1fh,
then write DPCD 00115h before link training.

Signed-off-by: Derek Lai <Derek.Lai@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix for NULL ramp pointer crashing driver
Joshua Aberback [Thu, 13 Dec 2018 00:53:02 +0000 (19:53 -0500)]
drm/amd/display: Fix for NULL ramp pointer crashing driver

[Why]
In certain scenarios the ramp parameter come in as NULL, which crashes
because this function doesn't guard properly in the early return.

[How]
- parameter mapUserRamp should be the guard (false means no ramp)
- remove checking ramp in early return

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Sivapiriyan Kumarasamy <Sivapiriyan.Kumarasamy@amd.com>
Acked-by: Eryk Brol <Eryk.Brol@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Redefine DMCU_SCRATCH to identify DMCU state
Martin Tsai [Thu, 13 Dec 2018 04:25:19 +0000 (12:25 +0800)]
drm/amd/display: Redefine DMCU_SCRATCH to identify DMCU state

[why]
To resume system before entering S0i3 completely will cause PSP not
reload DMCU FW since there is not HW power state change.
In this case, driver cannot get correct DMCU version from IRAM
since driver override it and DMCU didn't reload to update it.
It makes driver return false in dcn10_dmcu_init().

[how]
1.To redefine DMCU_SCRATCH to identify different DMCU state.
2.To reserve IRAM 0xF0~0xFF write by DMCU only.
3.To remove dcn10_get_dmcu_state

Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix PME notification not working in RV desktop
Charlene Liu [Wed, 12 Dec 2018 23:09:16 +0000 (18:09 -0500)]
drm/amd/display: fix PME notification not working in RV desktop

[Why]
PPLIB not receive the PME when unplug.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: refactor reg_update
Tony Cheng [Wed, 24 Oct 2018 19:09:46 +0000 (15:09 -0400)]
drm/amd/display: refactor reg_update

[why]
separate register access from logic to allow us abstract register sequences

[how]
consolidate mask and value first then apply to register.

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: Signal hw_done() after waiting for flip_done()"
Leo Li [Mon, 7 Jan 2019 18:28:54 +0000 (13:28 -0500)]
Revert "drm/amd/display: Signal hw_done() after waiting for flip_done()"

This reverts commit 717276b9256f5d97b43e53adca1670cee2c45db2.

The reverted patch was a workaround that addressed an issue fixed by:
4364bcb2cd21 ("drm: Get ref on CRTC commit object when waiting for
flip_done")

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix CTS 4.2.2.8
abdoulaye berthe [Fri, 7 Dec 2018 21:12:09 +0000 (16:12 -0500)]
drm/amd/display: fix CTS 4.2.2.8

[Why]
1-Test equipment does not reset test automation flag after completing
current test causing the next test to fail.
2.When test request is empty, we shouldn't ack the test.

[How]
1-Driver should always clear test equipment automation test request
when request is completed.
2-Driver should clear test equipement test automation if driver does
not complete the request.

Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Pack DMCU iRAM alignment
Josip Pavic [Tue, 11 Dec 2018 20:13:08 +0000 (15:13 -0500)]
drm/amd/display: Pack DMCU iRAM alignment

[Why]
When the DMCU's iRAM definition was moved to the newly created
power_helpers, a #pragma pack was lost, causing the iRAM to be misaligned

[How]
Restore the #pragma pack

Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix missing hwss function for dce
Joshua Aberback [Mon, 10 Dec 2018 18:46:34 +0000 (13:46 -0500)]
drm/amd/display: Fix missing hwss function for dce

[Why]
The driver will crash on dce hardware due to a null function pointer.

[How]
- bring back "program_csc_matrix" functionality as "program_output_csc" for
dce110
- dce110 doesn't use the "opp_id" parameter, so use 0 when there's no hubp

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: 3.2.12
Steven Chiu [Mon, 10 Dec 2018 19:26:53 +0000 (14:26 -0500)]
drm/amd/display: 3.2.12

Signed-off-by: Steven Chiu <steven.chiu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Only get the connector state for VRR when toggled
Nicholas Kazlauskas [Thu, 10 Jan 2019 20:12:48 +0000 (15:12 -0500)]
drm/amd/display: Only get the connector state for VRR when toggled

[Why]
This fixes a stuttering issue that occurs when moving a hardware cursor
when VRR is enabled.

Previously when VRR is enabled atomic check will grab the connector
state for every atomic update. This has to lock the connector in order
to do so. The locking is bad enough by itself for performance, but
it gets worse with what we do just below that - add all the planes
for the CRTC to the commit.

This prevents the cursor fast path from working - there's more than one
plane now. With state->allow_modeset = true on top of this, it also
adds and removes all the planes from the DC context triggering a full
(very slow) update in DC.

[How]
We need the connector state to get the VRR min/max capbilities, but we
only need them when there's a CRTC mode change or when VRR is toggled.

The condition has been updated accordingly.

Fixes: 3cc22f281318 ("drm/amdgpu: Set FreeSync state using drm VRR properties")
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: run acg btc for Vega12
Kenneth Feng [Wed, 9 Jan 2019 06:39:48 +0000 (14:39 +0800)]
drm/amd/powerplay: run acg btc for Vega12

acg btc was added to Vega12

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Don't assign dGPUs to APU topology devices
Felix Kuehling [Wed, 2 Jan 2019 22:47:39 +0000 (17:47 -0500)]
drm/amdkfd: Don't assign dGPUs to APU topology devices

dGPUs need their own topology devices. Don't assign them to APU topology
devices with CPU cores.

Bug: https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/issues/66
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Tested-by: Elias Konstantinidis <ekondis@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Allow building KFD on ARM64 (v2)
Felix Kuehling [Wed, 2 Jan 2019 19:52:13 +0000 (14:52 -0500)]
drm/amdkfd: Allow building KFD on ARM64 (v2)

ifdef x86_64 specific code.
Allow enabling CONFIG_HSA_AMD on ARM64.

v2: Fixed a compiler warning due to an unused variable

CC: Mark Nutter <Mark.Nutter@arm.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Tested-by: Mark Nutter <Mark.Nutter@arm.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: check if we need to reset at init time (v2)
Alex Deucher [Thu, 1 Nov 2018 05:02:01 +0000 (00:02 -0500)]
drm/amdgpu: check if we need to reset at init time (v2)

To deal with situations like kexec or GPU VM passthrough
where the device may have been used previously without a
proper GPU reset between.

v2: rebase

bug: https://bugs.freedesktop.org/show_bug.cgi?id=108585
bug: https://bugs.freedesktop.org/show_bug.cgi?id=108754
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/soc15: add need_reset_on_init asic callback for SOC15 (v2)
Alex Deucher [Thu, 1 Nov 2018 05:00:57 +0000 (00:00 -0500)]
drm/amdgpu/soc15: add need_reset_on_init asic callback for SOC15 (v2)

SOC15 chips require a reset if the driver was previously loaded
because the PSP can only be loaded once between each reset.

v2: rebase, handle multiple asic funcs

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/vi: add need_reset_on_init asic callback for VI (v2)
Alex Deucher [Thu, 1 Nov 2018 05:00:09 +0000 (00:00 -0500)]
drm/amdgpu/vi: add need_reset_on_init asic callback for VI (v2)

VI chips require a reset if the driver was previously loaded
because the SMU can only be loaded once between each reset.

v2: rebase

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/cik: add need_reset_on_init asic callback for CIK (v2)
Alex Deucher [Thu, 1 Nov 2018 04:58:56 +0000 (23:58 -0500)]
drm/amdgpu/cik: add need_reset_on_init asic callback for CIK (v2)

CIK chips require a reset if the driver was previously loaded
because the SMU can only be loaded once between each reset.

v2: rebase

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/si: add need_reset_on_init asic callback for SI (v2)
Alex Deucher [Thu, 1 Nov 2018 04:56:16 +0000 (23:56 -0500)]
drm/amdgpu/si: add need_reset_on_init asic callback for SI (v2)

SI chips don't require a reset on reload due to the nature of
the SMU on them.

v2: rebase

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add need_reset_on_init asic callback (v2)
Alex Deucher [Thu, 1 Nov 2018 04:54:27 +0000 (23:54 -0500)]
drm/amdgpu: add need_reset_on_init asic callback (v2)

Used to determine if we need to reset the asic on init due
to the driver having been previously loaded or not shutdown
cleanly.  E.g., kexec or VM passthrough.

v2: rebase

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: expose sclk and mclk via hwmon
Alex Deucher [Mon, 10 Dec 2018 21:04:15 +0000 (16:04 -0500)]
drm/amdgpu: expose sclk and mclk via hwmon

Expose sclk (gfx clock) and mclk (memory clock) via
hwmon compatible interface.  hwmon does not actually
formally specify a frequency type attribute, but these
are compatible with the format of the other attributes
exposed via hwmon.  Units are hertz.

freq1_input - GPU gfx/compute clock in hertz
freq2_input - GPU memory clock in hertz (dGPU only)

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Add sysfs file for PCIe usage v5
Kent Russell [Thu, 3 Jan 2019 13:12:39 +0000 (08:12 -0500)]
drm/amdgpu: Add sysfs file for PCIe usage v5

Add a sysfs file that reports the number of bytes transmitted and
received in the last second. This can be used to approximate the PCIe
bandwidth usage over the last second.

v2: Clarify use of mps as estimation of bandwidth
v3: Don't make the file on APUs
v4: Early exit for APUs in the read function, change output to
    display "packets-received packets-sent mps"
v5: fix missing header for si (Alex)

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Add NBIO SMN headers v2
Kent Russell [Mon, 7 Jan 2019 11:02:06 +0000 (06:02 -0500)]
drm/amdgpu: Add NBIO SMN headers v2

We need these offsets for PCIE perf counters, so include them as well as
the the previously-used defines from the nbio_*.c files

v2: Return NBIF definitions back to previous files

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: add missing mutex lock to amdgpu_get_xgmi_hive() (v3)
Tom St Denis [Mon, 7 Jan 2019 22:39:10 +0000 (17:39 -0500)]
drm/amd/amdgpu: add missing mutex lock to amdgpu_get_xgmi_hive() (v3)

v2: Move locks around in other functions so that this
function can stand on its own.  Also only hold the hive
specific lock for add/remove device instead of the driver
global lock so you can't add/remove devices in parallel from
one hive.

v3: add reset_lock

Acked-by: Shaoyun.liu < Shaoyun.liu@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Move iteration out of dm_update_crtcs
Leo Li [Sun, 11 Nov 2018 16:35:13 +0000 (11:35 -0500)]
drm/amd/display: Move iteration out of dm_update_crtcs

[Why]
To reduce indent in dm_update_crtcs, and to make it operate on single
instances.

[How]
Move iteration of plane states into atomic_check.
No functional change is intended.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Move iteration out of dm_update_planes
Leo Li [Sun, 11 Nov 2018 16:11:52 +0000 (11:11 -0500)]
drm/amd/display: Move iteration out of dm_update_planes

[Why]
To reduce indentation of dm_update_planes, and to make it operate on
single plane instances.

[How]
Move iteration of plane states into atomic_check.
No functional change is intended.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Add message print when unable to get valid hive
shaoyunl [Fri, 4 Jan 2019 18:23:06 +0000 (13:23 -0500)]
drm/amdgpu: Add message print when unable to get valid hive

Add message print out and return -EINVAL when driver can not get valid hive
from hive  arrary on xgmi configuration

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/psp: make get_fw_type and prep_cmd_buf to be common interfaces
Hawking Zhang [Thu, 3 Jan 2019 13:38:41 +0000 (21:38 +0800)]
drm/amdgpu/psp: make get_fw_type and prep_cmd_buf to be common interfaces

get_fw_type and prep_cmd_buf should be common interface
instead of IP specific ones

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/psp: update the naming of GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL
Hawking Zhang [Wed, 2 Jan 2019 11:16:06 +0000 (19:16 +0800)]
drm/amdgpu/psp: update the naming of GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL

GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL was renamed to GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_CNTL
in latest psp_gfx_if drop

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu_vm: fix boolean expressions
Gustavo A. R. Silva [Thu, 3 Jan 2019 20:01:46 +0000 (14:01 -0600)]
drm/amdgpu_vm: fix boolean expressions

Fix boolean expressions by using logical AND operator '&&'
instead of bitwise operator '&'.

This issue was detected with the help of Coccinelle.

Fixes: 9a4b7d4c769e ("drm/amdgpu: Add vm context module param")
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/sriov: For finishing routine send rel event after init failed
Emily Deng [Fri, 4 Jan 2019 02:24:02 +0000 (10:24 +0800)]
drm/amdgpu/sriov: For finishing routine send rel event after init failed

When init fail, send rel init, req_fini and rel_fini to host for the
finishing routine.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix boolean expression in get_surf_rq_param
Gustavo A. R. Silva [Thu, 3 Jan 2019 19:48:45 +0000 (13:48 -0600)]
drm/amd/display: Fix boolean expression in get_surf_rq_param

Fix boolean expression by using logical AND operator '&&'
instead of bitwise operator '&'.

This issue was detected with the help of Coccinelle.

Fixes: 6d04ee9dc101 ("drm/amd/display: Restructuring and cleaning up DML")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: improve GMC v9 page fault message
Christian König [Tue, 11 Dec 2018 10:06:59 +0000 (11:06 +0100)]
drm/amdgpu: improve GMC v9 page fault message

Note if this is a retry fault or not and cleanup the message a bit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: distinguish early and late re-init log in sriov
wentalou [Wed, 2 Jan 2019 07:56:27 +0000 (15:56 +0800)]
drm/amdgpu: distinguish early and late re-init log in sriov

distinguish ip_reinit_early_sriov and ip_reinit_late_sriov
by different log RE-INIT-early and RE-INIT-late

Signed-off-by: Wentao Lou <Wentao.Lou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Set requested plane state DCC params for GFX9
Nicholas Kazlauskas [Wed, 2 Jan 2019 20:15:41 +0000 (15:15 -0500)]
drm/amd/display: Set requested plane state DCC params for GFX9

[Why]
Hardware support for Delta Color Compression (DCC) decompression is
available in DC for GFX9 but there's no way for userspace to enable
the feature.

Enabling the feature can provide improved GFX performance and
power savings in many situations.

[How]
The GFX9 DCC parameters are passed to amdgpu_dm from AMDGPU via the
amdgpu_bo tiling_flags. The plane capability is queried and the
parameters are set accordingly.

The DCC address is given via a 256 byte aligned offset on the
framebuffer address. The DCC address is updated whenever the buffer
address changes.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add the IH to the IV trace
Christian König [Wed, 26 Sep 2018 11:37:24 +0000 (13:37 +0200)]
drm/amdgpu: add the IH to the IV trace

To distinct on which IH ring an IV was found.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix IH overflow on Vega10 v2
Christian König [Fri, 14 Dec 2018 14:31:24 +0000 (15:31 +0100)]
drm/amdgpu: fix IH overflow on Vega10 v2

When an ring buffer overflow happens the appropriate bit is set in the WPTR
register which is also written back to memory. But clearing the bit in the
WPTR doesn't trigger another memory writeback.

So what can happen is that we end up processing the buffer overflow over and
over again because the bit is never cleared. Resulting in a random system
lockup because of an infinite loop in an interrupt handler.

This is 100% reproducible on Vega10, but it's most likely an issue we have
in the driver over all generations all the way back to radeon.

v2: rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: simplify IH programming
Christian König [Tue, 18 Sep 2018 12:24:49 +0000 (14:24 +0200)]
drm/amdgpu: simplify IH programming

Calculate all the addresses and pointers in amdgpu_ih.c

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add IH ring to ih_get_wptr/ih_set_rptr v2
Christian König [Mon, 17 Sep 2018 14:13:49 +0000 (16:13 +0200)]
drm/amdgpu: add IH ring to ih_get_wptr/ih_set_rptr v2

Let's start to support multiple rings.

v2: decode IV is needed as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay:clean up phm_enable_clock_power_gatings
Prike Liang [Tue, 25 Dec 2018 02:20:56 +0000 (10:20 +0800)]
drm/amd/powerplay:clean up phm_enable_clock_power_gatings

As the PG was setted by each IP block durinng IP early init thus
remove the unused phm_enable_clock_power_gatings related funcs.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gmc: fix compiler errors [-Werror,-Wmissing-braces] (V2)
Shirish S [Thu, 20 Dec 2018 10:34:35 +0000 (16:04 +0530)]
drm/amdgpu/gmc: fix compiler errors [-Werror,-Wmissing-braces] (V2)

Initializing structures with { } is known to be problematic since
it doesn't necessararily initialize all bytes, in case of padding,
causing random failures when structures are memcmp().

This patch fixes the structure initialisation related compiler
error by memset().

V2: rectified missing piece in coding

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix 64-bit division for 32-bit builds
Ken Chalmers [Wed, 19 Dec 2018 19:50:20 +0000 (14:50 -0500)]
drm/amd/display: Fix 64-bit division for 32-bit builds

[Why]
32-bit builds break when doing 64-bit division directly.

[How]
Use the div_u64() function instead to perform the division.

Fixes: https://lists.freedesktop.org/archives/dri-devel/2018-December/201008.html
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix compliler errors [-Werror,-Wmissing-braces]
Shirish S [Thu, 20 Dec 2018 10:38:02 +0000 (16:08 +0530)]
drm/amd/display: fix compliler errors [-Werror,-Wmissing-braces]

Initializing structures with { } is known to be problematic since
it doesn't necessararily initialize all bytes, in case of padding,
causing random failures when structures are memcmp().

This patch fixes the structure initialisation related compiler
error by memset.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Expand set_pixel_clock debug log message
Ken Chalmers [Mon, 5 Nov 2018 16:34:57 +0000 (11:34 -0500)]
drm/amd/display: Expand set_pixel_clock debug log message

[Why]
For more informative debugging.

[How]
Add timing generator and PLL ids to output, to make it clear which pixel
clock is being set.

Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display/i2c_hw_engine_dce110: Remove duplicate header
Brajeswar Ghosh [Thu, 20 Dec 2018 12:34:55 +0000 (18:04 +0530)]
drm/amd/display/i2c_hw_engine_dce110: Remove duplicate header

Remove reg_helper.h which is included more than once

Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display/dcn10_hw_sequencer_debug: Remove duplicate header
Brajeswar Ghosh [Thu, 20 Dec 2018 12:28:41 +0000 (17:58 +0530)]
drm/amd/display/dcn10_hw_sequencer_debug: Remove duplicate header

Remove custom_float.h which is included more than once

Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Remove duplicate header
Brajeswar Ghosh [Wed, 19 Dec 2018 07:57:13 +0000 (13:27 +0530)]
drm/amd/display: Remove duplicate header

Remove custom_float.h which is included more than once

Acked-by: Souptick Joarder <jrdr.linux@gmail.com>
Signed-off-by: Brajeswar Ghosh <brajeswar.linux@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoamdgpu/dc: remove various variables that are defined but never used
Colin Ian King [Tue, 18 Dec 2018 13:05:54 +0000 (13:05 +0000)]
amdgpu/dc: remove various variables that are defined but never used

There are several variables that are defined and never used and hence can
be removed. Remove them. Cleans up clang -Wunused-const-variable warnings:

warning: ‘dvi_hdmi_dongle_signature_str’ defined but not used
warning: ‘dce11_one_lpt_channel_max_resolution’ defined but not used
warning: ‘ddc_hw_status_addr’ defined but not used

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Remove unused parameter plane_states
David Francis [Mon, 10 Dec 2018 15:18:21 +0000 (10:18 -0500)]
drm/amd/display: Remove unused parameter plane_states

[Why]
The function dc_commit_updates_for_stream had a parameter called
plane_states.  It was never used.  It was getting in the way
of some cleanup work

[How]
Remove it

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add dsclk to pipe bw struct
Dmytro Laktyushkin [Tue, 18 Sep 2018 18:24:05 +0000 (14:24 -0400)]
drm/amd/display: add dsclk to pipe bw struct

This will allow us to program dscclk to required value

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Start using the new pp_smu interface
Fatemeh Darbehani [Fri, 30 Nov 2018 20:55:01 +0000 (15:55 -0500)]
drm/amd/display: Start using the new pp_smu interface

[Why]
PPLib has impelemented the new pp_smu interface

[How]
Use the new functions if available instead of the old interface
'set_display_requirement' and 'dcn1_pplib_apply_display_requirements'.

Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Fatemeh Darbehani <Fatemeh.Darbehani@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Su Chung <Su.Chung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: 3.2.11
Steven Chiu [Fri, 30 Nov 2018 15:58:32 +0000 (10:58 -0500)]
drm/amd/display: 3.2.11

Signed-off-by: Steven Chiu <steven.chiu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Compensate for XGMI SS downspread on dprefclk
Leo Li [Thu, 1 Nov 2018 15:10:18 +0000 (11:10 -0400)]
drm/amd/display: Compensate for XGMI SS downspread on dprefclk

[Why]
When XGMI is enabled, we need to adjust the dprefclk according to the
WAFL link's spread spectrum info. This is for VG20 (DCE121) only.

[How]
dce_clk_mgr already stores SS info, currently being used by audio clock.
Therefore, patch the clk_mgr's SS info with the xGMI SS info, if xGMI
is enabled. For display clock, adjust it during dce12_update_clocks()
before calling set_clock().

Since we rely on a mmhub register to reliably determine if xGMI is
enabled, the patching step needs to happen after resource_construct()
has initialized the hardware sequencer.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix driver load crash in amdgpu_dm
Leo Li [Tue, 27 Nov 2018 20:05:12 +0000 (15:05 -0500)]
drm/amd/display: Fix driver load crash in amdgpu_dm

[Why]
This fixes an regression introduced by:
    drm/amd/display: add stream ID and otg instance in dc_stream_state

During driver initialization, a null pointer deref is raised. This is
caused by searching for a stream status in the dc->current_state before
the dc_state swap happens at the end of dc_commit_state_no_check().
Since the swap has not happened, the dc_state to be swapped in should
be searched, and not dc->current_state.

[How]
Add a function that searches for the stream status within the given
dc_state, instead of dc->current_state. Use that before the state swap
happens in dc_commit_state_no_check().

Also remove duplicate occurrences of this function in amdgpu_dm.c.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Use local variable instead of caching global
Leo Li [Tue, 13 Nov 2018 20:24:20 +0000 (15:24 -0500)]
drm/amd/display: Use local variable instead of caching global

[Why]
context->bw.dce.dispclk_khz is being cached into unpatched_clock, then
restored at end of function call. This is needlessly complex

[How]
Instead, use a local patched_clock variable. Leave
context->bw.dce.dispclk_khz alone.

No functional change is intended.

Signed-off-by: David Francis <david.francis@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Improve logging of validation failures during atomic_check
Eric Bernstein [Thu, 22 Nov 2018 22:04:14 +0000 (17:04 -0500)]
drm/amd/display: Improve logging of validation failures during atomic_check

[Why]
There are different reasons for Validation failure error during
atomic_check

[How]
Add better logging of the reason for validation failure

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Use 100 Hz precision for pipe pixel clocks
Ken Chalmers [Tue, 6 Nov 2018 19:24:12 +0000 (14:24 -0500)]
drm/amd/display: Use 100 Hz precision for pipe pixel clocks

[Why]
Users would like more accurate pixel clocks, especially for fractional
"TV" frame rates like 59.94 Hz.

[How]
Store and communicate pixel clocks with 100 Hz accuracy from
dc_crtc_timing through to BIOS command table setpixelclock call.

Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Minor code cleanup
SivapiriyanKumarasamy [Sat, 24 Nov 2018 01:33:35 +0000 (20:33 -0500)]
drm/amd/display: Minor code cleanup

[WHY]
There is an extra null check for fs_params in the
build_freesync_hdr function detected by Smatch.

[HOW]
1) Remove the extra null check since it is checked in the
caller.

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Remove stream_status->link
Leo Li [Tue, 20 Nov 2018 15:07:07 +0000 (10:07 -0500)]
drm/amd/display: Remove stream_status->link

[Why]
It's not being used anywhere.

[How]
Remove it.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: 3.2.10
Steven Chiu [Mon, 26 Nov 2018 14:59:37 +0000 (09:59 -0500)]
drm/amd/display: 3.2.10

Signed-off-by: Steven Chiu <steven.chiu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add backlight pwm debugfs
David Francis [Tue, 13 Nov 2018 15:37:16 +0000 (10:37 -0500)]
drm/amd/display: Add backlight pwm debugfs

[Why]
ABM enablement testing can be automated if a way of reading
target and current hardware backlight is available

[How]
Expand debugfs interface with two new entries.
Hook directly into dc interface.  Units are as
a fraction of 0x1000 = 100%

Use the built-in amdgpu function for creating
read-only debugfs files

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add stream ID and otg instance in dc_stream_state
Jun Lei [Fri, 23 Nov 2018 20:21:02 +0000 (15:21 -0500)]
drm/amd/display: add stream ID and otg instance in dc_stream_state

[why]
stream ID allows DMs to avoid memory address comparisons to compare
stream equality.
otg_instance allows DC to more rigorously define when otg_instance
can change.  specifically, it is now defined to be only mutable when dc_stream_state
changes.  This is better than a "get status" function which prevents efficient
caching of otherwise very stable information.

[how]
stream ID follows similar pattern to sink ID, which is already implemented

otg_instance is an output which occurs on all dc_stream modification functions

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: update DCN dml calcs
Dmytro Laktyushkin [Thu, 8 Nov 2018 19:38:44 +0000 (14:38 -0500)]
drm/amd/display: update DCN dml calcs

DV have made updates to DCN dml which we need to pull in

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Detach backlight from stream
David Francis [Tue, 20 Nov 2018 14:42:58 +0000 (09:42 -0500)]
drm/amd/display: Detach backlight from stream

[Why]
Backlight is conceptually a property of links, not streams.
All backlight programming is done on links, but there is a
stream property bl_pwm_level that is used to restore backlight
on dpms on and s3 resume.  This is unnecessary, as backlight
is already restored by hardware with no driver intervention.

[How]
Remove bl_pwm_level, and the stream argument to set_backlight

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Remove unused headers
Imad Syed [Wed, 21 Nov 2018 20:54:31 +0000 (12:54 -0800)]
drm/amd/display: Remove unused headers

They're not being used, so remove them.

Signed-off-by: Imad Syed <imad.syed@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: remove sink reference in dc_stream_state
Jun Lei [Fri, 9 Nov 2018 14:21:21 +0000 (09:21 -0500)]
drm/amd/display: remove sink reference in dc_stream_state

[why]
dc_stream_state containing a pointer to sink is poor design.
Sink describes the display, and the specifications or capabilities
it has.  That information is irrelevant for dc_stream_state, which describes
hardware state, and is generally used for hardware programming.  It
could further be argued that dc_sink itself is just a convenience dc
provides, and DC should be perfectly capable of programming hardware
without any dc_sinks (for example, emulated sinks).

[how]
Phase 1:
Deprecate use of dc_sink pointer in dc_stream.  Most references are trivial
to remove, but some call sites are risky (such as is_timing_changed) with
no obvious logical replacement.  These will be removed in follow up change.

Add dc_link pointer to dc_stream.  This is the typical reason DC really needed
sink pointer, and most call sites are replaced with this.

DMs also need minor updates, as all 3 DMs leverage stream->sink for
some functionality.  this is replaced instead by a pointer to private data
inside dc_stream_state, which is used by DMs as a quality of life improvment
for some key functionality.  it allows DMs to set pointers have to their own objects
which associate OS objects to dc_stream_states (such as DisplayTarget
and amdgpu_dm_connector).  Without the private pointer, DMs would be
forced to perform a lookup for callbacks.

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add debug option to force fclk request
Hugo Hu [Wed, 21 Nov 2018 06:34:10 +0000 (14:34 +0800)]
drm/amd/display: Add debug option to force fclk request

[Why]
So that we can adjust fclk for debugging purposes.

[How]
Add option to force adjust fclk request to pplib.

Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: update bw formula to v252
Eric Yang [Wed, 21 Nov 2018 07:37:07 +0000 (02:37 -0500)]
drm/amd/display: update bw formula to v252

[why]
There was a recent fix in the BW spreadsheet to allow timing with very
large vblank. Need to be ported into driver.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix issue with VLine interrupt not firing
Krunoslav Kovac [Tue, 13 Nov 2018 20:32:24 +0000 (15:32 -0500)]
drm/amd/display: Fix issue with VLine interrupt not firing

[Why]
We are not correctly handling the wrap around case.
VLine interrupt is relative to position of VUpdate interrupt.

Both VUpdate interrupt and VLine interrupt could possibly
be in front porch or back porch.

[How]
Fix wraparound case by checking for line number that is
greater than the VTOTAL of the OTG timing. In this case,
the interrupt should occur on the next frame.

Also fix some variable naming and remove some dead code.

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: add plane size change check condition
Lewis Huang [Fri, 16 Nov 2018 11:12:46 +0000 (19:12 +0800)]
drm/amd/display: add plane size change check condition

[Why]
Driver didn't check plane size and surface size is mismatch.
It will cause pitch data incorrect.

[How]
Add condition to check is plane change and update surface

Signed-off-by: Lewis Huang <Lewis.Huang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: implement dc_init_callbacks to assign callback pointers after dc_create
Wenjing Liu [Tue, 13 Nov 2018 23:21:53 +0000 (18:21 -0500)]
drm/amd/display: implement dc_init_callbacks to assign callback pointers after dc_create

[why]
Some components depend on dc to constuct
but need to assign callback functions to dc.

[how]
Instead of assigning dc callback functions in dc_create,
decouple the callback init to a standlone function after dc_create. This
is currently a no-op.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Remove some extra braces
Dmytro Laktyushkin [Mon, 19 Nov 2018 22:02:39 +0000 (17:02 -0500)]
drm/amd/display: Remove some extra braces

Remove braces around single-line conditionals

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add pixel clock values to dtn logs
Fatemeh Darbehani [Mon, 19 Nov 2018 18:23:21 +0000 (13:23 -0500)]
drm/amd/display: Add pixel clock values to dtn logs

[Why]
To make sure future changes in DAL for SMU msgs will not change the current behaviour
and to make sure clock registeres are programmed correctly based on SMU msgs
that DAL sends.

Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Yongqiang Sun <yongqiang.sun@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix runtime errors for diagnostic tests
Eric Bernstein [Fri, 9 Nov 2018 21:51:55 +0000 (16:51 -0500)]
drm/amd/display: Fix runtime errors for diagnostic tests

1) Rename and make public definition of input CSC matrix struct.
2) Make wm_read_state() function an interface of hubbub, and check
   if watermark registers exist before read/write to them.
3) Check if OTG_INTERLACE_CONTROL register exists before updating
4) Add dummy functions for set_input/output_transfer function to avoid
   errors due to differences in CM registers.
5) Added missing register field definition in header file

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Expose hubp1_vready_workaround function
Eric Bernstein [Wed, 7 Nov 2018 21:26:50 +0000 (16:26 -0500)]
drm/amd/display: Expose hubp1_vready_workaround function

Expose this function for future use.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add a PP_SMU_VER_MAX enum
Jun Lei [Tue, 13 Nov 2018 15:47:47 +0000 (10:47 -0500)]
drm/amd/display: Add a PP_SMU_VER_MAX enum

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: 3.2.09
Steven Chiu [Fri, 16 Nov 2018 19:06:55 +0000 (14:06 -0500)]
drm/amd/display: 3.2.09

Signed-off-by: Steven Chiu <steven.chiu@amd.com>
Reviewed-by: Shahin Khayyer <Shahin.Khayyer@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: psp_ring_destroy cause psp->km_ring.ring_mem NULL
wentalou [Tue, 18 Dec 2018 07:42:08 +0000 (15:42 +0800)]
drm/amdgpu: psp_ring_destroy cause psp->km_ring.ring_mem NULL

psp_ring_destroy inside psp_load_fw cause psp->km_ring.ring_mem NULL.
Call Trace occurred when psp_cmd_submit.
should be psp_ring_stop instead.

Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Wentao Lou <Wentao.Lou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/psp: Fix can't detect psp INVOKE command failed
Xiangliang Yu [Thu, 13 Dec 2018 07:34:12 +0000 (15:34 +0800)]
drm/amdgpu/psp: Fix can't detect psp INVOKE command failed

There isn't ucode when executing INVOKE command, so current code can't
check the failure of INVOKE command.

Remove the ucode check.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Use sdma_engine array
Oak Zeng [Mon, 17 Dec 2018 15:37:39 +0000 (09:37 -0600)]
drm/amdgpu: Use sdma_engine array

Use sdma_engine[8] array instead of sdma_engine0~7 so it is easier
to program.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/psp: Fix to get wrong xgmi session id
Xiangliang Yu [Thu, 13 Dec 2018 07:21:49 +0000 (15:21 +0800)]
drm/amdgpu/psp: Fix to get wrong xgmi session id

Driver get session id after loading TA FW and the session id is used
by driver instances to communicate with TA. PF and VF have different
session id.

xGMI session id should get from response buffer, correct it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>