Tudor Ambarus [Tue, 5 Feb 2019 17:33:11 +0000 (17:33 +0000)]
spi: atmel-quadspi: drop wrappers for iomem accesses
The wrappers hid that the accesses are relaxed. Drop them.
Suggested-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Tudor Ambarus [Tue, 5 Feb 2019 17:33:08 +0000 (17:33 +0000)]
spi: atmel-quadspi: order header files inclusion alphabetically
Cosmetic change, no functional change.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Tudor Ambarus [Tue, 5 Feb 2019 17:33:06 +0000 (17:33 +0000)]
spi: atmel-quadspi: cache MR value to avoid a write access
Set the controller by default in Serial Memory Mode (SMM) at probe.
Cache Mode Register (MR) value to avoid write access when setting
the controller in serial memory mode at exec_op().
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Lukasz Majewski [Tue, 5 Feb 2019 22:13:49 +0000 (23:13 +0100)]
spi: spi-fsl-dspi: Provide support for DSPI slave mode operation (Vybryd vf610)
The NXP's Vybryd vf610 can work as a SPI slave device (the CS and clock
signals are provided by master).
It is possible to specify a single device to work in that mode. As we do
use DMA for transferring data, the RX channel must be prepared for
incoming data.
Moreover, in slave mode we just set a subset of control fields in
configuration registers (CTAR0, PUSHR).
For testing the spidev_test program has been used.
Test script for this patch can be found here:
https://github.com/lmajewski/tests-spi/blob/master/tests/spi/spi_tests.sh
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Jonas Bonn [Wed, 30 Jan 2019 08:40:05 +0000 (09:40 +0100)]
spi-atmel: support inter-word delay
If the SPI slave requires an inter-word delay, configure the DLYBCT
register accordingly.
Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
board).
Signed-off-by: Jonas Bonn <jonas@norrbonn.se>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
CC: Nicolas Ferre <nicolas.ferre@microchip.com>
CC: Mark Brown <broonie@kernel.org>
CC: Alexandre Belloni <alexandre.belloni@bootlin.com>
CC: Ludovic Desroches <ludovic.desroches@microchip.com>
CC: linux-spi@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Jonas Bonn [Wed, 30 Jan 2019 08:40:04 +0000 (09:40 +0100)]
spi: support inter-word delay requirement for devices
Some devices are slow and cannot keep up with the SPI bus and therefore
require a short delay between words of the SPI transfer.
The example of this that I'm looking at is a SAMA5D2 with a minimum SPI
clock of 400kHz talking to an AVR-based SPI slave. The AVR cannot put
bytes on the bus fast enough to keep up with the SoC's SPI controller
even at the lowest bus speed.
This patch introduces the ability to specify a required inter-word
delay for SPI devices. It is up to the controller driver to configure
itself accordingly in order to introduce the requested delay.
Note that, for spi_transfer, there is already a field word_delay that
provides similar functionality. This field, however, is specified in
clock cycles (and worse, SPI controller cycles, not SCK cycles); that
makes this value dependent on the master clock instead of the device
clock for which the delay is intended to provide some relief. This
patch leaves this old word_delay in place and provides a time-based
word_delay_us alongside it; the new field fits in the struct padding
so struct size is constant. There is only one in-kernel user of the
word_delay field and presumably that driver could be reworked to use
the time-based value instead.
The time-based delay is limited to 8 bits as these delays are intended
to be short. The SAMA5D2 that I've tested this on limits delays to a
maximum of ~100us, which is already many word-transfer periods even at
the minimum transfer speed supported by the controller.
Signed-off-by: Jonas Bonn <jonas@norrbonn.se>
CC: Mark Brown <broonie@kernel.org>
CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: linux-spi@vger.kernel.org
CC: devicetree@vger.kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Uwe Kleine-König [Tue, 29 Jan 2019 13:48:17 +0000 (14:48 +0100)]
spi: mxs: add tracing to custom .transfer_one_message callback
Driver specific implementations for .transfer_one_message need to call
the tracing stuff themself. This is necessary to make spi tracing
actually useful.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Yogesh Narayan Gaur [Tue, 29 Jan 2019 09:55:27 +0000 (09:55 +0000)]
spi: spi-mem: spi-fsl-qspi: typo fix in author name
Typo fix in Author Boris Brezillon last name and update with new
email address.
Fixes: 84d043185dbe ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Yogesh Narayan Gaur [Tue, 29 Jan 2019 09:49:22 +0000 (09:49 +0000)]
spi: spi-mem: spi-nxp-fspi: add module license info
Add MODULE_LICENSE info to fix below warning:
WARNING: modpost: missing MODULE_LICENSE() in drivers/spi/spi-nxp-fspi.o
Typo fix in Boris Brezillon last name.
Fixes: a5356aef6a90 ("spi: spi-mem: Add driver for NXP FlexSPI controller")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Jiwei Sun [Fri, 18 Jan 2019 03:32:29 +0000 (11:32 +0800)]
spi: pl022: add a message state STATE_TIMEOUT for timeout transfer
When transfer timeout, give -EAGAIN to the message's status, and it can
make the spi device driver choose repeated transimation or not. And if
transfer timeout, output some useful information for tracing the issue.
Signed-off-by: Jiwei Sun <jiwei.sun@windriver.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Fabio Estevam [Sat, 26 Jan 2019 21:32:07 +0000 (19:32 -0200)]
spi: Kconfig: imx: Update the help text to make it more generic
The spi-imx driver supports both master and slave modes, so update
the help text to make it more generic.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Yogesh Narayan Gaur [Tue, 15 Jan 2019 10:05:29 +0000 (10:05 +0000)]
spi: nxp-fspi: add octal mode flag bit for octal support
Add octal mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports 8 lines Rx/Tx data transfer.
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Yogesh Narayan Gaur [Tue, 15 Jan 2019 12:00:37 +0000 (12:00 +0000)]
MAINTAINERS: add maintainers for the NXP FlexSPI driver
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Yogesh Narayan Gaur [Tue, 15 Jan 2019 12:00:20 +0000 (12:00 +0000)]
dt-bindings: spi: add binding file for NXP FlexSPI controller
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Yogesh Narayan Gaur [Tue, 15 Jan 2019 12:00:15 +0000 (12:00 +0000)]
spi: spi-mem: Add driver for NXP FlexSPI controller
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e. FlexSPI acts as an interface to external devices,
maximum 4, each with up to 8 bidirectional data lines.
It uses new SPI memory interface of the SPI framework to issue
flash memory operations to up to four connected flash
devices (2 buses with 2 CS each).
(1) Tested this driver with the mtd_debug and JFFS2 filesystem utility
on NXP LX2160ARDB and LX2160AQDS targets.
LX2160ARDB is having two NOR slave device connected on single bus A
i.e. A0 and A1 (CS0 and CS1).
LX2160AQDS is having two NOR slave device connected on separate buses
one flash on A0 and second on B1 i.e. (CS0 and CS3).
Verified this driver on following SPI NOR flashes:
Micron, mt35xu512ab, [Read - 1 bit mode]
Cypress, s25fl512s, [Read - 1/2/4 bit mode]
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Tested-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Wed, 16 Jan 2019 08:21:10 +0000 (09:21 +0100)]
gpio: of: Fix logic inversion
The SPI chip selects were not properly inspected due to
a logic inversion. This made SPI GPIOs not work.
Cc: Jan Kotas <jank@cadence.com>
Reported-by: Jan Kotas <jank@cadence.com>
Tested-by: Jan Kotas <jank@cadence.com>
Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Wed, 16 Jan 2019 08:21:09 +0000 (09:21 +0100)]
spi: cadence: Fix default polarity of native chipselect
The Cadence controller also supports platforms specifying
native chipselects. When I enforce the use of high CS
for drivers opting in for using GPIO descriptors, I
inadvertedly switched the driver to also use active
high chip select for native chip selects.
Fix this by inverting the logic in the callback for the
native chip select. Rename the parameter from "is_high"
(which is interpreted as being high when 0, which is
confusing, I will not make any drug-related jokes here)
to "enabled" which is more intuitive, especially now that
it is true when CS is supposed to be enabled.
Cc: Wei Yongjun <weiyongjun1@huawei.com>
Fixes: cfeefa79dc37 ("spi: cadence: Convert to use CS GPIO descriptors")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Wed, 16 Jan 2019 08:21:08 +0000 (09:21 +0100)]
spi: dw: Fix default polarity of native chipselect
The DW controller also supports platforms specifying
native chipselects. When I enforce the use of high CS
for drivers opting in for using GPIO descriptors, I
inadvertedly switched the driver to also use active
high chip select for native chip selects.
As it turns out, the DW hardware driving chip selects
also thinks it is weird with active low chip selects
so all we need to do is remove an inversion in the
driver.
Cc: Jan Kotas <jank@cadence.com>
Reported-by: Jan Kotas <jank@cadence.com>
Tested-by: Jan Kotas <jank@cadence.com>
Fixes: 9400c41e77b8 ("spi: dw: Convert to use CS GPIO descriptors")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Wed, 16 Jan 2019 08:21:07 +0000 (09:21 +0100)]
spi: Support high CS when using descriptors
All controllers using GPIO descriptors can by definition
support high CS connections, so just enforce this when
registering an SPI controller.
This fixes a regression where controllers were missing
SPI_CS_HIGH, the drivers would fail like this:
spi spi0.0: setup: unsupported mode bits 4
cdns-spi
fd0b0000.spi: can't setup spi0.0, status -22
This is because as using descriptors moves the CS inversion
logic over to gpiolib, all such controllers are registered
with CS active high.
Cc: Jan Kotas <jank@cadence.com>
Reported-by: Jan Kotas <jank@cadence.com>
Tested-by: Jan Kotas <jank@cadence.com>
Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Wed, 23 Jan 2019 17:29:53 +0000 (17:29 +0000)]
spi: Go back to immediate teardown
Commit
412e6037324 ("spi: core: avoid waking pump thread from spi_sync
instead run teardown delayed") introduced regressions on some boards,
apparently connected to spi_mem not triggering shutdown properly any
more. Since we've thus far been unable to figure out exactly where the
breakage is revert the optimisation for now.
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: kernel@martin.sperl.org
Lubomir Rintel [Wed, 16 Jan 2019 15:13:31 +0000 (16:13 +0100)]
pxa2xx: replace spi_master with spi_controller
It's also a slave controller driver now, calling it "master" is slightly
misleading.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
YueHaibing [Wed, 23 Jan 2019 07:05:07 +0000 (15:05 +0800)]
spi: bcm2835aux: remove unneeded NULL check of devm_clk_get
Fix a static code checker warning:
drivers/spi/spi-bcm2835aux.c:460
bcm2835aux_spi_probe() warn: passing zero to 'PTR_ERR'
In case of error, the function devm_clk_get() returns ERR_PTR()
and not returns NULL.
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Boris Brezillon [Sat, 19 Jan 2019 15:04:12 +0000 (16:04 +0100)]
spi: spi-mem: Add devm_spi_mem_dirmap_{create,destroy}()
Since direct mapping descriptors usually the same lifetime as the SPI
MEM device adding devm_ variants of the spi_mem_dirmap_{create,destroy}()
should greatly simplify error/remove path of spi-mem drivers making use
of the direct mapping API.
Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Hoan Nguyen An [Fri, 18 Jan 2019 09:29:31 +0000 (18:29 +0900)]
spi: sh-msiof: Use DMA if possible
Currently, this driver only supports feature for DMA 32-bits.
In this case, only if the data length is divisible by 4 to use
DMA, otherwise PIO will be used. This patch will suggest use
the DMA 32-bits with 4bytes of words, then the remaining data
will be transmitted by PIO mode.
Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
Hoan Nguyen An [Fri, 18 Jan 2019 09:29:30 +0000 (18:29 +0900)]
spi: sh-msiof: fix *info pointer in request_dma()
sh_msiof_spi_info *info struct pointer was initialized in the probe() function
no need to get back and keep consistency.
Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
Geert Uytterhoeven [Fri, 18 Jan 2019 14:11:05 +0000 (15:11 +0100)]
spi: sh-hspi: Remove error messages on out-of-memory conditions
There is no need to print an error message when memory allocations or
related operations fail, as the core will take care of that.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@kernel.org>
Alban Bedel [Wed, 16 Jan 2019 18:55:47 +0000 (19:55 +0100)]
spi: ath79: Remove now useless code
The custom setup/cleanup routines included in the ath79 driver only
take care of setting the initial CS state. However that is already
handled by the bitbang code, so this code can be removed.
Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
Alban Bedel [Wed, 16 Jan 2019 18:55:46 +0000 (19:55 +0100)]
spi: ath79: Enable support for compile test
To allow building this driver in compile test we need to remove all
dependency on headers from arch/mips/include. To allow this we
explicitly define all the registers locally instead of using
ar71xx_regs.h and we move the platform data struct definition to
include/linux/platform_data/spi-ath79.h.
Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
Alban Bedel [Wed, 16 Jan 2019 18:55:45 +0000 (19:55 +0100)]
spi: ath79: Simplify ath79_spi_chipselect()
First of all this callback was slightly misused to setup the clock
polarity at the beginning of a transfer. Beside being at the wrong
place, it is also useless as only SPI mode 1 is supported. Instead
just make sure the base value used for IOC is suitable to start a
transfer by clearing the clock and data bits during the controller
setup.
This also remove the last direct usage of the GPIO API, so we can
remove the direct dependency on GPIOLIB.
Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
Alban Bedel [Wed, 16 Jan 2019 18:55:44 +0000 (19:55 +0100)]
spi: bitbang: Don't call chipselect() in spi_bitbang_setup()
spi_setup() already call spi_set_cs() right after calling the
controller setup method, so there is no need for the bitbang driver to
do that. Because of this the chipselect() callback was confusingly
still called when CS is GPIO based.
Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Mark Brown <broonie@kernel.org>
Charles Keepax [Fri, 4 Jan 2019 18:08:09 +0000 (18:08 +0000)]
spi: cadence: Correct initialisation of runtime PM
Currently the driver calls pm_runtime_put_autosuspend but without ever
having done a pm_runtime_get, this causes the reference count in the pm
runtime core to become -1. The bad reference count causes the core to
sometimes suspend whilst an active SPI transfer is in progress.
arizona spi0.1: SPI transfer timed out
spi_master spi0: failed to transfer one message from queue
The correct proceedure is to do all the initialisation that requires the
hardware to be powered up before enabling the PM runtime, then enable
the PM runtime having called pm_runtime_set_active to inform it that the
hardware is currently powered up. The core will then power it down at
it's leisure and no explicit pm_runtime_put is required.
Fixes: d36ccd9f7ea4 ("spi: cadence: Runtime pm adaptation")
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Stephen Boyd [Thu, 10 Jan 2019 21:02:53 +0000 (13:02 -0800)]
spi: spi-geni-qcom: Get rid of forward declaration
We don't need this forward declaration. Move the function to where it
needed so we can drop it and shave some lines of code.
CC: Girish Mahadevan <girishm@codeaurora.org>
CC: Dilip Kota <dkota@codeaurora.org>
CC: Alok Chauhan <alokc@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Stephen Boyd [Thu, 10 Jan 2019 21:02:52 +0000 (13:02 -0800)]
spi: spi-geni-qcom: Don't initialize completion for normal message
We only use this completion when we're doing something that isn't a
message transfer. For example, changing CS or aborting/canceling a
command. All of those situations properly reinitialize the completion
before sending the GENI the special command to change CS or cancel, etc.
Given that, let's remove the initialization here.
Cc: Girish Mahadevan <girishm@codeaurora.org>
Cc: Dilip Kota <dkota@codeaurora.org>
Cc: Alok Chauhan <alokc@codeaurora.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Thu, 10 Jan 2019 11:48:42 +0000 (12:48 +0100)]
spi: davinci: Get rid of dangling variable
The previous commit left a variable unused, my bad.
Clean it up.
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: David Lechner <david@lechnology.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Fixes: 101a68e74fe0 ("spi: davinci: Convert to use CS GPIO descriptors")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Anders Roxell [Thu, 10 Jan 2019 10:14:07 +0000 (11:14 +0100)]
spi: dw: fix warning unused variable 'ret'
When CONFIG_SPI_DESIGNWARE are enabled we see the unused variable
warning in dw_spi_setup.
../drivers/spi/spi-dw.c: In function ‘dw_spi_setup’:
../drivers/spi/spi-dw.c:400:6: warning: unused variable ‘ret’ [-Wunused-variable]
int ret;
^~~
Remove the unused varable.
Fixes: 9400c41e77b8 ("spi: dw: Convert to use CS GPIO descriptors")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Martin Sperl [Tue, 8 Jan 2019 12:13:45 +0000 (12:13 +0000)]
spi: core: avoid waking pump thread from spi_sync instead run teardown delayed
When spi_sync is running alone with no other spi devices connected
to the bus the worker thread is woken during spi_finalize_current_message
to run the teardown code every time.
This is totally unnecessary in the case that there is no message queued.
On a multi-core system this results in one wakeup of the thread for each
spi_message processed via spi_sync where in most cases the teardown does
not happen as the hw is already in use.
This patch now delays the teardown by 1 second by using a separate
kthread_delayed_work for the teardown.
This avoids waking the kthread too often.
For spi_sync transfers in a tight loop (say 40k messages/s) this
avoids the penalty of waking the worker thread 40k times/s.
On a rasperry pi 3 with 4 cores the results in 32% of a single core
only to find out that there is nothing in the queue and it can go back
to sleep.
With this patch applied the spi-worker is woken exactly once: after
the load finishes and the spi bus is idle for 1 second.
I believe I have also seen situations where during a spi_sync loop
the worker thread (triggered by the last message finished) is slightly
faster and _wins_ the race to process the message, so we are actually
running the kthread and letting it do some work...
This is also no longer observed with this patch applied as.
Tested with a new CAN controller driver for the mcp2517fd which
uses spi_sync for interrupt handling and spi_async for scheduling
of can frames for transmission (in a different thread)
Some statistics when receiving 100000 CAN frames with the mcp25xxfd driver
on a Raspberry pi 3:
without the patch:
------------------
root@raspcm3:~# for x in $(pgrep spi0) $(pgrep irq/94-mcp25xxf) ; do awk '{printf "%-20s %6i\n", $2,$15}' /proc/$x/stat; done
(spi0) 5
(irq/94-mcp25xxf) 0
root@raspcm3:~# vmstat 1
procs -----------memory---------- ---swap-- -----io---- -system-- ------cpu-----
r b swpd free buff cache si so bi bo in cs us sy id wa st
1 0 0 821960 13592 50848 0 0 80 2 1986 105 1 2 97 0 0
0 0 0 821968 13592 50876 0 0 0 0 8046 30 0 0 100 0 0
0 0 0 821936 13592 50876 0 0 0 0 8032 24 0 0 100 0 0
0 0 0 821936 13592 50876 0 0 0 0 8035 30 0 0 100 0 0
0 0 0 821936 13592 50876 0 0 0 0 8033 22 0 0 100 0 0
2 0 0 821936 13592 50876 0 0 0 0 11598 7129 0 3 97 0 0
1 0 0 821872 13592 50876 0 0 0 0 37741 59003 0 31 69 0 0
2 0 0 821840 13592 50876 0 0 0 0 37762 59078 0 29 71 0 0
2 0 0 821776 13592 50876 0 0 0 0 37593 58792 0 28 72 0 0
1 0 0 821744 13592 50876 0 0 0 0 37642 58881 0 30 70 0 0
2 0 0 821680 13592 50876 0 0 0 0 37490 58602 0 27 73 0 0
1 0 0 821648 13592 50876 0 0 0 0 37412 58418 0 29 71 0 0
1 0 0 821584 13592 50876 0 0 0 0 37337 58288 0 27 73 0 0
1 0 0 821552 13592 50876 0 0 0 0 37584 58774 0 27 73 0 0
0 0 0 821520 13592 50876 0 0 0 0 18363 20566 0 9 91 0 0
0 0 0 821520 13592 50876 0 0 0 0 8037 32 0 0 100 0 0
0 0 0 821520 13592 50876 0 0 0 0 8031 23 0 0 100 0 0
0 0 0 821520 13592 50876 0 0 0 0 8034 26 0 0 100 0 0
0 0 0 821520 13592 50876 0 0 0 0 8033 24 0 0 100 0 0
^C
root@raspcm3:~# for x in $(pgrep spi0) $(pgrep irq/94-mcp25xxf) ; do awk '{printf "%-20s %6i\n", $2,$15}' /proc/$x/stat; done
(spi0) 228
(irq/94-mcp25xxf) 794
root@raspcm3:~# cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
17: 34 0 0 0 ARMCTRL-level 1 Edge
3f00b880.mailbox
27: 1 0 0 0 ARMCTRL-level 35 Edge timer
33:
1416870 0 0 0 ARMCTRL-level 41 Edge
3f980000.usb, dwc2_hsotg:usb1
34: 1 0 0 0 ARMCTRL-level 42 Edge vc4
35: 0 0 0 0 ARMCTRL-level 43 Edge
3f004000.txp
40: 1753 0 0 0 ARMCTRL-level 48 Edge DMA IRQ
42: 11 0 0 0 ARMCTRL-level 50 Edge DMA IRQ
44: 11 0 0 0 ARMCTRL-level 52 Edge DMA IRQ
45: 0 0 0 0 ARMCTRL-level 53 Edge DMA IRQ
66: 0 0 0 0 ARMCTRL-level 74 Edge vc4 crtc
69: 0 0 0 0 ARMCTRL-level 77 Edge vc4 crtc
70: 0 0 0 0 ARMCTRL-level 78 Edge vc4 crtc
77: 20 0 0 0 ARMCTRL-level 85 Edge
3f205000.i2c,
3f804000.i2c,
3f805000.i2c
78: 6346 0 0 0 ARMCTRL-level 86 Edge
3f204000.spi
80: 205 0 0 0 ARMCTRL-level 88 Edge mmc0
81: 493 0 0 0 ARMCTRL-level 89 Edge uart-pl011
89: 0 0 0 0 bcm2836-timer 0 Edge arch_timer
90: 4291 3821 2180 1649 bcm2836-timer 1 Edge arch_timer
94: 14289 0 0 0 pinctrl-bcm2835 16 Level mcp25xxfd
IPI0: 0 0 0 0 CPU wakeup interrupts
IPI1: 0 0 0 0 Timer broadcast interrupts
IPI2: 3645 242371 7919 1328 Rescheduling interrupts
IPI3: 112 543 273 194 Function call interrupts
IPI4: 0 0 0 0 CPU stop interrupts
IPI5: 1 0 0 0 IRQ work interrupts
IPI6: 0 0 0 0 completion interrupts
Err: 0
top shows 93% for the mcp25xxfd interrupt handler, 31% for spi0.
with the patch:
---------------
root@raspcm3:~# for x in $(pgrep spi0) $(pgrep irq/94-mcp25xxf) ; do awk '{printf "%-20s %6i\n", $2,$15}' /proc/$x/stat; done
(spi0) 0
(irq/94-mcp25xxf) 0
root@raspcm3:~# vmstat 1
procs -----------memory---------- ---swap-- -----io---- -system-- ------cpu-----
0 0 0 804768 13584 62628 0 0 0 0 8038 24 0 0 100 0 0
0 0 0 804768 13584 62628 0 0 0 0 8042 25 0 0 100 0 0
1 0 0 804704 13584 62628 0 0 0 0 9603 2967 0 20 80 0 0
1 0 0 804672 13584 62628 0 0 0 0 9828 3380 0 24 76 0 0
1 0 0 804608 13584 62628 0 0 0 0 9823 3375 0 23 77 0 0
1 0 0 804608 13584 62628 0 0 0 12 9829 3394 0 23 77 0 0
1 0 0 804544 13584 62628 0 0 0 0 9816 3362 0 22 78 0 0
1 0 0 804512 13584 62628 0 0 0 0 9817 3367 0 23 77 0 0
1 0 0 804448 13584 62628 0 0 0 0 9822 3370 0 22 78 0 0
1 0 0 804416 13584 62628 0 0 0 0 9815 3367 0 23 77 0 0
0 0 0 804352 13584 62628 0 0 0 84 9222 2250 0 14 86 0 0
0 0 0 804352 13592 62620 0 0 0 24 8131 209 0 0 93 7 0
0 0 0 804320 13592 62628 0 0 0 0 8041 27 0 0 100 0 0
0 0 0 804352 13592 62628 0 0 0 0 8040 26 0 0 100 0 0
root@raspcm3:~# for x in $(pgrep spi0) $(pgrep irq/94-mcp25xxf) ; do awk '{printf "%-20s %6i\n", $2,$15}' /proc/$x/stat; done
(spi0) 0
(irq/94-mcp25xxf) 767
root@raspcm3:~# cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
17: 29 0 0 0 ARMCTRL-level 1 Edge
3f00b880.mailbox
27: 1 0 0 0 ARMCTRL-level 35 Edge timer
33:
1024412 0 0 0 ARMCTRL-level 41 Edge
3f980000.usb, dwc2_hsotg:usb1
34: 1 0 0 0 ARMCTRL-level 42 Edge vc4
35: 0 0 0 0 ARMCTRL-level 43 Edge
3f004000.txp
40: 1773 0 0 0 ARMCTRL-level 48 Edge DMA IRQ
42: 11 0 0 0 ARMCTRL-level 50 Edge DMA IRQ
44: 11 0 0 0 ARMCTRL-level 52 Edge DMA IRQ
45: 0 0 0 0 ARMCTRL-level 53 Edge DMA IRQ
66: 0 0 0 0 ARMCTRL-level 74 Edge vc4 crtc
69: 0 0 0 0 ARMCTRL-level 77 Edge vc4 crtc
70: 0 0 0 0 ARMCTRL-level 78 Edge vc4 crtc
77: 20 0 0 0 ARMCTRL-level 85 Edge
3f205000.i2c,
3f804000.i2c,
3f805000.i2c
78: 6417 0 0 0 ARMCTRL-level 86 Edge
3f204000.spi
80: 237 0 0 0 ARMCTRL-level 88 Edge mmc0
81: 489 0 0 0 ARMCTRL-level 89 Edge uart-pl011
89: 0 0 0 0 bcm2836-timer 0 Edge arch_timer
90: 4048 3704 2383 1892 bcm2836-timer 1 Edge arch_timer
94: 14287 0 0 0 pinctrl-bcm2835 16 Level mcp25xxfd
IPI0: 0 0 0 0 CPU wakeup interrupts
IPI1: 0 0 0 0 Timer broadcast interrupts
IPI2: 2361 2948 7890 1616 Rescheduling interrupts
IPI3: 65 617 301 166 Function call interrupts
IPI4: 0 0 0 0 CPU stop interrupts
IPI5: 1 0 0 0 IRQ work interrupts
IPI6: 0 0 0 0 completion interrupts
Err: 0
top shows 91% for the mcp25xxfd interrupt handler, 0% for spi0
So we see that spi0 is no longer getting scheduled wasting CPU cycles
There are a lot less context switches and corresponding Rescheduling interrupts
All of these show that this improves efficiency of the system and reduces
CPU utilization.
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Mon, 7 Jan 2019 15:51:56 +0000 (16:51 +0100)]
spi: dw: Convert to use CS GPIO descriptors
This converts the DesignWare (dw) SPI master driver to
use GPIO descriptors for chip select handling.
This driver has a duplicate DT parser in addition to the
one in the core, sets up the line as non-asserted and
relies on the core to drive the GPIOs.
It is a pretty straight-forward conversion.
Cc: Talel Shenhar <talel@amazon.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Linuxarm <linuxarm@huawei.com>
Tested-by: Jay Fang <f.fangjian@huawei.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Mon, 7 Jan 2019 15:51:55 +0000 (16:51 +0100)]
spi: davinci: Convert to use CS GPIO descriptors
This converts the DaVinci SPI master driver to use GPIO
descriptors for chip select handling.
DaVinci parses the device tree a second time for the chip
select GPIOs (no relying on the parsing already happening
in the SPI core) and handles inversion semantics locally.
We simply drop the extra parsing and set up and move the
CS handling to the core and gpiolib. The fact that the
driver is actively driving the GPIO in the
davinci_spi_chipselect() callback is confusing since the
host does not set SPI_MASTER_GPIO_SS so this should not
ever get called when using GPIO CS. I put in a comment
about this.
This driver also supports instantiation from board files,
but these are all using native chip selects so no problem
with GPIO lines here.
Cc: David Lechner <david@lechnology.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Linuxarm <linuxarm@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Mon, 7 Jan 2019 15:51:54 +0000 (16:51 +0100)]
spi: clps711x: Convert to use CS GPIO descriptors
This converts the CLPS711x SPI master driver to use GPIO
descriptors for chip select handling.
The CLPS711x driver was merely requesting the GPIO and
setting the CS line non-asserted so this was a pretty
straight-forward conversion. The setup callback goes away.
Cc: Alexander Shiyan <shc_work@mail.ru>
Cc: Linuxarm <linuxarm@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Mon, 7 Jan 2019 15:51:53 +0000 (16:51 +0100)]
spi: cadence: Convert to use CS GPIO descriptors
This converts the Cadence SPI master driver to use GPIO
descriptors for chip select handling.
The Cadence driver was allocating a state container just
to hold the requested GPIO line and contained lots of
polarity inversion code. As this is all handled by gpiolib
and a simple devm_* request in the core, and as the driver
is fully device tree only, most of this code chunk goes
away in favour of central handling. The setup/cleanup
callbacks goes away.
This driver does NOT drive the CS line by setting the
value of the GPIO so it relies on the SPI core to do
this, which should work just fine with the descriptors.
Cc: Wei Yongjun <weiyongjun1@huawei.com>
Cc: Janek Kotas <jank@cadence.com>
Cc: Linuxarm <linuxarm@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Mon, 7 Jan 2019 15:51:52 +0000 (16:51 +0100)]
spi: atmel: Convert to use CS GPIO descriptors
This converts the Atmel SPI master driver to use GPIO descriptors
for chip select handling.
The Atmel driver has duplicate code to look up and initialize CS
GPIOs from the device tree, so this is removed. It further has code
to retrieve a CS GPIO from .controller_data but this seems to be
completely unused in the kernel (legacy codepath?) so I deleted
this support. It keeps track of polarity when switching the CS, but
this is not needed anymore since we moved this over to the gpiolib.
The local handling of the "npcs_pin" (I guess this might mean
"negative polarity chip select pin") is preserved, but I strongly
suspect this can be switched over to handling by the core and
using the SPI_MASTER_GPIO_SS flag on the master to assure that
the additional CS handling in the driver is also done.
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Radu Pirea <radu.pirea@microchip.com>
Cc: Linuxarm <linuxarm@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Mon, 7 Jan 2019 15:51:51 +0000 (16:51 +0100)]
spi: ath79: Convert to use CS GPIO descriptors
This converts the ATH79 SPI master driver to use GPIO descriptors
for chip select handling.
The ATH79 driver was requesting the GPIO and driving it from the
bitbang .chipselect callback. Do not request it anymore as the SPI
core will request it, remove the line inversion semantics for the
GPIO case (handled by gpiolib) and let the SPI core deal with
requesting the GPIO line from the device tree node of the controller.
This driver can be instantiated from a board file (no device tree)
but the board files only use native CS (no GPIO lines) so we should
be fine just letting the SPI core grab the GPIO from the device.
The fact that the driver is actively driving the GPIO in the
ath79_spi_chipselect() callback is confusing since the host does
not set SPI_MASTER_GPIO_SS so this should not ever get called when
using GPIO CS. I put in a comment about this.
Cc: Felix Fietkau <nbd@nbd.name>
Cc: Alban Bedel <albeu@free.fr>
Cc: Linuxarm <linuxarm@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Walleij [Mon, 7 Jan 2019 15:51:50 +0000 (16:51 +0100)]
spi: Optionally use GPIO descriptors for CS GPIOs
This augments the SPI core to optionally use GPIO descriptors
for chip select on a per-master-driver opt-in basis.
Drivers using this will rely on the SPI core to look up
GPIO descriptors associated with the device, such as
when using device tree or board files with GPIO descriptor
tables.
When getting descriptors from the device tree, this will in
turn activate the code in gpiolib that was
added in commit
6953c57ab172
("gpio: of: Handle SPI chipselect legacy bindings")
which means that these descriptors are aware of the active
low semantics that is the default for SPI CS GPIO lines
and we can assume that all of these are "active high" and
thus assign SPI_CS_HIGH to all CS lines on the DT path.
The previously used gpio_set_value() would call down into
gpiod_set_raw_value() and ignore the polarity inversion
semantics.
It seems like many drivers go to great lengths to set up the
CS GPIO line as non-asserted, respecting SPI_CS_HIGH. We pull
this out of the SPI drivers and into the core, and by simply
requesting the line as GPIOD_OUT_LOW when retrieveing it from
the device and relying on the gpiolib to handle any inversion
semantics. This way a lot of code can be simplified and
removed in each converted driver.
The end goal after dealing with each driver in turn, is to
delete the non-descriptor path (of_spi_register_master() for
example) and let the core deal with only descriptors.
The different SPI drivers have complex interactions with the
core so we cannot simply change them all over, we need to use
a stepwise, bisectable approach so that each driver can be
converted and fixed in isolation.
This patch has the intended side effect of adding support for
ACPI GPIOs as it starts relying on gpiod_get_*() to get
the GPIO handle associated with the device.
Cc: Linuxarm <linuxarm@huawei.com>
Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Tested-by: Fangjian (Turing) <f.fangjian@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Uwe Kleine-König [Fri, 21 Dec 2018 10:35:36 +0000 (11:35 +0100)]
spi/trace: include buffer contents in traces
It highly improves usability when the buffer contents are inspecable via
tracing.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Uwe Kleine-König [Fri, 21 Dec 2018 10:35:35 +0000 (11:35 +0100)]
spi/trace: drop useless and wrong (but harmless) casts
bus_num, chip_select and len are already ints, so there is no gain in
casting them to int. xfer is a pointer to a struct spi_transfer. Casting
that to struct spi_message * is wrong but as only the pointer value is
used for the %p format specifier no harm is done.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:40 +0000 (23:00 +0100)]
spi: stm32: add description about STM32F4 bindings
Add description that STM32F4 can be used in compatible property.
Master Inter-Data Idleness optional property cannot be used in STM32F4.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:38 +0000 (23:00 +0100)]
spi: stm32: add support for STM32F4
Add routines, registers & bitfield definition. Also baud rate divisor
definitions for STM32F4 SPI. This version supports full-duplex,
simplex TX and half-duplex TX communication with 8 or 16-bit per word.
DMA capability is optionally supported for transfer longer than 16 bytes.
For transfer less than 16 bytes frames can be send in discontinuous mode.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:37 +0000 (23:00 +0100)]
spi: stm32: introduce compatible data cfg
Prepare support for STM32F4 spi variant by introducing compatible
configuration data.
Move STM32H7 specific stuff to compatible data structure:
- registers & bit fields
- routines to control driver
- baud rate divisor definitions
- fifo availability
- split IRQ functions to parts to be called when the IRQ occurs
and for threaded interrupt what helps to provide less discontinuous
mode for drivers without FIFO.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:36 +0000 (23:00 +0100)]
spi: stm32: add start dma transfer function
Add transfer_one_dma_start function to be more generic for other
stm32 SPI family drivers.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:35 +0000 (23:00 +0100)]
spi: stm32: split transfer one setup function
Split stm32_spi_transfer_one_setup function into smaller chunks
to be more generic for other stm32 SPI family drivers.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:34 +0000 (23:00 +0100)]
spi: stm32: rename interrupt function
Interrupt function is used as a thread so rename it to express
meaning directly by more clear function name.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:33 +0000 (23:00 +0100)]
spi: stm32: rename STM32 SPI registers to STM32H7
Rename STM32 SPI registers to be related to STM32H7 SPI driver
and not STM32 generally.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:32 +0000 (23:00 +0100)]
spi: stm32: remove SPI LOOP mode
This driver does not support SPI LOOP mode by configuration
in registers.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:31 +0000 (23:00 +0100)]
spi: stm32: use explicit CPOL and CPHA mode bits
Driver supports SPI mode 0 to 3 not only the mode 3.
Use SPI_CPOL and SPI_CPHA indicates that these bits
can be changed to obtain modes 0 - 3.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:30 +0000 (23:00 +0100)]
spi: fix typo in SPI_STM32 help text
Fix typo from STMicroelectonics to STMicroelectronics.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:29 +0000 (23:00 +0100)]
spi: stm32: fix DMA configuration with only one channel
When SPI driver is configured to work only with TX or RX DMA channel
then dmaengine functions can dereferene NULL pointer.
Running full-duplex mode when when only RX or TX DMA channel is
available can cause overrun condition or incorrect writing to transmit
buffer so disable this types of DMA configuration and go back to
interrupt mode.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:28 +0000 (23:00 +0100)]
spi: stm32: use NULL pointer instead of plain integer
Patch fixes sparse warning: Using plain integer as NULL pointer. Replaces
second argument of function devm_clk_get from 0 to NULL.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cezary Gapinski [Mon, 24 Dec 2018 22:00:27 +0000 (23:00 +0100)]
spi: stm32: switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
shaftarger [Fri, 28 Dec 2018 08:33:12 +0000 (16:33 +0800)]
spi: dw: fix potential variable assignment error
spi::mode is defined by framework for several SPI capabilities,
such as polarity, phase, bit-endian, wire number. Directly use this
variable for setting controller's polarity and phase causes other
bit in register being set. Since SPI framework has its definition,
SPI_CPOL and SPI_CPHA offset may be changed by framwork change.
Instead of just mask off the relevant bits,
fetch required bit in spi::mode and set to register.
Signed-off-by: shaftarger <shol@livemail.tw>
Signed-off-by: Mark Brown <broonie@kernel.org>
Angelo Dureghello [Wed, 26 Dec 2018 21:43:00 +0000 (22:43 +0100)]
spi: add cpu details to fsl-dspi Kconfig help
Add some cpu families that are actually using the fsl-dspi module
in the related Kconfig description.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Mark Brown <broonie@kernel.org>
Frieder Schrempf [Mon, 7 Jan 2019 09:30:10 +0000 (09:30 +0000)]
MAINTAINERS: Move the Freescale QSPI driver to the SPI framework
The driver was ported to the SPI framework so it can be used as
a generic SPI memory driver and not only for SPI NOR.
Reflect this transition in the MAINTAINERS file.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Frieder Schrempf [Mon, 7 Jan 2019 09:29:53 +0000 (09:29 +0000)]
mtd: fsl-quadspi: Remove the driver as it was replaced by spi-fsl-qspi.c
There's a new driver using the SPI memory interface of the SPI framework
at spi/spi-fsl-qspi.c, which can be used together with m25p80.c to
replace the functionality of this SPI NOR driver.
The new driver is already in use and this code is not compiled anymore,
so let's remove it.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-by: Han Xu <han.xu@nxp.com>
Acked-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Frieder Schrempf [Mon, 7 Jan 2019 09:29:50 +0000 (09:29 +0000)]
dt-bindings: spi: Adjust the bindings for the FSL QSPI driver
Adjust the documentation of the new SPI memory interface based
driver to reflect the new drivers settings.
The "old" driver was using the "fsl,qspi-has-second-chip" property to
select one of two dual chip setups (two chips on one bus or two chips
on separate buses). And it used the order in which the subnodes are
defined in the dt to select the CS, the chip is connected to.
Both methods are wrong and in fact the "reg" property should be used to
determine which bus and CS a chip is connected to. This also enables us
to use different setups than just single chip, or symmetric dual chip.
So the porting of the driver from the MTD to the SPI framework actually
enforces the use of the "reg" properties and makes
"fsl,qspi-has-second-chip" superfluous.
As all boards that have "fsl,qspi-has-second-chip" set, also have
correct "reg" properties, the removal of this property shouldn't lead to
any incompatibilities.
The only compatibility issues I can see are with imx6sx-sdb.dts and
imx6sx-sdb-reva.dts, which have their reg properties set incorrectly
(see explanation here: [2]), all other boards should stay compatible.
Also the "big-endian" flag was removed, as this setting is now selected
by the driver, depending on which SoC is in use.
[2] https://patchwork.ozlabs.org/patch/922817/#
1925445
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Frieder Schrempf [Mon, 7 Jan 2019 09:29:49 +0000 (09:29 +0000)]
dt-bindings: spi: Move the bindings for the FSL QSPI driver
Move the documentation of the old SPI NOR driver to the place of the new
SPI memory interface based driver.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Frieder Schrempf [Mon, 7 Jan 2019 09:29:47 +0000 (09:29 +0000)]
spi: Add a driver for the Freescale/NXP QuadSPI controller
This driver is derived from the SPI NOR driver at
mtd/spi-nor/fsl-quadspi.c. It uses the new SPI memory interface
of the SPI framework to issue flash memory operations to up to
four connected flash chips (2 buses with 2 CS each).
The controller does not support generic SPI messages.
This patch also disables the build of the "old" driver and reuses
its Kconfig option CONFIG_SPI_FSL_QUADSPI to replace it.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Tested-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Tested-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Boris Brezillon <bbrezillon@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Torvalds [Mon, 7 Jan 2019 01:08:20 +0000 (17:08 -0800)]
Linux 5.0-rc1
Linus Torvalds [Mon, 7 Jan 2019 00:33:10 +0000 (16:33 -0800)]
Merge tag 'kbuild-v4.21-3' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull more Kbuild updates from Masahiro Yamada:
- improve boolinit.cocci and use_after_iter.cocci semantic patches
- fix alignment for kallsyms
- move 'asm goto' compiler test to Kconfig and clean up jump_label
CONFIG option
- generate asm-generic wrappers automatically if arch does not
implement mandatory UAPI headers
- remove redundant generic-y defines
- misc cleanups
* tag 'kbuild-v4.21-3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
kconfig: rename generated .*conf-cfg to *conf-cfg
kbuild: remove unnecessary stubs for archheader and archscripts
kbuild: use assignment instead of define ... endef for filechk_* rules
arch: remove redundant UAPI generic-y defines
kbuild: generate asm-generic wrappers if mandatory headers are missing
arch: remove stale comments "UAPI Header export list"
riscv: remove redundant kernel-space generic-y
kbuild: change filechk to surround the given command with { }
kbuild: remove redundant target cleaning on failure
kbuild: clean up rule_dtc_dt_yaml
kbuild: remove UIMAGE_IN and UIMAGE_OUT
jump_label: move 'asm goto' support test to Kconfig
kallsyms: lower alignment on ARM
scripts: coccinelle: boolinit: drop warnings on named constants
scripts: coccinelle: check for redeclaration
kconfig: remove unused "file" field of yylval union
nds32: remove redundant kernel-space generic-y
nios2: remove unneeded HAS_DMA define
Linus Torvalds [Mon, 7 Jan 2019 00:30:14 +0000 (16:30 -0800)]
Merge branch 'perf-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull perf tooling updates form Ingo Molnar:
"A final batch of perf tooling changes: mostly fixes and small
improvements"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits)
perf session: Add comment for perf_session__register_idle_thread()
perf thread-stack: Fix thread stack processing for the idle task
perf thread-stack: Allocate an array of thread stacks
perf thread-stack: Factor out thread_stack__init()
perf thread-stack: Allow for a thread stack array
perf thread-stack: Avoid direct reference to the thread's stack
perf thread-stack: Tidy thread_stack__bottom() usage
perf thread-stack: Simplify some code in thread_stack__process()
tools gpio: Allow overriding CFLAGS
tools power turbostat: Override CFLAGS assignments and add LDFLAGS to build command
tools thermal tmon: Allow overriding CFLAGS assignments
tools power x86_energy_perf_policy: Override CFLAGS assignments and add LDFLAGS to build command
perf c2c: Increase the HITM ratio limit for displayed cachelines
perf c2c: Change the default coalesce setup
perf trace beauty ioctl: Beautify USBDEVFS_ commands
perf trace beauty: Export function to get the files for a thread
perf trace: Wire up ioctl's USBDEBFS_ cmd table generator
perf beauty ioctl: Add generator for USBDEVFS_ ioctl commands
tools headers uapi: Grab a copy of usbdevice_fs.h
perf trace: Store the major number for a file when storing its pathname
...
Linus Torvalds [Sun, 6 Jan 2019 01:50:59 +0000 (17:50 -0800)]
Change mincore() to count "mapped" pages rather than "cached" pages
The semantics of what "in core" means for the mincore() system call are
somewhat unclear, but Linux has always (since 2.3.52, which is when
mincore() was initially done) treated it as "page is available in page
cache" rather than "page is mapped in the mapping".
The problem with that traditional semantic is that it exposes a lot of
system cache state that it really probably shouldn't, and that users
shouldn't really even care about.
So let's try to avoid that information leak by simply changing the
semantics to be that mincore() counts actual mapped pages, not pages
that might be cheaply mapped if they were faulted (note the "might be"
part of the old semantics: being in the cache doesn't actually guarantee
that you can access them without IO anyway, since things like network
filesystems may have to revalidate the cache before use).
In many ways the old semantics were somewhat insane even aside from the
information leak issue. From the very beginning (and that beginning is
a long time ago: 2.3.52 was released in March 2000, I think), the code
had a comment saying
Later we can get more picky about what "in core" means precisely.
and this is that "later". Admittedly it is much later than is really
comfortable.
NOTE! This is a real semantic change, and it is for example known to
change the output of "fincore", since that program literally does a
mmmap without populating it, and then doing "mincore()" on that mapping
that doesn't actually have any pages in it.
I'm hoping that nobody actually has any workflow that cares, and the
info leak is real.
We may have to do something different if it turns out that people have
valid reasons to want the old semantics, and if we can limit the
information leak sanely.
Cc: Kevin Easton <kevin@guarana.org>
Cc: Jiri Kosina <jikos@kernel.org>
Cc: Masatake YAMATO <yamato@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Michal Hocko <mhocko@suse.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 6 Jan 2019 19:15:04 +0000 (11:15 -0800)]
Fix 'acccess_ok()' on alpha and SH
Commit
594cc251fdd0 ("make 'user_access_begin()' do 'access_ok()'")
broke both alpha and SH booting in qemu, as noticed by Guenter Roeck.
It turns out that the bug wasn't actually in that commit itself (which
would have been surprising: it was mostly a no-op), but in how the
addition of access_ok() to the strncpy_from_user() and strnlen_user()
functions now triggered the case where those functions would test the
access of the very last byte of the user address space.
The string functions actually did that user range test before too, but
they did it manually by just comparing against user_addr_max(). But
with user_access_begin() doing the check (using "access_ok()"), it now
exposed problems in the architecture implementations of that function.
For example, on alpha, the access_ok() helper macro looked like this:
#define __access_ok(addr, size) \
((get_fs().seg & (addr | size | (addr+size))) == 0)
and what it basically tests is of any of the high bits get set (the
USER_DS masking value is 0xfffffc0000000000).
And that's completely wrong for the "addr+size" check. Because it's
off-by-one for the case where we check to the very end of the user
address space, which is exactly what the strn*_user() functions do.
Why? Because "addr+size" will be exactly the size of the address space,
so trying to access the last byte of the user address space will fail
the __access_ok() check, even though it shouldn't. As a result, the
user string accessor functions failed consistently - because they
literally don't know how long the string is going to be, and the max
access is going to be that last byte of the user address space.
Side note: that alpha macro is buggy for another reason too - it re-uses
the arguments twice.
And SH has another version of almost the exact same bug:
#define __addr_ok(addr) \
((unsigned long __force)(addr) < current_thread_info()->addr_limit.seg)
so far so good: yes, a user address must be below the limit. But then:
#define __access_ok(addr, size) \
(__addr_ok((addr) + (size)))
is wrong with the exact same off-by-one case: the case when "addr+size"
is exactly _equal_ to the limit is actually perfectly fine (think "one
byte access at the last address of the user address space")
The SH version is actually seriously buggy in another way: it doesn't
actually check for overflow, even though it did copy the _comment_ that
talks about overflow.
So it turns out that both SH and alpha actually have completely buggy
implementations of access_ok(), but they happened to work in practice
(although the SH overflow one is a serious serious security bug, not
that anybody likely cares about SH security).
This fixes the problems by using a similar macro on both alpha and SH.
It isn't trying to be clever, the end address is based on this logic:
unsigned long __ao_end = __ao_a + __ao_b - !!__ao_b;
which basically says "add start and length, and then subtract one unless
the length was zero". We can't subtract one for a zero length, or we'd
just hit an underflow instead.
For a lot of access_ok() users the length is a constant, so this isn't
actually as expensive as it initially looks.
Reported-and-tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 6 Jan 2019 20:21:11 +0000 (12:21 -0800)]
Merge tag 'fscrypt_for_linus' of git://git./linux/kernel/git/tytso/fscrypt
Pull fscrypt updates from Ted Ts'o:
"Add Adiantum support for fscrypt"
* tag 'fscrypt_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt:
fscrypt: add Adiantum support
Linus Torvalds [Sun, 6 Jan 2019 20:19:23 +0000 (12:19 -0800)]
Merge tag 'ext4_for_linus_stable' of git://git./linux/kernel/git/tytso/ext4
Pull ext4 bug fixes from Ted Ts'o:
"Fix a number of ext4 bugs"
* tag 'ext4_for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4:
ext4: fix special inode number checks in __ext4_iget()
ext4: track writeback errors using the generic tracking infrastructure
ext4: use ext4_write_inode() when fsyncing w/o a journal
ext4: avoid kernel warning when writing the superblock to a dead device
ext4: fix a potential fiemap/page fault deadlock w/ inline_data
ext4: make sure enough credits are reserved for dioread_nolock writes
Linus Torvalds [Sun, 6 Jan 2019 19:47:26 +0000 (11:47 -0800)]
Merge tag 'dma-mapping-4.21-1' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping fixes from Christoph Hellwig:
"Fix various regressions introduced in this cycles:
- fix dma-debug tracking for the map_page / map_single
consolidatation
- properly stub out DMA mapping symbols for !HAS_DMA builds to avoid
link failures
- fix AMD Gart direct mappings
- setup the dma address for no kernel mappings using the remap
allocator"
* tag 'dma-mapping-4.21-1' of git://git.infradead.org/users/hch/dma-mapping:
dma-direct: fix DMA_ATTR_NO_KERNEL_MAPPING for remapped allocations
x86/amd_gart: fix unmapping of non-GART mappings
dma-mapping: remove a few unused exports
dma-mapping: properly stub out the DMA API for !CONFIG_HAS_DMA
dma-mapping: remove dmam_{declare,release}_coherent_memory
dma-mapping: implement dmam_alloc_coherent using dmam_alloc_attrs
dma-mapping: implement dma_map_single_attrs using dma_map_page_attrs
Linus Torvalds [Sun, 6 Jan 2019 19:40:06 +0000 (11:40 -0800)]
Merge tag 'tag-chrome-platform-for-v4.21' of git://git./linux/kernel/git/bleung/chrome-platform
Pull chrome platform updates from Benson Leung:
- Changes for EC_MKBP_EVENT_SENSOR_FIFO handling.
- Also, maintainership changes. Olofj out, Enric balletbo in.
* tag 'tag-chrome-platform-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/bleung/chrome-platform:
MAINTAINERS: add maintainers for ChromeOS EC sub-drivers
MAINTAINERS: platform/chrome: Add Enric as a maintainer
MAINTAINERS: platform/chrome: remove myself as maintainer
platform/chrome: don't report EC_MKBP_EVENT_SENSOR_FIFO as wakeup
platform/chrome: straighten out cros_ec_get_{next,host}_event() error codes
Linus Torvalds [Sun, 6 Jan 2019 19:37:44 +0000 (11:37 -0800)]
Merge tag 'hwlock-v4.21' of git://github.com/andersson/remoteproc
Pull hwspinlock updates from Bjorn Andersson:
"This adds support for the hardware semaphores found in STM32MP1"
* tag 'hwlock-v4.21' of git://github.com/andersson/remoteproc:
hwspinlock: fix return value check in stm32_hwspinlock_probe()
hwspinlock: add STM32 hwspinlock device
dt-bindings: hwlock: Document STM32 hwspinlock bindings
Eric Biggers [Sun, 6 Jan 2019 13:36:21 +0000 (08:36 -0500)]
fscrypt: add Adiantum support
Add support for the Adiantum encryption mode to fscrypt. Adiantum is a
tweakable, length-preserving encryption mode with security provably
reducible to that of XChaCha12 and AES-256, subject to a security bound.
It's also a true wide-block mode, unlike XTS. See the paper
"Adiantum: length-preserving encryption for entry-level processors"
(https://eprint.iacr.org/2018/720.pdf) for more details. Also see
commit
059c2a4d8e16 ("crypto: adiantum - add Adiantum support").
On sufficiently long messages, Adiantum's bottlenecks are XChaCha12 and
the NH hash function. These algorithms are fast even on processors
without dedicated crypto instructions. Adiantum makes it feasible to
enable storage encryption on low-end mobile devices that lack AES
instructions; currently such devices are unencrypted. On ARM Cortex-A7,
on 4096-byte messages Adiantum encryption is about 4 times faster than
AES-256-XTS encryption; decryption is about 5 times faster.
In fscrypt, Adiantum is suitable for encrypting both file contents and
names. With filenames, it fixes a known weakness: when two filenames in
a directory share a common prefix of >= 16 bytes, with CTS-CBC their
encrypted filenames share a common prefix too, leaking information.
Adiantum does not have this problem.
Since Adiantum also accepts long tweaks (IVs), it's also safe to use the
master key directly for Adiantum encryption rather than deriving
per-file keys, provided that the per-file nonce is included in the IVs
and the master key isn't used for any other encryption mode. This
configuration saves memory and improves performance. A new fscrypt
policy flag is added to allow users to opt-in to this configuration.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Theodore Ts'o <tytso@mit.edu>
Linus Torvalds [Sun, 6 Jan 2019 02:35:02 +0000 (18:35 -0800)]
Merge tag 'docs-5.0-fixes' of git://git.lwn.net/linux
Pull documentation fixes from Jonathan Corbet:
"A handful of late-arriving documentation fixes"
* tag 'docs-5.0-fixes' of git://git.lwn.net/linux:
doc: filesystems: fix bad references to nonexistent ext4.rst file
Documentation/admin-guide: update URL of LKML information link
Docs/kernel-api.rst: Remove blk-tag.c reference
Linus Torvalds [Sun, 6 Jan 2019 02:33:21 +0000 (18:33 -0800)]
Merge tag 'firewire-update' of git://git./linux/kernel/git/ieee1394/linux1394
Pull firewire fixlet from Stefan Richter:
"Remove an explicit dependency in Kconfig which is implied by another
dependency"
* tag 'firewire-update' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394:
firewire: Remove depends on HAS_DMA in case of platform dependency
Linus Torvalds [Sun, 6 Jan 2019 02:29:13 +0000 (18:29 -0800)]
Merge tag 'for-linus-
20190104' of git://git.kernel.dk/linux-block
Pull block updates and fixes from Jens Axboe:
- Pulled in MD changes that Shaohua had queued up for 4.21.
Unfortunately we lost Shaohua late 2018, I'm sending these in on his
behalf.
- In conjunction with the above, I added a CREDITS entry for Shaoua.
- sunvdc queue restart fix (Ming)
* tag 'for-linus-
20190104' of git://git.kernel.dk/linux-block:
Add CREDITS entry for Shaohua Li
block: sunvdc: don't run hw queue synchronously from irq context
md: fix raid10 hang issue caused by barrier
raid10: refactor common wait code from regular read/write request
md: remvoe redundant condition check
lib/raid6: add option to skip algo benchmarking
lib/raid6: sort algos in rough performance order
lib/raid6: check for assembler SSSE3 support
lib/raid6: avoid __attribute_const__ redefinition
lib/raid6: add missing include for raid6test
md: remove set but not used variable 'bi_rdev'
Linus Torvalds [Sun, 6 Jan 2019 02:25:19 +0000 (18:25 -0800)]
Merge tag 'drm-next-2019-01-05' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie:
"Happy New Year, just decloaking from leave to get some stuff from the
last week in before rc1:
core:
- two regression fixes for damage blob and atomic
i915 gvt:
- Some missed GVT fixes from the original pull
amdgpu:
- new PCI IDs
- SR-IOV fixes
- DC fixes
- Vega20 fixes"
* tag 'drm-next-2019-01-05' of git://anongit.freedesktop.org/drm/drm: (53 commits)
drm: Put damage blob when destroy plane state
drm: fix null pointer dereference on null state pointer
drm/amdgpu: Add new VegaM pci id
drm/ttm: Use drm_debug_printer for all ttm_bo_mem_space_debug output
drm/amdgpu: add Vega20 PSP ASD firmware loading
drm/amd/display: Fix MST dp_blank REG_WAIT timeout
drm/amd/display: validate extended dongle caps
drm/amd/display: Use div_u64 for flip timestamp ns to ms
drm/amdgpu/uvd:Change uvd ring name convention
drm/amd/powerplay: add Vega20 LCLK DPM level setting support
drm/amdgpu: print process info when job timeout
drm/amdgpu/nbio7.4: add hw bug workaround for vega20
drm/amdgpu/nbio6.1: add hw bug workaround for vega10/12
drm/amd/display: Optimize passive update planes.
drm/amd/display: verify lane status before exiting verify link cap
drm/amd/display: Fix bug with not updating VSP infoframe
drm/amd/display: Add retry to read ddc_clock pin
drm/amd/display: Don't skip link training for empty dongle
drm/amd/display: Wait edp HPD to high in detect_sink
drm/amd/display: fix surface update sequence
...
Linus Torvalds [Sun, 6 Jan 2019 02:20:51 +0000 (18:20 -0800)]
Merge tag 'for-linus' of git://git./linux/kernel/git/rdma/rdma
Pull rdma fixes from Jason Gunthorpe:
"Over the break a few defects were found, so this is a -rc style pull
request of various small things that have been posted.
- An attempt to shorten RCU grace period driven delays showed crashes
during heavier testing, and has been entirely reverted
- A missed merge/rebase error between the advise_mr and ib_device_ops
series
- Some small static analysis driven fixes from Julia and Aditya
- Missed ability to create a XRC_INI in the devx verbs interop
series"
* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma:
infiniband/qedr: Potential null ptr dereference of qp
infiniband: bnxt_re: qplib: Check the return value of send_message
IB/ipoib: drop useless LIST_HEAD
IB/core: Add advise_mr to the list of known ops
Revert "IB/mlx5: Fix long EEH recover time with NVMe offloads"
IB/mlx5: Allow XRC INI usage via verbs in DEVX context
Linus Torvalds [Sun, 6 Jan 2019 02:15:37 +0000 (18:15 -0800)]
Merge tag 'fbdev-v4.21' of git://github.com/bzolnier/linux
Pull fbdev updates from Bartlomiej Zolnierkiewicz:
"This time the pull request is really small.
The most notable changes are fixing fbcon to not cause crash on
unregister_framebuffer() operation when there is more than one
framebuffer, adding config option to center the bootup logo and making
FB_BACKLIGHT config option tristate (which in turn uncovered incorrect
FB_BACKLIGHT usage by DRM's nouveau driver).
Summary:
- fix fbcon to not cause crash on unregister_framebuffer() when there
is more than one framebuffer (Noralf Trønnes)
- improve support for small rotated displays (Peter Rosin)
- fix probe failure handling in udlfb driver (Dan Carpenter)
- add config option to center the bootup logo (Peter Rosin)
- make FB_BACKLIGHT config option tristate (Rob Clark)
- remove superfluous HAS_DMA dependency for goldfishfb driver (Geert
Uytterhoeven)
- misc fixes (Alexey Khoroshilov, YueHaibing, Colin Ian King, Lubomir
Rintel)
- misc cleanups (Yangtao Li, Wen Yang)
also there is DRM's nouveau driver fix for wrong FB_BACKLIGHT config
option usage (FB_BACKLIGHT is for internal fbdev subsystem use only)"
* tag 'fbdev-v4.21' of git://github.com/bzolnier/linux:
drm/nouveau: fix incorrect FB_BACKLIGHT usage in Kconfig
fbdev: fbcon: Fix unregister crash when more than one framebuffer
fbdev: Remove depends on HAS_DMA in case of platform dependency
pxa168fb: trivial typo fix
fbdev: fsl-diu: remove redundant null check on cmap
fbdev: omap2: omapfb: convert to DEFINE_SHOW_ATTRIBUTE
fbdev: uvesafb: fix spelling mistake "memoery" -> "memory"
fbdev: fbmem: add config option to center the bootup logo
fbdev: fbmem: make fb_show_logo_line return the end instead of the height
video: fbdev: pxafb: Fix "WARNING: invalid free of devm_ allocated data"
fbdev: fbmem: behave better with small rotated displays and many CPUs
video: clps711x-fb: release disp device node in probe()
fbdev: make FB_BACKLIGHT a tristate
udlfb: fix some inconsistent NULL checking
Linus Torvalds [Sun, 6 Jan 2019 02:13:35 +0000 (18:13 -0800)]
Merge branch 'i2c/for-5.0' of git://git./linux/kernel/git/wsa/linux
Pull i2c updates from Wolfram Sang:
"I2C has only driver updates for you this time.
Mostly new IDs/DT compatibles, also SPDX conversions, small cleanups.
STM32F7 got FastMode+ and PM support, Axxia some reliabilty
improvements"
* 'i2c/for-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (26 commits)
i2c: Add Actions Semiconductor Owl family S700 I2C support
dt-bindings: i2c: Add S700 support for Actions Semi Soc's
i2c: ismt: Add support for Intel Cedar Fork
i2c: tegra: Switch to SPDX identifier
i2c: tegra: Add missing kerneldoc for some fields
i2c: tegra: Cleanup kerneldoc comments
i2c: axxia: support sequence command mode
dt-bindings: i2c: rcar: Add r8a774c0 support
dt-bindings: i2c: sh_mobile: Add r8a774c0 support
i2c: sh_mobile: Add support for r8a774c0 (RZ/G2E)
i2c: i2c-cros-ec-tunnel: Switch to SPDX identifier.
i2c: powermac: Use of_node_name_eq for node name comparisons
i2c-axxia: check for error conditions first
i2c-axxia: dedicated function to set client addr
dt-bindings: i2c: Use correct vendor prefix for Atmel
i2c: tegra: replace spin_lock_irqsave with spin_lock in ISR
eeprom: at24: add support for
24c2048
dt-bindings: eeprom: at24: add "atmel,
24c2048" compatible string
i2c: i2c-stm32f7: add PM Runtime support
i2c: sh_mobile: add support for r8a77990 (R-Car E3)
...
Linus Torvalds [Sun, 6 Jan 2019 01:57:34 +0000 (17:57 -0800)]
Merge tag 'pci-v4.21-changes' of git://git./linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
- Remove unused lists from ASPM pcie_link_state (Frederick Lawler)
- Fix Broadcom CNB20LE host bridge unintended sign extension (Colin Ian
King)
- Expand Kconfig "PF" acronyms (Randy Dunlap)
- Update MAINTAINERS for arch/x86/kernel/early-quirks.c (Bjorn Helgaas)
- Add missing include to drivers/pci.h (Alexandru Gagniuc)
- Override Synopsys USB 3.x HAPS device class so dwc3-haps can claim it
instead of xhci (Thinh Nguyen)
- Clean up P2PDMA documentation (Randy Dunlap)
- Allow runtime PM even if driver doesn't supply callbacks (Jarkko
Nikula)
- Remove status check after submitting Switchtec MRPC Firmware Download
commands to avoid Completion Timeouts (Kelvin Cao)
- Set Switchtec coherent DMA mask to allow 64-bit DMA (Boris Glimcher)
- Fix Switchtec SWITCHTEC_IOCTL_EVENT_IDX_ALL flag overwrite issue
(Joey Zhang)
- Enable write combining for Switchtec MRPC Input buffers (Kelvin Cao)
- Add Switchtec MRPC DMA mode support (Wesley Sheng)
- Skip VF scanning on powerpc, which does this in firmware (Sebastian
Ott)
- Add Amlogic Meson PCIe controller driver and DT bindings (Yue Wang)
- Constify histb dw_pcie_host_ops structure (Julia Lawall)
- Support multiple power domains for imx6 (Leonard Crestez)
- Constify layerscape driver data (Stefan Agner)
- Update imx6 Kconfig to allow imx6 PCIe in imx7 kernel (Trent Piepho)
- Support armada8k GPIO reset (Baruch Siach)
- Support suspend/resume support on imx6 (Leonard Crestez)
- Don't hard-code DesignWare DBI/ATU offst (Stephen Warren)
- Skip i.MX6 PHY setup on i.MX7D (Andrey Smirnov)
- Remove Jianguo Sun from HiSilicon STB maintainers (Lorenzo Pieralisi)
- Mask DesignWare interrupts instead of disabling them to avoid lost
interrupts (Marc Zyngier)
- Add locking when acking DesignWare interrupts (Marc Zyngier)
- Ack DesignWare interrupts in the proper callbacks (Marc Zyngier)
- Use devm resource parser in mediatek (Honghui Zhang)
- Remove unused mediatek "num-lanes" DT property (Honghui Zhang)
- Add UniPhier PCIe controller driver and DT bindings (Kunihiko
Hayashi)
- Enable MSI for imx6 downstream components (Richard Zhu)
* tag 'pci-v4.21-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (40 commits)
PCI: imx: Enable MSI from downstream components
s390/pci: skip VF scanning
PCI/IOV: Add flag so platforms can skip VF scanning
PCI/IOV: Factor out sriov_add_vfs()
PCI: uniphier: Add UniPhier PCIe host controller support
dt-bindings: PCI: Add UniPhier PCIe host controller description
PCI: amlogic: Add the Amlogic Meson PCIe controller driver
dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller
arm64: dts: mt7622: Remove un-used property for PCIe
arm: dts: mt7623: Remove un-used property for PCIe
dt-bindings: PCI: MediaTek: Remove un-used property
PCI: mediatek: Remove un-used variant in struct mtk_pcie_port
MAINTAINERS: Remove Jianguo Sun from HiSilicon STB DWC entry
PCI: dwc: Don't hard-code DBI/ATU offset
PCI: imx: Add imx6sx suspend/resume support
PCI: armada8k: Add support for gpio controlled reset signal
PCI: dwc: Adjust Kconfig to allow IMX6 PCIe host on IMX7
PCI: dwc: layerscape: Constify driver data
PCI: imx: Add multi-pd support
PCI: Override Synopsys USB 3.x HAPS device class
...
Linus Torvalds [Sun, 6 Jan 2019 01:53:40 +0000 (17:53 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/hid/hid
Pull HID updates from Jiri Kosina:
- high-resolution scrolling support that gracefully handles differences
between MS and Logitech implementations in HW, from Peter Hutterer
and Harry Cutts
- MSI IRQ support for intel-ish driver, from Song Hongyan
- support for new hardware (Cougar 700K, Odys Winbook 13, ASUS FX503VD,
ASUS T101HA) from Daniel M. Lambea, Hans de Goede and Aleix Roca
Nonell
- other small assorted fixups
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid: (22 commits)
HID: i2c-hid: Add Odys Winbook 13 to descriptor override
HID: lenovo: Add checks to fix of_led_classdev_register
HID: intel-ish-hid: add MSI interrupt support
HID: debug: Change to use DEFINE_SHOW_ATTRIBUTE macro
HID: doc: fix wrong data structure reference for UHID_OUTPUT
HID: intel-ish-hid: fixes incorrect error handling
HID: asus: Add support for the ASUS T101HA keyboard dock
HID: logitech: Use LDJ_DEVICE macro for existing Logitech mice
HID: logitech: Enable high-resolution scrolling on Logitech mice
HID: logitech: Add function to enable HID++ 1.0 "scrolling acceleration"
HID: logitech-hidpp: fix typo, hiddpp to hidpp
HID: input: use the Resolution Multiplier for high-resolution scrolling
HID: core: process the Resolution Multiplier
HID: core: store the collections as a basic tree
Input: add `REL_WHEEL_HI_RES` and `REL_HWHEEL_HI_RES`
HID: input: support Microsoft wireless radio control hotkey
HID: use macros in IS_INPUT_APPLICATION
HID: asus: Add support for the ASUS FX503VD laptop
HID: asus: Add event handler to catch unmapped Asus Vendor UsagePage codes
HID: cougar: Add support for Cougar 700K Gaming Keyboard
...
Linus Torvalds [Sun, 6 Jan 2019 01:51:36 +0000 (17:51 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/jikos/livepatching
Pull livepatch update from Jiri Kosina:
"Return value checking fixup in livepatching samples, from Nicholas Mc
Guire"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/livepatching:
livepatch: check kzalloc return values
Masahiro Yamada [Sat, 5 Jan 2019 03:01:51 +0000 (12:01 +0900)]
kconfig: rename generated .*conf-cfg to *conf-cfg
Remove the dot-prefixing since it is just a matter of the
.gitignore file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 3 Jan 2019 01:47:05 +0000 (10:47 +0900)]
kbuild: remove unnecessary stubs for archheader and archscripts
Make simply skips a missing rule when it is marked as .PHONY.
Remove the dummy targets.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 3 Jan 2019 01:16:54 +0000 (10:16 +0900)]
kbuild: use assignment instead of define ... endef for filechk_* rules
You do not have to use define ... endef for filechk_* rules.
For simple cases, the use of assignment looks cleaner, IMHO.
I updated the usage for scripts/Kbuild.include in case somebody
misunderstands the 'define ... endif' is the requirement.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Masahiro Yamada [Thu, 3 Jan 2019 01:10:39 +0000 (10:10 +0900)]
arch: remove redundant UAPI generic-y defines
Now that Kbuild automatically creates asm-generic wrappers for missing
mandatory headers, it is redundant to list the same headers in
generic-y and mandatory-y.
Suggested-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Masahiro Yamada [Thu, 3 Jan 2019 01:10:38 +0000 (10:10 +0900)]
kbuild: generate asm-generic wrappers if mandatory headers are missing
Some time ago, Sam pointed out a certain degree of overwrap between
generic-y and mandatory-y. (https://lkml.org/lkml/2017/7/10/121)
I tweaked the meaning of mandatory-y a little bit; now it defines the
minimum set of ASM headers that all architectures must have.
If arch does not have specific implementation of a mandatory header,
Kbuild will let it fallback to the asm-generic one by automatically
generating a wrapper. This will allow to drop lots of redundant
generic-y defines.
Previously, "mandatory" was used in the context of UAPI, but I guess
this can be extended to kernel space ASM headers.
Suggested-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Masahiro Yamada [Thu, 3 Jan 2019 01:10:37 +0000 (10:10 +0900)]
arch: remove stale comments "UAPI Header export list"
These comments are leftovers of commit
fcc8487d477a ("uapi: export all
headers under uapi directories").
Prior to that commit, exported headers must be explicitly added to
header-y. Now, all headers under the uapi/ directories are exported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 3 Jan 2019 01:10:36 +0000 (10:10 +0900)]
riscv: remove redundant kernel-space generic-y
This commit removes redundant generic-y defines in
arch/riscv/include/asm/Kbuild.
[1] It is redundant to define the same generic-y in both
arch/$(ARCH)/include/asm/Kbuild and
arch/$(ARCH)/include/uapi/asm/Kbuild.
Remove the following generic-y:
errno.h
fcntl.h
ioctl.h
ioctls.h
ipcbuf.h
mman.h
msgbuf.h
param.h
poll.h
posix_types.h
resource.h
sembuf.h
setup.h
shmbuf.h
signal.h
socket.h
sockios.h
stat.h
statfs.h
swab.h
termbits.h
termios.h
types.h
[2] It is redundant to define generic-y when arch-specific
implementation exists in arch/$(ARCH)/include/asm/*.h
Remove the following generic-y:
cacheflush.h
module.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 31 Dec 2018 08:24:09 +0000 (17:24 +0900)]
kbuild: change filechk to surround the given command with { }
filechk_* rules often consist of multiple 'echo' lines. They must be
surrounded with { } or ( ) to work correctly. Otherwise, only the
string from the last 'echo' would be written into the target.
Let's take care of that in the 'filechk' in scripts/Kbuild.include
to clean up filechk_* rules.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 31 Dec 2018 08:24:08 +0000 (17:24 +0900)]
kbuild: remove redundant target cleaning on failure
Since commit
9c2af1c7377a ("kbuild: add .DELETE_ON_ERROR special
target"), the target file is automatically deleted on failure.
The boilerplate code
... || { rm -f $@; false; }
is unneeded.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 31 Dec 2018 04:09:00 +0000 (13:09 +0900)]
kbuild: clean up rule_dtc_dt_yaml
Commit
3a2429e1faf4 ("kbuild: change if_changed_rule for multi-line
recipe") and commit
4f0e3a57d6eb ("kbuild: Add support for DT binding
schema checks") came in via different sub-systems.
This is a follow-up cleanup.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 31 Dec 2018 01:05:01 +0000 (10:05 +0900)]
kbuild: remove UIMAGE_IN and UIMAGE_OUT
The only/last user of UIMAGE_IN/OUT was removed by commit
4722a3e6b716
("microblaze: fix multiple bugs in arch/microblaze/boot/Makefile").
The input and output should always be $< and $@.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 30 Dec 2018 15:14:15 +0000 (00:14 +0900)]
jump_label: move 'asm goto' support test to Kconfig
Currently, CONFIG_JUMP_LABEL just means "I _want_ to use jump label".
The jump label is controlled by HAVE_JUMP_LABEL, which is defined
like this:
#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_JUMP_LABEL)
# define HAVE_JUMP_LABEL
#endif
We can improve this by testing 'asm goto' support in Kconfig, then
make JUMP_LABEL depend on CC_HAS_ASM_GOTO.
Ugly #ifdef HAVE_JUMP_LABEL will go away, and CONFIG_JUMP_LABEL will
match to the real kernel capability.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Mathias Krause [Sun, 30 Dec 2018 12:36:00 +0000 (13:36 +0100)]
kallsyms: lower alignment on ARM
As mentioned in the info pages of gas, the '.align' pseudo op's
interpretation of the alignment value is architecture specific.
It might either be a byte value or taken to the power of two.
On ARM it's actually the latter which leads to unnecessary large
alignments of 16 bytes for 32 bit builds or 256 bytes for 64 bit
builds.
Fix this by switching to '.balign' instead which is consistent
across all architectures.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Julia Lawall [Sat, 29 Dec 2018 06:14:16 +0000 (07:14 +0100)]
scripts: coccinelle: boolinit: drop warnings on named constants
Coccinelle doesn't always have access to the values of named
(#define) constants, and they may likely often be bound to true
and false values anyway, resulting in false positives. So stop
warning about them.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>