openwrt/staging/blogic.git
9 years agoMIPS: mipsregs.h: Reindent CP0 Cause macros
Maciej W. Rozycki [Fri, 3 Apr 2015 22:23:56 +0000 (23:23 +0100)]
MIPS: mipsregs.h: Reindent CP0 Cause macros

Reindent CP0 Cause macros for a single space after #define, leaving
extra indentation for individual Interrupt Pending bits as with CP0
Status register's Interrupt Mask bits.

[ralf@linux-mips.org: Fix conflict.]
[ralf@linux-mips.org: Fix indentation of the CAUSEB_FDCI and CAUSEF_FDCI
definitions.]

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9669/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mipsregs.h: Move TX39 macros out of the way
Maciej W. Rozycki [Fri, 3 Apr 2015 22:23:50 +0000 (23:23 +0100)]
MIPS: mipsregs.h: Move TX39 macros out of the way

TX39 CP0 Configuration Register 3 macro definitions have been randomly
thrown in the middle of a block of CP0 Status register value macros.
Move them to the end of the whole CP0 register value macro block,
complementing the location of the TX39 Cache register name macro at the
end of the CP0 register name macro block.

[ralf@linux-mips.org: Fix conflict.]

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mipsregs.h: Reorder CP1 macro definitions
Maciej W. Rozycki [Fri, 3 Apr 2015 22:23:46 +0000 (23:23 +0100)]
MIPS: mipsregs.h: Reorder CP1 macro definitions

Originally CP1 macros were placed between CP0 register name macros and
CP0 register value macros.  As changes were applied to the header the
position of CP1 macros gradually has become more and more arbitrary and
two separate blocks were created.  This may only cause confusion.

Move them out of the way then and place together after all the CP0
macros.  No semantic change.

[ralf@linux-mips.org: Fix conflict.]

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9667/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mipsregs.h: Remove broken comments
Maciej W. Rozycki [Fri, 3 Apr 2015 22:23:41 +0000 (23:23 +0100)]
MIPS: mipsregs.h: Remove broken comments

Remove a duplicate FPU Status Register reference that has been there
since forever and a mistakenly copied and pasted R4xx0 manual reference.

[ralf@linux-mips.org: Fix conflict.]

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9666/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoDOC: kernel-parameters.txt: Mark `nofpu' for MIPS too
Maciej W. Rozycki [Fri, 3 Apr 2015 22:23:34 +0000 (23:23 +0100)]
DOC: kernel-parameters.txt: Mark `nofpu' for MIPS too

The MIPS port has supported this option since forever, long before SH
was even in plans.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9665/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Combine all platform device registrations in one file.
Ralf Baechle [Thu, 2 Apr 2015 15:07:26 +0000 (17:07 +0200)]
MIPS: SEAD3: Combine all platform device registrations in one file.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Make static in sead3-ehci what can be made static.
Ralf Baechle [Thu, 2 Apr 2015 14:37:00 +0000 (16:37 +0200)]
MIPS: SEAD3: Make static in sead3-ehci what can be made static.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: sead3-ehci should not be a module.
Ralf Baechle [Thu, 2 Apr 2015 14:26:32 +0000 (16:26 +0200)]
MIPS: SEAD3: sead3-ehci should not be a module.

So let's remove everythig that only make sense for a kernel module and
build the thing unconditionally.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: sead3-platform is not a module.
Ralf Baechle [Thu, 2 Apr 2015 14:20:04 +0000 (16:20 +0200)]
MIPS: SEAD3: sead3-platform is not a module.

So let's remove everything that only makes sense for kernel modules.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: sead3-net is not a module.
Ralf Baechle [Thu, 2 Apr 2015 14:19:29 +0000 (16:19 +0200)]
MIPS: SEAD3: sead3-net is not a module.

So let's remove everything that only makes sense for kernel modules.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47xx: Move filling most of SPROM to the generic function
Rafał Miłecki [Thu, 2 Apr 2015 10:30:24 +0000 (12:30 +0200)]
MIPS: BCM47xx: Move filling most of SPROM to the generic function

This simplifies code a lot by dropping many per-revision-group
functions. There are still some paths left that use uncommon NVRAM read
helpers or fill arrays. They will need to be handled in separated patch.

I've tested this (by printing SPROM content) for regressions on:
1) BCM4704 (SPROM revision 2)
2) BCM4706 (SPROM revision 8 plus 11 & 9 on extra WiFi cards)
The only difference is not reading board_type from SPROM rev 11 which is
unsupported and treated as rev 1. This change for rev 1 is expected.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9660/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47xx: Add generic function filling SPROM entries
Rafał Miłecki [Thu, 2 Apr 2015 07:13:49 +0000 (09:13 +0200)]
MIPS: BCM47xx: Add generic function filling SPROM entries

Handling many SPROM revisions became messy, we have tons of functions
specific to various revision groups which are quite hard to track.
For years there is yet another revision 11 asking for support, but
adding it in current the form would make things even worse.
To resolve this problem let's add new function with table-like entries
that will contain revision bitmask for every SPROM variable.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9659/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Reduce kernel image size for !CONFIG_DEBUG_ZBOOT
Wu Zhangjin [Sat, 25 Dec 2010 15:11:49 +0000 (23:11 +0800)]
MIPS: Reduce kernel image size for !CONFIG_DEBUG_ZBOOT

!CONFIG_DEBUG_ZBOOT doesn't need puts() and puthex(), remove them and
the corrospindig strings for !CONFIG_DEBUG_ZBOOT, as a result, it saves
about 1280 bytes.

[ralf@linux-mips.org: Resolved reject.]

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/1898/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47xx: Devices database update for 4.1 (or 4.2?)
Rafał Miłecki [Wed, 1 Apr 2015 16:18:02 +0000 (18:18 +0200)]
MIPS: BCM47xx: Devices database update for 4.1 (or 4.2?)

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/9656/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47xx: Keep ID entries for non-standard devices together
Rafał Miłecki [Wed, 1 Apr 2015 16:18:01 +0000 (18:18 +0200)]
MIPS: BCM47xx: Keep ID entries for non-standard devices together

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/9655/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: AR7: Replace mac address parsing
Daniel Walter [Tue, 24 Jun 2014 15:39:59 +0000 (16:39 +0100)]
MIPS: AR7: Replace mac address parsing

Replace sscanf() with mac_pton().

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Daniel Walter <dwalter@google.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7151/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Lasat: Remove unused function from sysctl code.
Rickard Strandqvist [Thu, 1 Jan 2015 16:48:23 +0000 (17:48 +0100)]
MIPS: Lasat: Remove unused function from sysctl code.

Remove the function proc_dolasatint() that is not used anywhere.

This was partially found by using a static code analysis program called cppcheck.

Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47XX: Don't try guessing NVRAM size on MTD partition
Rafał Miłecki [Wed, 1 Apr 2015 06:23:05 +0000 (08:23 +0200)]
MIPS: BCM47XX: Don't try guessing NVRAM size on MTD partition

When dealing with whole flash content (bcm47xx_nvram_init_from_mem) we
need to find NVRAM start trying various partition sizes (nvram_sizes).
This is not needed when using MTD as we have direct partition access.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/9652/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47XX: Increase NVRAM buffer size to 64 KiB
Rafał Miłecki [Wed, 1 Apr 2015 06:23:04 +0000 (08:23 +0200)]
MIPS: BCM47XX: Increase NVRAM buffer size to 64 KiB

For years Broadcom devices use 64 KiB NVRAM partition size and some of
them indeed have it filled in more than 50%. This change allows reading
whole NVRAM e.g. on Netgear WNDR4500 and Netgear R8000.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/9651/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47XX: Include io.h directly and fix brace indent
Rafał Miłecki [Wed, 1 Apr 2015 06:23:03 +0000 (08:23 +0200)]
MIPS: BCM47XX: Include io.h directly and fix brace indent

We use IO functions like readl & ioremap_nocache, so include linux/io.h

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: https://patchwork.linux-mips.org/patch/9650/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: c-r4k.c: Fix the 74K D-cache alias erratum workaround
Maciej W. Rozycki [Sun, 16 Nov 2014 01:02:29 +0000 (01:02 +0000)]
MIPS: c-r4k.c: Fix the 74K D-cache alias erratum workaround

Fix the 74K D-cache alias erratum workaround so that it actually works.
Our current code sets MIPS_CACHE_VTAG for the D-cache, but that flag
only has any effect for the I-cache.  Additionally MIPS_CACHE_PINDEX is
set for the D-cache if CP0.Config7.AR is also set for an affected
processor, leading to confusing information in the bootstrap log (the
flag isn't used beyond that).

So delete the setting of MIPS_CACHE_VTAG and rely on MIPS_CACHE_ALIASES,
set in a common place, removing I-cache coherency issues seen in GDB
testing with software breakpoints, gdbserver and ptrace(2), on affected
systems.

While at it add a little piece of explanation of what CP0.Config6.SYND
is so that people do not have to chase documentation.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8507/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Remove prototype for copy_user_page
Guenter Roeck [Wed, 11 Feb 2015 21:27:19 +0000 (13:27 -0800)]
MIPS: Remove prototype for copy_user_page

MIPS architecture code does not provide copy_user_page,
so it should not provide a prototype for it either.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9266/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Loongson-3: Add chipset ACPI platform driver
Huacai Chen [Sun, 29 Mar 2015 02:54:10 +0000 (10:54 +0800)]
MIPS: Loongson-3: Add chipset ACPI platform driver

This add south-bridge (SB700/SB710/SB800 chipset) ACPI platform driver
for Loongson-3. This will be used by EC (Embedded Controller, used by
laptops) driver and STR (Suspend To RAM).

[ralf@linux-mips.org: Fix build error if !CONFIG_CPU_LOONGSON3.  Build
doesn't like it if no obj-* variable is defined at all in a Makefile.
Obviously this has not been tested on other platforms.]

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9619/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Loongson-3: Add CPU Hwmon platform driver
Huacai Chen [Sun, 29 Mar 2015 02:54:09 +0000 (10:54 +0800)]
MIPS: Loongson-3: Add CPU Hwmon platform driver

This add CPU Hwmon (temperature sensor) platform driver for Loongson-3.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9617/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: perf: Add hardware perf events support for Loongson-3
Huacai Chen [Sun, 29 Mar 2015 02:54:08 +0000 (10:54 +0800)]
MIPS: perf: Add hardware perf events support for Loongson-3

This patch enable hardware performance counter support for Loongson-3's
perf events.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller
Joshua Kinard [Mon, 19 Jan 2015 09:19:20 +0000 (04:19 -0500)]
MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller

On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI
buses attached to the Xtalk bus.  The current code will stop counting PCI buses
after it finds the first one.  If one installs the optional PCI cardcage
("shoebox") into these systems, because of the order of the Xtalk widgets, the
current PCI code will find the cardcage first, and fail to detect the BaseIO
PCI devices, which are on a higher Xtalk widget ID.

This patch adds the hooks needed for resolving this issue in the IP27 PCI code
(in a later patch).

Verified on both an SGI Onyx2 and an SGI Octane.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Cc: Linux MIPS List <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9074/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Use bool function return values of true/false not 1/0
Joe Perches [Mon, 30 Mar 2015 23:46:03 +0000 (16:46 -0700)]
MIPS: Use bool function return values of true/false not 1/0

Use the normal return values for bool functions

Signed-off-by: Joe Perches <joe@perches.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9640/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Octeon: Fix to IP checksum offloading in Little Endian
Paul Martin [Mon, 30 Mar 2015 16:01:01 +0000 (17:01 +0100)]
MIPS: Octeon: Fix to IP checksum offloading in Little Endian

When hardware checksum generation is switched on the checksum
generation was only being signalled to the hardware correctly
in Big Endian mode.

Signed-off-by: Paul Martin <paul.martin@codethink.co.uk>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Octeon: Make octeon-md5 driver endian-agnostic
Paul Martin [Mon, 30 Mar 2015 16:01:00 +0000 (17:01 +0100)]
MIPS: Octeon: Make octeon-md5 driver endian-agnostic

The octeon crypto co-processor expects values to be big endian.
Wrap the data transfers with cpu_to_be64() and be64_to_cpu()
transformations.

This passes for all the MD5 test vectors in crypto/testmgr.h

Signed-off-by: Paul Martin <paul.martin@codethink.co.uk>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9631/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Octeon: Set up ethernet hardware for little endian
Paul Martin [Mon, 30 Mar 2015 16:00:59 +0000 (17:00 +0100)]
MIPS: Octeon: Set up ethernet hardware for little endian

Signed-off-by: Paul Martin <paul.martin@codethink.co.uk>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9635/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Octeon: Reverse the order of register accesses to the FAU
Paul Martin [Mon, 30 Mar 2015 16:00:58 +0000 (17:00 +0100)]
MIPS: Octeon: Reverse the order of register accesses to the FAU

64 bit access is unaffected but for 32 bit access, swap high and
low words.  Similarly for 16 bit access, reverse the order of the
four possible words, and for 8 bit access reverse the order of byte
accesses.

Signed-off-by: Paul Martin <paul.martin@codethink.co.uk>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9630/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Octeon: Set appropriate endianness in L2C registers
Paul Martin [Mon, 30 Mar 2015 16:00:57 +0000 (17:00 +0100)]
MIPS: Octeon: Set appropriate endianness in L2C registers

Signed-off-by: Paul Martin <paul.martin@codethink.co.uk>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9629/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Octeon: Turn hardware bitfields and structures inside out.
Paul Martin [Mon, 30 Mar 2015 16:00:56 +0000 (17:00 +0100)]
MIPS: Octeon: Turn hardware bitfields and structures inside out.

Although the proper way to do this for bitfields would be to use
the macro that Ralf has provided, this is a little easier to
understand as a diff.

Signed-off-by: Paul Martin <paul.martin@codethink.co.uk>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9628/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: IP32: ip32-platform is not a module.
Ralf Baechle [Mon, 30 Mar 2015 21:02:51 +0000 (23:02 +0200)]
MIPS: IP32: ip32-platform is not a module.

So let's remove everything that only makes sense for kernel modules.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add R16000 detection
Joshua Kinard [Wed, 21 Jan 2015 12:59:45 +0000 (07:59 -0500)]
MIPS: Add R16000 detection

This allows the kernel to correctly detect an R16000 MIPS CPU on systems that
have those.  Otherwise, such systems will detect the CPU as an R14000, due to
similarities in the CPU PRId value.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Cc: Linux MIPS List <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9092/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoCLOCKSOURCE: mips-gic: Allow GIC clock to be specified in device-tree
Andrew Bresticker [Tue, 24 Feb 2015 02:28:34 +0000 (18:28 -0800)]
CLOCKSOURCE: mips-gic: Allow GIC clock to be specified in device-tree

As an alternative to the "clock-frequency" property, allow the GIC
timer operating clock to be specified in the device-tree instead.
This is useful on systems which use common clock or where the GIC
is not fixed to a particular frequency and is instead, for example,
derived from the CPU clock.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9309/

9 years agoMIPS: csum_partial: Improve instruction parallelism.
Chen Jie [Thu, 26 Mar 2015 17:07:24 +0000 (01:07 +0800)]
MIPS: csum_partial: Improve instruction parallelism.

Computing sum introduces true data dependency. This patch removes some
true data depdendencies, hence increases instruction level parallelism.

This patch brings up to 50% csum performance gain on Loongson 3a.

One example about how this patch works is in CSUM_BIGCHUNK1:
// ** original **    vs    ** patch applied **
    ADDC(sum, t0)           ADDC(t0, t1)
    ADDC(sum, t1)           ADDC(t2, t3)
    ADDC(sum, t2)           ADDC(sum, t0)
    ADDC(sum, t3)           ADDC(sum, t2)

In the original implementation, each ADDC(sum, ...) depends on the sum
value updated by previous ADDC(as source operand).

With this patch applied, the first two ADDC operations are independent,
hence can be executed simultaneously if possible.

Another example is in the "copy and sum calculating chunk":
// ** original **    vs    ** patch applied **
    STORE(t0, UNIT(0) ...   STORE(t0, UNIT(0) ...
    ADDC(sum, t0)           ADDC(t0, t1)
    STORE(t1, UNIT(1) ...   STORE(t1, UNIT(1) ...
    ADDC(sum, t1)           ADDC(sum, t0)
    STORE(t2, UNIT(2) ...   STORE(t2, UNIT(2) ...
    ADDC(sum, t2)           ADDC(t2, t3)
    STORE(t3, UNIT(3) ...   STORE(t3, UNIT(3) ...
    ADDC(sum, t3)           ADDC(sum, t2)

With this patch applied, ADDC and the **next next** ADDC are independent.

Signed-off-by: chenj <chenj@lemote.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9608/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47XX: Fix coding style to match kernel standards
Rafał Miłecki [Wed, 10 Dec 2014 16:38:26 +0000 (17:38 +0100)]
MIPS: BCM47XX: Fix coding style to match kernel standards

[ralf@linux-mips.org: Fixed conflicts.]

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Cc: Paul Walmsley <paul@pwsan.com>
Patchwork: https://patchwork.linux-mips.org/patch/8665/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: OCTEON: add GPIO LED support for DSR-1000N
Aaro Koskinen [Sun, 29 Mar 2015 21:04:56 +0000 (00:04 +0300)]
MIPS: OCTEON: add GPIO LED support for DSR-1000N

DSR-1000N board has two GPIO LEDs next to USB ports. Add support for them.

[ralf@linux-mips.org: Resolved conflict due to the moving of the DTS files
into vendor subdirectories.]

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9624/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Hibernate: Restructure files and functions
Huacai Chen [Sun, 29 Mar 2015 02:54:06 +0000 (10:54 +0800)]
MIPS: Hibernate: Restructure files and functions

This patch has no functional changes, it just to keep the assembler
code to a minimum. Files and functions naming is borrowed from X86.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/9616/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Hibernate: flush TLB entries earlier
Huacai Chen [Sun, 29 Mar 2015 02:54:05 +0000 (10:54 +0800)]
MIPS: Hibernate: flush TLB entries earlier

We found that TLB mismatch not only happens after kernel resume, but
also happens during snapshot restore. So move it to the beginning of
swsusp_arch_suspend().

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: <stable@vger.kernel.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9621/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Nuke remaining I2C bits.
Ralf Baechle [Sun, 29 Mar 2015 20:09:02 +0000 (22:09 +0200)]
MIPS: SEAD3: Nuke remaining I2C bits.

With no I2C driver available, keeping the platform device registration
makes no sense just as keeping the code to instantiage the I2C devices.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Nuke I2C driver that never was wired up in Makefile.
Ralf Baechle [Sun, 29 Mar 2015 20:06:51 +0000 (22:06 +0200)]
MIPS: SEAD3: Nuke I2C driver that never was wired up in Makefile.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Use symbolic addresses from sead-addr.h in I2C driver.
Ralf Baechle [Sun, 29 Mar 2015 14:06:03 +0000 (16:06 +0200)]
MIPS: SEAD3: Use symbolic addresses from sead-addr.h in I2C driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Use symbolic addresses from sead-addr.h in LED driver.
Ralf Baechle [Fri, 27 Mar 2015 22:50:58 +0000 (23:50 +0100)]
MIPS: SEAD3: Use symbolic addresses from sead-addr.h in LED driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: New header file sead3-addr.h with hardware addresses.
Ralf Baechle [Fri, 27 Mar 2015 22:47:59 +0000 (23:47 +0100)]
MIPS: SEAD3: New header file sead3-addr.h with hardware addresses.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Get rid of DRVNAME from LED driver for readability.
Ralf Baechle [Fri, 27 Mar 2015 20:57:36 +0000 (21:57 +0100)]
MIPS: SEAD3: Get rid of DRVNAME from LED driver for readability.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Get rid of useless pr_debug calls in the LED driver.
Ralf Baechle [Fri, 27 Mar 2015 20:56:01 +0000 (21:56 +0100)]
MIPS: SEAD3: Get rid of useless pr_debug calls in the LED driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Convert I2C driver to module_platform_driver.
Ralf Baechle [Fri, 27 Mar 2015 20:47:42 +0000 (21:47 +0100)]
MIPS: SEAD3: Convert I2C driver to module_platform_driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Convert LED driver to module_platform_driver.
Ralf Baechle [Fri, 27 Mar 2015 20:47:01 +0000 (21:47 +0100)]
MIPS: SEAD3: Convert LED driver to module_platform_driver.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: SEAD3: Collect LED platform device registration in a single file.
Ralf Baechle [Thu, 23 Oct 2014 23:32:25 +0000 (01:32 +0200)]
MIPS: SEAD3: Collect LED platform device registration in a single file.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Bryan Wu <cooloney@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: linux-leds@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8203/

9 years agoMIPS: BMIPS: restrict DTB selection to BMIPS_GENERIC
Florian Fainelli [Thu, 26 Mar 2015 04:55:15 +0000 (21:55 -0700)]
MIPS: BMIPS: restrict DTB selection to BMIPS_GENERIC

Since we are always sourcing arch/mips/bmips/Kconfig and there is no
dependency on BMIPS_GENERIC, we will offer building BMIPS-related DTBs
while this is not relevant for the other MIPS platforms.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jaedon.shin@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/9603/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BMIPS: Flush the readahead cache after DMA.
Ralf Baechle [Fri, 27 Mar 2015 14:17:31 +0000 (15:17 +0100)]
MIPS: BMIPS: Flush the readahead cache after DMA.

BMIPS 3300/435x/438x CPUs have a readahead cache that is separate from
the L1/L2.  During a DMA operation, accesses adjacent to a DMA buffer
may cause parts of the DMA buffer to be prefetched into the RAC.  To
avoid possible coherency problems, flush the RAC upon DMA completion.

Derived from Kevin Cernekee's https://patchwork.linux-mips.org/patch/9602/.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: DMA: Implement platform hook to perform post-DMA cache flushes.
Ralf Baechle [Fri, 27 Mar 2015 14:10:30 +0000 (15:10 +0100)]
MIPS: DMA: Implement platform hook to perform post-DMA cache flushes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ath25: Remove unused DMA helper functions.
Ralf Baechle [Fri, 27 Mar 2015 12:11:51 +0000 (13:11 +0100)]
MIPS: ath25: Remove unused DMA helper functions.

These got merged with the ath25 support after 4e7f72660c39 (MIPS: Remove
unnecessary platform dma helper functions) had already removed them for
all other platforms.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Loongson-3: remove deprecated IRQF_DISABLED
Michael Opdenacker [Fri, 27 Mar 2015 01:33:41 +0000 (18:33 -0700)]
MIPS: Loongson-3: remove deprecated IRQF_DISABLED

This removes the use of the IRQF_DISABLED flag
from arch/mips/loongson/loongson-3/hpet.c

It's a NOOP since 2.6.35.

Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
Cc: chenhc@lemote.com
Cc: taohl@lemote.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9609/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47xx: Move NVRAM header to the include/linux/.
Rafał Miłecki [Mon, 1 Dec 2014 06:58:18 +0000 (07:58 +0100)]
MIPS: BCM47xx: Move NVRAM header to the include/linux/.

There are two reasons for having this header in the common place:
1) Simplifying drivers that read NVRAM entries. We will be able to
   safely call bcm47xx_nvram_* functions without #ifdef-s.
2) Getting NVRAM driver out of MIPS arch code. This is needed to support
   BCM5301X arch which also requires this NVRAM driver. Patch for that
   will follow once we get is reviewed.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: linux-soc@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8619/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Expand __swp_offset() to carry 40 significant bits for 64-bit kernel.
David Daney [Tue, 24 Feb 2015 23:35:34 +0000 (15:35 -0800)]
MIPS: Expand __swp_offset() to carry 40 significant bits for 64-bit kernel.

With CONFIG_MIGRATION, the PFN of the migrating pages is stored in
__swp_offset(), so we must have enough bits to store the largest
possible PFN.  OCTEON NUMA systems have 41 bits of physical address
space, so with 4K pages (12-bits), we need at least 29 bits to store
the PFN.

The current width of 24-bits is too narrow, so expand it all the way
out to 40-bits.  This leaves the low order 16 bits as zero which does
not interfere with any of the PTE bits.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9315/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47XX: Use strnchr to avoid reading out of the buffer
Rafał Miłecki [Wed, 10 Dec 2014 10:49:54 +0000 (11:49 +0100)]
MIPS: BCM47XX: Use strnchr to avoid reading out of the buffer

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8662/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BCM47XX: Use helpers for reading NVRAM content
Rafał Miłecki [Wed, 10 Dec 2014 10:49:53 +0000 (11:49 +0100)]
MIPS: BCM47XX: Use helpers for reading NVRAM content

Also drop some unneeded memset-s.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8661/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mark prom_free_prom_memory() everywhere with __init
Aaro Koskinen [Wed, 25 Feb 2015 23:31:04 +0000 (01:31 +0200)]
MIPS: mark prom_free_prom_memory() everywhere with __init

On OCTEON the function is non-trivial and we can potentially even save
some memory.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9338/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Provide fallback reboot/poweroff/halt implementations
Andrew Bresticker [Wed, 25 Mar 2015 17:25:44 +0000 (10:25 -0700)]
MIPS: Provide fallback reboot/poweroff/halt implementations

If a machine-specific hook is not implemented for restart, poweroff,
or halt, fall back to halting secondary CPUs, disabling interrupts,
and spinning.  In the case of restart, attempt to restart the system
via do_kernel_restart() (which will call any registered restart
handlers) before halting.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9600/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: smp: Make stop_this_cpu() actually stop the CPU
Andrew Bresticker [Wed, 25 Mar 2015 17:25:43 +0000 (10:25 -0700)]
MIPS: smp: Make stop_this_cpu() actually stop the CPU

Since cpu_wait() enables interrupts upon return, CPUs which have
entered stop_this_cpu() may still end up handling interrupts.
This can lead to the softlockup detector firing on a panic or
restart/poweroff/halt.  Just disable interrupts and spin to ensure
nothing else runs on the CPU once it has entered stop_this_cpu().

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9601/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ath79: Increase max memory limit to 256MByte
Helmut Schaa [Thu, 18 Dec 2014 12:05:40 +0000 (13:05 +0100)]
MIPS: ath79: Increase max memory limit to 256MByte

At least QCA955x can handle up to 256MBytes.

Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
Cc: linux-mips@linux-mips.org
Cc: Gabor Juhos <juhosg@openwrt.org>
Cc: Helmut Schaa <helmut.schaa@googlemail.com>
Patchwork: https://patchwork.linux-mips.org/patch/8738/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add FPU emulator counter for emulated delay slots.
David Daney [Wed, 3 Dec 2014 19:12:23 +0000 (11:12 -0800)]
MIPS: Add FPU emulator counter for emulated delay slots.

Delay slot emulation in the FPU emulator is the only kernel user of an
executable stack, it is also very slow.  Add a counter so we can see
how many of these emulations are done.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Update arch/mips/include/asm/sgi/sgi.h
Joshua Kinard [Fri, 12 Dec 2014 02:15:35 +0000 (21:15 -0500)]
MIPS: Update arch/mips/include/asm/sgi/sgi.h

Update arch/mips/include/asm/sgi/sgi.h with some updated information on SGI
systems.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Cc: Linux MIPS List <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8666/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: pci: Drop owner assignment from platform_drivers
Wolfram Sang [Sun, 21 Dec 2014 21:14:24 +0000 (22:14 +0100)]
MIPS: pci: Drop owner assignment from platform_drivers

This platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: linux-kernel@vger.kernel.org
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8824/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: lantiq: xway: drop owner assignment from platform_drivers
Wolfram Sang [Sun, 21 Dec 2014 21:14:23 +0000 (22:14 +0100)]
MIPS: lantiq: xway: drop owner assignment from platform_drivers

This platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8823/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Add built-in dts for XLP5xx boards
Ganesan Ramalingam [Wed, 7 Jan 2015 11:28:38 +0000 (16:58 +0530)]
MIPS: Netlogic: Add built-in dts for XLP5xx boards

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8896/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: i2c IRQ mappings for XLP9XX
Subhendu Sekhar Behera [Wed, 7 Jan 2015 11:28:37 +0000 (16:58 +0530)]
MIPS: Netlogic: i2c IRQ mappings for XLP9XX

The new I2C block in XLP9XX has 4 interrupts, add the mapping for
these in nlm_hal.c

Signed-off-by: Subhendu Sekhar Behera <sbehera@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8897/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Add irq mapping and setup for XHCI port 3
Ganesan Ramalingam [Wed, 7 Jan 2015 11:28:36 +0000 (16:58 +0530)]
MIPS: Netlogic: Add irq mapping and setup for XHCI port 3

Add support for third XHCI port in XLPII processors.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8895/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Do not enable SUE for core
Jayachandran C [Wed, 7 Jan 2015 11:28:35 +0000 (16:58 +0530)]
MIPS: Netlogic: Do not enable SUE for core

Enabling the SUE bit for core can can result in rare cache errors
which are difficult to track down, so do not enable it. This can
cause a minor performance loss in some tests.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8894/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Handle XLP hardware errata
Jayachandran C [Fri, 9 Jan 2015 10:43:20 +0000 (16:13 +0530)]
MIPS: Netlogic: Handle XLP hardware errata

Core configuration register IFU_BRUB_RESERVE has to be setup to handle
a silicon errata which can result in a CPU hang.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8902/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Update function to read DRAM BARs
Jayachandran C [Wed, 7 Jan 2015 11:28:33 +0000 (16:58 +0530)]
MIPS: Netlogic: Update function to read DRAM BARs

Change name of xlp_get_dram_map to nlm_get_dram_map to be consistent
with the rest of the functions in the file. Pass the the size of the
array 'dram_map' to the function, and ensure that it does not write
past the end of the array.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Added HugeTLB as default
Prem Mallappa [Wed, 7 Jan 2015 11:28:32 +0000 (16:58 +0530)]
MIPS: Netlogic: Added HugeTLB as default

Enable CPU_SUPPORTS_HUGEPAGES for XLP processors.

Signed-off-by: Prem Mallappa <pmallapp@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: nlm_core_id for xlp9xx
Jayachandran C [Wed, 7 Jan 2015 11:28:31 +0000 (16:58 +0530)]
MIPS: Netlogic: nlm_core_id for xlp9xx

XLP9XX has 5 bits that specify the core in the EBASE register. XLP5XX
case added as well for completeness.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8890/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Move cores per node out of multi-node.h
Jayachandran C [Wed, 7 Jan 2015 11:28:30 +0000 (16:58 +0530)]
MIPS: Netlogic: Move cores per node out of multi-node.h

Use the current_cpu_data package field to get the node of the current CPU.

This allows us to remove xlp_cores_per_node and move nlm_threads_per_node()
and nlm_cores_per_node() to netlogic/common.h, which simplifies code.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8889/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Use MIPS topology.h
Jayachandran C [Wed, 7 Jan 2015 11:28:29 +0000 (16:58 +0530)]
MIPS: Netlogic: Use MIPS topology.h

commit bda4584cd943 ("MIPS: Support CPU topology files in sysfs")
added topology related macros for all MIPS platforms and commit
bbbf6d8768f5 ("MIPS: NL: Fix nlm_xlp_defconfig build error")
removed most of the contents from mach-netlogic/topology.h.

The netlogic specific topology is not needed anymore, we just need
to setup the package field in current_cpu_data.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8888/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: MSI: Update MSI handling for XLP
Jayachandran C [Wed, 7 Jan 2015 11:28:28 +0000 (16:58 +0530)]
MIPS: MSI: Update MSI handling for XLP

The per-cpu interrupt ACK using EIRR has to be done just once after
all the bits in the status register are processed.

PIC ack has to be done once in case of MSI, and for every interrupt
in case of MSI-X

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8887/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Fix frequency calculation register
Ganesan Ramalingam [Wed, 7 Jan 2015 11:28:27 +0000 (16:58 +0530)]
MIPS: Netlogic: Fix frequency calculation register

Change the PIC frequency calculation to use the register that has the
current configuration. The existing code used the register that is
written to change frequency, which can have an invalid value if the
firmware did not set it up correctly.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8885/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Disable writing IRT for disabled blocks
Jayachandran C [Wed, 7 Jan 2015 11:28:25 +0000 (16:58 +0530)]
MIPS: Netlogic: Disable writing IRT for disabled blocks

If the device header of a block is not present, return invalid IRT
value so that we do not program an incorrect offset.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8882/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Fix cop0 prid check in AHCI init
Ganesan Ramalingam [Wed, 7 Jan 2015 11:28:24 +0000 (16:58 +0530)]
MIPS: Netlogic: Fix cop0 prid check in AHCI init

PRID register should be masked with IMP_MASK to get processor ID.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8883/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Fix nlm_xlp2_get_pic_frequency to use ref_div
Qingmin Liu [Wed, 7 Jan 2015 11:28:23 +0000 (16:58 +0530)]
MIPS: Netlogic: Fix nlm_xlp2_get_pic_frequency to use ref_div

The variable ref_div is initialized to the correct divisor but not
used in the frequency calculation. This caused incorrect frequency
to be reported when the clock divisor is not 3.

Signed-off-by: Qingmin Liu <qingmin@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8884/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Netlogic: Fix wait for slave CPUs
Shanghui Liu [Wed, 7 Jan 2015 11:28:22 +0000 (16:58 +0530)]
MIPS: Netlogic: Fix wait for slave CPUs

For core 0, the condition of "cpu == bootcpu" is always true, so it
does not wait for other three threads to become ready. Fix this by
using correct check.

Signed-off-by: Shanghui Liu <shliu@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: LLVMLinux: Silence variable self-assignment warnings.
Toma Tabacu [Tue, 24 Feb 2015 15:25:11 +0000 (15:25 +0000)]
MIPS: LLVMLinux: Silence variable self-assignment warnings.

Remove variable self-assignments.
This silences a bunch of -Wself-assign warnings reported by clang.
The changed code can be compiled without warnings by both gcc and clang.

Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com>
Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9314/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: LLVMLinux: Fix an 'inline asm input/output type mismatch' error.
Daniel Sanders [Tue, 24 Feb 2015 15:25:10 +0000 (15:25 +0000)]
MIPS: LLVMLinux: Fix an 'inline asm input/output type mismatch' error.

Replace incorrect matching constraint that caused the error with an alternative
that still has the required constraints on the inline assembly.

This is the error message reported by clang:
arch/mips/include/asm/checksum.h:285:27: error: unsupported inline asm: input with type '__be32' (aka 'unsigned int') matching output with type 'unsigned short'
          "0" (htonl(len)), "1" (htonl(proto)), "r" (sum));
                                 ^~~~~~~~~~~~

The changed code can be compiled successfully by both gcc and clang.

Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com>
Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com>
Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9313/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: LLVMLinux: Fix a 'cast to type not present in union' error.
Toma Tabacu [Tue, 24 Feb 2015 15:25:09 +0000 (15:25 +0000)]
MIPS: LLVMLinux: Fix a 'cast to type not present in union' error.

Remove a cast to the 'mips16e_instruction' union inside an if
condition and instead do an assignment to a local
'union mips16e_instruction' variable's 'full' member before the if
statement and use this variable in the if condition.

This is the error message reported by clang:
arch/mips/kernel/branch.c:38:8: error: cast to union type from type 'unsigned short' not present in union
                if (((union mips16e_instruction)inst).ri.opcode
                     ^                          ~~~~

The changed code can be compiled successfully by both gcc and clang.

Signed-off-by: Toma Tabacu <toma.tabacu@imgtec.com>
Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com>
Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: David Daney <david.daney@cavium.com>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9312/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Changed current_thread_info() to an equivalent supported by both clang and GCC
Daniel Sanders [Tue, 24 Feb 2015 15:02:57 +0000 (15:02 +0000)]
MIPS: Changed current_thread_info() to an equivalent supported by both clang and GCC

Without this, a 'break' instruction is executed very early in the boot and
the boot hangs.

The problem is that clang doesn't honour named registers on local variables
and silently treats them as normal uninitialized variables. However, it
does honour them on global variables.

Signed-off-by: Daniel Sanders <daniel.sanders@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: David Daney <ddaney.cavm@gmail.com>
Acked-by: Behan Webster <behanw@converseincode.com>
Patchwork: https://patchwork.linux-mips.org/patch/9311/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: XPA: Add new configuration file.
Steven J. Hill [Fri, 27 Feb 2015 00:16:39 +0000 (18:16 -0600)]
MIPS: XPA: Add new configuration file.

Add in new config files for enabling a XPA platform.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9354/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: OCTEON: Use correct CSR to soft reset
Chandrakala Chavva [Thu, 5 Mar 2015 15:06:11 +0000 (18:06 +0300)]
MIPS: OCTEON: Use correct CSR to soft reset

This fixes reboot for Octeon III boards

[ralf@linux-mips.org: Dropped segment for function cvmx_reset_octeon()
which was removed by the preceeding commit.]

Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9464/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Octeon: Remove unused function cvmx_reset_octeon().
Ralf Baechle [Wed, 25 Mar 2015 10:44:09 +0000 (11:44 +0100)]
MIPS: Octeon: Remove unused function cvmx_reset_octeon().

As suggested by David Daney.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: OCTEON: Use device tree to probe for flash chips.
David Daney [Thu, 5 Mar 2015 14:31:31 +0000 (17:31 +0300)]
MIPS: OCTEON: Use device tree to probe for flash chips.

Don't assume they are there, the device tree will tell us.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9461/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: OCTEON: Protect accesses to bootbus flash with octeon_bootbus_sem.
David Daney [Thu, 5 Mar 2015 14:31:30 +0000 (17:31 +0300)]
MIPS: OCTEON: Protect accesses to bootbus flash with octeon_bootbus_sem.

Without this, we get bus errors.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9460/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: OCTEON: Add semaphore to serialize bootbus accesses.
David Daney [Thu, 5 Mar 2015 14:31:29 +0000 (17:31 +0300)]
MIPS: OCTEON: Add semaphore to serialize bootbus accesses.

Some hardware blocks attached to the OCTEON bootbus run asynchronously
to accesses from the CPUs.  These include MMC/SD host, CF(when using
DMA), and NAND controller.  A bus error, or corrupt data may occur if
a CPU is trying to access a bootbus connected device at the same time
the bus is running asynchronous operations.

To work around these problems we add this semaphore that must be
acquired before initiating bootbus activity.  Subsequent patches will
add users for this.

Signed-off-by: David Daney <david.daney@cavium.com>
[aleksey.makarov@auriga.com: combine the patches]
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9459/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BMIPS: Add DTS files for several platforms
Kevin Cernekee [Thu, 25 Dec 2014 17:49:20 +0000 (09:49 -0800)]
MIPS: BMIPS: Add DTS files for several platforms

Most of the supported chips use legacy (non-DT) bootloaders, so they will
need to select an appropriate builtin DTB at compile time until the
bootloader is updated.  Provide suitable DTS files, and a means to compile
one of them into the kernel image.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: f.fainelli@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8858/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BMIPS: Update DT bindings to reflect new SoC support
Kevin Cernekee [Thu, 25 Dec 2014 17:49:19 +0000 (09:49 -0800)]
MIPS: BMIPS: Update DT bindings to reflect new SoC support

Add an entry for each supported Broadcom SoC.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: f.fainelli@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8857/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BMIPS: Refresh BCM3384 DTS files
Kevin Cernekee [Thu, 25 Dec 2014 17:49:18 +0000 (09:49 -0800)]
MIPS: BMIPS: Refresh BCM3384 DTS files

The DT bindings for this platform have changed as the bootloader and
product requirements evolved.  In particular, there are both
Linux-on-Zephyr and Linux-on-Viper configurations.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8856/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BMIPS: Enable additional peripheral and CPU support in defconfig
Kevin Cernekee [Thu, 25 Dec 2014 17:49:17 +0000 (09:49 -0800)]
MIPS: BMIPS: Enable additional peripheral and CPU support in defconfig

Also, add an LE defconfig for set-top box (BCM7xxx).  This will allow the
BMIPS kernel to run on several non-BCM3384 platforms.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: f.fainelli@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8855/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BMIPS: Use a non-default FIXADDR_TOP setting
Kevin Cernekee [Thu, 25 Dec 2014 17:49:16 +0000 (09:49 -0800)]
MIPS: BMIPS: Use a non-default FIXADDR_TOP setting

This will be required to support BMIPS3300 platforms.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8854/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: BMIPS: Delete the irqchip driver from irq.c
Kevin Cernekee [Thu, 25 Dec 2014 17:49:15 +0000 (09:49 -0800)]
MIPS: BMIPS: Delete the irqchip driver from irq.c

BCM3384/BCM63xx can use the common drivers/irqchip/irq-bcm7120-l2.c for
this purpose; BCM7xxx will use drivers/irqchip/irq-bcm7038-l1.c.  We no
longer need this code under arch/mips.

[ralf@linux-mips.org: Fix conflicts.]

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8853/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>