Christian König [Tue, 16 Jan 2018 19:24:55 +0000 (20:24 +0100)]
drm/amdgpu: add PASID mapping for GMC v7
This way we can see the PASID in VM faults.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 20:57:53 +0000 (21:57 +0100)]
drm/amdgpu: implement gmc_v9_0_emit_flush_gpu_tlb
Unify tlb flushing for gmc v9.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 18:14:42 +0000 (19:14 +0100)]
drm/amdgpu: implement gmc_v8_0_emit_flush_gpu_tlb
Unify tlb flushing for gmc v8.
v2: handle UVD v6 as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 16:08:22 +0000 (17:08 +0100)]
drm/amdgpu: implement gmc_v7_0_emit_flush_gpu_tlb
Unify tlb flushing for gmc v7.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:58:18 +0000 (16:58 +0100)]
drm/amdgpu: implement gmc_v6_0_emit_flush_gpu_tlb
Unify tlb flushing for gmc v6.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:57:33 +0000 (16:57 +0100)]
drm/amdgpu: add new amdgpu_gmc_emit_flush_gpu_tlb callback
Add a new GMC function to unify vm flushing.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:35:16 +0000 (16:35 +0100)]
drm/amdgpu: wire up emit_wreg for VCN v1
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:35:01 +0000 (16:35 +0100)]
drm/amdgpu: wire up emit_wreg for VCE v4
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:34:44 +0000 (16:34 +0100)]
drm/amdgpu: wire up emit_wreg for UVD v7
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:34:22 +0000 (16:34 +0100)]
drm/amdgpu: wire up emit_wreg for UVD v6
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:34:03 +0000 (16:34 +0100)]
drm/amdgpu: wire up emit_wreg for SDMA v4
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:33:49 +0000 (16:33 +0100)]
drm/amdgpu: wire up emit_wreg for SDMA v3
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:33:34 +0000 (16:33 +0100)]
drm/amdgpu: wire up emit_wreg for SDMA v2.4
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:33:15 +0000 (16:33 +0100)]
drm/amdgpu: wire up emit_wreg for CIK SDMA
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:33:03 +0000 (16:33 +0100)]
drm/amdgpu: wire up emit_wreg for SI DMA
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 13:30:41 +0000 (14:30 +0100)]
drm/amdgpu: wire up emit_wreg for gfx v9
Needed for vm_flush unification.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:31:35 +0000 (16:31 +0100)]
drm/amdgpu: wire up emit_wreg for gfx v8
Needed for vm_flush unification.
v2: handle compute rings as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:31:15 +0000 (16:31 +0100)]
drm/amdgpu: wire up emit_wreg for gfx v7
Needed for vm_flush unification.
v2: handle compute rings as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 15:30:19 +0000 (16:30 +0100)]
drm/amdgpu: wire up emit_wreg for gfx v6
Needed for vm_flush unification.
v2: handle compute rings as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger He [Fri, 19 Jan 2018 07:17:27 +0000 (15:17 +0800)]
drm/ttm: add the missed global memory count update
when ttm_mem_global_alloc_page fails, we should call
ttm_mem_global_free_page to update memory count for
the ttm pages which already run ttm_mem_global_alloc_page
successfully
Signed-off-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Fri, 22 Dec 2017 13:12:40 +0000 (08:12 -0500)]
drm/ttm: Allow page allocations w/o triggering OOM..
This to allow drivers to choose to avoid OOM invocation and handle
page allocation failures instead.
v2:
Remove extra new lines.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 18 Jan 2018 03:00:19 +0000 (11:00 +0800)]
drm/amdgpu: Bump driver version for sensor pstate clk
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 17 Jan 2018 05:18:47 +0000 (13:18 +0800)]
drm/amdgpu: Expose more GPU sensor queries
Add sub-queries for stable pstate shader/memory clock.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 17 Jan 2018 08:51:16 +0000 (16:51 +0800)]
drm/amdgpu: all vram is visible for APU (v2)
missed in gmc9.
v2: squash in build fix (Rex)
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 15 Jan 2018 10:01:35 +0000 (18:01 +0800)]
drm/amd/pp: Add OD driver clock/voltage display on smu7
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 4 Jan 2018 09:08:14 +0000 (17:08 +0800)]
drm/amd/pp: Add and initialize OD_dpm_table for CI/VI.
Add initial infrastructure for manual dpm control.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 4 Jan 2018 08:42:06 +0000 (16:42 +0800)]
drm/amd/pp: Add a new pp feature mask bit for OD feature
when this bit was set on module load,
driver will allow the user over/under gpu
clock and voltage through sysfs.
by default, this bit was not set.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 16 Jan 2018 08:00:02 +0000 (16:00 +0800)]
drm/amd/pp: Move DPMTABLE_* definitions to common header file
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 12 Jan 2018 09:05:37 +0000 (17:05 +0800)]
drm/amd/pp: Refine code abbreviate variable name
abbreviate variable name number_of_performance_levels
to num_of_pl in struct phm_odn_clock_levels
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 8 Jan 2018 05:59:05 +0000 (13:59 +0800)]
drm/amd/pp: Add stable Pstate clk display support in debugfs
The additional output are: PSTATE_SCLK and PSTATE_MCLK value
in MHz as:
300 MHz (PSTATE_SCLK)
300 MHz (PSTATE_MCLK)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 5 Jan 2018 11:02:48 +0000 (19:02 +0800)]
drm/amd/pp: Store stable Pstate clocks
User can use to calculate profiling ratios when
set UMD Pstate.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 10 Jan 2018 10:48:06 +0000 (18:48 +0800)]
drm/amd/pp: Add custom power profile mode support on Vega10
v2: delete uncessary blank line.
Add static const modifiers to an array
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 10 Jan 2018 10:42:36 +0000 (18:42 +0800)]
drm/amdgpu: add custom power policy support in sysfs
when cat pp_power_profile_mode on Vega10
NUM MODE_NAME BUSY_SET_POINT FPS USE_RLC_BUSY MIN_ACTIVE_LEVEL
0 3D_FULL_SCREEN : 70 60 1 3
1 POWER_SAVING : 90 60 0 0
2 VIDEO*: 70 60 0 0
3 VR : 70 90 0 0
4 COMPUTER : 30 60 0 6
5 CUSTOM : 0 0 0 0
the result show all the profile mode we can support and custom mode.
user can echo the num(0-4) to pp_power_profile_mode to select the profile
mode or can echo "5 value value value value" to enter CUSTOM mode.
the four parameter is set_point/FPS/USER_RLC_BUSY/MIN_ACTIVE_LEVEL.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 3 Jan 2018 09:10:53 +0000 (17:10 +0800)]
drm/amd/pp: Fix SMIO implementation on CI
Setup smio table(smio registers's address and voltage ID)
for various voltage domain.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 3 Jan 2018 09:05:35 +0000 (17:05 +0800)]
drm/amd/pp: Implement voltage regulator config on CI
Store the voltage regulator configuration
so we can properly query the voltage
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 2 Jan 2018 06:10:45 +0000 (14:10 +0800)]
drm/amd/pp: Add querying current gfx voltage for Vega10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 3 Jan 2018 09:21:28 +0000 (17:21 +0800)]
drm/amd/pp: Add querying current gfx voltage for CI/VI
Store the voltage regulator configuration,
so we can properly query the voltage.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 2 Jan 2018 06:06:05 +0000 (14:06 +0800)]
drm/amd/pp: Export registers for read vddc on VI/Vega10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 8 Jan 2018 08:50:59 +0000 (16:50 +0800)]
drm/amd/pp: Add memory clock info display on Cz/St
show mclk info as in MHz on Cz/St as
0: 333Mhz *
1: 800Mhz
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 8 Jan 2018 13:48:11 +0000 (14:48 +0100)]
drm/amdgpu: forward pasid to backend flush implementations
rd the pasid from the VM code to the emit_vm_flush function and update
all implementations with the new parameter.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 5 Jan 2018 13:23:56 +0000 (14:23 +0100)]
drm/amdgpu: trace the PASID instead of the VM pointer
Makes more sense than tracing the kernel pointer.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 9 Jan 2018 18:32:58 +0000 (19:32 +0100)]
drm/amdgpu: trace allocated PASIDs
Trace all allocated PASIDs.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 5 Jan 2018 13:17:08 +0000 (14:17 +0100)]
drm/amdgpu: always allocate a PASIDs for each VM v2
Start to always allocate a pasid for each VM.
v2: use dev_warn when we run out of PASIDs
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 5 Jan 2018 10:16:22 +0000 (11:16 +0100)]
drm/amdgpu: add amdgpu_pasid_free_delayed v2
Free up a pasid after all fences signaled.
v2: also handle the case when we can't allocate a fence array.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 16 Jan 2018 15:54:25 +0000 (16:54 +0100)]
drm/amdgpu: move PD/PT address calculation into backend function
This way we can better handle the differences for CPU based updates.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 14:26:08 +0000 (15:26 +0100)]
drm/amdgpu: move struct gart_funcs into amdgpu_gmc.h
And rename it to struct gmc_funcs.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 13:52:22 +0000 (14:52 +0100)]
drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h
And rename it to amdgpu_gmc as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Jan 2018 13:49:21 +0000 (14:49 +0100)]
drm/amdgpu: remove agp_base
No AGP support for in this driver.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 9 Jan 2018 18:50:01 +0000 (19:50 +0100)]
drm/amdgpu: print the PASID with VM faults on GMC v8
Print that extra information on GMC v8.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 9 Jan 2018 18:49:21 +0000 (19:49 +0100)]
drm/amdgpu: print the PASID with VM faults on GMC v7
Print that extra information on GMC v7.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 9 Jan 2018 18:47:37 +0000 (19:47 +0100)]
drm/amdgpu: rename pas_id to pasid
sed -i "s/pas_id/pasid/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/pas_id/pasid/g" drivers/gpu/drm/amd/amdgpu/*.h
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Samuel Li [Fri, 8 Dec 2017 21:18:59 +0000 (16:18 -0500)]
drm/amdgpu: Move to gtt before cpu accesses dma buf.
To improve cpu read performance. This is implemented for APUs currently.
v2: Adapt to change https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html
v3: Adapt to change "forward begin_cpu_access callback to drivers"
v4: Instead of v3, reuse drm_gem dmabuf_ops here. Also some minor fixes as suggested.
v5: only set dma_buf ops when it is valid (Samuel)
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 30 Oct 2017 17:41:51 +0000 (13:41 -0400)]
drm/amd/display: Enable VM support only on APUs newer than CZ
VM support is only available for CZ and newer APUs. Trying to
enable it for dGPU will blow up in DC.
v2: Don't enable gpu_vm_support for Raven yet since it leads to
a black screen. Need to debug this further before enabling.
Change-Id: Ibe467c36affe2e7a7ee740c8d4f73027ca807178
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
CC: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 12 Jan 2018 19:56:49 +0000 (14:56 -0500)]
drm/amdgpu: only allow scatter/gather display with DC
Check if DC is enabled before allowing scanout buffers
to be pinned in system memory.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 26 Oct 2017 16:06:23 +0000 (18:06 +0200)]
drm/amdgpu: allow framebuffer in GART memory as well
On CZ and newer APUs we can pin the fb into GART as well as VRAM.
v2: Don't enable gpu_vm_support for Raven yet since it leads to
a black screen. Need to debug this further before enabling.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yong Zhao [Thu, 21 Dec 2017 21:19:03 +0000 (16:19 -0500)]
drm/amdgpu: Update MMHUB power gating register settings
The new register settings are needed to fix a tlb invalidation issue
when MMHUB power gating is turned on for Raven.
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Eric Huang <JinhuiEric.Huang@amd.com>
Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Krunoslav Kovac [Fri, 22 Dec 2017 16:22:39 +0000 (11:22 -0500)]
drm/amd/display: [RS4][RV] SDR Brightness Boost
We assume FP16 1.0 frame buffer value maps to 80 nits.
DC changes are to make this configurable.
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Tue, 2 Jan 2018 22:04:55 +0000 (17:04 -0500)]
drm/amd/display: Update dcn10_init_hw for FPGA
Update dcn10_init_hw such that initialization of relevant
HW blocks for Maximus FPGA are also initialized (and not skipped).
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Mon, 18 Dec 2017 19:38:41 +0000 (14:38 -0500)]
drm/amd/display: Implement CRTC CRC for DCE110
Implement the timing generator hooks for configure_crc and get_crc.
Also implement is_tg_enabled, as configure_crc uses it.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Mon, 18 Dec 2017 19:20:39 +0000 (14:20 -0500)]
drm/amd/display: Implement interface for CRC on CRTC
Add interfaces in DC for per CRTC CRC configuration and fetching.
Also implement amdgpu_dm functions to hook onto DRM.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Tue, 2 Jan 2018 20:13:25 +0000 (15:13 -0500)]
drm/amd/display: clean up DCHUBBUB register definition in hwseq
Cleanup to remove unused register definition from hw sequencer
header file since implementation moved from hw sequencer to dchubub file.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 22 Dec 2017 17:05:25 +0000 (12:05 -0500)]
drm/amd/display: Refactor remove mpcc processing.
No need to use loop find opp, use opp in stream_res.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 22 Dec 2017 15:19:37 +0000 (10:19 -0500)]
drm/amd/display: Move opp reg access from hwss to opp module.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Sat, 30 Dec 2017 00:11:58 +0000 (19:11 -0500)]
drm/amd/display: disablePSR in UpdatePlanes in PassiveLevel
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Fri, 29 Dec 2017 22:45:03 +0000 (17:45 -0500)]
drm/amd/display: Fix null-derefs on non-dcn builds
Fixing regression introduced by
'Use real BE and FE index to program regs.'
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Wed, 20 Dec 2017 22:17:40 +0000 (17:17 -0500)]
drm/amd/display: Move dpp reg access from hwss to dpp module.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Thu, 21 Dec 2017 20:38:31 +0000 (15:38 -0500)]
drm/amd/display: Check opplist in pipe ctx not in res pool.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 13 Dec 2017 20:41:50 +0000 (15:41 -0500)]
drm/amd/display: Drop dm_connector_update_modes
It's unused since the drm_edid_to_eld cleanup
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrew Jiang [Wed, 20 Dec 2017 15:07:42 +0000 (10:07 -0500)]
drm/amd/display: Fix check for setting input TF
We no longer change the plane state pointer for full updates, and as
such, we weren't setting the input transfer function and programming the
degamma registers when we are supposed to. Check for a full update, an
input TF change, or a gamma change in the update flags instead to correct
this.
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nikola Cornij [Thu, 14 Dec 2017 22:57:56 +0000 (17:57 -0500)]
drm/amd/display: Define remove_stream_from_ctx resource func
This will allow us to clean up resources on a stream as needed.
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 18 Dec 2017 18:48:12 +0000 (13:48 -0500)]
drm/amd/display: Make create_stream_for_sink more consistent
We've got a helper function to call dc_create_stream_for_sink and one
other place that calls it directly. Make sure we call the helper
functions always since we need to update a bunch of things in stream and
don't want to miss that.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 20 Dec 2017 15:46:50 +0000 (10:46 -0500)]
drm/amd/display: Log which clocks are unsupported
It would be useful to know which clocks are unsupported when logging an
error message about unsupported clocks.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 19 Dec 2017 21:47:02 +0000 (16:47 -0500)]
drm/amd/display: Use real BE and FE index to program regs.
In case of some pipes are fused, pipe_idx should not
be used to program pipe regs. Instead of that, BE and FE
inst number should be used for reg index.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Mon, 18 Dec 2017 19:09:19 +0000 (14:09 -0500)]
drm/amd/display: Move hubp reg access from hwss to hubp module.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 18 Dec 2017 16:55:48 +0000 (11:55 -0500)]
drm/amd/display: Debug-print reason for mode validation failure
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 18 Dec 2017 19:36:01 +0000 (14:36 -0500)]
drm/amd/display: Don't block dual-link DVI modes
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 19 Dec 2017 21:17:22 +0000 (16:17 -0500)]
drm/amd/display: Don't allow dual-link DVI on all ASICs.
Our APUs (Carrizo, Stoney, Raven) don't support it.
v2: Don't use is_apu as other ASICs might also not support it
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 7 Dec 2017 19:09:15 +0000 (14:09 -0500)]
drm/amd/display: Debug print when validate_stream fails
It might be good to understand why validate fails.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 19 Dec 2017 16:51:40 +0000 (11:51 -0500)]
drm/amd/display: Disable eDP with a proper sequence.
Proper sequence should be:
disable backlight
dp blank
disable output
edp power off
In enable accelatate mode, all the encoder and controller
are disabled, so move disable eDP to the function is the
easiest way to implement.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Tue, 19 Dec 2017 02:05:54 +0000 (21:05 -0500)]
drm/amd/display: dal 3.1.28
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 18 Dec 2017 16:57:28 +0000 (11:57 -0500)]
drm/amd/display: Pass signal directly to enable_tmds_output
This makes the check for HDMI and dual-link DVI a bit more
straightforward.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 18 Dec 2017 18:46:19 +0000 (13:46 -0500)]
drm/amd/display: Remove unnecessary fail labels in create_stream_for_sink
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 5 Dec 2017 01:58:16 +0000 (20:58 -0500)]
drm/amd/display: Move MAX_TMDS_CLOCK define to header
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Mon, 18 Dec 2017 21:59:44 +0000 (16:59 -0500)]
drm/amd/display: disable eDP backlight for extend monitor only reboot use case.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Krunoslav Kovac [Fri, 15 Dec 2017 22:58:45 +0000 (17:58 -0500)]
drm/amd/display: Pass full 3x4 remap matrix for color transform
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mikita Lipski [Mon, 18 Dec 2017 15:34:56 +0000 (10:34 -0500)]
drm/amd/display: Prevent master programming in multisync
Verify that the stream is master - and program only the slave displays
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Fri, 15 Dec 2017 22:18:19 +0000 (17:18 -0500)]
drm/amd/display: Fix FBC topology change
With FBC enabled there was a potential null-deref
on topology change due to hardcorded pipe index.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 15 Dec 2017 15:26:13 +0000 (10:26 -0500)]
drm/amd/display: Use pipe_control_lock instead of tg lock.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jerry (Fangzhi) Zuo [Tue, 12 Dec 2017 22:33:57 +0000 (17:33 -0500)]
drm/amd/display: Fix topology change issue in MST rehook
When topology changed and rehook up MST display to the same DP
connector, need to take care of drm_dp_mst_port object.
Due to the topology is changed, drm_dp_mst_port and corresponding
i2c_algorithm object could be NULL in such situation.
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 13 Dec 2017 22:29:01 +0000 (17:29 -0500)]
drm/amd/display: cleanup after FBC init rework
After reworking FBC init for dynamic mem alloc
old FBC init code in DC became redundant.
Removing it.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roman Li [Wed, 13 Dec 2017 22:25:02 +0000 (17:25 -0500)]
drm/amd/display: make FBC mem alloc dynamic
- FBC init reworked to alloc memory based on display mode.
- Removed asic-dependencies from dm
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Chalmers [Thu, 14 Dec 2017 17:44:39 +0000 (12:44 -0500)]
drm/amd/display: Eliminate several Maximus-specific code paths
This allows Maximus emulation to more closely mirror actual silicon
execution.
* Enable pool->base.display_clock creation on Maximus.
* Enable rest of dce110_apply_ctx_to_hw on Maximus.
* Remove apply_ctx_to_hw_fpga (no longer necessary with the full
dce110_apply_ctx_to_hw enabled).
* Disable the dmcu->funcs->set_psr_wait_loop call in dce112_set_clock
for Maximus (this was the only fix-up necessary after enabling
dce110_apply_ctx_to_hw; everything else works unmodified on
Maximus).
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Chalmers [Thu, 14 Dec 2017 17:43:41 +0000 (12:43 -0500)]
drm/amd/display: Fix Maximus pixel clock programming
Maximus testing now defaults to a 700 MHz emulated dispclk
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 13 Dec 2017 18:41:42 +0000 (13:41 -0500)]
drm/amd/display: PME sw wa to support waking AZ D3
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Fengguang Wu [Thu, 4 Jan 2018 23:06:46 +0000 (07:06 +0800)]
drm/amdgpu: fix semicolon.cocci warnings
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c:281:2-3: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
Fixes: 620f774f4687 ("drm/amdgpu: separate VMID and PASID handling")
CC: Christian König <christian.koenig@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 4 Jan 2018 08:50:18 +0000 (16:50 +0800)]
drm/amd/pp: Refine code shorten variable name
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 3 Jan 2018 09:24:36 +0000 (17:24 +0800)]
drm/amd/pp: Add a helper to convert VID to voltage value
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 5 Jan 2018 15:33:48 +0000 (10:33 -0500)]
drm/amdgpu: drop extra tlb invalidation in gpuvm
We only need to flush the HDP here, not invalidate the TLB.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 5 Jan 2018 15:25:57 +0000 (10:25 -0500)]
drm/amdgpu: adjust HDP write queue flushing for tlb invalidation
Separate tlb invalidation and hdp flushing and move the HDP
flush to the caller.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 6 Sep 2017 22:06:45 +0000 (18:06 -0400)]
drm/amdgpu: add HDP asic callbacks for SOC15 (v2)
Needed to flush and invalidate the HDP block using the CPU.
v2: use preferred register on soc15.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com> (v1)
projects / openwrt / staging / blogic.git / log