Wolfgang Denk [Sat, 24 Oct 2009 20:25:11 +0000 (22:25 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Sat, 24 Oct 2009 20:25:08 +0000 (22:25 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Sat, 24 Oct 2009 20:19:54 +0000 (22:19 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Sat, 24 Oct 2009 20:19:46 +0000 (22:19 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Wolfgang Denk [Sat, 24 Oct 2009 20:16:22 +0000 (22:16 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Stefan Roese [Mon, 19 Oct 2009 14:19:36 +0000 (16:19 +0200)]
ppc4xx: Sequoia: Add chip_config command
This patch removes the Sequoia "bootstrap" command and replaces it
with the now common command "chip_config".
Please note that the patches with the dynamic PCI sync clock
configuration have to be applied, before this one should go in.
This is because Sequoia has 2 different bootstrap EEPROMs, and
the old bootstrap command configured different values depending
on the detected PCI async clock (33 vs. 66MHz). With the PCI sync
clock patches, this is not necessary anymore. The PCI sync clock
will be configured correctly on-the-fly now.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 19 Oct 2009 12:14:08 +0000 (14:14 +0200)]
ppc4xx: Yosemite/Yellowstone: Check and reconfigure the PCI sync clock
This patch now uses the 440EP(x)/GR(x) function to check and dynamically
reconfigure the PCI sync clock.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 19 Oct 2009 12:10:50 +0000 (14:10 +0200)]
ppc4xx: Sequoia/Rainer: Check and reconfigure the PCI sync clock
This patch now uses the 440EP(x)/GR(x) function to check and dynamically
reconfigure the PCI sync clock.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 19 Oct 2009 12:44:11 +0000 (14:44 +0200)]
ppc4xx: Print PCI synchronous clock frequency upon bootup
Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal
synchronous PCI clock. Knowledge about the currently configured
value might be helpful. So let's print it out upon bootup.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 19 Oct 2009 12:06:23 +0000 (14:06 +0200)]
ppc4xx: Add function to check and dynamically change PCI sync clock
PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:
AsyncPCIClk - 1MHz <= SyncPCIclock <= (2 * AsyncPCIClk) - 1MHz
This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 16 Oct 2009 08:01:09 +0000 (10:01 +0200)]
ppc4xx: Update flash size in reg property of the NOR flash node
Till now only the ranges in the ebc node are updated with the values
currently configured in the PPC4xx EBC controller. With this patch now
the NOR flash size is updated in the device tree blob as well. This is
done by scanning the compatible nodes "cfi-flash" and "jedec-flash"
for the correct chip select number.
This size fixup is enabled for all AMCC eval board right now. Other
4xx boards may want to enable it as well, if this problem with multiple
NOR FLASH sizes exists.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Stefan Roese [Wed, 21 Oct 2009 09:59:52 +0000 (11:59 +0200)]
fdt: Add fdt_fixup_nor_flash_size() to fixup NOR FLASH size in dtb
This function can be used to update the size in the "reg" property
of the NOR FLASH device nodes. This is necessary for boards with
non-fixed NOR FLASH sizes.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Tue, 20 Oct 2009 21:12:13 +0000 (23:12 +0200)]
cpu/ppc4xx/fdt.c: avoid strcpy() to constant string
strcpy() was iused with the target address being a pointer to a
constant string, which potentially is read-only. Use a (writable)
array of characters instead.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Tue, 20 Oct 2009 21:07:04 +0000 (23:07 +0200)]
cpu/ppc4xx/fdt.c: avoid strcpy() to constant string
strcpy() was iused with the target address being a pointer to a
constant string, which potentially is read-only. Use a (writable)
array of characters instead.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Daniel Mack [Wed, 8 Apr 2009 11:23:38 +0000 (13:23 +0200)]
smc911x: add support for LAN9220
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Mon, 19 Oct 2009 00:43:14 +0000 (20:43 -0400)]
envcrc: check return value of fwrite()
Newer toolchains will often complain about unchecked fwrite():
envcrc.c:117: warning: ignoring return value of `fwrite´, declared
with attribute warn_unused_result
So check the return value to silence the warnings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Mon, 19 Oct 2009 07:18:57 +0000 (09:18 +0200)]
mcc200: fix build error
Fix compile error:
include/configs/mcc200.h:401:6: error: #elif with no expression
Signed-off-by: Wolfgang Denk <wd@denx.de>
Alessandro Rubini [Sat, 10 Oct 2009 09:51:26 +0000 (11:51 +0200)]
lcd: remove '#if 0' 32-bit scroll, now memcpy does it
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Alessandro Rubini [Sat, 10 Oct 2009 09:51:16 +0000 (11:51 +0200)]
lib_generic memset: fill one word at a time if possible
If the destination is aligned, fill ulong values until possible.
Then fill remaining part by byte.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Alessandro Rubini [Sat, 10 Oct 2009 09:51:05 +0000 (11:51 +0200)]
lib_generic memcpy: copy one word at a time if possible
If source and destination are aligned, this copies ulong values
until possible, trailing part is copied by byte. Thanks for the details
to Wolfgang Denk, Mike Frysinger, Peter Tyser, Chris Moore.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Alessandro Rubini [Thu, 8 Oct 2009 12:29:14 +0000 (14:29 +0200)]
setenv: do console redirection even if previously unset
If "stdout" is not previously set, doing "setenv stdout lcd" had no
effect, since console redirection only worked if the environment
variable was already set; the second time you run setenv it worked.
Most default environments lack stdin/out/err definitions, so I'm sure
I'm not alone with this problem.
This patch simply moves a block of code out of a conditional, to do
the same work even if the variable was previously unset.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Martha Stan [Wed, 7 Oct 2009 08:38:46 +0000 (04:38 -0400)]
mpc512x: fix System Clock Control constants for USB1 & USB2
Signer-off-by: Martha Stan <mmarx@silicontkx.com>
Paul Gortmaker [Fri, 2 Oct 2009 22:18:33 +0000 (18:18 -0400)]
mem_mtest: fix error reporting, allow escape with ^C
The basic memtest function tries to watch for ^C after each
pattern pass as an escape mechanism, but if things are horribly
wrong, we'll be stuck in an inner loop flooding the console with
error messages and never check for ^C. To make matters worse,
if the user waits for all the error messages to complete, we
then incorrectly report the test passed without errors.
Adding a check for ^C after any error is printed will give
the end user an escape mechanism from a console flood without
slowing down the overall test speed on a slow processor.
Also, the more extensive memtest quit after just a single error,
which is inconsistent with the normal memtest, and not useful if
if you are doing dynamic environmental impact testing, such as
heating/cooling etc.
Both tests now track the error count and report it properly
at test completion.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 1 Oct 2009 16:11:54 +0000 (12:11 -0400)]
new default shortcut to config & build a board
The majority of the time that I build things in U-Boot, I want to just
build for the board. I don't make board config tweaks after selecting the
board. So add a new pattern rule that allows people to combine two steps
in one go:
`make foo_config && make` => `make foo`
This shouldn't conflict with any existing make rules as the pattern rule
is used only the rule doesn't already exist.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 30 Sep 2009 19:29:58 +0000 (15:29 -0400)]
env: only build env_embedded and envcrc when needed
The env code is protected by the ENV_IS_EMBEDDED define, so attempting to
compile the code when this isn't defined is pointless. Now that the env
headers have unified around CONFIG_ENV_IS_EMBEDDED, convert the build
system to only build the env objects when this is enabled. And now that
the env code is conditionally compiled, we can drop the source code checks.
For people who want to extract the environment manually, add a new option
CONFIG_BUILD_ENVCRC that only enables the envcrc utility.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Daniel Mack [Mon, 28 Sep 2009 09:40:38 +0000 (11:40 +0200)]
part_dos: check status flags of partitions
Only read partitions which have 0x00 or 0x80 set in their status field.
All others are invalid.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Eric Millbrandt [Fri, 25 Sep 2009 22:47:43 +0000 (17:47 -0500)]
galaxy5200: change cs1 configuration
Correct the chip select configuration for the nand flash chip select.
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Niklaus Giger [Wed, 23 Sep 2009 06:12:14 +0000 (08:12 +0200)]
Cleanup: use constant
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Kim Phillips [Mon, 12 Oct 2009 16:06:19 +0000 (11:06 -0500)]
mpc83xx: mpc8313 - handle erratum IPIC1 (TSEC IRQ number swappage)
mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
h/w (see AN3545). The base device tree in use has rev. 1 ID numbers,
so if on Rev. 2 (and higher) h/w, we fix them up here.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Reviewed-by: Roland Lezuo <roland.lezuo@chello.at>
Anton Vorontsov [Mon, 12 Oct 2009 19:55:39 +0000 (23:55 +0400)]
mpc85xx: Fix booting on various boards
commit
0e870980a64584a591af775bb9c9fe9450124df9 ("8xxx: Removed
CONFIG_NUM_CPUS from 85xx/86xx") breaks U-Boot on various boards,
namely the ones that call get_sys_info() from board_early_init_f().
get_sys_info() calls cpu_numcores(), which depends on probecpu()
being called before. But probecpu() is called after board_early_init_f(),
and so cpu_numcores() returns random values, which in turn crashes
get_sys_info().
To fix the issue we place probecpu() before board_early_init_f()
in an initialization sequence.
Booting on the following boards should be revived now:
mpc8540ads
mpc8541cds
mpc8548cds
mpc8555cds
mpc8560ads
mpc8568mds
mpc8569mds
and maybe more.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Fri, 2 Oct 2009 22:48:07 +0000 (18:48 -0400)]
mpc86xx: delete unused MPC86xx_DDR_SDRAM_CLK_CNTL define
This is an orphaned legacy leftover that is just polluting
the config file namespace.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Dipen Dudhat [Thu, 8 Oct 2009 08:03:29 +0000 (13:33 +0530)]
ppc/P1_P2_RDB: On-chip BootROM support
On Chip BootROM support for P1 and P2 series RDB platforms.
This patch is derived from latest On Chip BootROM support on MPC8536DS
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Dipen Dudhat [Thu, 8 Oct 2009 08:03:18 +0000 (13:33 +0530)]
ppc/P1_P2_RDB: NAND Boot Support
NAND Boot support for P1 and P2 series RDB platforms.
This patch is derived from NAND Boot support on MPC8536DS.
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Wed, 7 Oct 2009 20:34:28 +0000 (16:34 -0400)]
mpc8xxx: improve LAW error messages when setting up DDR
When setting up the LAWs for the DDR, if there was an error,
you got the not-so-helpful error text "ERROR" and nothing
else. Not only is it non-informative, but it is also
pretty frustrating trying to grep for "ERROR" in the source.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Wed, 30 Sep 2009 20:12:31 +0000 (16:12 -0400)]
sbc8641d: fix LAW so board doesn't hang on DDR init
All versions between now and since this commit:
commit
bd76729bcbfd64b5d016a9b936f058931fc06eaf
MPC86xx: set CONFIG_MAX_MEM_MAPPED to 2G by default
will fail to allow the SBC8641D to get past DDR init, because the
LAW config was overlapping. Eventually this board will do SPD
EEPROM config, but for now this gets the board working again.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Thu, 15 Oct 2009 20:13:37 +0000 (22:13 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Mike Frysinger [Wed, 14 Oct 2009 01:58:26 +0000 (21:58 -0400)]
Blackfin: drop MAC display at boot
The default Blackfin boot would display the MAC address for the first NIC,
but this relies on the environment. The current net multi stack no longer
writes the default hardware settings to the environment, so most of the
time the display shows all zeros. This can be pretty confusing and really
doesn't add anything useful, so just drop it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Fri, 9 Oct 2009 06:24:33 +0000 (02:24 -0400)]
Blackfin: reset watchdog in udelay()
All arches apparently should reset the watchdog in their udelay loop as
noted on the mailing list recently:
> A comment in flash_status_check() suggests that udelay() is
> expected to reset the watchdog, but I can't find any architecture
> where it does.
If this is missing in other architectures, it should be fixed at the
root cause, i. e. in udelay() or in the respective support routines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Fri, 9 Oct 2009 06:22:11 +0000 (02:22 -0400)]
Blackfin: Remove relocation fixups
Blackfin pieces like commit
0630535e2d062dd73c1ceca5c6125c86d1127a49.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Daniel Gorsulowski [Tue, 29 Sep 2009 06:03:12 +0000 (08:03 +0200)]
at91: Update MEESC board support
This patch implements several updates:
-disable CONFIG_ENV_OVERWRITE
-add new hardware style variants and set the arch numbers appropriate
-pass the serial# and hardware revision to the kernel
-removed unused macros from include/configs/meesc.h
-fixed multiline comment style
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Simon Kagstrom [Thu, 1 Oct 2009 14:11:50 +0000 (19:41 +0530)]
arm: Correct build with CONFIG_SYS_HUSH_PARSER set
FLAG_PARSE_SEMICOLON is not defined without hush.h, so include that.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Olof Johansson [Tue, 29 Sep 2009 14:22:45 +0000 (10:22 -0400)]
TI: OMAP3: Overo Tobi ethernet support
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.
This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Olof Johansson [Tue, 29 Sep 2009 14:21:29 +0000 (10:21 -0400)]
SMC911X: Add chip auto detection
Refactor the smc911x driver to allow for detecting when the chip is missing.
I.e. the detect_chip() function is called earlier and will abort gracefully
when the Chip ID read returns all 1's.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Tom Rix [Tue, 29 Sep 2009 14:19:49 +0000 (10:19 -0400)]
TI OMAP3 Use arm init sequence to initialize i2c
This changes fixes an early i2c error.
It appears that I2C is working because once a read or write
error is detected, the omap24xx_i2c driver calls i2c_init
inside its error handling check.
While it is ok to attempt error handling this way, the boards
must not depend on this side effect to initialize it's i2c.
Instead of explicitly calling i2c_init for every board, use
the generic arm initialization in lib_arm/board.c. By defining
the config variable CONFIG_HARD_I2C, the omap3 i2c initialization
is included in the init_sequence table.
Run tested on Beagle.
Compile tested on the omap3's
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Sandeep Paulraj [Tue, 29 Sep 2009 13:43:04 +0000 (09:43 -0400)]
TI: DaVinci DM365: Enabling network Support on DM365 EVM
This patch enables EMAC on the DM365 EVM.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Tue, 29 Sep 2009 14:02:38 +0000 (10:02 -0400)]
TI: DaVinci: GPIO header file and definitions
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Fri, 18 Sep 2009 21:30:05 +0000 (17:30 -0400)]
TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Olof Johansson [Mon, 28 Sep 2009 12:19:30 +0000 (08:19 -0400)]
OMAP3: Clean up whitespace in mux configs
Switch from space-based indentation to tab-based in mux configs, as pointed
out by WD at:
http://lists.denx.de/pipermail/u-boot/2009-September/061241.html
Nothing but whitespace changes in this patch (diff -w gives no output).
Signed-off-by: Olof Johansson <olof@lixom.net>
Dirk Behme [Mon, 28 Sep 2009 12:17:50 +0000 (08:17 -0400)]
OMAP3 MMC: Fix warning dereferencing type-punned pointer
Fix warning
Dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Steve Sakoman <sakoman@gmail.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Simon Kagstrom [Mon, 21 Sep 2009 22:31:01 +0000 (04:01 +0530)]
Support for the OpenRD base board
The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Prafulla Wadaskar [Mon, 21 Sep 2009 14:45:17 +0000 (20:15 +0530)]
Kirkwood: mv88f6281gtw_ge: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on mv88f6281gtw_ge board.
To create Kirkwood boot image to be flashed on SPI Flash,
additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Prafulla Wadaskar [Mon, 21 Sep 2009 12:53:11 +0000 (18:23 +0530)]
Kirkwood: rd6281a: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on rd6281a platform.
To create Kirkwood boot image to be flashed on NAND,
additional parameter u-boot.kwb need to be passed during make.
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Tom Rix [Sun, 27 Sep 2009 16:10:09 +0000 (11:10 -0500)]
Add support for Eukrea CPU9260/CPU9G20 SBC
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Tom Rix [Sun, 27 Sep 2009 12:47:24 +0000 (07:47 -0500)]
Add support for Eukrea CPUAT91 SBC
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR
flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII
mode.
Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Mon, 14 Sep 2009 18:57:47 +0000 (14:57 -0400)]
TI: DaVinci DM365: Minor config cleanup
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
This is already included when we include the
config_cmd_default.h header file. So this flag is removed.
Also another flag to enable NAND functions was being
enabled incorrectly.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Mon, 14 Sep 2009 19:03:06 +0000 (15:03 -0400)]
TI DaVinci DM365: Removing header file which does not exist
The DaVinci DM365 EVM board specific code was including a header file
which does not exist. So removing this header file.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Tue, 8 Sep 2009 22:08:06 +0000 (18:08 -0400)]
TI DaVinci: DM355: Config Cleanup and Update
This patch does the following
1) Enables the NAND driver which is now available.
2) Enables the 'CONFIG_MTD_DEVICE' as without this the
compilation will fail
3) We now have a safe place to store environment and defines
an offset where this can be stored. This offset value is such that it is after
the location where U-Boot is flashed using TI flash utilities.
4) Enables Bootdelay
5) Increases malloc() arena size. Manufacturers are coming out with
NAND with large blocks sizes of upto 1 MiB. It has been noticed that
as the block size of the NAND used is increased, if this particular
value is not increased, the NAND driver will output out of memory
errors.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Tue, 8 Sep 2009 15:37:39 +0000 (11:37 -0400)]
TI DaVinci: DM646x: Initial Support for DM646x SOC
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Sandeep Paulraj [Wed, 9 Sep 2009 19:26:00 +0000 (15:26 -0400)]
TI DaVinci: DM6446: Fix Compilation error in NAND mode
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Tom Rix [Thu, 10 Sep 2009 19:27:57 +0000 (15:27 -0400)]
OMAP3 Move cache routine to cache.S
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.
The conversion from cache.c to cache.S was done most through
disassembling the uboot binary. The only significant change was
to change the comparision for the return of get_cpu_rev from
cmp r0, #0
beq earlier_than_label
Which was lost information to
cmp r0, #CPU_3XX_ES20
blt earlier_than_label
The paths through the enable routine were verified by
adding an infinite loop and seeing the hang. Then
removing the infinite loop and seeing it continue.
The disable routine is similar enough that it was not
tested with this method.
Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Sandeep Paulraj [Tue, 8 Sep 2009 21:09:52 +0000 (17:09 -0400)]
TI DaVinci: Remove references to SZ_xx
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Mon, 12 Oct 2009 21:40:27 +0000 (23:40 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Ed Swarthout [Thu, 9 Oct 2008 06:27:18 +0000 (01:27 -0500)]
Leave x86emu op code tables in default section
Forcing the tables into got2 caused extra relocation when using -mrelocatable.
This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Jin Zhengxiong <Jason.Jin@freescale.com>
Luigi 'Comio' Mantellini [Sat, 10 Oct 2009 10:42:22 +0000 (12:42 +0200)]
Update all board to support new bbmiiphy driver (with multibus support)
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Luigi 'Comio' Mantellini [Sat, 10 Oct 2009 10:42:21 +0000 (12:42 +0200)]
Add bb_miiphy_init call before any ethernet bring-up code.
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Luigi 'Comio' Mantellini [Sat, 10 Oct 2009 10:42:20 +0000 (12:42 +0200)]
Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an arbitrary number of mii buses.
This feature is useful when your board uses different mii buses for different
phys and all (or a part) of these buses are implemented via bit-banging mode.
The driver requires that the following macros should be defined into the board
configuration file:
CONFIG_BITBANGMII - Enable the miiphybb driver
CONFIG_BITBANGMII_MULTI - Enable the multi bus support
If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
to define at least the following macros:
MII_INIT - Generic code to enable the MII bus (optional)
MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional)
MDIO_ACTIVE - Activate the MDIO pin as out pin
MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
MDIO_READ - Read the MDIO pin
MDIO(v) - Write v on the MDIO pin
MDC_DECLARE - Declaration needed to access to the MDC pin (optional)
MDC(v) - Write v on the MDC pin
The previous macros make the driver compatible with the previous version
(that didn't support the multi-bus).
When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
the bb_miiphy_buses[] array with a record for each required bus and declare
the bb_miiphy_buses_num variable with the number of mii buses.
The record (struct bb_miiphy_bus) has the following fields/callbacks (see
miiphy.h for details):
char name[] - The symbolic name that must be equal to the MII bus
registered name
int (*init)() - Initialization function called at startup time (just
before the Ethernet initialization)
int (*mdio_active)() - Activate the MDIO pin as output
int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
int (*set_mdio)() - Write the MDIO pin
int (*get_mdio)() - Read the MDIO pin
int (*set_mdc)() - Write the MDC pin
int (*delay)() - Delay function
void *priv - Private data used by board specific code
The board code will look like:
struct bb_miiphy_bus bb_miiphy_buses[] = {
{ .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... },
{ .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... },
...
int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
sizeof(bb_miiphy_buses[0]);
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Paul Gortmaker [Fri, 2 Oct 2009 22:54:20 +0000 (18:54 -0400)]
mpc83xx: cosmetic comment update relating to SPD EEPROM
commit
6d0f6bcf337c5261c08fabe12982178c2c489d76 did the big
rename of CFG_ macros to CONFIG_SYS macros. But it missed
a couple of instances within comments.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Wolfgang Denk [Thu, 8 Oct 2009 22:03:18 +0000 (00:03 +0200)]
Merge branch 'reloc'
Joakim Tjernlund [Thu, 8 Oct 2009 00:03:51 +0000 (02:03 +0200)]
relocation: Do not relocate NULL pointers.
NULL is an absolute value and should not be relocated.
After this correction code like:
void weak_fun(void) __attribute__((weak));
printf("weak_fun:%p\n", weak_fun);
will still print null after relocation.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Peter Tyser [Wed, 7 Oct 2009 16:45:00 +0000 (11:45 -0500)]
85xx: Ensure BSS segment isn't linked at address 0
When U-Boot is relocated from flash to RAM pointers are modified
accordingly. However, pointers initialzed with NULL values should not
be modified so that they maintain their intended NULL value. If the
BSS segment is linked at address 0 its address will not be
updated as necessary during relocation.
This is a temporary workaround. The end goal is to add support to
U-Boot to dynamically locate the BSS at an arbitrary address at
runtime. When the ability to fixup the BSS inteligently is
added, this workaround can be removed and the 85xx link script
can put the BSS at a fixed address at link time.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Detlev Zundel [Wed, 7 Oct 2009 14:38:05 +0000 (16:38 +0200)]
tqm5200: Correct comment and code in post_hotkeys_pressed.
This fixes the code and the comment according to the original intent of
doing an intensive memory test when PSC6_3 is pulled low on the STK52xx.
Notably PORT_CONFIG will be overridden with this correct code now,
so beware.
The original code only worked by coincidence depending on the PORT_CONFIG
setting from the header file. The new code was tested to ensure that the
(undocumented) memory test still works on the STK52x.
Signed-off-by: Detlev Zundel <dzu@denx.de>
CC: Martin Krause <Martin.Krause@tqs.de>
Minor white-space cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 4 Oct 2009 20:56:08 +0000 (22:56 +0200)]
mpc512x: fix fixed_sdram() init code.
Commit
054197ba and later fixes used an array to initialize some of
the MDDRC parameters; however, the use of an array turned out to be a
bad idea as it was not possible to correlate structure entries to
array indices in readable and reliable way. Now we use a struct
instead, which makes this self-explanatory.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:22 +0000 (20:04 +0200)]
ppc4xx: respect 80-chars per line in ppc*.h files
After running checkstyle.pl on the three previous patches I noted that in
the *.h files there were a lot of long lines. This patch solves this problem.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:21 +0000 (20:04 +0200)]
ppc4xx: Rework cmd reginfo
The command "reginfo" got an overhaul for the ppc4xx. It dumps all the
relevant HW configuration registers (address, symbolic name, content).
This allows to easily detect errors in *.h files and changes in the HW
configuration.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:20 +0000 (20:04 +0200)]
ppc_4xx: Apply new HW register names
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Sun, 4 Oct 2009 18:04:19 +0000 (20:04 +0200)]
ppc4xx: Cleanup some HW register names
Here you find all the changes in the include directory for new register names
and adapting other ones to the names used by AMCC in their manuals, e.g.
For 440EPx/GRPPC440EPx/GRX, Revision 1.15 – September 22, 2008
For PPC405GP Embedded Processor, Revision 1.02 – March 22, 2006
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 6 Oct 2009 05:21:08 +0000 (07:21 +0200)]
ppc4xx: Add PPC405EX(r) Rev D support
Unfortunately some Rev D PPC405EX/405EXr PVR's are identical with older
405EX(r) parts. Here a list:
0x12911475 - 405EX Rev D with Security *and* 405EX Rev A/B witout Sec
0x12911473 - 405EX Rev D without Security *and* 405EXr Rev A/B with Sec
Since there are only a few older parts in the field, this patch now
changes the PVR's above to represent the new Rev D versions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phong Vo" <pvo@amcc.com>
Stefan Roese [Fri, 2 Oct 2009 12:35:16 +0000 (14:35 +0200)]
ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scan
This message is printed upon PCIe bus scan, not only upon error, but also
if no PCIe device is detected at all. Since this is not an error, let's
remove this message in this case. We already have the message
"link is not up." if there is no PCIe device present.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Mike Nuss [Mon, 5 Oct 2009 16:33:28 +0000 (12:33 -0400)]
PPC4xx: Denali core: Fix incorrect DDR row bits
The SPD detection code for the Denali memory controller used on some
ppc4xx
processors incorrectly encodes DDR0_42. With certain memory
configurations,
this can cause the bootwrapper to incorrectly calculate the installed
memory
size, because the number of row bits is wrong. This patch fixes that
encoding.
Signed-off-by: Mike Nuss <mike@terascala.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ben Warren [Mon, 5 Oct 2009 07:02:51 +0000 (00:02 -0700)]
Add information about return values of xxx_eth_register() in documentation
As discussed on mailing list, <0 indicates failure, >=0 indicates number
of interfaces found.
Also added blurb about private data
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Wed, 9 Sep 2009 18:41:22 +0000 (14:41 -0400)]
document network driver framework
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Prafulla Wadaskar [Wed, 9 Sep 2009 10:29:19 +0000 (15:59 +0530)]
net: kirkwood_egiga.c: fixed build warning
if link up detection code is disabled through config option, it gives build warning.
This patch fixes the same
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ben Warren [Mon, 5 Oct 2009 05:37:03 +0000 (22:37 -0700)]
Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI
added
Also:
- changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111
- cleaned up line lengths
- modified all boards that override weak function in this driver
- modified all eeprom standalone apps to work with new driver
- updated blackfin standalone EEPROM app after testing
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Prafulla Wadaskar [Mon, 21 Sep 2009 14:58:18 +0000 (20:28 +0530)]
net: phy: mv88e61xx.c : fixed build warning
following build warning was observed
mv88e61xx.c: In function ‘mv88e61xx_busychk’:
mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules
This patch fixes the same
Patch tested for rd6281a board build
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
James Clough [Thu, 10 Sep 2009 07:11:50 +0000 (09:11 +0200)]
net: Fix problem with 405EZ ethernet interrupt
On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the
UIC. We need to acknowledge the RX-/TX-interrupts in the
SDR0_ICINTSTAT reg as well.
This problem was introduced with commit
d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines]
Signed-off-by: James Clough <james@rtetc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Mike Frysinger [Wed, 2 Sep 2009 08:18:55 +0000 (04:18 -0400)]
net: add random_port() prototype
The random_port() is meant to be used by other net code, but without a
prototype, we get fun warnings like:
dns.c: In function 'DnsSend':
dns.c:89: warning: implicit declaration of function 'random_port'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Wolfgang Denk [Sat, 3 Oct 2009 21:40:35 +0000 (23:40 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Sat, 3 Oct 2009 21:38:55 +0000 (23:38 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Peter Tyser [Mon, 21 Sep 2009 16:20:37 +0000 (11:20 -0500)]
ppc: Remove reloc_off field from global_data structure
Now that proper relocation is supported, the reloc_off field is no longer
necessary.
Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot.
We therefore increment XF_VERSION to 6
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Peter Tyser [Tue, 22 Sep 2009 14:27:55 +0000 (09:27 -0500)]
arm/microblaze/nios/nios2/sh: Remove relocation fixups
These architectures don't need relocation fixups, so reduce their
codesize a bit by defining CONFIG_RELOC_FIXUP_WORKS.
Also remove the reloc_off field from their global data structures
as it is no longer needed.
Note that the location of the standalone application jump table pointer
in the global data structure is affected by this change, breaking
execution of standalone applications compiled for previous versions of
U-Boot. We will therefore increment XF_VERSION in the next commit,
which also touches this area.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Peter Tyser [Mon, 21 Sep 2009 16:20:36 +0000 (11:20 -0500)]
Conditionally perform common relocation fixups
Add #ifdefs where necessary to not perform relocation fixups. This
allows boards/architectures which support relocation to trim a decent
chunk of code.
Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:35 +0000 (11:20 -0500)]
p3mx: Remove serial relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:34 +0000 (11:20 -0500)]
lwmon, lwmon5: Remove sysmon POST relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:33 +0000 (11:20 -0500)]
mpl: Remove memory test relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:32 +0000 (11:20 -0500)]
fpga: Remove relocation fixups
PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups. Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:31 +0000 (11:20 -0500)]
tsec: Remove PHY command relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:30 +0000 (11:20 -0500)]
ppc: Remove board-specific command table relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:29 +0000 (11:20 -0500)]
ppc: Remove extable relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:28 +0000 (11:20 -0500)]
ppc: Remove pci config table pointer relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Peter Tyser [Mon, 21 Sep 2009 16:20:27 +0000 (11:20 -0500)]
ppc: Remove board.c relocation fixups
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>