Dave Airlie [Thu, 15 Jun 2017 23:54:02 +0000 (09:54 +1000)]
Merge branch 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux into drm-next
New radeon and amdgpu features for 4.13:
- Lots of Vega10 bug fixes
- Preliminary Raven support
- KIQ support for compute rings
- MEC queue management rework from Andres
- Audio support for DCE6
- SR-IOV improvements
- Improved module parameters for controlling radeon vs amdgpu support
for SI and CIK
- Bug fixes
- General code cleanups
[airlied: dropped drmP.h header from one file was needed and build broke]
* 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux: (362 commits)
drm/amdgpu: Fix compiler warnings
drm/amdgpu: vm_update_ptes remove code duplication
drm/amd/amdgpu: Port VCN over to new SOC15 macros
drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macros
drm/amd/amdgpu: Port PSP v3.1 over to new SOC15 macros
drm/amd/amdgpu: Port NBIO v7.0 driver over to new SOC15 macros
drm/amd/amdgpu: Port NBIO v6.1 driver over to new SOC15 macros
drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macros
drm/amd/amdgpu: Port MMHUB over to new SOC15 macros
drm/amd/amdgpu: Cleanup gfxhub read-modify-write patterns
drm/amd/amdgpu: Port GFXHUB over to new SOC15 macros
drm/amd/amdgpu: Add offset variant to SOC15 macros
drm/amd/powerplay: add avfs control for Vega10
drm/amdgpu: add virtual display support for raven
drm/amdgpu/gfx9: fix compute ring doorbell index
drm/amd/amdgpu: Rename KIQ ring to avoid spaces
drm/amd/amdgpu: gfx9 tidy ups (v2)
drm/amdgpu: add contiguous flag in ucode bo create
drm/amdgpu: fix missed gpu info firmware when cache firmware during S3
drm/amdgpu: export test ib debugfs interface
...
Dave Airlie [Thu, 15 Jun 2017 23:33:43 +0000 (09:33 +1000)]
Merge tag 'drm-misc-next-2017-06-15' of git://anongit.freedesktop.org/git/drm-misc into drm-next
Cross-subsystem Changes:
- dt-bindings: add vendor prefix for NLT Technologies, Ltd. (Lucas)
- dt-bindings: Add support for samsung s6e3hf2 panel (Hoegeun)
Core Changes:
- Add drm_panel_bridge to avoid connector boilerplate in drivers (Eric)
- Trival fixes for dupe forward decl and reduce scope of variable (Dawid)
Driver Changes:
- dw-hdmi: Use mode_valid hook on bridge instead of connector (Jose)
- vc4,atmel-hlcdc: Use drm_panel_bridge where appropriate (Eric)
- panel: Add Innolux P079ZCA panel driver (Chris)
- panel-simple: Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels (Lucas)
- panel-samsung-s6e3ha2: Add s6e3hf2 panel support (Hoegeun)
- zte,vc4,pl111,panel,mxsfb: Miscellaneous fixes
Cc: Jose Abreu <Jose.Abreu@synopsys.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Chris Zhong <zyw@rock-chips.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Cc: Dawid Kurek <dawikur@gmail.com>
* tag 'drm-misc-next-2017-06-15' of git://anongit.freedesktop.org/git/drm-misc: (26 commits)
drm: Reduce scope of 'state' variable
drm: mxsfb_crtc: Reset the eLCDIF controller
drm: Remove duplicate forward declaration
drm/panel: s6e3ha2: Add support for s6e3hf2 panel on TM2e board
dt-bindings: Add support for samsung s6e3hf2 panel
drm/panel: add backlight dependency for sitronix-st7789v
drm/panel: S6E3HA2 needs backlight code
drm/panel: simple: add support for AUO P320HVN03
drm/panel: simple: add support for NLT NL192108AC18-02D
dt-bindings: add vendor prefix for NLT Technologies, Ltd.
drm/panel: simple: add support for NEC NL12880B20-05
drm/panel: add Innolux P079ZCA panel driver
dt-bindings: Add INNOLUX P079ZCA panel bindings
drm/vc4: Fix resource leak in 'vc4_get_hang_state_ioctl()' in error handling path
drm/vc4/vc4_bo.c: always set bo->resv
drm: Add const to name field declaration in struct drm_prop_enum_list
drm/pl111: Fix offset calculation for the primary plane.
drm/atmel-hlcdc: Fix panel registration
drm/bridge: Build the panel wrapper in drm_kms_helper
drm/atmel-hlcdc: Replace the panel usage with drm_panel_bridge.
...
Dawid Kurek [Thu, 15 Jun 2017 17:45:56 +0000 (19:45 +0200)]
drm: Reduce scope of 'state' variable
Smaller scope reduces visibility of variable and makes usage of
uninitialized variable less possible.
Changes in v2:
- separate declaration and initialization
Changes in v3:
- add missing signed-off-by tag
Signed-off-by: Dawid Kurek <dawikur@gmail.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170615174556.GA8872@gmail.com
Fabio Estevam [Fri, 5 May 2017 18:01:41 +0000 (15:01 -0300)]
drm: mxsfb_crtc: Reset the eLCDIF controller
According to the eLCDIF initialization steps listed in the MX6SX
Reference Manual the eLCDIF block reset is mandatory.
Without performing the eLCDIF reset the display shows garbage content
when the kernel boots.
In earlier tests this issue has not been observed because the bootloader
was previously showing a splash screen and the bootloader display driver
does properly implement the eLCDIF reset.
Add the eLCDIF reset to the driver, so that it can operate correctly
independently of the bootloader.
Tested on a imx6sx-sdb board.
Cc: <stable@vger.kernel.org>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1494007301-14535-1-git-send-email-fabio.estevam@nxp.com
Harish Kasiviswanathan [Fri, 9 Jun 2017 21:47:28 +0000 (17:47 -0400)]
drm/amdgpu: Fix compiler warnings
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Fri, 9 Jun 2017 21:47:27 +0000 (17:47 -0400)]
drm/amdgpu: vm_update_ptes remove code duplication
CPU and GPU paths were mostly the same.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 17:50:53 +0000 (13:50 -0400)]
drm/amd/amdgpu: Port VCN over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 17:46:44 +0000 (13:46 -0400)]
drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 17:45:30 +0000 (13:45 -0400)]
drm/amd/amdgpu: Port PSP v3.1 over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 17:43:36 +0000 (13:43 -0400)]
drm/amd/amdgpu: Port NBIO v7.0 driver over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 17:09:41 +0000 (13:09 -0400)]
drm/amd/amdgpu: Port NBIO v6.1 driver over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 17:03:41 +0000 (13:03 -0400)]
drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 16:34:28 +0000 (12:34 -0400)]
drm/amd/amdgpu: Port MMHUB over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 16:30:41 +0000 (12:30 -0400)]
drm/amd/amdgpu: Cleanup gfxhub read-modify-write patterns
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 16:12:22 +0000 (12:12 -0400)]
drm/amd/amdgpu: Port GFXHUB over to new SOC15 macros
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 16:05:42 +0000 (12:05 -0400)]
drm/amd/amdgpu: Add offset variant to SOC15 macros
Allows reading/writing via SOC15 macros with offset for
various register banks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 13 Jun 2017 18:51:57 +0000 (14:51 -0400)]
drm/amd/powerplay: add avfs control for Vega10
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 2 Jun 2017 18:52:18 +0000 (14:52 -0400)]
drm/amdgpu: add virtual display support for raven
Same as other asics. If enabled, exposes a user selectable
number of virtual displays.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 13 Jun 2017 02:55:22 +0000 (22:55 -0400)]
drm/amdgpu/gfx9: fix compute ring doorbell index
This got lost when the code was revamped. Copy/paste bug from
gfx8.
Reported-by: Evan Quan <evan.quan@amd.com>
Fixes: 78c168342 (drm/amdgpu: allow split of queues with kfd at queue granularity v4)
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 13:05:04 +0000 (09:05 -0400)]
drm/amd/amdgpu: Rename KIQ ring to avoid spaces
Swap space for underscore in ring name.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 12 Jun 2017 12:45:02 +0000 (08:45 -0400)]
drm/amd/amdgpu: gfx9 tidy ups (v2)
A couple of simple tidy ups to register programming.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
(v2): Avoid using 'data' uninitialized
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
horchen [Fri, 9 Jun 2017 11:56:48 +0000 (04:56 -0700)]
drm/amdgpu: add contiguous flag in ucode bo create
Under VF environment, the ucode would be settled to the visible VRAM,
As it would be pinned to the visible VRAM, it's better to add
contiguous flag,otherwise it need to move gpu address during the pin
process. This movement is not necessary.
Signed-off-by: horchen <horace.chen@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Mon, 5 Jun 2017 14:11:59 +0000 (22:11 +0800)]
drm/amdgpu: fix missed gpu info firmware when cache firmware during S3
gpu_info firmware is released after data is used. But when system enters into
suspend, upper class driver will cache all firmware names. At that time,
gpu_info will be failing to load. It seems an upper class issue, that we should
not release gpu_info firmware until device finished.
[ 903.236589] cache_firmware: amdgpu/vega10_sdma1.bin
[ 903.236590] fw_set_page_data: fw-amdgpu/vega10_sdma1.bin buf=
ffff88041eee10c0 data=
ffffc90002561000 size=17408
[ 903.236591] cache_firmware: amdgpu/vega10_sdma1.bin ret=0
[ 903.464160] __allocate_fw_buf: fw-amdgpu/vega10_gpu_info.bin buf=
ffff88041eee2c00
[ 903.471815] (NULL device *): loading /lib/firmware/updates/4.11.0-custom/amdgpu/vega10_gpu_info.bin failed with error -2
[ 903.482870] (NULL device *): loading /lib/firmware/updates/amdgpu/vega10_gpu_info.bin failed with error -2
[ 903.492716] (NULL device *): loading /lib/firmware/4.11.0-custom/amdgpu/vega10_gpu_info.bin failed with error -2
[ 903.503156] (NULL device *): direct-loading amdgpu/vega10_gpu_info.bin
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 10 May 2017 15:04:06 +0000 (23:04 +0800)]
drm/amdgpu: export test ib debugfs interface
As Christian and David's suggestion, submit the test ib ring debug interfaces.
It's useful for debugging with the command submission without VM case.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 8 Jun 2017 18:39:32 +0000 (14:39 -0400)]
drm/amd/powerplay: add GPU power display for vega10
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 8 Jun 2017 17:48:59 +0000 (13:48 -0400)]
drm/amd/powerplay: update vega10_ppsmc.h
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 9 Jun 2017 15:39:31 +0000 (23:39 +0800)]
drm/amdgpu: avoid to reset wave_front_size to 0
No need to clear it. The values are set explicitly.
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Fri, 9 Jun 2017 14:30:52 +0000 (22:30 +0800)]
drm/amdgpu: add new member in gpu_info fw
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dawid Kurek [Wed, 14 Jun 2017 21:35:18 +0000 (23:35 +0200)]
drm: Remove duplicate forward declaration
Forward declarations in C are great but I'm pretty sure one is enough.
Signed-off-by: Dawid Kurek <dawikur@gmail.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170614213518.GA3554@gmail.com
Hoegeun Kwon [Tue, 18 Apr 2017 08:40:35 +0000 (17:40 +0900)]
drm/panel: s6e3ha2: Add support for s6e3hf2 panel on TM2e board
This patch supports TM2e panel and the panel has 1600x2560 resolution
in 5.65" physical.
This identify panel type with compatibility string, also invoke
display mode that matches the type. So add the check code for s6e3ha2
compatibility and s6e3hf2 type and select the drm_display_mode of
default and edge type.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
[treding@nvidia.com: fixup checkpatch warnings]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1492504836-19225-3-git-send-email-hoegeun.kwon@samsung.com
Hoegeun Kwon [Tue, 18 Apr 2017 08:40:34 +0000 (17:40 +0900)]
dt-bindings: Add support for samsung s6e3hf2 panel
The samsung s6e3hf2 panel is a 5.65" 1600x2560 AMOLED panel connected
using MIPI-DSI interfaces.
The s6e3hf2 is add to samsung,s6e3ha2.txt binding because it is a
panel similar to the s6e3ha2. So add the compatible string and
comments.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1492504836-19225-2-git-send-email-hoegeun.kwon@samsung.com
Arnd Bergmann [Wed, 19 Apr 2017 18:03:08 +0000 (20:03 +0200)]
drm/panel: add backlight dependency for sitronix-st7789v
Without the dependency, we run into a link error:
drivers/gpu/drm/panel/panel-sitronix-st7789v.o: In function `st7789v_probe':
panel-sitronix-st7789v.c:(.text.st7789v_probe+0xc0): undefined reference to `of_find_backlight_by_node'
Fixes: 7142afb3a186 ("drm/panel: Add driver for sitronix ST7789V LCD controller")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170419180326.303994-1-arnd@arndb.de
Arnd Bergmann [Wed, 19 Apr 2017 17:59:18 +0000 (19:59 +0200)]
drm/panel: S6E3HA2 needs backlight code
The new S6E3HA2 driver fails to link when backlight is disabled:
ERROR: "backlight_device_register" [drivers/gpu/drm/panel/panel-samsung-s6e3ha2.ko] undefined!
ERROR: "backlight_device_unregister" [drivers/gpu/drm/panel/panel-samsung-s6e3ha2.ko] undefined!
This adds a Kconfig dependency like we have it for some other panel drivers.
Fixes: ed29f9426d9b ("drm/panel: Add support for S6E3HA2 panel driver on TM2 board")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170419175939.189098-2-arnd@arndb.de
Lucas Stach [Thu, 8 Jun 2017 18:07:58 +0000 (20:07 +0200)]
drm/panel: simple: add support for AUO P320HVN03
This adds support for the AU Optronics Corporation 31.5"
FHD (1920x1080) LVDS TFT LCD panel, which can be supported
by the simple panel driver
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-4-l.stach@pengutronix.de
Lucas Stach [Thu, 8 Jun 2017 18:07:57 +0000 (20:07 +0200)]
drm/panel: simple: add support for NLT NL192108AC18-02D
This adds support for the NLT Technologies NL192108AC18-02D
15.6" LVDS FullHD TFT LCD panel, which can be supported
by the simple panel driver.
Timings are taken from the preliminary datasheet, as a final
one is not yet available.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-3-l.stach@pengutronix.de
Lucas Stach [Thu, 8 Jun 2017 18:07:56 +0000 (20:07 +0200)]
dt-bindings: add vendor prefix for NLT Technologies, Ltd.
NLT technologies is the former NEC display business, but changed its
name to NLT Technologies when forming a joint venture with
Shenzhen AVIC OPTOELECTRONICS, Ltd.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-2-l.stach@pengutronix.de
Lucas Stach [Thu, 8 Jun 2017 18:07:55 +0000 (20:07 +0200)]
drm/panel: simple: add support for NEC NL12880B20-05
This adds support for the NEC LCD Technologies, Ltd. 12.1"
WXGA (1280x800) LVDS TFT LCD panel, which can be supported
by the simple panel driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-1-l.stach@pengutronix.de
Chris Zhong [Fri, 24 Mar 2017 00:51:32 +0000 (08:51 +0800)]
drm/panel: add Innolux P079ZCA panel driver
Support Innolux P079ZCA 7.85" 768x1024 TFT LCD panel, it is a MIPI DSI
panel.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1490316692-20506-2-git-send-email-zyw@rock-chips.com
Chris Zhong [Fri, 24 Mar 2017 00:51:31 +0000 (08:51 +0800)]
dt-bindings: Add INNOLUX P079ZCA panel bindings
The Innolux P079ZCA is a 7.85" panel with a 768X1024 resolution and
connected to DSI using four lanes.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1490316692-20506-1-git-send-email-zyw@rock-chips.com
Dave Airlie [Wed, 26 Apr 2017 03:09:02 +0000 (04:09 +0100)]
drm/syncobj: add sync_file interaction. (v1.2)
This interface allows importing the fence from a sync_file into
an existing drm sync object, or exporting the fence attached to
an existing drm sync object into a new sync file object.
This should only be used to interact with sync files where necessary.
v1.1: fence put fixes (Chris), drop fence from ioctl names (Chris)
fixup for new fence replace API.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 4 Apr 2017 03:26:24 +0000 (13:26 +1000)]
drm: introduce sync objects (v4)
Sync objects are new toplevel drm object, that contain a
pointer to a fence. This fence can be updated via command
submission ioctls via drivers.
There is also a generic wait obj API modelled on the vulkan
wait API (with code modelled on some amdgpu code).
These objects can be converted to an opaque fd that can be
passes between processes.
v2: rename reference/unreference to put/get (Chris)
fix leaked reference (David Zhou)
drop mutex in favour of cmpxchg (Chris)
v3: cleanups from danvet, rebase on drm_fops rename
check fd_flags is 0 in ioctls.
v4: export find/free, change replace fence to take a
syncobj. In order to support lookup first, replace
later semantics which seem in the end to be cleaner.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Christophe JAILLET [Fri, 12 May 2017 12:38:03 +0000 (14:38 +0200)]
drm/vc4: Fix resource leak in 'vc4_get_hang_state_ioctl()' in error handling path
If one 'drm_gem_handle_create()' fails, we leak somes handles and some
memory.
In order to fix it:
- move the 'free(bo_state)' at the end of the function so that it is also
called in the eror handling path. This has the side effect to also try
to free it if the first 'kcalloc' fails. This is harmless.
- add a new label, err_delete_handle, in order to delete already
allocated handles in error handling path
- remove the now useless 'err' label
The way the code is now written will also delete the handles if the
'copy_to_user()' call fails.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Eric Anholt <eric@anholt.net>
Link: http://patchwork.freedesktop.org/patch/msgid/20170512123803.1886-1-christophe.jaillet@wanadoo.fr
Hans Verkuil [Wed, 7 Jun 2017 19:05:57 +0000 (21:05 +0200)]
drm/vc4/vc4_bo.c: always set bo->resv
The bo->resv pointer could be NULL, leading to kernel oopses
like the one below.
This patch ensures that bo->resv is always set in vc4_create_object
ensuring that it is never NULL.
Thanks to Eric Anholt for pointing to the correct solution.
[ 19.738487] Unable to handle kernel NULL pointer dereference at virtual address
00000000
[ 19.746805] pgd =
ffff8000275fc000
[ 19.750319] [
00000000] *pgd=
0000000000000000
[ 19.754715] Internal error: Oops:
96000004 [#1] PREEMPT SMP
[ 19.760369] Modules linked in: smsc95xx usbnet vc4 drm_kms_helper drm pwm_bcm2835 i2c_bcm2835 bcm2835_rng rng_core bcm2835_dma virt_dma
[ 19.772767] CPU: 0 PID: 1297 Comm: Xorg Not tainted 4.12.0-rc1-rpi3 #58
[ 19.779476] Hardware name: Raspberry Pi 3 Model B (DT)
[ 19.784688] task:
ffff800028268000 task.stack:
ffff800026c08000
[ 19.790705] PC is at ww_mutex_lock_interruptible+0x14/0xc0
[ 19.796329] LR is at vc4_submit_cl_ioctl+0x4fc/0x998 [vc4]
...
[ 20.240855] [<
ffff0000088975f4>] ww_mutex_lock_interruptible+0x14/0xc0
[ 20.247528] [<
ffff0000009b3ea4>] vc4_submit_cl_ioctl+0x4fc/0x998 [vc4]
[ 20.254372] [<
ffff0000008f75f8>] drm_ioctl+0x180/0x438 [drm]
[ 20.260120] [<
ffff00000821383c>] do_vfs_ioctl+0xa4/0x7d0
[ 20.265510] [<
ffff000008213fe4>] SyS_ioctl+0x7c/0x98
[ 20.270550] [<
ffff000008082f30>] el0_svc_naked+0x24/0x28
[ 20.275941] Code:
d2800002 d5384103 910003fd f9800011 (
c85ffc04)
[ 20.282527] ---[ end trace
1f6bd640ff32ae12 ]---
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Link: http://patchwork.freedesktop.org/patch/msgid/14e68768-6c92-2d74-92fd-196dbc50d8f7@xs4all.nl
Alex Deucher [Fri, 9 Jun 2017 12:22:31 +0000 (08:22 -0400)]
drm/amdgpu/gfx: fix MEC interrupt enablement for pipes != 0
The interrupt registers are not indexed.
Fixes: 763a47b8e (drm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3)
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 8 Jun 2017 07:45:04 +0000 (15:45 +0800)]
drm/amd/powerplay: fix copy error in powerplay.
v2: fix typos.
should disable led dpm feature when stop dpm.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Thu, 8 Jun 2017 18:58:05 +0000 (14:58 -0400)]
drm/amdgpu: move comment to the right place
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Thu, 8 Jun 2017 18:53:26 +0000 (14:53 -0400)]
drm/amdgpu: fix a typo in comment
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Xie [Thu, 8 Jun 2017 18:21:28 +0000 (14:21 -0400)]
drm/amdgpu: remove duplicate function prototypes
There are two identical function prototypes in same header file
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Thu, 11 May 2017 23:47:22 +0000 (19:47 -0400)]
drm/amdgpu: Support page table update via CPU
v2: Fix logical mistake. If CPU update failed amdgpu_vm_bo_update_mapping()
would not return and instead fall through to SDMA update. Minor change due to
amdgpu_vm_bo_wait() prototype change
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Thu, 11 May 2017 19:50:08 +0000 (15:50 -0400)]
drm/amdgpu: Support page directory update via CPU
If amdgpu.vm_update_context param is set to use CPU, then Page
Directories will be updated by CPU instead of SDMA
v2: Call amdgpu_vm_bo_wait before updating the page tables to ensure the
PD/PT BOs are free
v3: Minor changes - due to amdgpu_vm_bo_wait() prototype change, local
variable declaration order and function comments.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Mon, 15 May 2017 19:09:15 +0000 (15:09 -0400)]
drm/amdgpu: Add amdgpu_sync_wait
v2: Add intr option
Helper function useful for CPU update of VM page tables. Also useful if
kernel have to synchronously wait till VM page tables are updated.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Fri, 9 Jun 2017 15:26:57 +0000 (11:26 -0400)]
drm/amdgpu: Add vm context module param
Add VM update mode module param (amdgpu.vm_update_mode) that can used to
control how VM pde/pte are updated for Graphics and Compute.
BIT0 controls Graphics and BIT1 Compute.
BIT0 [= 0] Graphics updated by SDMA [= 1] by CPU
BIT1 [= 0] Compute updated by SDMA [= 1] by CPU
By default, only for large BAR system vm_update_mode = 2, indicating
that Graphics VMs will be updated via SDMA and Compute VMs will be
updated via CPU. And for all all other systems (by default)
vm_update_mode = 0
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jyri Sarha [Tue, 30 May 2017 16:29:55 +0000 (19:29 +0300)]
drm: Add const to name field declaration in struct drm_prop_enum_list
There is no reason why the name field should not be const, but
several why it should. The struct should only be used by
drm_property_create_enum() and there the name-field from the struct
is passed to drm_property_add_enum(), which takes a const char * as
a parameter.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/5dd3b6a1e20452bd8abdcbc55d1e8d7f56262266.1496161066.git.jsarha@ti.com
Alex Deucher [Fri, 2 Jun 2017 21:16:31 +0000 (17:16 -0400)]
drm/amdgpu: drop deprecated drm_get_pci_dev and drm_put_dev
Open code them so we can adjust the order in the
driver more easily.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 2 Jun 2017 20:52:08 +0000 (16:52 -0400)]
drm/amdgpu: call pci_[un]register_driver() directly
Rather than calling the deprecated drm_pci_init() and
drm_pci_exit() which just wrapped the pci functions
anyway.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Mon, 29 May 2017 09:05:20 +0000 (18:05 +0900)]
drm/amdgpu/radeon: Use radeon by default for CIK GPUs
Even if CONFIG_DRM_AMDGPU_CIK is enabled.
There is no feature parity yet for CIK, in particular amdgpu doesn't
support HDMI/DisplayPort audio without DC.
v2:
* Clarify the lack of feature parity being related to HDMI/DP audio.
* Fix "SI" typo in DRM_AMDGPU_CIK help entry.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Michel Dänzer [Mon, 29 May 2017 08:32:38 +0000 (17:32 +0900)]
drm/radeon: Make si_support and cik_support parameters always available
This will allow amdgpu-pro / other out-of-tree amdgpu builds to make use
of these options for using the out-of-tree amdgpu driver instead of the
in-tree radeon driver in a clean way.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Felix Kuehling [Mon, 5 Jun 2017 09:57:32 +0000 (18:57 +0900)]
drm/amdgpu: Update Kconfig help for SI and CIK support
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Felix Kuehling [Mon, 5 Jun 2017 09:53:55 +0000 (18:53 +0900)]
drm/amdgpu: Add module param to control SI support
If AMDGPU supports SI, add a module parameter to control SI
support. It's off by default in AMDGPU as long as SI suppost is
experimental, while it is on by default in radeon.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
[ Michel Dänzer: Squash in amdgpu_si_support initialization fix ]
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Mon, 5 Jun 2017 09:52:51 +0000 (18:52 +0900)]
drm/radeon: Add module param to control SI support
If AMDGPU supports SI, add a module parameter to control SI
support in radeon. It's on by default in radeon, while it will be
off by default in AMDGPU as long as SI support is experimental.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Felix Kuehling [Mon, 5 Jun 2017 09:43:27 +0000 (18:43 +0900)]
drm/amdgpu: Add module param to control CIK support
If AMDGPU supports CIK, add a module parameter to control CIK
support. It's on by default in AMDGPU, while it is off by default
in radeon.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Alex Deucher [Wed, 7 Jun 2017 19:27:52 +0000 (15:27 -0400)]
drm/amdgpu/gfx: consolidate mqd buffer setup code
It was duplicated across multiple generations.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 18:20:21 +0000 (14:20 -0400)]
drm/amdgpu/gfx: move mec parameter setup into sw_init
This will allow us to share more mec code.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 17:31:32 +0000 (13:31 -0400)]
drm/amdgpu/gfx: move more common KIQ code to amdgpu_gfx.c
Lots more common stuff.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 16:59:29 +0000 (12:59 -0400)]
drm/amdgpu: move mec queue helpers to amdgpu_gfx.h
They are gfx related, not general helpers.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 17:09:53 +0000 (13:09 -0400)]
drm/amdgpu/gfx9: remove spurious line in kiq setup
This overrode what queue was actually assigned for kiq.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 18:22:48 +0000 (14:22 -0400)]
drm/amdgpu/gfx8: whitespace change
Make it consistent.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 15:07:48 +0000 (11:07 -0400)]
drm/amdgpu/gfx9: Raven has two MECs
This was missed when Andres' queue patches were rebased.
Fixes: 42794b27 (drm/amdgpu: take ownership of per-pipe configuration v3)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 15:05:26 +0000 (11:05 -0400)]
drm/amdgpu: move gfx_v*_0_compute_queue_acquire to common code
Same function was duplicated in all gfx IP files.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Jun 2017 14:46:06 +0000 (10:46 -0400)]
drm/amdgpu: fix mec queue policy on single MEC asics
Fixes hangs on single MEC asics.
Fixes: 2ed286fb434 (drm/amdgpu: new queue policy, take first 2 queues of each pipe v2)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Anholt [Sat, 3 Jun 2017 01:57:33 +0000 (18:57 -0700)]
drm/pl111: Fix offset calculation for the primary plane.
If src_x/y were nonzero, we failed to shift them down by 16 to get the
pixel offset. The recent CMA helper function gets it right.
Signed-off-by: Eric Anholt <eric@anholt.net>
Fixes: bed41005e617 ("drm/pl111: Initial drm/kms driver for pl111")
Reported-by: Mircea Carausu <mircea.carausu@broadcom.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170603015733.13266-1-eric@anholt.net
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Boris Brezillon [Tue, 6 Jun 2017 11:34:26 +0000 (13:34 +0200)]
drm/atmel-hlcdc: Fix panel registration
Attach the panel-bridge created by drm_panel_bridge_add() to the
parallel RGB encoder.
Fixes: 96160a8071b2 ("drm/atmel-hlcdc: Replace the panel usage with drm_panel_bridge.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1496748866-17165-1-git-send-email-boris.brezillon@free-electrons.com
Maarten Lankhorst [Tue, 6 Jun 2017 14:31:50 +0000 (16:31 +0200)]
drm/bridge: Build the panel wrapper in drm_kms_helper
This fixes the following depmod error when building drm as a module:
depmod: ERROR: Found 6 modules in dependency cycles!
depmod: ERROR: Cycle detected: drm -> drm_kms_helper -> drm
Fixes: 13dfc0540a57 ("drm/bridge: Refactor out the panel wrapper from the lvds-encoder bridge.")
Tested-by: Lofstedt, Marta <marta.lofstedt@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/3fd262cf-1db6-4335-320c-af92f9014502@linux.intel.com
Alex Deucher [Tue, 6 Jun 2017 21:41:20 +0000 (17:41 -0400)]
drm/amdgpu/gfx: create a common bitmask function (v2)
The same function was duplicated in all the gfx IPs. Use
a single implementation for all.
v2: use static inline (Alex Xie)
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Suggested-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 31 May 2017 14:05:04 +0000 (10:05 -0400)]
drm/amdgpu/gfx8: drop per-APU CU limits
Always use the max for the family rather than the per sku limits.
This makes sure the mask is always the max size to avoid reporting
the wrong number of CUs.
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 2 Jun 2017 20:30:46 +0000 (16:30 -0400)]
drm/amdgpu/gfx6: properly cache mc_arb_ramcfg
This was missing for gfx6.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Alex Deucher [Mon, 5 Jun 2017 15:03:59 +0000 (11:03 -0400)]
drm/amdgpu/gfx9: new queue policy, take first 2 queues of each pipe
Instead of taking the first pipe and giving the rest to kfd, take the
first 2 queues of each pipe.
Effectively, amdgpu and amdkfd own the same number of queues. But
because the queues are spread over multiple pipes the hardware will be
able to better handle concurrent compute workloads.
amdgpu goes from 1 pipe to 4 pipes, i.e. from 1 compute threads to 4
amdkfd goes from 3 pipe to 4 pipes, i.e. from 3 compute threads to 4
gfx9 was missed when this patch set was rebased to include gfx9.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 5 Jun 2017 14:58:56 +0000 (10:58 -0400)]
drm/amdgpu/gfx9: allocate queues horizontally across pipes
Pipes provide better concurrency than queues, therefore we want to make
sure that apps use queues from different pipes whenever possible.
Optimize for the trivial case where an app will consume rings in order,
therefore we don't want adjacent rings to belong to the same pipe.
gfx9 was missed when these patches were rebased.
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Tue, 6 Jun 2017 08:25:44 +0000 (16:25 +0800)]
drm/amd/powerplay: fix memory leak in cz_hwmgr backend
vddc_dep_on_dal_pwrl is allocated and initialized in cz_hwmgr_backend_init
Thus free the memory in cz_hwmgr_backend_fini
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Hawking Zhang [Tue, 6 Jun 2017 08:19:34 +0000 (16:19 +0800)]
drm/amd/powerplay: fix memory leak in rv_hwmgr backend
vddc_dep_on_dal_pwrl and vq_budgeting_table are allocated and initialized
in rv_hwmgr_backend_init. Thus free the memory in rv_hwmgr_backend_fini
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 2 Jun 2017 14:57:24 +0000 (10:57 -0400)]
drm/amd/powerplay: add sclk and mclk overdrive for vega10
For overclocking sclk and mclk.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 2 Jun 2017 12:04:40 +0000 (20:04 +0800)]
drm/amd/powerplay: fix populate dpm level failed when s3 on vega10.
As the min clk may be large than boot level can support.
in this case, just ignore the min clk.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 1 Jun 2017 07:33:26 +0000 (15:33 +0800)]
drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gmc9
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 1 Jun 2017 07:30:04 +0000 (15:30 +0800)]
drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for mmhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 1 Jun 2017 07:15:28 +0000 (15:15 +0800)]
drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gfxhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 02:35:42 +0000 (10:35 +0800)]
drm/amdgpu: fix the gart table cleared issue for S3
Something writes over the first 8 MB so reserve this
on vega10 until we root cause it.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 3 May 2017 01:52:06 +0000 (09:52 +0800)]
drm/amdgpu: add ip block number prints
User is able to follow the ip block number to write the ip_block_mask for
selecting the one which user would like to enable.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 3 May 2017 01:40:17 +0000 (09:40 +0800)]
drm/amdgpu: add ip name print for selecting ips with ip_block_mask
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 15:49:46 +0000 (23:49 +0800)]
drm/amdgpu: remove mmhub ip
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 15:46:26 +0000 (23:46 +0800)]
drm/amdgpu: remove gfxhub ip
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 15:35:44 +0000 (23:35 +0800)]
drm/amdgpu: export mmhub get clockgating into gmc
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 15:13:34 +0000 (23:13 +0800)]
drm/amdgpu: export mmhub set clockgating into gmc
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 14:59:18 +0000 (22:59 +0800)]
drm/amdgpu: export mmhub sw_init into gmc
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 14:57:18 +0000 (22:57 +0800)]
drm/amdgpu: export gfxhub sw_init into gmc
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 14:32:35 +0000 (22:32 +0800)]
drm/amdgpu: fix to miss program invalidation at resume
This patch moves invalidation into gart enable function from hw_init.
Because we would like align the sequence calling between init and resume.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 14:17:11 +0000 (22:17 +0800)]
drm/amdgpu: abstract setup vmid config for gfxhub/mmhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 13:52:00 +0000 (21:52 +0800)]
drm/amdgpu: abstract disable identity aperture for gfxhub/mmhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 13:39:10 +0000 (21:39 +0800)]
drm/amdgpu: abstract system domain enablement for gfxhub/mmhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 10:07:48 +0000 (18:07 +0800)]
drm/amdgpu: abstract cache initialization for gfxhub/mmhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 31 May 2017 09:19:01 +0000 (17:19 +0800)]
drm/amdgpu: abstract TLB initialization for gfxhub/mmhub
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / openwrt / staging / blogic.git / log