openwrt/staging/blogic.git
6 years agodrm/msm: Add pm_suspend/resume callbacks to msm_kms
Jeykumar Sankaran [Wed, 27 Jun 2018 19:24:17 +0000 (15:24 -0400)]
drm/msm: Add pm_suspend/resume callbacks to msm_kms

Used by the dpu driver for custom suspend/resume.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: Add .commit() callback to msm_kms functions
Jeykumar Sankaran [Wed, 27 Jun 2018 17:49:23 +0000 (13:49 -0400)]
drm/msm: Add .commit() callback to msm_kms functions

Called right before wait_for_commit_done() to perform kickoff for
active crtcs.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split this out of the megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: #define MAX_<OBJECT> in msm_drv.h
Jeykumar Sankaran [Wed, 27 Jun 2018 18:55:25 +0000 (14:55 -0400)]
drm/msm: #define MAX_<OBJECT> in msm_drv.h

dpu uses these elsewhere in the driver (in addition to increasing
MAX_PLANES, that'll come later), so pull them out into #define.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul pulled this out of the dpu megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: Use labels for unwinding in the error path
Jeykumar Sankaran [Wed, 27 Jun 2018 18:35:28 +0000 (14:35 -0400)]
drm/msm: Use labels for unwinding in the error path

This simplifies cleanup, to make sure nothing drops out in case of
error.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split out of dpu megapatch and renamed labels]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: #define MDP version numbers
Jeykumar Sankaran [Wed, 27 Jun 2018 18:26:24 +0000 (14:26 -0400)]
drm/msm: #define MDP version numbers

Useful for incoming DPU support

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul split this from the dpu megapatch]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: Clean up dangling atomic_wq
Sean Paul [Wed, 27 Jun 2018 19:15:49 +0000 (15:15 -0400)]
drm/msm: Clean up dangling atomic_wq

I missed this during the atomic conversion

Changes in v3:
- None

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor
Abhinav Kumar [Thu, 7 Jun 2018 20:50:29 +0000 (13:50 -0700)]
drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factor

Make the pclk_rate u64 to accommodate higher pixel clock
rates.

Changes in v3:
- Converted pclk_rate to u32 (Archit)
- Rebase on dsi cleanup set in msm-next

Cc: Sibi Sankar <sibis@codeaurora.org>
Cc: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: enable zpos normalization
Jeykumar Sankaran [Mon, 11 Jun 2018 21:13:20 +0000 (14:13 -0700)]
drm/msm: enable zpos normalization

Enable drm core zpos normalization for planes.

Changes in v3:
- None

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp5: subclass msm_mdss for mdp5
Rajesh Yadav [Thu, 21 Jun 2018 20:06:10 +0000 (16:06 -0400)]
drm/msm/mdp5: subclass msm_mdss for mdp5

SoCs having mdp5 or dpu have identical tree like
device hierarchy where MDSS top level wrapper manages
common power resources for all child devices.

Subclass msm_mdss so that msm_mdss includes common defines
and mdp5/dpu mdss derivations to include any extensions.

Add mdss helper interface (msm_mdss_funcs) to msm_mdss
base for mdp5/dpu mdss specific implementation calls.

This change subclasses msm_mdss for mdp5, dpu specific
changes will be done separately.

Changes in v3:
- Added Archit's R-b

Reviewed-by: Archit Taneja <architt@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
[seanpaul rebased on msm-next and resolved conflicts]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: Move wait_for_vblanks into mdp complete_commit() hooks
Sean Paul [Fri, 13 Apr 2018 14:09:11 +0000 (10:09 -0400)]
drm/msm: Move wait_for_vblanks into mdp complete_commit() hooks

DPU doesn't use this, so push it into the mdp drivers.

Changes in v3:
- None

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: set encoder mode for DRM bridge explicitly
Abhinav Kumar [Sat, 16 Jun 2018 05:56:59 +0000 (22:56 -0700)]
drm/msm/dsi: set encoder mode for DRM bridge explicitly

Currently, DRM bridge for DPU relies on the default video
mode setting to set the encoder mode.

Add an explicit call to set the encoder mode for bridges.

Changes in v3:
- None

Reviewed-by: Archit Taneja <architt@codeauorora.org>
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: initialize postdiv_lock before use for 10nm pll
Rajesh Yadav [Mon, 25 Jun 2018 13:42:03 +0000 (19:12 +0530)]
drm/msm/dsi: initialize postdiv_lock before use for 10nm pll

postdiv_lock spinlock was used before initialization
for 10nm pll. It causes following spin_bug:
"BUG: spinlock bad magic on CPU#0".
Initialize spinlock before its usage.

Changes in v3:
- Added Archit's R-b

Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rajesh Yadav <ryadav@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: Use one connector for dual DSI mode
Chandan Uddaraju [Wed, 18 Apr 2018 19:45:15 +0000 (12:45 -0700)]
drm/msm/dsi: Use one connector for dual DSI mode

Current DSI driver uses two connectors for dual DSI case even
though we only have one panel. Fix this by implementing one
connector/bridge for dual DSI use case. Use master DSI
controllers to register one connector/bridge.

Changes in v3:
- None

Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
[seanpaul removed unused local var causing a build warning]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: adjust dsi timing for dual dsi mode
Chandan Uddaraju [Wed, 18 Apr 2018 19:45:14 +0000 (12:45 -0700)]
drm/msm/dsi: adjust dsi timing for dual dsi mode

For dual dsi mode, the horizontal timing needs
to be divided by half since both the dsi controllers
will be driving this panel. Adjust the pixel clock and
DSI timing accordingly.

Changes in v3:
- Added Archit's R-b
- Rebase on dsi cleanup set in msm-next

Cc: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm: add msm compressed format modifiers
Jeykumar Sankaran [Wed, 6 Jun 2018 02:00:54 +0000 (19:00 -0700)]
drm: add msm compressed format modifiers

Qualcomm Snapdragon chipsets uses compressed format
to optimize BW across multiple IP's. This change adds
needed modifier support in drm for a simple 4x4 tile
based compressed variants of base formats.

Changes in v3:
- Removed duplicate entry for DRM_FORMAT_MOD_QCOM_COMPRESSED (Rob Clark)
Changes in v4:
- Remove all modifiers aside from COMPRESSED, this includes tiled and
  10-bit

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm: Add support for pps and compression mode command packet
vkorjani [Tue, 10 Apr 2018 14:12:45 +0000 (10:12 -0400)]
drm: Add support for pps and compression mode command packet

After enabling DSC we need to send compression mode command packet
and pps data packet, for which 2 new data types are added
07h  Compression Mode Data Type Write , short write, 2 parameters
0Ah  PPS Long Write (word count determines number of bytes)
This patch adds support to send these packets.

Cc: David Airlie <airlied@linux.ie>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-fbdev@vger.kernel.org
Changes in v3:
- None

Signed-off-by: vkorjani <vikas.korjani@intel.com>
[seanpaul removed pps_write_buffer fn, added types to packet_format helpers]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp5: negative x/y in cursor move
Carsten Behling [Mon, 16 Jul 2018 17:49:56 +0000 (19:49 +0200)]
drm/msm/mdp5: negative x/y in cursor move

modesetting X11 driver may provide negative x/y cordinates in
mdp5_crtc_cursor_move call when rotation is enabled.

Cursor buffer can overlap down to its negative width/height.

ROI has to be recalculated for negative x/y indicating using the
lower/right corner of the cursor buffer and hotspot must be set
in MDP5_LM_CURSOR_XY_SRC_Y MDP5_LM_CURSOR_XY_SRC_X.

Signed-off-by: Carsten Behling <carsten.behling@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: replace version checks with helper functions
Sibi Sankar [Tue, 29 May 2018 14:20:33 +0000 (19:50 +0530)]
drm/msm/dsi: replace version checks with helper functions

Replace version checks with the helper functions bound to
cfg_handler for DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: add implementation for helper functions
Sibi Sankar [Tue, 29 May 2018 14:20:32 +0000 (19:50 +0530)]
drm/msm/dsi: add implementation for helper functions

Add dsi host helper function implementation for DSI v2
DSI 6G 1.x and DSI 6G v2.0+ controllers

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/dsi: add dsi host helper functions support
Sibi Sankar [Tue, 29 May 2018 14:20:31 +0000 (19:50 +0530)]
drm/msm/dsi: add dsi host helper functions support

Add dsi host helper functions support for DSI v2 and DSI 6G 1.x
controllers that are under version checks

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/mdp5: fix missing CTL flush
Rob Clark [Tue, 3 Jul 2018 12:14:32 +0000 (08:14 -0400)]
drm/msm/mdp5: fix missing CTL flush

f9cb8d8d836e fixed various race conditions with CTL flush, in particular
flushing and sending the START signal before encoder state was updated.
But it did this a little too well in some cases that don't trigger
encoder->enable(), and CTL[n].FLUSH would never be set.  When page flips
happen it would paper over the bug, since the first plag flip would
flush out the state to the hardware.

The issue could be reproduced with, for example, modetest (without the
'-v' argument).

Fixes: f9cb8d8d836e drm/msm/mdp5: rework CTL START signal handling
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
6 years agodrm/msm/gpu: Increase the pm runtime autosuspend for 5xx
Jordan Crouse [Mon, 7 May 2018 22:47:50 +0000 (16:47 -0600)]
drm/msm/gpu: Increase the pm runtime autosuspend for 5xx

Experimentation shows that resuming power quickly after suspending
ends up forcing a system hang for unknown reasons on 5xx targets.
To avoid cycling the power too much (especially during init)
turn up the autosuspend time for a5xx to 250ms and use
pm_runtime_put_autosuspend() when applicable.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm/adreno: Add power management functions for system sleep
Daniel Mack [Mon, 28 May 2018 19:53:39 +0000 (21:53 +0200)]
drm/msm/adreno: Add power management functions for system sleep

When a msm8016 based system is woken up from suspend, the firmware in
the adreno device hangs.

[   83.903416] qcom-iommu-ctx 1f09000.iommu-ctx: Unhandled context fault: fsr=0x202, iova=0x0000000000000000, fsynr=0x2, cb=1
[   85.853633] msm 1a00000.mdss: A306: hangcheck detected gpu lockup rb 0!
[   85.853661] msm 1a00000.mdss: A306:     completed fence: 370
[   85.859073] msm 1a00000.mdss: A306:     submitted fence: 372
[   85.865113] msm 1a00000.mdss: A306: hangcheck recover!

Fix this by adding pm_runtime_force_suspend/pm_runtime_force_resume
as sleep ops.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agodrm/msm: call drm_atomic_helper_suspend() and drm_atomic_helper_resume()
Daniel Mack [Mon, 28 May 2018 19:53:38 +0000 (21:53 +0200)]
drm/msm: call drm_atomic_helper_suspend() and drm_atomic_helper_resume()

To make suspend and resume work on msm8916 platforms, call into the generic
helpers and preserve the state across suspends.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agoMerge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Fri, 20 Jul 2018 04:30:18 +0000 (14:30 +1000)]
Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm-next

More features for 4.19:
- Map processes to vmids for debugging GPUVM faults
- Raven gfxoff fixes
- Initial gfxoff support for vega12
- Use defines for interrupt sources rather than magic numbers
- DC aux fixes
- Finish DC logging TODO
- Add more DC debugfs interfaces for conformance testing
- Add CRC support for DCN
- Scheduler rework in preparation for load balancing
- Unify common smu9 code
- Clean up UVD instancing support
- ttm cleanups
- Misc fixes and cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180719194001.3488-1-alexander.deucher@amd.com
6 years agoMerge tag 'drm-intel-next-2018-07-19' of git://anongit.freedesktop.org/drm/drm-intel...
Dave Airlie [Fri, 20 Jul 2018 02:29:23 +0000 (12:29 +1000)]
Merge tag 'drm-intel-next-2018-07-19' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

On GEM side:

- GuC related fixes (Chris, Michal)
- GTT read-only pages support (Jon, Chris)
- More selftests fixes (Chris)
- More GPU reset improvements (Chris)
- Flush caches after GGTT writes (Chris)
- Handle recursive shrinker for vma->last_active allocation (Chris)
- Other execlists fixes (Chris)

On Display side:

- GLK HDMI fix (Clint)
- Rework and cleanup around HPD pin (Ville)
- Preparation work for Display Stream Compression support coming on ICL (Anusha)
- Nuke LVDS lid notification (Ville)
- Assume eDP is always connected (Ville)
- Kill intel panel detection (Ville)

Signed-off-by: Dave Airlie <airlied@redhat.com>
# gpg: Signature made Fri 20 Jul 2018 01:51:45 AM AEST
# gpg:                using RSA key FA625F640EEB13CA
# gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>"
# gpg:                 aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C  E2A3 FA62 5F64 0EEB 13CA

# Conflicts:
# drivers/gpu/drm/i915/intel_lrc.c
Link: https://patchwork.freedesktop.org/patch/msgid/20180719171257.GA12199@intel.com
6 years agoMerge tag 'drm-misc-next-2018-07-18' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Fri, 20 Jul 2018 00:40:25 +0000 (10:40 +1000)]
Merge tag 'drm-misc-next-2018-07-18' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 4.19:

Core Changes:
- add support for DisplayPort CEC-Tunneling-over-AUX (Hans Verkuil)
- more doc updates (Daniel Vetter)
- fourcc: Add is_yuv field to drm_format_info (Ayan Kumar Halder)
- dma-buf: correctly place BUG_ON (Michel Dänzer)

Driver Changes:
- more vkms support(Rodrigo Siqueira)
- many fixes and small improments to all drivers

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180718200826.GA20165@juma
6 years agoMerge branch 'linux-4.19' of git://github.com/skeggsb/linux into drm-next
Dave Airlie [Fri, 20 Jul 2018 00:34:24 +0000 (10:34 +1000)]
Merge branch 'linux-4.19' of git://github.com/skeggsb/linux into drm-next

misc fixes and cleanups for next.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv55CfRonQ0bo2XiitkCiWTjKwhsP=+ZFhoa-BaJ72Ryew@mail.gmail.com
6 years agodrm/amdgpu: clean up UVD instance handling v2
Christian König [Wed, 18 Jul 2018 18:30:51 +0000 (20:30 +0200)]
drm/amdgpu: clean up UVD instance handling v2

The whole handle, filp and entity handling is superfluous here.

We should have reviewed that more thoughtfully. It looks like somebody
just made the code instance aware without knowing the background.

v2: fix one more missed case in amdgpu_uvd_suspend

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove superflous UVD encode entity
Christian König [Wed, 18 Jul 2018 18:28:08 +0000 (20:28 +0200)]
drm/amdgpu: remove superflous UVD encode entity

Not sure what that was every used for, but now it is completely unused.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86
Michel Dänzer [Tue, 17 Jul 2018 10:37:45 +0000 (12:37 +0200)]
drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86

Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: fixed uninitialized value
Evan Quan [Thu, 19 Jul 2018 05:21:43 +0000 (13:21 +0800)]
drm/amd/powerplay: fixed uninitialized value

The 'result' is not initialized correctly. It causes the API
return an error code even on success.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amdgpu/powerplay: use irq source defines for smu7 sources
Alex Deucher [Wed, 18 Jul 2018 21:07:11 +0000 (16:07 -0500)]
drm/amdgpu/powerplay: use irq source defines for smu7 sources

Use the newly added irq source defines rather than magic numbers
for smu7 thermal interrupts.

Rewiewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/i915: Update DRIVER_DATE to 20180719
Rodrigo Vivi [Thu, 19 Jul 2018 15:47:59 +0000 (08:47 -0700)]
drm/i915: Update DRIVER_DATE to 20180719

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agodrm/i915: Remove intel_panel_detect()
Ville Syrjälä [Tue, 17 Jul 2018 17:42:16 +0000 (20:42 +0300)]
drm/i915: Remove intel_panel_detect()

With neither LVDS or eDP no longer using intel_panel_detect() we can
kill it, and the accompanying modparam.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717174216.22252-3-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agodrm/i915: Assume eDP is always connected
Ville Syrjälä [Tue, 17 Jul 2018 17:42:15 +0000 (20:42 +0300)]
drm/i915: Assume eDP is always connected

We never registered any kind of lid notifier for eDP, so looking at the
lid status is pretty much bonkers. Let's just consider eDP always
connected instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717174216.22252-2-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agodrm/i915: Nuke the LVDS lid notifier
Ville Syrjälä [Tue, 17 Jul 2018 17:42:14 +0000 (20:42 +0300)]
drm/i915: Nuke the LVDS lid notifier

We broke the LVDS notifier resume thing in (presumably) commit
e2c8b8701e2d ("drm/i915: Use atomic helpers for suspend, v2.") as
we no longer duplicate the current state in the LVDS notifier and
thus we never resume it properly either.

Instead of trying to fix it again let's just kill off the lid
notifier entirely. None of the machines tested thus far have
apparently needed it. Originally the lid notifier was added to
work around cases where the VBIOS was clobbering some of the
hardware state behind the driver's back, mostly on Thinkpads.
We now have a few report of Thinkpads working just fine without
the notifier. So maybe it was misdiagnosed originally, or
something else has changed (ACPI video stuff perhaps?).

If we do end up finding a machine where the VBIOS is still causing
problems I would suggest that we first try setting various bits in
the VBIOS scratch registers. There are several to choose from that
may instruct the VBIOS to steer clear.

With the notifier gone we'll also stop looking at the panel status
in ->detect().

v2: Nuke enum modeset_restore (Rodrigo)

Cc: stable@vger.kernel.org
Cc: Wolfgang Draxinger <wdraxinger.maillist@draxit.de>
Cc: Vito Caputo <vcaputo@pengaru.com>
Cc: kitsunyan <kitsunyan@airmail.cc>
Cc: Joonas Saarinen <jza@saunalahti.fi>
Tested-by: Vito Caputo <vcaputo@pengaru.com> # Thinkapd X61s
Tested-by: kitsunyan <kitsunyan@airmail.cc> # ThinkPad X200
Tested-by: Joonas Saarinen <jza@saunalahti.fi> # Fujitsu Siemens U9210
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105902
References: https://lists.freedesktop.org/archives/intel-gfx/2018-June/169315.html
References: https://bugs.freedesktop.org/show_bug.cgi?id=21230
Fixes: e2c8b8701e2d ("drm/i915: Use atomic helpers for suspend, v2.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717174216.22252-1-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
6 years agodrm/i915/execlists: Move the assertion we have the rpm wakeref down
Chris Wilson [Thu, 19 Jul 2018 07:50:29 +0000 (08:50 +0100)]
drm/i915/execlists: Move the assertion we have the rpm wakeref down

There's a race between idling the engine and finishing off the last
tasklet (as we may kick the tasklets after declaring an individual
engine idle). However, since we do not need to access the device until
we try to submit to the ELSP register (processing the CSB just requires
normal CPU access to the HWSP, and when idle we should not need to
submit!) we can defer the assertion unto that point. The assertion is
still useful as it does verify that we do hold the longterm GT wakeref
taken from request allocation until request completion.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107274
Fixes: 9512f985c32d ("drm/i915/execlists: Direct submission of new requests (avoid tasklet/ksoftirqd)")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180719075029.28643-1-chris@chris-wilson.co.uk
6 years agodrm/i915: Handle recursive shrinker for vma->last_active allocation
Chris Wilson [Thu, 19 Jul 2018 07:22:06 +0000 (08:22 +0100)]
drm/i915: Handle recursive shrinker for vma->last_active allocation

If we call into the shrinker for direct relcaim inside kmalloc, it will
retire the requests. If we retire the vma->last_active while processing a
new i915_vma_move_to_active() we can upset the delicate bookkeeping
required for the cache. After the possible invocation of the shrinker, we
need to double check the vma->last_active is still valid.

Fixes: 8b293eb53a7d ("drm/i915: Track the last-active inside the i915_vma")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105600#c39
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180719072206.16015-1-chris@chris-wilson.co.uk
6 years agodrm/i915/guc: Keep guc submission permanently engaged
Chris Wilson [Tue, 17 Jul 2018 20:29:32 +0000 (21:29 +0100)]
drm/i915/guc: Keep guc submission permanently engaged

We make a decision at module load whether to use the GuC backend or not,
but lose that setup across set-wedge. Currently, the guc doesn't
override the engine->set_default_submission hook letting execlists sneak
back in temporarily on unwedging leading to an unbalanced park/unpark.

v2: Remove comment about switching back temporarily to execlists on
guc_submission_disable(). We currently only call disable on shutdown,
and plan to also call disable before suspend and reset, in which case we
will either restore guc submission or mark the driver as wedged, making
the reset back to execlists pointless.
v3: Move reset.prepare across

Fixes: 63572937cebf ("drm/i915/execlists: Flush pending preemption events during reset")
Testcase: igt/drv_module_reload/basic-reload-inject
Testcase: igt/gem_eio
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717202932.1423-1-chris@chris-wilson.co.uk
6 years agodrm/nouveau/kms/nv50-: allocate push buffers in vidmem on pascal
Ben Skeggs [Tue, 17 Jul 2018 23:33:39 +0000 (09:33 +1000)]
drm/nouveau/kms/nv50-: allocate push buffers in vidmem on pascal

Workaround for issues seen on systems with large amounts of RAM, caused
by display not supporting the same physical address limits as the other
parts of the GPU.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
6 years agoi915/dp/dsc: Add Rate Control Range Parameter Registers
Anusha Srivatsa [Tue, 17 Jul 2018 21:11:01 +0000 (14:11 -0700)]
i915/dp/dsc: Add Rate Control Range Parameter Registers

RC model has these parameters that correspond with each of
15 ranges of RC buffer threshold value in the RC model.
The three elements are range_min_qp, range_max_qp and
range_bpg_offset.

Add the Rate Control range values for eDP/MIPI and DP case.
The actual values are calculated usung a helper function.
This patch adds the shifts to registers where the value will
be written during atomic commit.

v2:
- Use _MMIO_PIPE() instead of _MMIO(_PICK()) (Manasi)
- Combine shifts (Manasi)

Cc: Jose Souza <jose.souza@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531861861-10950-4-git-send-email-anusha.srivatsa@intel.com
6 years agoi915/dp/dsc: Add Rate Control Buffer Threshold Registers
Anusha Srivatsa [Tue, 17 Jul 2018 21:11:00 +0000 (14:11 -0700)]
i915/dp/dsc: Add Rate Control Buffer Threshold Registers

Add register defines and  shifts that control the RC buffer threshold
between encoder and decoder for eDP/MIPI and DP cases.

The actual values are calculated usung a helper function.
This patch adds the shifts to registers where the value will
be written during atomic commit.

v2:
- Use _MMIO_PIPE() instead of _MMIO_(_PICK()) (Manasi)
- Combine shifts (Manasi)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531861861-10950-3-git-send-email-anusha.srivatsa@intel.com
6 years agoi915/dp/dsc: Add DSC PPS register definitions
Anusha Srivatsa [Tue, 17 Jul 2018 21:10:59 +0000 (14:10 -0700)]
i915/dp/dsc: Add DSC PPS register definitions

Display Stream Compression(DSC) has a set of Picture
Parameter Set(PPS) components that the encoder must
communicate to the decoder.

This patch adds register definitions to
the PPS parameters for eDP/MIPI case and Display Port.

v2:
- Use _MMIO_PIPE instead of _MMIO(_PICK()). (Manasi)
- Use DSC constants as arguments. (Manasi)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531861861-10950-2-git-send-email-anusha.srivatsa@intel.com
6 years agodrm/i915/icl: Add VIDEO_DIP registers
Anusha Srivatsa [Tue, 17 Jul 2018 21:10:58 +0000 (14:10 -0700)]
drm/i915/icl: Add VIDEO_DIP registers

The Picture Parameter Set metadata for DSC has to be sent
to the panel through secondary data packets. Add the error
correction registers, data registers and control registers
for the same.

The control registers for  transcoders A and B are already
defined and will be reused for Icelake purpose. This patch adds
Control register for EDP and transcoder C apart from adding the
PPS data and error registers.

v2: reuse MMIO_TRANS2 for _PPS_DATA and _PPS_ECC.
The  _MMIO_TRANS2(pipe, reg) macro definition takes care of the eDp case

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531861861-10950-1-git-send-email-anusha.srivatsa@intel.com
6 years agodrm/amdgpu/pm: Remove VLA usage
Kees Cook [Wed, 20 Jun 2018 18:26:47 +0000 (11:26 -0700)]
drm/amdgpu/pm: Remove VLA usage

In the quest to remove all stack VLA usage from the kernel[1], this
uses the maximum sane buffer size and removes copy/paste code.

[1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com

Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: simplify the bo reference on amdgpu_bo_update
Huang Rui [Wed, 4 Jul 2018 10:08:54 +0000 (18:08 +0800)]
drm/amdgpu: simplify the bo reference on amdgpu_bo_update

BO ptr already be initialized at definition, we needn't use the complicated
reference.

v2: fix typo at subject line

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove internal/unused kernel module parameters
Sonny Jiang [Tue, 17 Jul 2018 19:27:20 +0000 (15:27 -0400)]
drm/amdgpu: remove internal/unused kernel module parameters

Remove internal/unused kernel module parameters

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: change ring priority after pushing the job (v2)
Christian König [Mon, 16 Jul 2018 12:58:48 +0000 (14:58 +0200)]
drm/amdgpu: change ring priority after pushing the job (v2)

Pushing a job can change the ring assignment of an entity.

v2: squash in:
"drm/amdgpu: fix job priority handling" (Christian)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: allow for more flexible priority handling
Christian König [Mon, 16 Jul 2018 11:47:34 +0000 (13:47 +0200)]
drm/amdgpu: allow for more flexible priority handling

Allow to call amdgpu_ring_priority_get() after pushing the ring to the
scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/gfx9: Update golden settings for vg10.
Feifei Xu [Tue, 17 Jul 2018 06:54:23 +0000 (14:54 +0800)]
drm/amdgpu/gfx9: Update golden settings for vg10.

Add some UTCL registers' golden settings.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Tested-by: Kevin Wang <Kevin1.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/i915: Kill sink_crc for good
Rodrigo Vivi [Thu, 5 Jul 2018 19:25:28 +0000 (12:25 -0700)]
drm/i915: Kill sink_crc for good

It was originally introduced following the VESA spec in order to validate PSR.

However we found so many issues around sink_crc that instead of helping PSR
development it only brought another layer of trouble to the table.

So, sink_crc has been a black whole for us in question of time, effort and hope.

First of the problems is that HW statement is clear: "Do not attempt to use
aux communication with PSR enabled". So the main reason behind sink_crc is
already compromised.

For a while we had hope on the aux-mutex could workaround this problem on SKL+
platforms, but that mutex was not reliable, not tested,
and we shouldn't use according to HW engineers.

Also, nor source, nor sink designed and implemented the sink_crc to be used like
we are trying to use here.

Well, the sink side of things is also apparently not prepared for this
case. Each panel that we tried seemed to have a different behavior with same
code and same source.

So, for all the time we lost on trying to ducktape all these different issues
I believe it is now time to move PSR to a more reliable validation.
Maybe not a perfect one as we dreamed for this sink_crc, but at least more
reliable.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180705192528.30515-1-rodrigo.vivi@intel.com
6 years agoMerge tag 'drm-intel-next-2018-07-09' of git://anongit.freedesktop.org/drm/drm-intel...
Dave Airlie [Wed, 18 Jul 2018 19:46:24 +0000 (05:46 +1000)]
Merge tag 'drm-intel-next-2018-07-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Higlights here goes to many PSR fixes and improvements; to the Ice lake work with
power well support and begin of DSI support addition. Also there were many improvements
on execlists and interrupts for minimal latency on command submission; and many fixes
on selftests, mostly caught by our CI.

General driver:
- Clean-up on aux irq (Lucas)
- Mark expected switch fall-through for dealing with static analysis tools (Gustavo)

Gem:
- Different fixes for GuC (Chris, Anusha, Michal)
- Avoid self-relocation BIAS if no relocation (Chris)
- Improve debugging cases in on EINVAL return and vma allocation (Chris)
- Fixes and improvements on context destroying and freeing (Chris)
- Wait for engines to idle before retiring (Chris)
- Many improvements on execlists and interrupts for minimal latency on command submission (Chris)
- Many fixes in selftests, specially on cases highlighted on CI (Chris)
- Other fixes and improvements around GGTT (Chris)
- Prevent background reaping of active objects (Chris)

Display:
- Parallel modeset cleanup to fix driver reset (Chris)
- Get AUX power domain for DP main link (Imre)
- Clean-up on PSR unused func pointers (Rodrigo)
- Many PSR/PSR2 fixes and improvements (DK, Jose, Tarun)
- Add a PSR1 live status (Vathsala)
- Replace old drm_*_{un/reference} with put,get functions (Thomas)
- FBC fixes (Maarten)
- Abstract and document the usage of picking macros (Jani)
- Remove unnecessary check for unsupported modifiers for NV12. (DK)
- Interrupt fixes for display (Ville)
- Clean up on sdvo code (Ville)
- Clean up on current DSI code (Jani)
- Remove support for legacy debugfs crc interface (Maarten)
- Simplify get_encoder_power_domains (Imre)

Icelake:
- MG PLL fixes (Imre)
- Add hw workaround for alpha blending (Vandita)
- Add power well support (Imre)
- Add Interrupt Support (Anusha)
- Start to add support for DSI on Ice Lake (Madhav)

Signed-off-by: Dave Airlie <airlied@redhat.com>
# gpg: Signature made Tue 10 Jul 2018 08:41:37 AM AEST
# gpg:                using RSA key FA625F640EEB13CA
# gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>"
# gpg:                 aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C  E2A3 FA62 5F64 0EEB 13CA
Link: https://patchwork.freedesktop.org/patch/msgid/20180710234349.GA16562@intel.com
6 years agoMerge branch 'mediatek-drm-next-4.19' of https://github.com/ckhu-mediatek/linux.git...
Dave Airlie [Wed, 18 Jul 2018 19:33:44 +0000 (05:33 +1000)]
Merge branch 'mediatek-drm-next-4.19' of https://github.com/ckhu-mediatek/linux.git-tags into drm-next

This include MT2712 SoC support and removing struct mtk_drm_fb.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531204482.14433.6.camel@mtksdaap41
6 years agoMerge tag 'drm-misc-next-2018-07-11' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Wed, 18 Jul 2018 19:13:14 +0000 (05:13 +1000)]
Merge tag 'drm-misc-next-2018-07-11' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 4.19:

Cross-subsystem Changes:
- many dt-bindings Doc changes

Core Changes:
- Encoder clean ups (Ville Syrjälä)
- Connector Writeback improvements(Boris Brezillon)
- Fake vblank support (Boris Brezillon)
- API for in-kernel clients (Noralf Trønnes)
- improvements to the path of finding panels(Boris Brezillon)

Driver Changes:
- initial support for the virtual display driver - vkms(Haneen Mohammed and Rodrigo Siqueira)
- panel: add Rocktech RK070ER9427 LCD support (Jagan Teki)
- panel: add support for the EDT ETM0700G0EDH6 and EDT ETM0700G0BDH6(Jan Tuerk)
- panel: add DLC DLC0700YZG-1 (Philipp Zabel)
- panel: add support for BOE HV070WSA-100 (Andrzej Hajda)
- panel: add newhaven, nhd-4.3-480272ef-atxl LCD (Tomi Valkeinen)
- panel: add support for Innolux G070Y2-L01 (Christoph Fritz)
- panel: add support for DataImage SCF0700C48GGU18 (Michal Vokáč)
- panel: add support for Sharp LQ035Q7DB03 (Vladimir Zapolskiy)
- panel: p079zca: Refactor panel driver to support multiple panels (Lin Huang)
- sun4i: Add R40 display engine compatible(Jernej Skrabec)

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180712011137.GA26620@juma
6 years agodrm/sun4i: Substitute sun4i_backend_format_is_yuv() with format->is_yuv
Ayan Kumar Halder [Tue, 17 Jul 2018 17:13:46 +0000 (18:13 +0100)]
drm/sun4i: Substitute sun4i_backend_format_is_yuv() with format->is_yuv

drm_format_info table has a field 'is_yuv' to denote if the format
is yuv or not. The driver is expected to use this instead of
having a function for the same purpose.

Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531847626-22248-5-git-send-email-ayan.halder@arm.com
6 years agodrm/rockchip: Substitute is_yuv_support() with format->is_yuv
Ayan Kumar Halder [Tue, 17 Jul 2018 17:13:44 +0000 (18:13 +0100)]
drm/rockchip: Substitute is_yuv_support() with format->is_yuv

drm_format_info table has a field 'is_yuv' to denote if the format
is yuv or not. The driver is expected to use this instead of
having a function for the same purpose.

Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531847626-22248-3-git-send-email-ayan.halder@arm.com
6 years agodrm/i915: Substitute intel_format_is_yuv() with format->is_yuv
Ayan Kumar Halder [Tue, 17 Jul 2018 17:13:43 +0000 (18:13 +0100)]
drm/i915: Substitute intel_format_is_yuv() with format->is_yuv

drm_format_info table has a field 'is_yuv' to denote if the format
is yuv or not. The driver is expected to use this instead of
having a function for the same purpose.

Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531847626-22248-2-git-send-email-ayan.halder@arm.com
6 years agodrm/fourcc: Add is_yuv field to drm_format_info to denote if the format is yuv
Ayan Kumar Halder [Tue, 17 Jul 2018 17:13:42 +0000 (18:13 +0100)]
drm/fourcc: Add is_yuv field to drm_format_info to denote if the format is yuv

A lot of drivers duplicate the function to check if a format is yuv or not.
If we add a field (to denote whether the format is yuv or not) in the
drm_format_info table, all the drivers can use this field and it will
prevent duplication of similar logic.

Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1531847626-22248-1-git-send-email-ayan.halder@arm.com
6 years agodrm/i915: Always retire residual requests before suspend
Chris Wilson [Tue, 17 Jul 2018 08:41:21 +0000 (09:41 +0100)]
drm/i915: Always retire residual requests before suspend

If the driver is wedged, we skip idling the GPU. However, we may still
have a few requests still not retired following the wedging (since they
will be waiting for a background worker trying to acquire struct_mutex).
As we hold the struct_mutex, always do a quick request retirement in
order to flush the wedged path.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107257
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717084121.28185-1-chris@chris-wilson.co.uk
6 years agodrm/amdgpu: minor cleanup in amdgpu_job.c
Christian König [Fri, 13 Jul 2018 12:01:08 +0000 (14:01 +0200)]
drm/amdgpu: minor cleanup in amdgpu_job.c

Remove superflous NULL check, fix coding style a bit, shorten error
messages.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove job->adev (v2)
Christian König [Fri, 13 Jul 2018 15:15:54 +0000 (17:15 +0200)]
drm/amdgpu: remove job->adev (v2)

We can get that from the ring.

v2: squash in "drm/amdgpu: always initialize job->base.sched" (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/pl111: Use 64-bit arithmetic instead of 32-bit
Gustavo A. R. Silva [Wed, 4 Jul 2018 14:22:55 +0000 (09:22 -0500)]
drm/pl111: Use 64-bit arithmetic instead of 32-bit

Add suffix ULL to constant 1000 in order to give the compiler complete
information about the proper arithmetic to use.

Notice that such constant is used in a context that expects an
expression of type u64 (64 bits, unsigned) and the following
expression is currently being evaluated using 32-bit arithmetic:

mode->clock * 1000

Addresses-Coverity-ID: 1466139 ("Unintentional integer overflow")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20180704142255.GA8614@embeddedor.com
6 years agodrm/pl111: Replace drm_dev_unref with drm_dev_put
Thomas Zimmermann [Tue, 17 Jul 2018 08:36:57 +0000 (10:36 +0200)]
drm/pl111: Replace drm_dev_unref with drm_dev_put

This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717083657.16262-1-tzimmermann@suse.de
6 years agodrm/vc4: Replace drm_dev_unref with drm_dev_put
Thomas Zimmermann [Tue, 17 Jul 2018 08:54:28 +0000 (10:54 +0200)]
drm/vc4: Replace drm_dev_unref with drm_dev_put

This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717085428.18500-1-tzimmermann@suse.de
6 years agodrm/i915: Flush chipset caches after GGTT writes
Chris Wilson [Tue, 17 Jul 2018 09:26:55 +0000 (10:26 +0100)]
drm/i915: Flush chipset caches after GGTT writes

Our I915g (early gen3, the oldest machine we have in the farm) is still
reporting occasional incoherency performing the following operations:

  1) write through GGTT (indirect write into memory)
  2) write through either CPU or WC (direct write into memory)
  3) read from GGTT (indirect read)

Instead of reporting the value from (2), the read from GGTT reports the
earlier value written via the GGTT. We have made sure that the writes are
flushed from the CPU (commit 3a32497f0dbe ("drm/i915/selftests: Provide
full mb() around clflush") and commit add00e6d896f ("drm/i915: Flush the
WCB following a WC write")), but still see the error, just less
frequently. The only remaining cache that might be affected here is a
chipset cache, so flush that as well.

Testcase: igt/drv_selftest/live_coherency #gdg
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717092655.28417-1-chris@chris-wilson.co.uk
6 years agodrm/sun4i: sun8i: Avoid clearing blending order at each atomic commit
Paul Kocialkowski [Tue, 17 Jul 2018 12:25:22 +0000 (14:25 +0200)]
drm/sun4i: sun8i: Avoid clearing blending order at each atomic commit

Blending order is set based on the z position of each DRM plane. The
blending order register is currently cleared at each atomic DRM commit,
with the intent that each committed plane will set the appropriate
bits (based on its z-pos) when enabling the plane.

However, it sometimes happens that a particular plane is left unchanged
by an atomic commit and thus will not be configured again. In that
scenario, blending order is cleared and only the bits relevant for the
planes affected by the commit are set. This leaves the planes that did
not change without their blending order set in the register, leading
to that plane not being displayed.

Instead of clearing the blending order register at every atomic commit,
this change moves the register's initial clear at bind time and only
clears the bits for a specific plane when disabling it or changing its
zpos.

This way, planes that are left untouched by a DRM atomic commit are
no longer disabled.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717122522.11327-1-paul.kocialkowski@bootlin.com
6 years agodrm/sun4i: Replace drm_dev_unref with drm_dev_put
Thomas Zimmermann [Tue, 17 Jul 2018 08:48:14 +0000 (10:48 +0200)]
drm/sun4i: Replace drm_dev_unref with drm_dev_put

This patch unifies the naming of DRM functions for reference counting
of struct drm_device. The resulting code is more aligned with the rest
of the Linux kernel interfaces.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717084814.18091-1-tzimmermann@suse.de
6 years agodrm/i915/selftests: Free the backing store between iterations
Chris Wilson [Tue, 17 Jul 2018 08:23:34 +0000 (09:23 +0100)]
drm/i915/selftests: Free the backing store between iterations

In the huge pages tests, we may have lots of objects being trapped on
the freelist as we hold the struct_mutex allowing the free worker no
opportunity to recover the backing store. We also have stricter
requirements and the desire for large contiguous pages, further
increasing the allocation pressure. To reduce the chance of running out
of memory, we could either drop the mutex and flush the free worker, or
we could release the backing store directly. We do the latter in this
patch for simplicity.

References: https://bugs.freedesktop.org/show_bug.cgi?id=107254
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717082334.18774-1-chris@chris-wilson.co.uk
6 years agodrm/amdgpu: add amdgpu_job_submit_direct helper
Christian König [Fri, 13 Jul 2018 14:29:10 +0000 (16:29 +0200)]
drm/amdgpu: add amdgpu_job_submit_direct helper

Make sure that we properly initialize at least the sched member.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove job->ring
Christian König [Fri, 13 Jul 2018 13:08:44 +0000 (15:08 +0200)]
drm/amdgpu: remove job->ring

We can easily get that from the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove ring parameter from amdgpu_job_submit
Christian König [Fri, 13 Jul 2018 11:54:56 +0000 (13:54 +0200)]
drm/amdgpu: remove ring parameter from amdgpu_job_submit

We know the ring through the entity anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove fence context from the job
Christian König [Fri, 13 Jul 2018 07:58:49 +0000 (09:58 +0200)]
drm/amdgpu: remove fence context from the job

Can be obtained directly from the fence as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: cleanup job header
Christian König [Fri, 13 Jul 2018 07:50:08 +0000 (09:50 +0200)]
drm/amdgpu: cleanup job header

Move job related defines, structure and function declarations to
amdgpu_job.h

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix some checkpatch.pl errors and warnings in dc_link_dp.c
Harry Wentland [Fri, 6 Jul 2018 17:40:33 +0000 (13:40 -0400)]
drm/amd/display: Fix some checkpatch.pl errors and warnings in dc_link_dp.c

[Why]
Any Linux kernel code should pass checkpatch.pl with no errors and
little, if any, warning.

[How]
Fixing some spacing errors and warnings.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Null ptr check for set_sdr_white_level
Krunoslav Kovac [Tue, 10 Jul 2018 20:04:05 +0000 (16:04 -0400)]
drm/amd/display: Null ptr check for set_sdr_white_level

[Why&How]
Cursor boosting can only be done on DCN+
Check for nullptr since DCE doesn't implement it.

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Sivapiriyan Kumarasamy <Sivapiriyan.Kumarasamy@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.56
Harry Wentland [Mon, 9 Jul 2018 21:25:15 +0000 (17:25 -0400)]
drm/amd/display: dal 3.1.56

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Steven Chiu <Steven.Chiu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add new dc debug structure to track debug data
Jun Lei [Fri, 22 Jun 2018 20:51:47 +0000 (16:51 -0400)]
drm/amd/display: add new dc debug structure to track debug data

[why]
Some DTN tests still failing @ 2%  Need to reduce.

[how]
add instrumentation code to driver so we can get more information from failed runs.

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Move address tracking out of HUBP
Tony Cheng [Sat, 7 Jul 2018 19:43:07 +0000 (15:43 -0400)]
drm/amd/display: Move address tracking out of HUBP

[Why]
We sometime require remapping of FB address space to UMA

[How]
Move address tracking up a layer before we apply address translation

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add hook for MST root branch info
Nikola Cornij [Wed, 4 Jul 2018 23:05:16 +0000 (19:05 -0400)]
drm/amd/display: Add hook for MST root branch info

This allows DM to do any necessary updates before MST discovery starts.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add HDR visual confirm
Gloria Li [Tue, 3 Jul 2018 18:39:22 +0000 (14:39 -0400)]
drm/amd/display: add HDR visual confirm

[Why]
Testing team wants a way to tell if HDR is on or not

[How]
Program the overscan color to visually indicate the HDR state of the top-most plane

Signed-off-by: Gloria Li <geling.li@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Refactor SDR cursor boosting in HDR mode
Krunoslav Kovac [Wed, 27 Jun 2018 22:23:37 +0000 (18:23 -0400)]
drm/amd/display: Refactor SDR cursor boosting in HDR mode

[Why]
Cursor boosting is done via CNVC_CUR register which is DPP, not HUBP
Previous commit was implementing it in HUBP functions,
and also breaking diags tests.

[How]
1. Undo original commit as well as Eric's diags test fix, almost completely
2. Move programming to DPP and call via new dc_stream function
3. Also removing cur_rom_en from dpp_cursor_attributes and programming
as part of normal cursor attributes as it depends on cursor color format

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add headers for hardcoded 1d luts.
Vitaly Prosyak [Fri, 15 Jun 2018 13:34:10 +0000 (08:34 -0500)]
drm/amd/display: Add headers for hardcoded 1d luts.

Hard-coded luts are needed since complex algorithms are used for
color and tone mapping. Add the headers for future use.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: add NULL pointer check for run queue (v2)
Junwei Zhang [Mon, 16 Jul 2018 02:53:43 +0000 (10:53 +0800)]
drm/scheduler: add NULL pointer check for run queue (v2)

To check rq pointer before adding entity into it.
That avoids NULL pointer access in some case.

v2: move the check to caller

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Allow to create BO lists in CS ioctl v3
Andrey Grodzovsky [Fri, 6 Jul 2018 18:16:54 +0000 (14:16 -0400)]
drm/amdgpu: Allow to create BO lists in CS ioctl v3

This change is to support MESA performace optimization.
Modify CS IOCTL to allow its input as command buffer and an array of
buffer handles to create a temporay bo list and then destroy it
when IOCTL completes.
This saves on calling for BO_LIST create and destry IOCTLs in MESA
and by this improves performance.

v2: Avoid inserting the temp list into idr struct.

v3:
Remove idr alloation from amdgpu_bo_list_create.
Remove useless argument from amdgpu_cs_parser_fini
Minor cosmetic stuff.

v4: Revert amdgpu_bo_list_destroy back to static

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoRevert "drm/amd/powerplay: fix performance drop on Vega10"
Eric Huang [Fri, 13 Jul 2018 19:05:10 +0000 (15:05 -0400)]
Revert "drm/amd/powerplay: fix performance drop on Vega10"

This reverts commit b87079ec7b4d38efee015367315958ce5495ba93.

SMU FW team ask to remove this version specific code.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/i915/selftests: Exercise reset to break stuck GTT eviction
Chris Wilson [Mon, 16 Jul 2018 13:40:09 +0000 (14:40 +0100)]
drm/i915/selftests: Exercise reset to break stuck GTT eviction

We must be able to reset the GPU while we are waiting on it to perform
an eviction (unbinding an active vma). So attach a spinning request to a
target vma and try and it evict it from a thread to see if that blocks
indefinitely.

v2: Add a wait for the thread to start just in case that takes more than
10ms...
v3: complete() not completion_done() to signal the completion.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716134009.13143-1-chris@chris-wilson.co.uk
6 years agodrm/connector: Fix typo in drm_connector_list_iter_next()
Lyude Paul [Mon, 16 Jul 2018 17:17:11 +0000 (13:17 -0400)]
drm/connector: Fix typo in drm_connector_list_iter_next()

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716171711.413-1-lyude@redhat.com
6 years agodrm/amdgpu/pp: switch smu callback type for get_argument()
Alex Deucher [Thu, 12 Jul 2018 19:59:22 +0000 (14:59 -0500)]
drm/amdgpu/pp: switch smu callback type for get_argument()

return a uint32_t rather than an int to properly reflect
what the function does.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pp: split out common smumgr smu9 code
Alex Deucher [Thu, 12 Jul 2018 19:47:30 +0000 (14:47 -0500)]
drm/amdgpu/pp: split out common smumgr smu9 code

Split out the shared smumgr code for vega10 and 12
so we don't have duplicate code for both.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pp: remove dead vega12 code
Alex Deucher [Wed, 11 Jul 2018 22:30:25 +0000 (17:30 -0500)]
drm/amdgpu/pp: remove dead vega12 code

Commented out.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/i915/selftests: Force a preemption hang
Chris Wilson [Mon, 16 Jul 2018 13:21:54 +0000 (14:21 +0100)]
drm/i915/selftests: Force a preemption hang

Inject a failure into preemption completion to pretend as if the HW
didn't successfully handle preemption and we are forced to do a reset in
the middle.

v2: Wait for preemption, to force testing with the missed preemption.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716132154.12539-1-chris@chris-wilson.co.uk
6 years agodrm/i915/execlists: Always clear preempt status on cancelling all
Chris Wilson [Mon, 16 Jul 2018 12:54:24 +0000 (13:54 +0100)]
drm/i915/execlists: Always clear preempt status on cancelling all

On reset/wedging, we cancel all pending replies from the HW and we also
want to cancel an outstanding preemption event. Since we use the same
function to cancel the pending replies for reset and for a preemption
event, we can simply clear the active tracking for all.

v2: Keep execlists_user_end() markup for wedging
v3: Move assignment to inline to hide the bare assignment.

Fixes: 60a943245413 ("drm/i915/execlists: Drop clear_gtiir() on GPU reset")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716125424.5715-1-chris@chris-wilson.co.uk
6 years agodrm/dp_helper: Add DP aux channel tracing
Lyude Paul [Mon, 16 Jul 2018 15:44:32 +0000 (11:44 -0400)]
drm/dp_helper: Add DP aux channel tracing

This is something we've needed for a very long time now, as it makes
debugging issues with faulty MST hubs along with debugging issues
regarding us interfacing with hubs correctly vastly easier to debug.
Currently this can actually be done if you trace the i2c devices for DP
using ftrace but that's significantly less useful for a couple of
reasons:

- Tracing the i2c devices through ftrace means all of the traces are
  going to contain a lot of "garbage" output that we're sending over the
  i2c line. Most of this garbage comes from retrying transactions, DRM's
  helper library adding extra transactions to work around bad hubs, etc.
- Having a user set up ftrace so that they can provide debugging
  information is a lot more difficult then being able to say "just boot
  with drm.debug=0x100"
- We can potentially expand upon this tracing in the future to print
  debugging information in regards to other DP transactions like MST
  sideband transactions

This is inspired by a patch Rob Clark sent to do this a long time back.
Neither of us could find the patch however, so we both assumed it would
probably just be easier to rewrite it anyway.

Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716154432.13433-1-lyude@redhat.com
6 years agodrm: writeback: Fix doc that says connector should be disconnected
Alexandru Gheorghe [Fri, 13 Jul 2018 15:10:58 +0000 (16:10 +0100)]
drm: writeback: Fix doc that says connector should be disconnected

During iteration process one of the proposed mechanism for not
breaking existing userspace was to report writeback connectors as
disconnected, however the final version used
DRM_CLIENT_CAP_WRITEBACK_CONNECTORS for that purpose.

Change-Id: I2319d099f7669094c8530f1521abdbca08e76486
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/238399/
6 years agodma-buf: Move BUG_ON from _add_shared_fence to _add_shared_inplace
Michel Dänzer [Wed, 4 Jul 2018 15:14:05 +0000 (17:14 +0200)]
dma-buf: Move BUG_ON from _add_shared_fence to _add_shared_inplace

Fixes the BUG_ON spuriously triggering under the following
circumstances:

* reservation_object_reserve_shared is called with shared_count ==
  shared_max - 1, so obj->staged is freed in preparation of an in-place
  update.

* reservation_object_add_shared_fence is called with the first fence,
  after which shared_count == shared_max.

* reservation_object_add_shared_fence is called with a follow-up fence
  from the same context.

In the second reservation_object_add_shared_fence call, the BUG_ON
triggers. However, nothing bad would happen in
reservation_object_add_shared_inplace, since both fences are from the
same context, so they only occupy a single slot.

Prevent this by moving the BUG_ON to where an overflow would actually
happen (e.g. if a buggy caller didn't call
reservation_object_reserve_shared before).

v2:
* Fix description of breaking scenario (Christian König)
* Add bugzilla reference

Cc: stable@vger.kernel.org
Bugzilla: https://bugs.freedesktop.org/106418
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v1
Reviewed-by: Christian König <christian.koenig@amd.com> # v1
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180704151405.10357-1-michel@daenzer.net
6 years agodrm/i915/execlists: Disable submission tasklet upon wedging
Chris Wilson [Mon, 16 Jul 2018 08:03:30 +0000 (09:03 +0100)]
drm/i915/execlists: Disable submission tasklet upon wedging

If we declare the driver wedged before the GPU truly is, then we may see
the GPU complete some CS events following our cancellation. This leaves
us quite confused as we deleted all the bookkeeping and thus complain
about the inconsistent state.

We can just ignore the remaining events and let the GPU idle by not
feeding it, and so avoid trying to racily overwrite shared state. We
rely on there being a full GPU reset before unwedging, giving us the
opportunity to reset the shared state.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107188
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716080332.32283-4-chris@chris-wilson.co.uk
6 years agodrm/i915: Remove pci private pointer after destroying the device private
Chris Wilson [Mon, 16 Jul 2018 08:03:31 +0000 (09:03 +0100)]
drm/i915: Remove pci private pointer after destroying the device private

On an aborted module load, we unwind and free our device private - but
we left a dangling pointer to our privates inside the pci_device. After
the attempted aborted unload, we may still get a call to i915_pci_remove()
when the module is removed, potentially chasing stale data.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716080332.32283-5-chris@chris-wilson.co.uk
6 years agodrm/i915/selftests: Downgrade igt_timeout message
Chris Wilson [Mon, 16 Jul 2018 08:03:32 +0000 (09:03 +0100)]
drm/i915/selftests: Downgrade igt_timeout message

Give in, since CI continues to incorrectly insist that KERN_NOTICE is a
warning and flags the timeout message as unwanted spam. At first, the
intention was to use the message to indicate which tests might warrant
an extended run, but virtually all tests require a timeout so it is
simply not as interesting as first thought.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103667
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180716080332.32283-6-chris@chris-wilson.co.uk
6 years agodrm/meson: Make DMT timings parameters and pixel clock generic
Neil Armstrong [Mon, 16 Jul 2018 07:40:14 +0000 (09:40 +0200)]
drm/meson: Make DMT timings parameters and pixel clock generic

Remove the modes timings tables for DMT modes and calculate the HW
paremeters from the modes timings.

Switch the DMT modes pixel clock calculation out of the static frequency
list to a generic calculation from a range of possible PLL dividers.

This patch is an intermediate step towards usage of the Common Clock
Framwework for PLL setup, by reworking the code to have common
sel_pll() function called by the CEA (HDMI) freq setup and the generic
DMT frequencies setup, we should be able to simply call clk_set_rate()
on the PLL clock handle in a near future.

The CEA (HDMI) and CVBS modes needs very specific clock paths that CCF will
never be able to determine by itself, so there is still some work to do for
a full handoff to CCF handling the clocks.

This setup permits setting non-CEA modes like :
- 1600x900-60Hz
- 1280x1024-75Hz
- 1280x1024-60Hz
- 1440x900-60Hz
- 1366x768-60Hz
- 1280x800-60Hz
- 1152x864-75Hz
- 1024x768-75Hz
- 1024x768-70Hz
- 1024x768-60Hz
- 832x624-75Hz
- 800x600-75Hz
- 800x600-72Hz
- 800x600-60Hz
- 640x480-75Hz
- 640x480-73Hz
- 640x480-67Hz

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: fixed trivial checkpatch issues]
Link: https://patchwork.freedesktop.org/patch/msgid/1531726814-14638-1-git-send-email-narmstrong@baylibre.com