openwrt/staging/blogic.git
5 years agodrm/amd/display: Force uclk to max for every state
Nicholas Kazlauskas [Fri, 5 Jul 2019 20:54:28 +0000 (16:54 -0400)]
drm/amd/display: Force uclk to max for every state

Workaround for now to avoid underflow.

The uclk switch time should really be bumped up to 404, but doing so
would expose p-state hang issues for higher bandwidth display
configurations.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Remove GWS from process during uninit
Joseph Greathouse [Wed, 17 Jul 2019 14:47:58 +0000 (09:47 -0500)]
drm/amdkfd: Remove GWS from process during uninit

If we shut down a process without having destroyed its GWS-using
queues, it is possible that GWS BO will still be in the process
BO list during the gpuvm destruction. This list should be empty
at that time, so we should remove the GWS allocation at the
process uninit point if it is still around.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Fix offset for vmid selection in debugfs interface
Tom St Denis [Tue, 16 Jul 2019 11:23:22 +0000 (07:23 -0400)]
drm/amd/amdgpu: Fix offset for vmid selection in debugfs interface

The register debugfs interface was using the wrong bitmask for vmid
selection for GFX_CNTL.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: update vega20 driver if to fit latest SMU firmware
Evan Quan [Fri, 12 Jul 2019 02:53:11 +0000 (10:53 +0800)]
drm/amd/powerplay: update vega20 driver if to fit latest SMU firmware

Optimization for the socket power calculation is introduced.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: maintain SMU FW backward compatibility
Evan Quan [Tue, 16 Jul 2019 06:20:22 +0000 (14:20 +0800)]
drm/amd/powerplay: maintain SMU FW backward compatibility

Do not halt driver loading on if_version mismatch. As our
driver and FWs are backward compatible.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: correct smu_update_table usage
Evan Quan [Thu, 11 Jul 2019 07:13:17 +0000 (15:13 +0800)]
drm/amd/powerplay: correct smu_update_table usage

The interface was used in a confusing way. In profile mode scenario,
the 2nd parameter of the interface was used in a different way from
other scenarios.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: fix deadlock around smu_handle_task V2
Evan Quan [Fri, 12 Jul 2019 05:18:16 +0000 (13:18 +0800)]
drm/amd/powerplay: fix deadlock around smu_handle_task V2

As the lock was already held on the entrance to smu_handle_task.

- V2: lock in small granularity

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: avoid access before allocation
Evan Quan [Fri, 12 Jul 2019 02:32:02 +0000 (10:32 +0800)]
drm/amd/powerplay: avoid access before allocation

No access before allocation.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: fix memory allocation failure check V2
Evan Quan [Fri, 12 Jul 2019 02:07:31 +0000 (10:07 +0800)]
drm/amd/powerplay: fix memory allocation failure check V2

Fix memory allocation failure check.

- V2: fix one more similar error

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Fix silent amdgpu_bo_move failures
Felix Kuehling [Sat, 13 Jul 2019 06:27:34 +0000 (02:27 -0400)]
drm/amdgpu: Fix silent amdgpu_bo_move failures

Under memory pressure, buffer moves between RAM to VRAM  can
fail when there is no GTT space available. In those cases
amdgpu_bo_move falls back to ttm_bo_move_memcpy, which seems to
succeed, although it doesn't really support non-contiguous or
invisible VRAM. This manifests as VM faults with corrupted page
table entries in KFD eviction stress tests.

Print some helpful messages when lack of GTT space is causing buffer
moves to fail. Check that source and destination memory regions are
supported by ttm_bo_move_memcpy before taking that fallback.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: drop dead header
Alex Deucher [Tue, 16 Jul 2019 14:28:41 +0000 (09:28 -0500)]
drm/amdgpu: drop dead header

Not used anymore.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Noticed-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Use proper enums in vega20_print_clk_levels
Nathan Chancellor [Thu, 4 Jul 2019 05:52:17 +0000 (22:52 -0700)]
drm/amd/powerplay: Use proper enums in vega20_print_clk_levels

clang warns:

drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:995:39: warning:
implicit conversion from enumeration type 'PPCLK_e' to different
enumeration type 'enum smu_clk_type' [-Wenum-conversion]
                ret = smu_get_current_clk_freq(smu, PPCLK_SOCCLK, &now);
                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1016:39: warning:
implicit conversion from enumeration type 'PPCLK_e' to different
enumeration type 'enum smu_clk_type' [-Wenum-conversion]
                ret = smu_get_current_clk_freq(smu, PPCLK_FCLK, &now);
                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1031:39: warning:
implicit conversion from enumeration type 'PPCLK_e' to different
enumeration type 'enum smu_clk_type' [-Wenum-conversion]
                ret = smu_get_current_clk_freq(smu, PPCLK_DCEFCLK, &now);
                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~

The values are mapped one to one in vega20_get_smu_clk_index so just use
the proper enums here.

Fixes: 096761014227 ("drm/amd/powerplay: support sysfs to get socclk, fclk, dcefclk")
Link: https://github.com/ClangBuiltLinux/linux/issues/587
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx10: set SH_MEM_CONFIG.INITIAL_INST_PREFETCH
Nicolai Hähnle [Tue, 16 Jul 2019 18:11:22 +0000 (13:11 -0500)]
drm/amdgpu/gfx10: set SH_MEM_CONFIG.INITIAL_INST_PREFETCH

Prefetch mode 0 is not supported and can lead to hangs with certain very
specific code patterns. Set a sound prefetch mode for all VMIDs rather
than forcing all shaders to set the prefetch mode at the beginning.

Reduce code duplication a bit while we're at it. Note that the 64-bit
address mode enum and the retry all enum are both 0, so the only
functional change is in the INITIAL_INST_PREFETCH field.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: enable fw ctf,apcc dfll and gfx ss
Kenneth Feng [Tue, 16 Jul 2019 07:01:31 +0000 (15:01 +0800)]
drm/amd/powerplay: enable fw ctf,apcc dfll and gfx ss

enable fw ctf, apcc dfll and gfx ss on navi10.
fw ctf: when the fw ctf is triggered, the gfx and soc power domain
are shut down. fan speed is boosted to the maximum.
gfx ss: hardware feature, sanity check has been done.
apcc dfll: can check the scoreboard in smu fw to confirm if it's enabled.
no need to do further check since the gfx hardware control the frequency once
a pcc signal comes.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: check kdb_bin_size to exclude kdb loading sequence
Hawking Zhang [Tue, 16 Jul 2019 05:48:19 +0000 (13:48 +0800)]
drm/amdgpu: check kdb_bin_size to exclude kdb loading sequence

The legacy navi10 sos binary will not carry on kdb image. the kdb_start_addr
is actually the start address of sys_drv image and shouldn't be sent to psp
bootloader.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Fix unaligned memory copies
Felix Kuehling [Sat, 13 Jul 2019 06:35:37 +0000 (02:35 -0400)]
drm/amdgpu: Fix unaligned memory copies

When starting a new mm_node, the page_offset becomes 0.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: replace simple_strtol() by kstrtou32()
Wang Xiayang [Mon, 15 Jul 2019 08:53:01 +0000 (16:53 +0800)]
drm/amdgpu: replace simple_strtol() by kstrtou32()

The simple_strtol() function is deprecated. kstrto[l,u32]() is
the correct replacement as it can properly handle overflows.

This patch replaces the deprecated simple_strtol() use introduced recently.
As clk is of type uint32_t, we are safe to use kstrtou32().

It is also safe to return zero on string parsing error,
similar to the case of returning zero if buf is empty in parse_clk().

Fixes: bb5a2bdf36a8 ("drm/amdgpu: support dpm level modification under virtualization v3")
Signed-off-by: Wang Xiayang <xywang.sjtu@sjtu.edu.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: remove memset after kzalloc
Fuqian Huang [Mon, 15 Jul 2019 03:17:31 +0000 (11:17 +0800)]
drm/amdgpu: remove memset after kzalloc

kzalloc has already zeroed the memory during the allocation.
So memset is unneeded.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: hide #warning for missing DC config
Arnd Bergmann [Fri, 12 Jul 2019 09:40:49 +0000 (11:40 +0200)]
drm/amd/amdgpu: hide #warning for missing DC config

It is annoying to have #warnings that trigger in randconfig
builds like

drivers/gpu/drm/amd/amdgpu/soc15.c:653:3: error: "Enable CONFIG_DRM_AMD_DC for display support on SOC15."
drivers/gpu/drm/amd/amdgpu/nv.c:400:3: error: "Enable CONFIG_DRM_AMD_DC for display support on navi."

Remove these and rely on the users to turn these on.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Fix Vega20 Perf counter for pcie_bw
Kent Russell [Mon, 15 Jul 2019 12:53:06 +0000 (08:53 -0400)]
drm/amdgpu: Fix Vega20 Perf counter for pcie_bw

The perf counter for Vega20 is 108, instead of 104 which it was on all
previous GPUs, so add a check to use the appropriate value.

Signed-off-by: Kent Russell <kent.russell@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Add missing select_me_pipe_q() for gfx10
Tom St Denis [Fri, 12 Jul 2019 13:41:32 +0000 (09:41 -0400)]
drm/amd/amdgpu: Add missing select_me_pipe_q() for gfx10

The ability to select GFX GRBM me/pipe/queue/vmid was missing from
the gfx10 driver.  This patch adds it.  Used by the debugfs register
interface to select GFX resources when read/writing registers.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Add VMID to SRBM debugfs bank selection
Tom St Denis [Fri, 12 Jul 2019 13:27:06 +0000 (09:27 -0400)]
drm/amd/amdgpu: Add VMID to SRBM debugfs bank selection

Add 5 bits to the offset for SRBM selection to handle VMIDs.  Also
update the select_me_pipe_q() callback to also select VMID.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: extend AMDGPU_CTX_PRIORITY_NORMAL comment
Emil Velikov [Fri, 14 Jun 2019 17:33:35 +0000 (18:33 +0100)]
drm/amdgpu: extend AMDGPU_CTX_PRIORITY_NORMAL comment

Currently the AMDGPU_CTX_PRIORITY_* defines are used in both
drm_amdgpu_ctx_in::priority and drm_amdgpu_sched_in::priority.

Extend the comment to mention the CAP_SYS_NICE or DRM_MASTER requirement
is only applicable with the former.

Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add helper of smu_clk_dpm_is_enabled for smu
Kevin Wang [Fri, 12 Jul 2019 07:22:40 +0000 (15:22 +0800)]
drm/amd/powerplay: add helper of smu_clk_dpm_is_enabled for smu

v2: change function name to smu_clk_dpm_is_enabled.
add this helper function to check dpm clk feature is enabled.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: fix save dpm level error for smu
Kevin Wang [Fri, 12 Jul 2019 09:05:52 +0000 (17:05 +0800)]
drm/amd/powerplay: fix save dpm level error for smu

the save dpm level should be save previous dpm profile level,
should not modified by get dpm level function.
eg: default auto
1. auto -> standard ==> dpm_level = standard, save_dpm = auto.
2. standard -> auto ==> dpm_level = auto, save_dpm = standard.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: avoid double check feature enabled
Kevin Wang [Tue, 16 Jul 2019 18:07:23 +0000 (13:07 -0500)]
drm/amd/powerplay: avoid double check feature enabled

the unforce_dpm_levels doesn't need to check feature enablement.
because the smu_get_dpm_freq_range function has check feature logic.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add standard profile dpm support for smu
Kevin Wang [Fri, 12 Jul 2019 06:42:12 +0000 (14:42 +0800)]
drm/amd/powerplay: add standard profile dpm support for smu

1. the standard dpm is not support before.
2. use auto profile to adapt standard profile.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add socclk profile dpm support.
Kevin Wang [Fri, 12 Jul 2019 06:40:12 +0000 (14:40 +0800)]
drm/amd/powerplay: add socclk profile dpm support.

1.miss socclk profile support when bringup.
2.add feature check for socclk.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Consistently apply noretry setting
Felix Kuehling [Fri, 21 Jun 2019 23:50:03 +0000 (19:50 -0400)]
drm/amdkfd: Consistently apply noretry setting

Apply the same setting to SH_MEM_CONFIG and VM_CONTEXT1_CNTL. This
makes the noretry param no longer KFD-specific. On GFX10 I'm not
changing SH_MEM_CONFIG in this commit because GFX10 has different
retry behaviour in the SQ and I don't have a way to test it at the
moment.

Suggested-by: Christian König <Christian.Koenig@amd.com>
CC: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by : Shaoyun.liu < Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: return 'NULL' instead of 'false' from dcn20_acquire_idle_pipe_for_layer
Arnd Bergmann [Fri, 12 Jul 2019 09:39:52 +0000 (11:39 +0200)]
drm/amd/display: return 'NULL' instead of 'false' from dcn20_acquire_idle_pipe_for_layer

clang complains that 'false' is a not a pointer:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:2428:10: error: expression which evaluates to zero treated as a null pointer constant of type 'struct pipe_ctx *' [-Werror,-Wnon-literal-null-conversion]
                return false;

Changing it to 'NULL' looks like the right thing that will shut up
the warning and make it easier to read, while not changing behavior.

Fixes: 7ed4e6352c16 ("drm/amd/display: Add DCN2 HW Sequencer and Resource")
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Support clang option for stack alignment
Arnd Bergmann [Fri, 12 Jul 2019 09:37:00 +0000 (11:37 +0200)]
drm/amd/display: Support clang option for stack alignment

As previously fixed for dml in commit 4769278e5c7f ("amdgpu/dc/dml:
Support clang option for stack alignment") and calcs in commit
cc32ad8f559c ("amdgpu/dc/calcs: Support clang option for stack
alignment"), dcn20 uses an option that is not available with clang:

clang: error: unknown argument: '-mpreferred-stack-boundary=4'
scripts/Makefile.build:281: recipe for target 'drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.o' failed

Use the same trick that we have in the other two files.

Fixes: 7ed4e6352c16 ("drm/amd/display: Add DCN2 HW Sequencer and Resource")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add pstate mclk(uclk) support for navi10
Kevin Wang [Fri, 12 Jul 2019 03:27:50 +0000 (11:27 +0800)]
drm/amd/powerplay: add pstate mclk(uclk) support for navi10

add pstate mclk(uclk) support.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: fix smu clock type change miss error
Kevin Wang [Thu, 11 Jul 2019 13:33:17 +0000 (21:33 +0800)]
drm/amd/powerplay: fix smu clock type change miss error

in the smu module, use the smu_xxxclk type to identify the CLK type
use SMU_SCLK, SMU_MCLK to replace PP_SCLK, PP_MCLK.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: support key database loading for navi10
Hawking Zhang [Wed, 10 Jul 2019 16:13:54 +0000 (00:13 +0800)]
drm/amdgpu: support key database loading for navi10

Starting from navi10, driver should send Key Database Load command
to bootloader before loading sys_drv and sos

Signed-off-by: John Clements <John.Clements@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: switch to macro for psp bootloader command
Hawking Zhang [Thu, 11 Jul 2019 14:02:02 +0000 (22:02 +0800)]
drm/amdgpu: switch to macro for psp bootloader command

The command will be sent to psp bootloader from driver
to ask psp bootloader to exerise tOS, sys_drv and kdb loading

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Print out voltage in DM_PPLIB
Paul Menzel [Mon, 8 Jul 2019 11:50:05 +0000 (13:50 +0200)]
drm/amdgpu: Print out voltage in DM_PPLIB

As the clock is already logged, also log the voltage.

Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add drm_audio_component support to amdgpu_dm
Nicholas Kazlauskas [Thu, 11 Jul 2019 19:31:46 +0000 (14:31 -0500)]
drm/amd/display: Add drm_audio_component support to amdgpu_dm

[Why]
The drm_audio_component can be used to give pin ELD notifications
directly to the sound driver. This fixes audio endpoints disappearing
due to missing unsolicited notifications.

[How]
Send the notification via the audio component whenever we enable or
disable audio state on a stream. This matches what i915 does with
their drm_audio_component and what Takashi Iwai's proposed hack for
radeon/amdpgu did.

This is a bit delayed in when the notification actually occurs, however.
We wait until after all the programming is complete rather than sending
the notification mid sequence.

Particular care is needed for the get ELD callback since it can happen
outside the locking and fencing DRM does for atomic commits.

Cc: Leo Li <sunpeng.li@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Expose audio inst from DC to DM
Nicholas Kazlauskas [Fri, 28 Jun 2019 17:39:41 +0000 (13:39 -0400)]
drm/amd/display: Expose audio inst from DC to DM

[Why]
In order to give pin notifications to the sound driver from DM we need
to know whether audio is enabled on a stream and what pin it's using
from DC.

[How]
Expose the instance via stream status if it's a mapped resource for
the stream. It will be -1 if there's no audio mapped.

Cc: Leo Li <sunpeng.li@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: fix cp hang in eviction
Eric Huang [Tue, 9 Jul 2019 19:33:53 +0000 (15:33 -0400)]
drm/amdkfd: fix cp hang in eviction

The cp hang occurs in OCL conformance test only on supermicro
platform which has 40 cores and the test generates 40 threads.
The root cause is race condition in non-protected flags.

The fix is to add flags of is_evicted and is_active(init_mqd())
into protected area.

Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: enable IP discovery by default on navi
Alex Deucher [Mon, 8 Jul 2019 18:47:12 +0000 (13:47 -0500)]
drm/amdgpu: enable IP discovery by default on navi

Use the IP discovery table rather than hardcoding the
settings in the driver.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/discovery: fix DCE_HWIP mapping error in hw_id_map array
tiancyin [Thu, 11 Jul 2019 06:09:50 +0000 (14:09 +0800)]
drm/amdgpu/discovery: fix DCE_HWIP mapping error in hw_id_map array

ID of DCE_HWIP from vbios is DMU_HWID,
mismatch cause null pointer crash in navi10 modprobe.

Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: bug fix for sysfs
Kenneth Feng [Thu, 11 Jul 2019 07:37:50 +0000 (15:37 +0800)]
drm/amd/powerplay: bug fix for sysfs

when we set profile_peak to sysfs:power_dpm_force_performance_level,
we gets the wrong socclk level and mclk level.this patch fix this issue.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: increase the SMU msg response waiting time
Evan Quan [Wed, 3 Jul 2019 01:21:37 +0000 (09:21 +0800)]
drm/amd/powerplay: increase the SMU msg response waiting time

This is expected to fix some mode1 reset failures. And this
affects SMU part only as the timeout setting for other parts
is controlled by a different macro.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Fix potential integer overflows
Felix Kuehling [Tue, 9 Jul 2019 23:31:21 +0000 (19:31 -0400)]
drm/amdgpu: Fix potential integer overflows

With mm_nodes larger than 4GB, byte_count in amdgpu_fill_buffer would
overflow.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/psp: add a mutex to protect access to the psp ring
Alex Deucher [Mon, 8 Jul 2019 18:33:22 +0000 (13:33 -0500)]
drm/amdgpu/psp: add a mutex to protect access to the psp ring

We need to serialize access to the psp ring if there are multiple
callers at runtime.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/navi10: add uclk activity sensor
Alex Deucher [Thu, 4 Jul 2019 02:39:10 +0000 (21:39 -0500)]
drm/amdgpu/navi10: add uclk activity sensor

Query the metrics table for the current uclk activity.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: properly guard the generic discovery code
Alex Deucher [Mon, 8 Jul 2019 18:44:59 +0000 (13:44 -0500)]
drm/amdgpu: properly guard the generic discovery code

It's only available on navi and newer.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add missing documentation on new module parameters
Alex Deucher [Wed, 3 Jul 2019 13:50:12 +0000 (08:50 -0500)]
drm/amdgpu: add missing documentation on new module parameters

New parameters added for navi lack documentation.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: don't invalidate caches in RELEASE_MEM, only do the writeback
Marek Olšák [Fri, 28 Jun 2019 22:31:26 +0000 (18:31 -0400)]
drm/amdgpu: don't invalidate caches in RELEASE_MEM, only do the writeback

This RELEASE_MEM use has the Release semantic, which means we should write
back but not invalidate. Invalidations only make sense with the Acquire
semantic (ACQUIRE_MEM), or when RELEASE_MEM is used to do the combined
Acquire-Release semantic, which is a barrier, not a fence.

The undesirable side effect of doing invalidations for the Release semantic
is that it invalidates caches while shaders are running, because the Release
can execute in the middle of the next IB.

UMDs should use ACQUIRE_MEM at the beginning of IBs. Doing cache
invalidations for a fence (like in this case) doesn't do anything
for correctness.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: avoid 64-bit division
Arnd Bergmann [Mon, 8 Jul 2019 13:52:08 +0000 (15:52 +0200)]
drm/amd/display: avoid 64-bit division

On 32-bit architectures, dividing a 64-bit integer in the kernel
leads to a link error:

ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!

Change the two recently introduced instances to a multiply+shift
operation that is also much cheaper on 32-bit architectures.
We can do that here, since both of them are really 32-bit numbers
that change a few percent.

Fixes: bedbbe6af4be ("drm/amd/display: Move link functions from dc to dc_link")
Fixes: f18bc4e53ad6 ("drm/amd/display: update calculated bounding box logic for NV")
Acked-by: Slava Abramov <slava.abramov@amd.com>
Tested-by: Slava Abramov <slava.abramov@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/psp11: simplify the ucode register logic
Alex Deucher [Mon, 8 Jul 2019 19:01:30 +0000 (14:01 -0500)]
drm/amdgpu/psp11: simplify the ucode register logic

Split it between navi10 and newer and everything before
navi10.

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: properly guard DC support in navi code
Alex Deucher [Fri, 5 Jul 2019 20:39:39 +0000 (15:39 -0500)]
drm/amdgpu: properly guard DC support in navi code

Need to add appropriate ifdef.

Acked-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: vega20: fix uninitialized variable use
Arnd Bergmann [Mon, 8 Jul 2019 14:07:59 +0000 (16:07 +0200)]
drm/amd/powerplay: vega20: fix uninitialized variable use

If smu_get_current_rpm() fails, we can't use the output,
as that may be uninitialized:

drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: error: variable 'current_rpm' is used uninitialized whenever '?:' condition is false [-Werror,-Wsometimes-uninitialized]
        ret = smu_get_current_rpm(smu, &current_rpm);
              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:735:3: note: expanded from macro 'smu_get_current_rpm'
        ((smu)->funcs->get_current_rpm ? (smu)->funcs->get_current_rpm((smu), (speed)) : 0)
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3024:12: note: uninitialized use occurs here
        percent = current_rpm * 100 / pptable->FanMaximumRpm;
                  ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: note: remove the '?:' if its condition is always true
        ret = smu_get_current_rpm(smu, &current_rpm);
              ^
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:735:3: note: expanded from macro 'smu_get_current_rpm'
        ((smu)->funcs->get_current_rpm ? (smu)->funcs->get_current_rpm((smu), (speed)) : 0)
         ^
drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3020:22: note: initialize the variable 'current_rpm' to silence this warning
        uint32_t current_rpm;

Propagate the error code in that case.

Fixes: ee0db82027ee ("drm/amd/powerplay: move PPTable_t uses into asic level")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: dcn20: include linux/delay.h
Arnd Bergmann [Mon, 8 Jul 2019 13:53:18 +0000 (15:53 +0200)]
drm/amd/display: dcn20: include linux/delay.h

Without this header, we get a compiler error in some configurations:

.../dc/dcn20/dcn20_hwseq.c: In function 'dcn20_hwss_wait_for_blank_complete':
.../dc/dcn20/dcn20_hwseq.c:1493:3: error: implicit declaration of function 'udelay' [-Werror=implicit-function-declaration]

Note: the use of udelay itself may be problematic, as can occupy
the CPU for 200ms in a busy-loop here.

Fixes: 7ed4e6352c16 ("drm/amd/display: Add DCN2 HW Sequencer and Resource")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoamdgpu: make pmu support optional
Arnd Bergmann [Mon, 8 Jul 2019 14:41:43 +0000 (16:41 +0200)]
amdgpu: make pmu support optional

When CONFIG_PERF_EVENTS is disabled, we cannot compile the pmu
portion of the amdgpu driver:

drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:48:38: error: no member named 'hw' in 'struct perf_event'
        struct hw_perf_event *hwc = &event->hw;
                                     ~~~~~  ^
drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:51:13: error: no member named 'attr' in 'struct perf_event'
        if (event->attr.type != event->pmu->type)
            ~~~~~  ^
...

Use conditional compilation for this file.

Fixes: 9c7c85f7ea1f ("drm/amdgpu: add pmu counters")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percent
Nathan Chancellor [Thu, 4 Jul 2019 05:52:18 +0000 (22:52 -0700)]
drm/amd/powerplay: Zero initialize current_rpm in vega20_get_fan_speed_percent

clang warns (trimmed for brevity):

drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:3023:8: warning:
variable 'current_rpm' is used uninitialized whenever '?:' condition is
false [-Wsometimes-uninitialized]
        ret = smu_get_current_rpm(smu, &current_rpm);
              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

smu_get_current_rpm expands to a ternary operator conditional on
smu->funcs->get_current_rpm being not NULL. When this is false,
current_rpm will be uninitialized. Zero initialize current_rpm to
avoid using random stack values if that ever happens.

Fixes: ee0db82027ee ("drm/amd/powerplay: move PPTable_t uses into asic level")
Link: https://github.com/ClangBuiltLinux/linux/issues/588
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freq
Nathan Chancellor [Thu, 4 Jul 2019 05:52:15 +0000 (22:52 -0700)]
drm/amd/powerplay: Zero initialize freq in smu_v11_0_get_current_clk_freq

clang warns (trimmed for brevity):

drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:1098:10: warning:
variable 'freq' is used uninitialized whenever '?:' condition is false
[-Wsometimes-uninitialized]
                ret =  smu_get_current_clk_freq_by_table(smu, clk_id, &freq);
                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

If get_current_clk_freq_by_table is ever NULL, freq will fail to be
properly initialized. Zero initialize it to avoid using uninitialized
stack values.

smu_get_current_clk_freq_by_table expands to a ternary operator
conditional on smu->funcs->get_current_clk_freq_by_table being not NULL.
When this is false, freq will be uninitialized. Zero initialize freq to
avoid using random stack values if that ever happens.

Fixes: e36182490dec ("drm/amd/powerplay: fix dpm freq unit error (10KHz -> Mhz)")
Link: https://github.com/ClangBuiltLinux/linux/issues/585
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Use memset to initialize metrics structs
Nathan Chancellor [Thu, 4 Jul 2019 05:52:13 +0000 (22:52 -0700)]
drm/amd/powerplay: Use memset to initialize metrics structs

clang warns:

drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:601:33: warning:
suggest braces around initialization of subobject [-Wmissing-braces]
        static SmuMetrics_t metrics = {0};
                                       ^
                                       {}
drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:905:26: warning:
suggest braces around initialization of subobject [-Wmissing-braces]
        SmuMetrics_t metrics = {0};
                                ^
                                {}
2 warnings generated.

One way to fix these warnings is to add additional braces like clang
suggests; however, there has been a bit of push back from some
maintainers[1][2], who just prefer memset as it is unambiguous, doesn't
depend on a particular compiler version[3], and properly initializes all
subobjects. Do that here so there are no more warnings.

[1]: https://lore.kernel.org/lkml/022e41c0-8465-dc7a-a45c-64187ecd9684@amd.com/
[2]: https://lore.kernel.org/lkml/20181128.215241.702406654469517539.davem@davemloft.net/
[3]: https://lore.kernel.org/lkml/20181116150432.2408a075@redhat.com/

Fixes: 98e1a543c7b1 ("drm/amd/powerplay: add function get current clock freq interface for navi10")
Fixes: ab43c4bf1cc8 ("drm/amd/powerplay: fix fan speed show error (for hwmon pwm)")
Link: https://github.com/ClangBuiltLinux/linux/issues/583
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/mes10.1: Fix header guard
Nathan Chancellor [Thu, 4 Jul 2019 05:52:12 +0000 (22:52 -0700)]
drm/amdgpu/mes10.1: Fix header guard

clang warns:

 In file included from drivers/gpu/drm/amd/amdgpu/nv.c:53:
 drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:24:9: warning:
 '__MES_V10_1_H__' is used as a header guard here, followed by #define of
 a different macro [-Wheader-guard]
 #ifndef __MES_V10_1_H__
         ^~~~~~~~~~~~~~~
 drivers/gpu/drm/amd/amdgpu/../amdgpu/mes_v10_1.h:25:9: note:
 '__MES_v10_1_H__' is defined here; did you mean '__MES_V10_1_H__'?
 #define __MES_v10_1_H__
         ^~~~~~~~~~~~~~~
         __MES_V10_1_H__
 1 warning generated.

Capitalize the V.

Fixes: 886f82aa7a1d ("drm/amdgpu/mes10.1: add ip block mes10.1 (v2)")
Link: https://github.com/ClangBuiltLinux/linux/issues/582
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add temperature sensor support for navi10
Kevin Wang [Thu, 4 Jul 2019 02:56:18 +0000 (10:56 +0800)]
drm/amd/powerplay: add temperature sensor support for navi10

the hwmon interface need temperature sensor type support.
1. SENSOR_HOTSPOT_TEMP
2. SENSOR_EDGE_TEMP(SENSOR_GPU_TEMP)
3. SENSOR_MEM_TEMP

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix scheduler timeout calc
Flora Cui [Mon, 24 Jun 2019 08:48:33 +0000 (16:48 +0800)]
drm/amdgpu: fix scheduler timeout calc

scheduler timeout is in jiffies
v2: move timeout check to amdgpu_device_get_job_timeout_settings after
parsing the value
v3: add lockup_timeout param check. 0: keep default value. negative:
infinity timeout.
v4: refactor codes.

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Prepare for hmm_range_register API change (v2)
Philip Yang [Tue, 2 Jul 2019 22:39:45 +0000 (18:39 -0400)]
drm/amdgpu: Prepare for hmm_range_register API change (v2)

An upcoming change in the hmm_range_register API requires passing in
a pointer to an hmm_mirror instead of mm_struct. To access the
hmm_mirror we need pass bo instead of ttm to amdgpu_ttm_tt_get_user_pages
because mirror is part of amdgpu_mn structure, which is accessible from bo.

v2: fix building without CONFIG_HMM_MIRROR (Arnd)

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add mode1 (psp) reset for navi asic
Kevin Wang [Fri, 5 Jul 2019 04:51:45 +0000 (12:51 +0800)]
drm/amdgpu: add mode1 (psp) reset for navi asic

add mode1 (by psp) reset for navi asic.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Disable ras features on all IPs before gpu reset
xinhui pan [Thu, 4 Jul 2019 02:54:58 +0000 (10:54 +0800)]
drm/amdgpu: Disable ras features on all IPs before gpu reset

Perform a ras_suspend to disable ras on all IPs to workaround
some ROCm stability issue.

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add baco smu reset function for smu11
Kevin Wang [Fri, 5 Jul 2019 20:58:46 +0000 (15:58 -0500)]
drm/amd/powerplay: add baco smu reset function for smu11

add baco reset support for smu11.
it can help gpu do asic reset when gpu recovery.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: increase waiting time for smu response
Jack Xiao [Wed, 3 Jul 2019 03:56:07 +0000 (11:56 +0800)]
drm/amd/powerplay: increase waiting time for smu response

We observed some SMU commands take more time for execution,
so increase waiting time for response.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay/smu7_hwmgr: replace blocking delay with non-blocking
Yrjan Skrimstad [Thu, 30 May 2019 00:08:21 +0000 (02:08 +0200)]
drm/amd/powerplay/smu7_hwmgr: replace blocking delay with non-blocking

This driver currently contains a repeated 500ms blocking delay call
which causes frequent major buffer underruns in PulseAudio. This patch
fixes this issue by replacing the blocking delay with a non-blocking
sleep call.

Signed-off-by: Yrjan Skrimstad <yrjan@skrimstad.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Use kmemdup rather than duplicating its implementation
Fuqian Huang [Wed, 3 Jul 2019 16:27:18 +0000 (00:27 +0800)]
drm/amdgpu: Use kmemdup rather than duplicating its implementation

kmemdup is introduced to duplicate a region of memory in a neat way.
Rather than kmalloc/kzalloc + memcpy, which the programmer needs to
write the size twice (sometimes lead to mistakes), kmemdup improves
readability, leads to smaller code and also reduce the chances of mistakes.
Suggestion to use kmemdup rather than using kmalloc/kzalloc + memcpy.

Reviewed-by: Christian König <Christian.Koenig@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Disable idle optimization for chained runlist
Felix Kuehling [Thu, 20 Jun 2019 18:54:35 +0000 (14:54 -0400)]
drm/amdkfd: Disable idle optimization for chained runlist

This works around difficult-to-reproduce soft hangs on oversubscribed
runlists.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Add chained_runlist_idle_disable flag to pm4_mes_runlist
Felix Kuehling [Thu, 20 Jun 2019 18:50:52 +0000 (14:50 -0400)]
drm/amdkfd: Add chained_runlist_idle_disable flag to pm4_mes_runlist

New flag to disable an idle runlist optimization that is causing soft
hangs with some diffult-to-reproduce customer workloads. This will
serve as a workaround until the problem can be reproduced and the
root-cause determined.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Fix tracking of invalid userptrs
Felix Kuehling [Sat, 29 Jun 2019 05:50:35 +0000 (01:50 -0400)]
drm/amdgpu: Fix tracking of invalid userptrs

Restore the code that resets mem->invalid. Othewise so mapping
userptrs after they got an MMU notifiers would always be skipped.

This also avoids unnecessarily calling get_user_pages on BOs that
have not been invalidated since the last try.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Use FENCE_OWNER_KFD in process_sync_pds_resv
Felix Kuehling [Fri, 7 Jun 2019 15:33:21 +0000 (11:33 -0400)]
drm/amdgpu: Use FENCE_OWNER_KFD in process_sync_pds_resv

We don't want eviction fences to trigger when waiting for page table
updates to complete during restore. In theory there shouldn't be any
unsignaled eviction fences in the PD reservation object, but I'm
seeing them in instrumented code for reasons not fully understood.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Print a warning when the runlist becomes oversubscribed
Felix Kuehling [Thu, 20 Jun 2019 19:37:37 +0000 (15:37 -0400)]
drm/amdkfd: Print a warning when the runlist becomes oversubscribed

Oversubscription of queues or processes results in poor performance
mostly because HWS blinbly schedules busy and idle queues, resulting
in poor occupancy if many queues are idle.

Let users know with a warning message when transitioning from a
non-oversubscribed to an oversubscribed runlist.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: remove an unused variable
Jack Xiao [Tue, 2 Jul 2019 06:58:22 +0000 (06:58 +0000)]
drm/amdkfd: remove an unused variable

Just for cleanup.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/display: fix interrupt client id for navi
Alex Deucher [Tue, 2 Jul 2019 16:39:50 +0000 (11:39 -0500)]
drm/amdgpu/display: fix interrupt client id for navi

All asics newer than vega10 use client ids, so simplify the
check.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: remove duplicated PCIE atomics request
Jack Xiao [Wed, 29 May 2019 05:52:17 +0000 (13:52 +0800)]
drm/amdkfd: remove duplicated PCIE atomics request

Since amdgpu has always requested PCIE atomics, kfd don't
need duplicated PCIE atomics enablement. Referring to amdgpu
request result is enough.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: enable PCIE atomics ops support
Jack Xiao [Thu, 23 May 2019 16:13:14 +0000 (00:13 +0800)]
drm/amdgpu: enable PCIE atomics ops support

GPU atomics operation depends on PCIE atomics support.
Always enable PCIE atomics ops support in case that
it hasn't been enabled.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add field indicating if has PCIE atomics support
Jack Xiao [Wed, 29 May 2019 05:24:22 +0000 (13:24 +0800)]
drm/amdgpu: add field indicating if has PCIE atomics support

The new field in amdgpu device is used to record whether the
system has PCIE atomics support. The field can be exposed to
UMD or kfd whether PCIE atomics have supported.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: use hardware fan control if no powerplay fan table
Evan Quan [Thu, 27 Jun 2019 03:01:04 +0000 (11:01 +0800)]
drm/amd/powerplay: use hardware fan control if no powerplay fan table

Otherwise, you may get divided-by-zero error or corrput the SMU fan
control feature.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Slava Abramov <slava.abramov@amd.com>
Acked-by: Slava Abramov <slava.abramov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix MGPU fan boost enablement for XGMI reset
Evan Quan [Wed, 26 Jun 2019 02:53:39 +0000 (10:53 +0800)]
drm/amdgpu: fix MGPU fan boost enablement for XGMI reset

MGPU fan boost feature should not be enabled until all the
devices from the same hive are all back from reset.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: handle AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID on gfx10
Marek Olšák [Wed, 19 Jun 2019 23:26:59 +0000 (19:26 -0400)]
drm/amdgpu: handle AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID on gfx10

Add the gfx10 equivalent of the gfx9 code.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)
Marek Olšák [Wed, 19 Jun 2019 23:26:24 +0000 (19:26 -0400)]
drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)

v2: update emit_ib_size
(though it's still wrong because it was wrong before)

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx10: use reset default for PA_SC_FIFO_SIZE
Alex Deucher [Mon, 1 Jul 2019 13:39:19 +0000 (08:39 -0500)]
drm/amdgpu/gfx10: use reset default for PA_SC_FIFO_SIZE

Recommended by the hw team.

Reviewed-and-Tested-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZE
Alex Deucher [Mon, 1 Jul 2019 13:38:12 +0000 (08:38 -0500)]
drm/amdgpu/gfx9: use reset default for PA_SC_FIFO_SIZE

Recommended by the hw team.

Reviewed-and-Tested-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Don't skip display settings in hwmgr_resume()
Lyude Paul [Thu, 20 Jun 2019 23:21:26 +0000 (19:21 -0400)]
drm/amdgpu: Don't skip display settings in hwmgr_resume()

I'm not entirely sure why this is, but for some reason:

921935dc6404 ("drm/amd/powerplay: enforce display related settings only on needed")

Breaks runtime PM resume on the Radeon PRO WX 3100 (Lexa) in one the
pre-production laptops I have. The issue manifests as the following
messages in dmesg:

[drm] UVD and UVD ENC initialized successfully.
amdgpu 0000:3b:00.0: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring vce1 test failed (-110)
[drm:amdgpu_device_ip_resume_phase2 [amdgpu]] *ERROR* resume of IP block <vce_v3_0> failed -110
[drm:amdgpu_device_resume [amdgpu]] *ERROR* amdgpu_device_ip_resume failed (-110).

And happens after about 6-10 runtime PM suspend/resume cycles (sometimes
sooner, if you're lucky!). Unfortunately I can't seem to pin down
precisely which part in psm_adjust_power_state_dynamic that is causing
the issue, but not skipping the display setting setup seems to fix it.
Hopefully if there is a better fix for this, this patch will spark
discussion around it.

Fixes: 921935dc6404 ("drm/amd/powerplay: enforce display related settings only on needed")
Cc: Evan Quan <evan.quan@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Huang Rui <ray.huang@amd.com>
Cc: Rex Zhu <Rex.Zhu@amd.com>
Cc: Likun Gao <Likun.Gao@amd.com>
Cc: <stable@vger.kernel.org> # v5.1+
Signed-off-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: update smu11_driver_if_navi10.h
tiancyin [Thu, 27 Jun 2019 06:19:37 +0000 (14:19 +0800)]
drm/amd/powerplay: update smu11_driver_if_navi10.h

update the smu11_driver_if_navi10.h since navi10 smu fw
update to 42.28

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix a couple of spelling mistakes
Colin Ian King [Wed, 26 Jun 2019 13:24:27 +0000 (14:24 +0100)]
drm/amd/display: fix a couple of spelling mistakes

There are a couple of spelling mistakes in dm_error messages and
a comment. Fix these.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: no memory activity support on Vega10
Evan Quan [Fri, 21 Jun 2019 01:46:14 +0000 (09:46 +0800)]
drm/amd/powerplay: no memory activity support on Vega10

Make mem_busy_percent sysfs interface invisible on Vega10.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: remove unnecessary warning message on gpu reset
shaoyunl [Wed, 26 Jun 2019 17:42:24 +0000 (13:42 -0400)]
drm/amdkfd: remove unnecessary warning message on gpu reset

In XGMI configuration, more than one asic can be reset at same time,
kfd is able to handle this and no need to trigger the warning

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Set queue_preemption_timeout_ms default value
Oak Zeng [Wed, 26 Jun 2019 15:16:56 +0000 (10:16 -0500)]
drm/amdgpu: Set queue_preemption_timeout_ms default value

Set default value of this kernel parameter to 9000

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: add missing smu_get_clk_info_from_vbios() call
Evan Quan [Tue, 25 Jun 2019 15:03:00 +0000 (23:03 +0800)]
drm/amd/powerplay: add missing smu_get_clk_info_from_vbios() call

This seems a merge error.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: support runtime ppfeatures setting on Navi10
Evan Quan [Tue, 25 Jun 2019 03:06:08 +0000 (11:06 +0800)]
drm/amd/powerplay: support runtime ppfeatures setting on Navi10

Implement Navi10 backend for runtime ppfeatures status retrieving
and setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: check prerequisite for VCN power gating
Evan Quan [Mon, 17 Jun 2019 09:27:49 +0000 (17:27 +0800)]
drm/amd/powerplay: check prerequisite for VCN power gating

VCN DPM is a necessary prerequisite for VCN power gating.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/ttm: return -EBUSY if waiting for busy BO fails
Felix Kuehling [Wed, 26 Jun 2019 06:32:43 +0000 (02:32 -0400)]
drm/ttm: return -EBUSY if waiting for busy BO fails

Returning -EAGAIN prevents ttm_bo_mem_space from trying alternate
placements and can lead to live-locks in amdgpu_cs, retrying
indefinitely and never succeeding.

Fixes: d367bd2a5e2b12 ("drm/ttm: fix busy memory to fail other user v10")
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: drop copy/paste leftover to fix big endian
Alex Deucher [Thu, 27 Jun 2019 14:13:41 +0000 (09:13 -0500)]
drm/amdgpu: drop copy/paste leftover to fix big endian

The buf swap field doesn't exist on RB1.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix warning on 32 bit
Alex Deucher [Thu, 27 Jun 2019 13:48:19 +0000 (08:48 -0500)]
drm/amdgpu: fix warning on 32 bit

Properly cast pointer to int.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoMerge tag 'drm-next-5.3-2019-06-25' of git://people.freedesktop.org/~agd5f/linux...
Dave Airlie [Thu, 27 Jun 2019 02:33:56 +0000 (12:33 +1000)]
Merge tag 'drm-next-5.3-2019-06-25' of git://people.freedesktop.org/~agd5f/linux into drm-next

drm-next-5.3-2019-06-25:

Merge drm-next

amdgpu:
- SR-IOV L1 policy fixes
- Removed no longer needed vram_page_split module parameter
- Add module parameter to override default ABM level
- Gamma fixes
- No need to check return values for debugfs
- Improve HMM error handling
- Avoid possible OOM situations when lots of thread are submitting with
  memory contention
- Improve hw i2c access abritration
- DSC (Display Stream Compression) support in DC
- Initial navi10 support
  * DC support
  * GFX/Compute support
  * SDMA support
  * Power Management support
  * VCN support
- Static checker fixes
- Misc cleanups
- fix long udelay on arm

amdkfd:
- Implement priority controls for gfx9
- Enable VEGAM
- Rework mqd allocation and init
- Circular locking fix
- Fix SDMA queue allocation race condition
- No need to check return values for debugfs
- Add proc style process information
- Initial navi10 support

radeon:
- No need to check return values for debugfs

UAPI changes:
- GDDR6 added to vram type query
- New Navi10 details added gpu info query
- Navi family added to asic family query

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625195520.3817-1-alexander.deucher@amd.com
5 years agoMerge tag 'for-airlie-tda998x' of git://git.armlinux.org.uk/~rmk/linux-arm into drm...
Dave Airlie [Thu, 27 Jun 2019 01:48:02 +0000 (11:48 +1000)]
Merge tag 'for-airlie-tda998x' of git://git.armlinux.org.uk/~rmk/linux-arm into drm-next

TDA998x updates:
- improve the driver's approach to audio, adding support for more I2S
  based formats, particularly other justifications, and preparing the
  driver to support other bclk ratios.

- add support for pixel repeated modes, tested with a Panasonic TV.

- correct the quantisation range handling; in particular, do not send
  full range RGB to the sink when the sink does not support full range
  RGB.

- Send the HDMI vendor info frame when required.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Russell King <rmk@armlinux.org.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625125005.GA31503@rmk-PC.armlinux.org.uk
5 years agodrm/amd/powerplay: make athub pg bit configured by pg_flags
Huang Rui [Fri, 14 Jun 2019 08:19:36 +0000 (16:19 +0800)]
drm/amd/powerplay: make athub pg bit configured by pg_flags

The athub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: make mmhub pg bit configured by pg_flags
Huang Rui [Fri, 14 Jun 2019 08:12:51 +0000 (16:12 +0800)]
drm/amd/powerplay: make mmhub pg bit configured by pg_flags

The mmhub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>