Antonio Nino Diaz [Mon, 29 Oct 2018 15:08:50 +0000 (15:08 +0000)]
libfdt: Downgrade to version 1.4.6-9
Version 1.4.7 introduces a big performance hit to functions that access
the FDT. Downgrade the library to version 1.4.6-9, before the changes
that introduce the problem. Version 1.4.6 isn't used because one of the
libfdt files (fdt_overlay.c) is missing the license header. This
problem is also fixed in 1.4.6-9.
This version corresponds to commit <
aadd0b65c987> checks: centralize
printing of property names in failure messages.
Fixes ARM-software/tf-issues#643
Change-Id: I73c05f2b1f994bcdcc4366131ce0647553cdcfb8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Soby Mathew [Mon, 29 Oct 2018 11:45:10 +0000 (11:45 +0000)]
Merge pull request #1654 from antonio-nino-diaz-arm/an/meson-console
meson: console: Add missing define to fix build
Antonio Nino Diaz [Mon, 29 Oct 2018 11:35:34 +0000 (11:35 +0000)]
meson: console: Add missing define to fix build
It isn't possible to build this driver without adding this define.
Change-Id: Iba2ced411cd8ce438787871fa01b414d32b9aa42
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Soby Mathew [Mon, 29 Oct 2018 10:56:30 +0000 (10:56 +0000)]
Merge pull request #1644 from soby-mathew/sm/pie_proto
Position Indepedent Executable (PIE) Support
Soby Mathew [Mon, 29 Oct 2018 10:27:22 +0000 (10:27 +0000)]
Merge pull request #1616 from antonio-nino-diaz-arm/an/gxbb
Initial port of Amlogic Meson S905 (GXBB)
Soby Mathew [Sun, 14 Oct 2018 07:13:44 +0000 (08:13 +0100)]
FVP: Enable PIE for RESET_TO_BL31=1
This patch enabled PIE for FVP when RESET_TO_BL31=1. The references
to BL31_BASE are replaced by BL31_START as being a symbol exported by
the linker, will create a dynamic relocation entry in .rela.dyn and
hence will be fixed up by dynamic linker at runtime. Also, we disable
RECLAIM_INIT_CODE when PIE is enabled as the init section overlay
creates some static relocations which cannot be handled by the
dynamic linker currently.
Change-Id: I86df1b0a8b2a8bbbe7c3f3c0b9a08c86c2963ec0
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Fri, 12 Oct 2018 16:08:28 +0000 (17:08 +0100)]
plat/arm: Use `mov_imm` macro to load immediate values
This patch makes use of mov_imm macro where possible to load
immediate values within ARM platform layer.
Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Sun, 14 Oct 2018 07:09:22 +0000 (08:09 +0100)]
PIE: Position Independant Executable support for BL31
This patch introduces Position Independant Executable(PIE) support
in TF-A. As a initial prototype, only BL31 can support PIE. A trivial
dynamic linker is implemented which supports fixing up Global Offset
Table(GOT) and Dynamic relocations(.rela.dyn). The fixup_gdt_reloc()
helper function implements this linker and this needs to be called
early in the boot sequence prior to invoking C functions. The GOT is
placed in the RO section of BL31 binary for improved security and the
BL31 linker script is modified to export the appropriate symbols
required for the dynamic linker.
The C compiler always generates PC relative addresses to linker symbols
and hence referencing symbols exporting constants are a problem when
relocating the binary. Hence the reference to the
`__PERCPU_TIMESTAMP_SIZE__` symbol in PMF is removed and is now calculated
at runtime based on start and end addresses.
Change-Id: I1228583ff92cf432963b7cef052e95d995cca93d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Mon, 17 Sep 2018 03:34:35 +0000 (04:34 +0100)]
Make errata reporting mandatory for CPU files
Previously the errata reporting was optional for CPU operation
files and this was achieved by making use of weak reference to
resolve to 0 if the symbol is not defined. This is error prone
when adding new CPU operation files and weak references are
problematic when fixing up dynamic relocations. Hence this patch
removes the weak reference and makes it mandatory for the CPU
operation files to define the errata reporting function.
Change-Id: I8af192e19b85b7cd8c7579e52f8f05a4294e5396
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Fri, 12 Oct 2018 15:40:28 +0000 (16:40 +0100)]
PIE: Use PC relative adrp/adr for symbol reference
This patch fixes up the AArch64 assembly code to use
adrp/adr instructions instead of ldr instruction for
reference to symbols. This allows these assembly
sequences to be Position Independant. Note that the
the reference to sizes have been replaced with
calculation of size at runtime. This is because size
is a constant value and does not depend on execution
address and using PC relative instructions for loading
them makes them relative to execution address. Also
we cannot use `ldr` instruction to load size as it
generates a dynamic relocation entry which must *not*
be fixed up and it is difficult for a dynamic loader
to differentiate which entries need to be skipped.
Change-Id: I8bf4ed5c58a9703629e5498a27624500ef40a836
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Tue, 28 Aug 2018 10:13:55 +0000 (11:13 +0100)]
Basic Makefile changes for PIE
Change-Id: I0b8ccba15024c55bb03927cdb50370913eb8010c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Soby Mathew [Fri, 12 Oct 2018 15:26:20 +0000 (16:26 +0100)]
Add helper to return reference to a symbol
This patch adds a utility function to return
the address of a symbol. By default, the compiler
generates adr/adrp instruction pair to return
the reference and this utility is used to override
this compiler generated to code and use `ldr`
instruction.
This is needed for Position Independent Executable
when it needs to reference a symbol which is constant
and does not depend on the execute address of the
binary.
For example, on the FVP, the GICv3 register context is
stored in a secure carveout (arm_el3_tzc_dram) within
DDR and does not relocate with the BL image. Now if
BL31 is executing at a different address other than
the compiled address, using adrp/adr instructions to
reference this memory will not work as they generate an
address that is PC relative. The way to get around this
problem is to reference it as non-PC relative (i.e
non-relocatable location) via `ldr` instruction.
Change-Id: I5008a951b007144258121690afb68dc8e12ee6f7
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Antonio Niño Díaz [Fri, 26 Oct 2018 14:18:03 +0000 (16:18 +0200)]
Merge pull request #1647 from antonio-nino-diaz-arm/an/setup-xlat
Improvements to setup page tables code
Roberto Vargas [Fri, 19 Oct 2018 15:44:18 +0000 (16:44 +0100)]
Convert arm_setup_page_tables into a generic helper
This function is not related to Arm platforms and can be reused by other
platforms if needed.
Change-Id: Ia9c328ce57ce7e917b825a9e09a42b0abb1a53e8
Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 19 Oct 2018 15:52:22 +0000 (16:52 +0100)]
xlat: Fix compatibility between v1 and v2
There are several platforms using arm_setup_page_tables(), which is
supposed to be Arm platform only. This creates several dependency
problems between platforms.
This patch adds the definition XLAT_TABLES_LIB_V2 to the xlat tables lib
v2 makefile. This way it is possible to detect from C code which version
is being used and include the correct header.
The file arm_xlat_tables.h has been renamed to xlat_tables_compat.h and
moved to a common folder. This way, when in doubt, this header can be
used to guarantee compatibility, as it includes the correct header based
on XLAT_TABLES_LIB_V2.
This patch also removes the usage of ARM_XLAT_TABLES_V1 from QEMU (so
that is now locked in xlat lib v2) and ZynqMP (where it was added as a
workaround).
Change-Id: Ie1e22a23b44c549603d1402a237a70d0120d3e04
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 10 Oct 2018 22:52:39 +0000 (23:52 +0100)]
docs: gxbb: Add documentation
Change-Id: Ie2465c1ccc482bd8eb5e5a71c580543095e4ba94
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 10 Oct 2018 22:50:35 +0000 (23:50 +0100)]
gxbb: Workaround for PSCI_CPU_OFF
There seems to be a problem where SCP can't turn CPU0 off. Instead of
returning PSCI_E_DENIED or crashing make CPU0 wait in a WFE loop. This
way all CPUs have a consistent behaviour from the point of view of the
caller.
Change-Id: I5c8c266ca3b69c9e7a4f5ae70afeea5dd36a0825
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Fri, 5 Oct 2018 19:42:42 +0000 (20:42 +0100)]
gxbb: Implement PSCI_CPU_OFF
This works fine for CPU1-3, but it fails for CPU0, where it is simply
ignored and leaves CPU0 in a WFI loop.
Change-Id: I7d73683fdd894f2021d6a5bc2cce6cd03e18e633
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 18 Sep 2018 00:36:00 +0000 (01:36 +0100)]
gxbb: Initial port of Amlogic Meson S905 (GXBB)
The Amlogic Meson S905 is a SoC with a quad core Arm Cortex-A53 running
at 1.5Ghz. It also contains a Cortex-M3 used as SCP.
This port is a minimal implementation of BL31 capable of booting
mainline U-Boot and Linux:
- Partial SCPI support.
- Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF).
- GICv2 driver set up.
- Basic SIP services (read efuse data, enable/disable JTAG).
This port has been tested in an ODROID-C2.
Change-Id: Ia4bc82d7aca42a69d6b118b947279f82b3f6c6da
Tested-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 15 Aug 2018 21:07:35 +0000 (22:07 +0100)]
meson: console: Introduce console driver
It has only been tested with a system clock of 24 MHz.
It has only been implemented for the multi console API.
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Niño Díaz [Thu, 25 Oct 2018 13:00:38 +0000 (15:00 +0200)]
Merge pull request #1638 from chandnich/sgi575-update
Sgi575 update
Antonio Niño Díaz [Thu, 25 Oct 2018 09:54:57 +0000 (11:54 +0200)]
Merge pull request #1636 from antonio-nino-diaz-arm/an/console
Deprecate weak crash console functions
Antonio Niño Díaz [Thu, 25 Oct 2018 09:54:22 +0000 (11:54 +0200)]
Merge pull request #1640 from soby-mathew/sm/fin_con_reg
Multi-console: Deprecate the `finish_console_register` macro
Antonio Nino Diaz [Wed, 17 Oct 2018 15:49:26 +0000 (16:49 +0100)]
Deprecate weak crash console functions
The default behaviour of the plat_crash_console_xxx functions isn't
obvious to someone that hasn't read all the documentation. As they are
not mandatory, it is unlikely that the code will be checked when doing a
platform port, which may mean that some platforms may not have crash
console support at all.
The idea of this patch is to force platform maintainers to decide how
the crash console has to behave so that the final behaviour isn't
unexpected.
Change-Id: I40b2a7b56c5530c1dcd63eace5bd37ae6335056e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 16 Oct 2018 15:39:12 +0000 (16:39 +0100)]
rockchip: Use common crash console functions
This platform depends on weak functions defined in
``plat/common/aarch64/platform_helpers.S`` that are going to be removed.
Change-Id: I5104d091c32271d77ed9690e9dc257c061289def
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 16 Oct 2018 13:32:34 +0000 (14:32 +0100)]
Add sample crash console functions
Platforms that wish to use the sample functions have to add the file to
their Makefile. It is not included by default.
Change-Id: I713617bb58dc218967199248f68da86241d7ec40
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 16 Oct 2018 13:10:15 +0000 (14:10 +0100)]
plat/arm: Make crash console functions strong
In Arm platforms the crash console doesn't print anything if the crash
happens early enough. This happens in all images, not only BL1. The
reason is that they the files ``plat/common/aarch64/platform_helpers.S``
and ``plat/arm/common/aarch64/arm_helpers.S``, and the crash console
functions are defined as weak in both files. In practice, the linker
can pick the one in ``plat/common``, which simply switches the multi
console to crash mode when it wants to initialize the crash console.
In the case of Arm platforms, there are no console drivers registered
at that point, so nothing is printed.
This patch makes the functions in plat/arm strong so that they override
the weak functions in plat/common.
Change-Id: Id358db7d2567d7df0951790a695636cf6c9ac57f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 17 Oct 2018 14:29:34 +0000 (15:29 +0100)]
Add plat_crash_console_flush to platforms without it
Even though at this point plat_crash_console_flush is optional, it will
stop being optional in a following patch.
The console driver of warp7 doesn't support flush, so the implementation
is a placeholder.
TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but
they weren't global so they weren't actually used. Also, they were
calling the wrong functions.
imx8_helpers.S only has placeholders for all of the functions.
Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Wed, 17 Oct 2018 15:46:41 +0000 (16:46 +0100)]
zynqmp: Remove dependency on arm_helpers.S
Non-Arm platforms shouldn't use Arm platform code. This patch copies the
implementation of the functions in arm_helpers.S to zynqmp_helpers.S to
remove this dependency of zynqmp on Arm platforms.
Change-Id: Ia85f303c4c63bcf0ffa57c7f3ef9d88376729b6b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Niño Díaz [Wed, 24 Oct 2018 15:54:05 +0000 (17:54 +0200)]
Merge pull request #1637 from antonio-nino-diaz-arm/an/rpi3-dtb
rpi3: Add mem reserve region to DTB if present
Antonio Nino Diaz [Thu, 18 Oct 2018 23:57:16 +0000 (00:57 +0100)]
rpi3: Add mem reserve region to DTB if present
When a device tree blob is present at a known address, instead of, for
example, relying on the user modifying the Linux command line to warn
about the memory reserved for the Trusted Firmware, pass it on the DTB.
The current code deletes the memory reserved for the default bootstrap
of the Raspberry Pi and adds the region used by the Trusted Firmware.
This system replaces the previous one consisting on adding
``memmap=16M$256M`` to the Linux command line. It's also meant to be
used by U-Boot and any other bootloader that understands DTB files.
Change-Id: I13ee528475fb043d6e8d9e9f24228e37ac3ac436
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Niño Díaz [Wed, 24 Oct 2018 09:30:18 +0000 (11:30 +0200)]
Merge pull request #1643 from antonio-nino-diaz-arm/an/libfdt
Update libfdt to version 1.4.7
Antonio Niño Díaz [Wed, 24 Oct 2018 09:30:09 +0000 (11:30 +0200)]
Merge pull request #1639 from chandnich/scmi-update
plat/arm/scmi: introduce plat_css_get_scmi_info API
Antonio Niño Díaz [Wed, 24 Oct 2018 09:29:57 +0000 (11:29 +0200)]
Merge pull request #1641 from jeenu-arm/ptrauth
AArch64: Enable lower ELs to use pointer authentication
Antonio Nino Diaz [Thu, 18 Oct 2018 23:56:54 +0000 (00:56 +0100)]
libfdt: Import version v1.4.7
Change-Id: Iad7adaf0b16a3d086594cb3432210ac2c4e207f8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 18 Oct 2018 23:56:46 +0000 (00:56 +0100)]
libfdt: Remove current version
The current version of libfdt (1.4.2) has been modified to integrate it
in this repository. In order to do a clean import it is needed to remove
the current version first.
Change-Id: I2cab8c8e5632280d282fa7a2f2339768a0ad1e0f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Tue, 23 Oct 2018 17:31:08 +0000 (18:31 +0100)]
juno: Increase BL2 max size
Version 1.4.7 of libfdt is bigger than the current one (1.4.2) and the
current reserved space for BL2 in Juno isn't enough to fit the Trusted
Firmware when compiling with clang or armclang.
Change-Id: I7b73394ca60d17f417773f56dd5b3d54495a45a8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 18 Oct 2018 23:57:10 +0000 (00:57 +0100)]
libc: Integrate strrchr in libc
Change-Id: I3ddc07cb02d73cd7614af7a5b21827aae155f9a0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Nino Diaz [Thu, 18 Oct 2018 23:57:01 +0000 (00:57 +0100)]
libc: Import strrchr from FreeBSD
Imported from lib/libc/string/strrchr.c from commit:
59fd2fb98e4cc7e9bfc89598e28e21d405fd470c
Change-Id: I898206c6f0372d4d211c149ec0fb9522d0a5b01c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Antonio Niño Díaz [Tue, 23 Oct 2018 16:11:52 +0000 (18:11 +0200)]
Merge pull request #1648 from jforissier/qemu-dt-1M
qemu: increase PLAT_QEMU_DT_MAX_SIZE to 1 MiB
Antonio Niño Díaz [Tue, 23 Oct 2018 13:39:01 +0000 (15:39 +0200)]
Merge pull request #1645 from antonio-nino-diaz-arm/an/fix-windows
Makefile: Fix verbose builds on Windows
Antonio Niño Díaz [Tue, 23 Oct 2018 13:05:31 +0000 (15:05 +0200)]
Merge pull request #1634 from antonio-nino-diaz-arm/an/tzc
tzc: Fix MISRA defects
Antonio Nino Diaz [Mon, 15 Oct 2018 13:58:11 +0000 (14:58 +0100)]
tzc: Fix MISRA defects
The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been
fixed.
The types tzc_region_attributes_t and tzc_action_t have been removed and
replaced by unsigned int because it is not allowed to do logical
operations on enums.
Also, fix some address definitions in arm_def.h.
Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Soby Mathew [Wed, 10 Oct 2018 15:03:09 +0000 (16:03 +0100)]
Multi-console: Deprecate the `finish_console_register` macro
The `finish_console_register` macro is used by the multi console
framework to register the `console_t` driver callbacks. It relied
on weak references to the `ldr` instruction to populate 0 to the
callback in case the driver has not defined the appropriate
function. Use of `ldr` instruction to load absolute address to a
reference makes the binary position dependant. These instructions
should be replaced with adrp/adr instruction for position independant
executable(PIE). But adrp/adr instructions don't work well with weak
references as described in GNU ld bugzilla issue 22589.
This patch defines a new version of `finish_console_register` macro
which can spcify which driver callbacks are valid and deprecates the
old one. If any of the argument is not specified, then the macro
populates 0 for that callback. Hence the functionality of the previous
deprecated macro is preserved. The USE_FINISH_CONSOLE_REG_2 define
is used to select the new variant of the macro and will be removed
once the deprecated variant is removed.
All the upstream console drivers have been migrated to use the new
macro in this patch.
NOTE: Platforms be aware that the new variant of the
`finish_console_register` should be used and the old variant is
deprecated.
Change-Id: Ia6a67aaf2aa3ba93932992d683587bbd0ad25259
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Antonio Nino Diaz [Fri, 19 Oct 2018 14:44:30 +0000 (15:44 +0100)]
Makefile: Fix verbose builds on Windows
Commit <
ee1ba6d4ddf1> ("Makefile: Support totally quiet output with -s")
broke verbose (V=1) builds on Windows. This patch fixes it by adding
helpers to silence echo prints in a OS-dependent way.
Change-Id: I24669150457516e9fb34fa32fa103398efe8082d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Jerome Forissier [Thu, 18 Oct 2018 14:41:25 +0000 (16:41 +0200)]
qemu: increase PLAT_QEMU_DT_MAX_SIZE to 1 MiB
Since upstream QEMU commit
14ec3cbd7c1e ("device_tree: Increase
FDT_MAX_SIZE to 1 MiB"), which is included in release v2.12.1
and later, BL2 initialization fails with the following error (-3 is
-FDT_ERR_NOSPACE):
ERROR: Invalid Device Tree at 0x40000000: error -3
Increase PLAT_QEMU_DT_MAX_SIZE accordingly.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Chandni Cherukuri [Thu, 11 Oct 2018 08:38:08 +0000 (14:08 +0530)]
plat/arm/scmi: introduce plat_css_get_scmi_info API
The default values of 'plat_css_scmi_plat_info' is not applicable for
all the platforms. There should be a provision to let platform code to
register a platform specific instance of scmi_channel_plat_info_t.
Add a new API 'plat_css_get_scmi_info' which lets the platform to
register a platform specific instance of scmi_channel_plat_info_t and
remove the default values.
In addition to this, the existing 'plat_css_scmi_plat_info' structure
is removed from the common code and instantiated for the platforms that
need it. This allows for a consistent provisioning of the SCMI channel
information across all the existing and upcoming platforms.
Change-Id: I4fb65d7f2f165b78697b4677f1e8d81edebeac06
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Fri, 17 Aug 2018 05:53:46 +0000 (11:23 +0530)]
plat/arm/sgi: add system-id node in HW_CONFIG dts
Dynamically populating the 'system-id' node in the HW_CONFIG dts makes
it difficult to enforce memory overlap checks. So add the system-id node
in the HW_CONFIG dts file as a place holder with 'platform-id' and
'config-id' set to zero.
The code at BL2 stage determines the values of 'platform-id' and
'config-id' at runtime and updates the corresponding fields in the
system-id node of HW_CONFIG dts.
Change-Id: I2ca9980b994ac418da8afa0c72716ede10aff68a
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Tue, 4 Sep 2018 09:16:49 +0000 (14:46 +0530)]
plat/arm/sgi: move fdts files to sgi575 board directory
To align the placement of ftds files with that of other Arm platforms,
move the ftds files from plat/arm/css/sgi/ to plat/arm/board/sgi575.
Change-Id: Id7c772eb5cf3d308d4e02a3c8099218e889a0e96
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Tue, 14 Aug 2018 09:55:34 +0000 (15:25 +0530)]
plat/arm/sgi: remove unused code
On SGI platforms, the interconnect is setup by the SCP and so the
existing unused interconnect setup in sgi575 platform code can be
removed. As a result of this, sgi_plat_config.c and sgi_bl1_setup.c
files can be removed as these files are now empty or can be
substainated by the existing weak functions.
Change-Id: I3c883e4d1959d890bf2213a9be01f02551ea3a45
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Chandni Cherukuri [Fri, 10 Aug 2018 05:47:58 +0000 (11:17 +0530)]
plat/arm/sgi: reorganize platform macros
In preparation of adding support for upcoming SGI platforms, macros
common to all the SGI platforms are moved into sgi_base_platform_def.h
file. Macros that are specific to sgi575 platform remain in the
platform_def.h file. In addition to this, the platform_def.h file is
moved to sgi575 board directory. Also the ENT_CPU_SOURCES has been
renamed to SGI_CPU_SOURCES and moved from sgi-common.mk to board
specific makefile platform.mk
Change-Id: Iccdd9f070f4feea232b9fbf4fdcc0ef2e8eccbf2
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Soby Mathew [Thu, 18 Oct 2018 09:44:53 +0000 (10:44 +0100)]
Merge pull request #1632 from Yann-lms/stm32mp1_mmc
Add MMC support for STM32MP1
Soby Mathew [Thu, 18 Oct 2018 08:54:55 +0000 (09:54 +0100)]
Merge pull request #1582 from ldts/rcar_gen3/upstream
rcar_gen3: initial support
Soby Mathew [Thu, 18 Oct 2018 08:49:03 +0000 (09:49 +0100)]
Merge pull request #1553 from glneo/dcache-late-disable
Allow D-Cache to remain on during core power-down
Soby Mathew [Thu, 18 Oct 2018 08:35:14 +0000 (09:35 +0100)]
Merge pull request #1629 from robertovargas-arm/hw-assisted-coherency-lock
Optimize bakery locks when HW_ASSISTED_COHERENCY is enabled
Soby Mathew [Thu, 18 Oct 2018 08:34:20 +0000 (09:34 +0100)]
Merge pull request #1631 from deepan02/deepak-arm/relocate-jump_if_cpu_midr
plat/arm: relocate the jump_if_cpu_midr macro.
Soby Mathew [Thu, 18 Oct 2018 08:20:04 +0000 (09:20 +0100)]
Merge pull request #1628 from antonio-nino-diaz-arm/an/sharing
plat/arm: Small reorganization of platform code
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:42:08 +0000 (09:42 +0200)]
rcar_gen3: drivers: watchdog
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:41:53 +0000 (09:41 +0200)]
rcar_gen3: drivers: serial controller interface
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:41:39 +0000 (09:41 +0200)]
rcar_gen3: drivers: spi multio bus controller
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:41:21 +0000 (09:41 +0200)]
rcar_gen3: drivers: rom api
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:41:10 +0000 (09:41 +0200)]
rcar_gen3: drivers: power controller
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:41:00 +0000 (09:41 +0200)]
rcar_gen3: drivers: console
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:40:45 +0000 (09:40 +0200)]
rcar_gen3: drivers: io [emmc/mem]
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:40:26 +0000 (09:40 +0200)]
rcar_gen3: drivers: i2c dvfs
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:39:56 +0000 (09:39 +0200)]
rcar_gen3: drivers: emmc
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:39:48 +0000 (09:39 +0200)]
rcar_gen3: drivers: dma
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:39:37 +0000 (09:39 +0200)]
rcar_gen3: drivers: micro delay generator
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:39:19 +0000 (09:39 +0200)]
rcar_gen3: drivers: cpld
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:39:11 +0000 (09:39 +0200)]
rcar_gen3: drivers: board identification
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:38:56 +0000 (09:38 +0200)]
rcar_gen3: drivers: avs [adaptive voltage scaling]
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:38:24 +0000 (09:38 +0200)]
rcar_gen3: drivers: authentication
Signed-off-by: ldts <jramirez@baylibre.com>
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:36:52 +0000 (09:36 +0200)]
rcar_gen3: drivers: staging
- ddr
- pfc [pin function controller]
- qos [bandwidth]
checkpatch.pl is generating too many errors.
Jorge Ramirez-Ortiz [Sun, 23 Sep 2018 07:36:13 +0000 (09:36 +0200)]
rcar-gen3: initial commit for the rcar-gen3 boards
Reference code:
==============
rar_gen3: IPL and Secure Monitor Rev1.0.22
https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3]
Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com>
Date: Thu Aug 30 21:26:41 2018 +0900
Update IPL and Secure Monitor Rev1.0.22
General Information:
===================
This port has been tested on the Salvator-X Soc_id r8a7795 revision
ES1.1 (uses an SPD).
Build Tested:
-------------
ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
MBEDTLS_DIR=$mbedtls
$ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed
Other dependencies:
------------------
* mbed_tls:
git@github.com:ARMmbed/mbedtls.git [devel]
Merge:
68dbc94 f34a4c1
Author: Simon Butcher <simon.butcher@arm.com>
Date: Thu Aug 30 00:57:28 2018 +0100
* optee_os:
https://github.com/BayLibre/optee_os
Until it gets merged into OP-TEE, the port requires Renesas' Trusted
Environment with a modification to support power management.
Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
Date: Thu Aug 30 16:49:49 2018 +0200
plat-rcar: cpu-suspend: handle the power level
Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
* u-boot:
The port has beent tested using mainline uboot.
Author: Fabio Estevam <festevam@gmail.com>
Date: Tue Sep 4 10:23:12 2018 -0300
*linux:
The port has beent tested using mainline kernel.
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun Sep 16 11:52:37 2018 -0700
Linux 4.19-rc4
Overview
---------
BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered
at this exception level (the Renesas' ATF reference tree [1] resets into
EL1 before entering BL2 - see its bl2.ld.S)
BL2 initializes DDR (and i2c to talk to the PMIC on some platforms)
before determining the boot reason (cold or warm).
During suspend all CPUs are switched off and the DDR is put in
backup mode (some kind of self-refresh mode). This means that BL2 is
always entered in a cold boot scenario.
Once BL2 boots, it determines the boot reason, writes it to shared
memory (BOOT_KIND_BASE) together with the BL31 parameters
(PARAMS_BASE) and jumps to BL31.
To all effects, BL31 is as if it is being entered in reset mode since
it still needs to initialize the rest of the cores; this is the reason
behind using direct shared memory access to BOOT_KIND_BASE and
PARAMS_BASE instead of using registers to get to those locations (see
el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use
case).
Depending on the boot reason BL31 initializes the rest of the cores:
in case of suspend, it uses a MBOX memory region to recover the
program counters.
[1] https://github.com/renesas-rcar/arm-trusted-firmware
Tests
-----
* cpuidle
-------
enable kernel's cpuidle arm_idle driver and boot
* system suspend
--------------
$ cat suspend.sh
#!/bin/bash
i2cset -f -y 7 0x30 0x20 0x0F
read -p "Switch off SW23 and press return " foo
echo mem > /sys/power/state
* cpu hotplug:
------------
$ cat offline.sh
#!/bin/bash
nbr=$1
echo 0 > /sys/devices/system/cpu/cpu$nbr/online
printf "ONLINE: " && cat /sys/devices/system/cpu/online
printf "OFFLINE: " && cat /sys/devices/system/cpu/offline
$ cat online.sh
#!/bin/bash
nbr=$1
echo 1 > /sys/devices/system/cpu/cpu$nbr/online
printf "ONLINE: " && cat /sys/devices/system/cpu/online
printf "OFFLINE: " && cat /sys/devices/system/cpu/offline
Signed-off-by: ldts <jramirez@baylibre.com>
Andrew F. Davis [Fri, 12 Oct 2018 20:37:04 +0000 (15:37 -0500)]
ti: k3: common: Do not disable cache on TI K3 core powerdown
Leave the caches on and explicitly flush any data that
may be stale when the core is powered down. This prevents
non-coherent interconnect access which has negative side-
effects on AM65x.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Roberto Vargas [Mon, 13 Nov 2017 13:41:58 +0000 (13:41 +0000)]
scmi: Optimize bakery locks when HW_ASSISTED_COHERENCY is enabled
When HW_ASSISTED_COHERENCY is enabled we can use spinlocks
instead of using the more complex and slower bakery algorithm.
Change-Id: I9d791a70050d599241169b9160a67e57d5506564
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
Jeenu Viswambharan [Wed, 15 Aug 2018 13:29:29 +0000 (14:29 +0100)]
AArch64: Enable lower ELs to use pointer authentication
Pointer authentication is an Armv8.3 feature that introduces
instructions that can be used to authenticate and verify pointers.
Pointer authentication instructions are allowed to be accessed from all
ELs but only when EL3 explicitly allows for it; otherwise, their usage
will trap to EL3. Since EL3 doesn't have trap handling in place, this
patch unconditionally disables all related traps to EL3 to avoid
potential misconfiguration leading to an unhandled EL3 exception.
Fixes ARM-software/tf-issues#629
Change-Id: I9bd2efe0dc714196f503713b721ffbf05672c14d
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Deepak Pandey [Thu, 11 Oct 2018 08:14:43 +0000 (13:44 +0530)]
plat/arm: relocate the jump_if_cpu_midr macro.
macro jump_if_cpu_midr is used commonly by many arm platform.
It has now been relocated to common place to remove duplication
of code.
Change-Id: Ic0876097dbc085df4f90eadb4b7687dde7c726da
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
Yann Gautier [Mon, 15 Oct 2018 07:36:58 +0000 (09:36 +0200)]
stm32mp1: update platform files to use MMC devices
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier [Mon, 15 Oct 2018 07:36:44 +0000 (09:36 +0200)]
stm32mp1: add an IO to read MMC devices
Whereas the GPT table is read with io_block, the binaries to be loaded
(e.g. BL33) cannot use it, as it is not suitable to read them block by
block, or the boot time would be very bad.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier [Mon, 15 Oct 2018 07:36:32 +0000 (09:36 +0200)]
stm32mp1: add an IO to read STM32IMAGE binaries
This IO is required to read binaries with STM32 header.
This header is added with the stm32image tool.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier [Mon, 15 Oct 2018 07:36:21 +0000 (09:36 +0200)]
Add new defines for STM32MP1 platform
To boot on eMMC or SD-cards, STM32MP1 platform needs:
- GPT_IMAGE_ID to read GPT table on those devices
- STM32_IMAGE_ID and IO_TYPE_STM32IMAGE to read images with STM32 header
- IO_TYPE_MMC to have a IO for MMC devices
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Yann Gautier [Mon, 15 Oct 2018 07:36:04 +0000 (09:36 +0200)]
stm32mp1: add sdmmc2 driver
This driver is for the STMicroelectronics sdmmc2 IP
which is in STM32MP1 SoC.
It uses the MMC framework, and can address either eMMC or SD-card.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Dimitris Papastamos [Fri, 12 Oct 2018 16:45:56 +0000 (17:45 +0100)]
Merge pull request #1626 from Yann-lms/partition_verbose
drivers: partition: correct compilation error in VERBOSE mode
Dimitris Papastamos [Fri, 12 Oct 2018 16:45:31 +0000 (17:45 +0100)]
Merge pull request #1627 from sandrine-bailleux-arm/sb/object-pool-allocator
Introduce object pool allocator
Dimitris Papastamos [Fri, 12 Oct 2018 16:45:09 +0000 (17:45 +0100)]
Merge pull request #1630 from antonio-nino-diaz-arm/an/fix-console
pl011: cnds: cbmem: 16550: Fix comments
Antonio Nino Diaz [Mon, 8 Oct 2018 12:26:48 +0000 (13:26 +0100)]
pl011: cnds: cbmem: 16550: Fix comments
The comments with the prototypes of the register functions of the
console drivers are incorrect. The arguments are wrong. This patch fixes
them.
Change-Id: I38c4b481ee69e840780111c42f03c0752eb6315c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Soby Mathew [Fri, 12 Oct 2018 13:39:50 +0000 (14:39 +0100)]
Merge pull request #1615 from Andre-ARM/make_s
Makefile: Support totally quiet output with -s
Soby Mathew [Fri, 12 Oct 2018 13:19:28 +0000 (14:19 +0100)]
Merge pull request #1606 from satheesbalya-arm/sb1_2603_misra_plat
plat/arm: Fix misra warnings in platform code
Soby Mathew [Fri, 12 Oct 2018 13:17:59 +0000 (14:17 +0100)]
Merge pull request #1622 from bryanodonoghue/master+imx7-mmc_fix
drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2
Soby Mathew [Fri, 12 Oct 2018 13:16:57 +0000 (14:16 +0100)]
Merge pull request #1624 from glneo/less-cache-flushing
PSCI cache flush and comment fixup
Sathees Balya [Thu, 27 Sep 2018 13:41:02 +0000 (14:41 +0100)]
plat/arm: Fix misra warnings in platform code
Change-Id: Ica944acc474a099219d50b041cfaeabd4f3d362f
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
Sandrine Bailleux [Fri, 1 Jun 2018 12:17:08 +0000 (14:17 +0200)]
Introduce object pool allocator
The object pool allocator provides a simplistic interface to manage
allocation in a fixed-size static array. The caller creates a static
"object pool" out of such an array and may then call pool_alloc() to
get the next available object within the pool. There is also a variant
to get multiple consecutive objects: pool_alloc_n().
Note that this interface does not provide any way to free the objects
afterwards. This is by design and it is not a limitation. We do not
want to introduce complexity induced by memory freeing, such as
use-after-free bugs, memory fragmentation and so on.
Change-Id: Iefc2e153767851fbde5841a295f92ae48adda71f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Yann Gautier [Thu, 4 Oct 2018 17:04:17 +0000 (19:04 +0200)]
drivers: partition: correct compilation error in VERBOSE mode
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Soby Mathew [Thu, 11 Oct 2018 12:37:53 +0000 (13:37 +0100)]
Merge pull request #1625 from ldts/psci
psci: platform control of SYSTEM_SUSPEND entry
Antonio Nino Diaz [Thu, 11 Oct 2018 12:02:34 +0000 (13:02 +0100)]
plat/arm: Remove file arm_board_def.h
This file is shared between FVP and all CSS platforms. While it may be
true that some definitions can be common, it doesn't make sense
conceptually. For example, the stack size depends on the platform and so
does the SRAM size.
After removing them, there are not enough common definitions to justify
having this header, so the other definitions have been moved to the
platform_def.h of FVP, board_css_def.h and arm_def.h.
Change-Id: Ifbf4b017227f9dfefa1a430f67d7d6baae6a4ba1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Soby Mathew [Thu, 11 Oct 2018 11:00:48 +0000 (12:00 +0100)]
Merge pull request #1621 from jts-arm/typos
Various corrections of typos
Soby Mathew [Thu, 11 Oct 2018 10:59:37 +0000 (11:59 +0100)]
Merge pull request #1619 from antonio-nino-diaz-arm/an/norflash
plat/arm: Move norflash driver to drivers/ folder
ldts [Thu, 11 Oct 2018 06:40:32 +0000 (08:40 +0200)]
psci: platform control of SYSTEM_SUSPEND entry
Some platforms can only resume from system suspend from the boot
CPU, hence they should only enter that state from that same core.
The following commit presents an interface that allows the platform to
reject system suspend entry near its very last stage (last CPU).
Antonio Nino Diaz [Wed, 10 Oct 2018 10:02:34 +0000 (11:02 +0100)]
plat/arm: Move board_css_common.c to juno folder
This file is only used by Juno as all other CSS platforms have their own
private memory maps.
Change-Id: I1c9f27aac7b1d8bff4d92674e8bde5505b93c8c4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>