From: Felix Fietkau Date: Thu, 8 Dec 2016 20:10:50 +0000 (+0100) Subject: ar71xx: clean up spi controller related patches X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=fa04682f213f81840ca17022ca5aa9439bc22f2c;p=openwrt%2Fstaging%2Flinusw.git ar71xx: clean up spi controller related patches Remove various hacks for fast read, un-break device tree support Signed-off-by: Felix Fietkau --- diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c index e5831d4883..e53d97dcbf 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c @@ -16,32 +16,18 @@ #include "dev-spi.h" #include "dev-m25p80.h" -static struct ath79_spi_controller_data ath79_spi0_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, -}; - -static struct ath79_spi_controller_data ath79_spi1_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 1, -}; - static struct spi_board_info ath79_spi_info[] = { { .bus_num = 0, .chip_select = 0, .max_speed_hz = 25000000, .modalias = "m25p80", - .controller_data = &ath79_spi0_cdata, }, { .bus_num = 0, .chip_select = 1, .max_speed_hz = 25000000, .modalias = "m25p80", - .controller_data = &ath79_spi1_cdata, } }; @@ -51,7 +37,6 @@ void __init ath79_register_m25p80(struct flash_platform_data *pdata) { ath79_spi_data.bus_num = 0; ath79_spi_data.num_chipselect = 1; - ath79_spi0_cdata.is_flash = true; ath79_spi_info[0].platform_data = pdata; ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); } @@ -106,21 +91,11 @@ static void add_mtd_concat_notifier(void) register_mtd_user(¬); } -void __init ath79_register_m25p80_large(struct flash_platform_data *pdata) -{ - ath79_spi_data.bus_num = 0; - ath79_spi_data.num_chipselect = 1; - ath79_spi0_cdata.is_flash = false; - ath79_spi_info[0].platform_data = pdata; - ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); -} - void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) { multi_pdata = pdata; add_mtd_concat_notifier(); ath79_spi_data.bus_num = 0; ath79_spi_data.num_chipselect = 2; - ath79_spi0_cdata.is_flash = true; ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2); } diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h index 5e66016301..637b41a7d8 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h @@ -12,7 +12,6 @@ #include void ath79_register_m25p80(struct flash_platform_data *pdata) __init; -void ath79_register_m25p80_large(struct flash_platform_data *pdata) __init; void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; #endif /* _ATH79_DEV_M25P80_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c index f7cd6aedfd..531e5fb18e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c @@ -56,42 +56,23 @@ static struct mmc_spi_platform_data alfa_ap96_mmc_data = { .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, }; -static struct ath79_spi_controller_data ap96_spi0_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, - .is_flash = true, -}; - -static struct ath79_spi_controller_data ap96_spi1_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 1, -}; - -static struct ath79_spi_controller_data ap96_spi2_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 2, -}; - static struct spi_board_info alfa_ap96_spi_info[] = { { .bus_num = 0, .chip_select = 0, .max_speed_hz = 25000000, .modalias = "m25p80", - .controller_data = &ap96_spi0_cdata }, { .bus_num = 0, .chip_select = 1, .max_speed_hz = 25000000, .modalias = "mmc_spi", .platform_data = &alfa_ap96_mmc_data, - .controller_data = &ap96_spi1_cdata }, { .bus_num = 0, .chip_select = 2, .max_speed_hz = 6250000, .modalias = "rtc-pcf2123", - .controller_data = &ap96_spi2_cdata }, }; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c index cbee18e395..8aa5ecb6a8 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-c55.c @@ -96,7 +96,7 @@ static struct gpio_keys_button c55_gpio_keys[] __initdata = { static void __init c55_setup(void) { /* SPI Storage*/ - ath79_register_m25p80_large(NULL); + ath79_register_m25p80(NULL); /* MDIO Interface */ ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c index 2a9e7211b5..e78e311d2e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-c60.c @@ -160,7 +160,7 @@ static void __init c60_setup(void) ath79_register_nfc(); /* SPI Storage*/ - ath79_register_m25p80_large(NULL); + ath79_register_m25p80(NULL); /* AR8327 Switch Ethernet */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c index d0f993c032..62906a1922 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c @@ -97,27 +97,12 @@ static struct gpio_keys_button gl_ar300m_gpio_keys[] __initdata = { }, }; -static struct ath79_spi_controller_data gl_ar300m_spi0_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .is_flash = true, - .cs_line = 0, -}; - -static struct ath79_spi_controller_data gl_ar300m_spi1_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .is_flash = false, - .cs_line = 1, -}; - static struct spi_board_info gl_ar300m_spi_info[] = { { .bus_num = 0, .chip_select = 0, .max_speed_hz = 25000000, .modalias = "m25p80", - .controller_data = &gl_ar300m_spi0_cdata, .platform_data = NULL, }, { @@ -125,7 +110,6 @@ static struct spi_board_info gl_ar300m_spi_info[] = { .chip_select = 1, .max_speed_hz = 25000000, .modalias = "ath79-spinand", - .controller_data = &gl_ar300m_spi1_cdata, .platform_data = NULL, } }; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c index 9ef5c4455e..e37b73fd00 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c @@ -152,17 +152,6 @@ static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = { .init_data = rb711gr100_ssr_initdata, }; -static struct ath79_spi_controller_data rb711gr100_spi0_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, - .is_flash = true, -}; - -static struct ath79_spi_controller_data rb711gr100_spi1_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_GPIO, - .cs_line = RB91X_GPIO_SSR_STROBE, -}; - static struct spi_board_info rb711gr100_spi_info[] = { { .bus_num = 0, @@ -170,20 +159,24 @@ static struct spi_board_info rb711gr100_spi_info[] = { .max_speed_hz = 25000000, .modalias = "m25p80", .platform_data = &rb711gr100_spi_flash_data, - .controller_data = &rb711gr100_spi0_cdata }, { .bus_num = 0, .chip_select = 1, .max_speed_hz = 10000000, .modalias = "74x164", .platform_data = &rb711gr100_ssr_data, - .controller_data = &rb711gr100_spi1_cdata } }; +static int rb711gr100_spi_cs_gpios[2] = { + -ENOENT, + RB91X_GPIO_SSR_STROBE, +}; + static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = { .bus_num = 0, .num_chipselect = 2, + .cs_gpios = rb711gr100_spi_cs_gpios, }; static struct gpio_led rb711gr100_leds[] __initdata = { diff --git a/target/linux/ar71xx/patches-4.4/001-revert_spi_device_tree_support.patch b/target/linux/ar71xx/patches-4.4/001-revert_spi_device_tree_support.patch deleted file mode 100644 index 9821eb7a85..0000000000 --- a/target/linux/ar71xx/patches-4.4/001-revert_spi_device_tree_support.patch +++ /dev/null @@ -1,83 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -@@ -16,4 +16,8 @@ struct ath79_spi_platform_data { - unsigned num_chipselect; - }; - -+struct ath79_spi_controller_data { -+ unsigned gpio; -+}; -+ - #endif /* _ATH79_SPI_PLATFORM_H */ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -79,8 +79,10 @@ static void ath79_spi_chipselect(struct - } - - if (spi->chip_select) { -+ struct ath79_spi_controller_data *cdata = spi->controller_data; -+ - /* SPI is normally active-low */ -- gpio_set_value(spi->cs_gpio, cs_high); -+ gpio_set_value(cdata->gpio, cs_high); - } else { - if (cs_high) - sp->ioc_base |= AR71XX_SPI_IOC_CS0; -@@ -116,9 +118,10 @@ static void ath79_spi_disable(struct ath - static int ath79_spi_setup_cs(struct spi_device *spi) - { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ struct ath79_spi_controller_data *cdata = spi->controller_data; - int status; - -- if (spi->chip_select && !gpio_is_valid(spi->cs_gpio)) -+ if (spi->chip_select && (!cdata || !gpio_is_valid(cdata->gpio))) - return -EINVAL; - - status = 0; -@@ -131,7 +134,7 @@ static int ath79_spi_setup_cs(struct spi - else - flags |= GPIOF_INIT_HIGH; - -- status = gpio_request_one(spi->cs_gpio, flags, -+ status = gpio_request_one(cdata->gpio, flags, - dev_name(&spi->dev)); - } else { - if (spi->mode & SPI_CS_HIGH) -@@ -148,7 +151,8 @@ static int ath79_spi_setup_cs(struct spi - static void ath79_spi_cleanup_cs(struct spi_device *spi) - { - if (spi->chip_select) { -- gpio_free(spi->cs_gpio); -+ struct ath79_spi_controller_data *cdata = spi->controller_data; -+ gpio_free(cdata->gpio); - } - } - -@@ -220,7 +224,6 @@ static int ath79_spi_probe(struct platfo - } - - sp = spi_master_get_devdata(master); -- master->dev.of_node = pdev->dev.of_node; - platform_set_drvdata(pdev, sp); - - pdata = dev_get_platdata(&pdev->dev); -@@ -300,18 +303,12 @@ static void ath79_spi_shutdown(struct pl - ath79_spi_remove(pdev); - } - --static const struct of_device_id ath79_spi_of_match[] = { -- { .compatible = "qca,ar7100-spi", }, -- { }, --}; -- - static struct platform_driver ath79_spi_driver = { - .probe = ath79_spi_probe, - .remove = ath79_spi_remove, - .shutdown = ath79_spi_shutdown, - .driver = { - .name = DRV_NAME, -- .of_match_table = ath79_spi_of_match, - }, - }; - module_platform_driver(ath79_spi_driver); diff --git a/target/linux/ar71xx/patches-4.4/001-spi-cs-gpio.patch b/target/linux/ar71xx/patches-4.4/001-spi-cs-gpio.patch new file mode 100644 index 0000000000..7a0b669e43 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/001-spi-cs-gpio.patch @@ -0,0 +1,20 @@ +--- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h ++++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h +@@ -14,6 +14,7 @@ + struct ath79_spi_platform_data { + unsigned bus_num; + unsigned num_chipselect; ++ int *cs_gpios; + }; + + #endif /* _ATH79_SPI_PLATFORM_H */ +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -231,6 +231,7 @@ static int ath79_spi_probe(struct platfo + if (pdata) { + master->bus_num = pdata->bus_num; + master->num_chipselect = pdata->num_chipselect; ++ master->cs_gpios = pdata->cs_gpios; + } + + sp->bitbang.master = master; diff --git a/target/linux/ar71xx/patches-4.4/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch b/target/linux/ar71xx/patches-4.4/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch new file mode 100644 index 0000000000..3c355cd21c --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch @@ -0,0 +1,70 @@ +From: Felix Fietkau +Date: Fri, 9 Dec 2016 20:09:16 +0100 +Subject: [PATCH] spi: spi-ath79: support multiple internal chip select + lines + +Several devices with multiple flash chips use the internal chip select +lines. Don't assume that chip select 1 and above are GPIO lines. + +Signed-off-by: Felix Fietkau +--- + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -78,14 +78,16 @@ static void ath79_spi_chipselect(struct + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } + +- if (spi->chip_select) { ++ if (gpio_is_valid(spi->cs_gpio)) { + /* SPI is normally active-low */ + gpio_set_value(spi->cs_gpio, cs_high); + } else { ++ u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); ++ + if (cs_high) +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; ++ sp->ioc_base |= cs_bit; + else +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; ++ sp->ioc_base &= ~cs_bit; + + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } +@@ -118,11 +120,8 @@ static int ath79_spi_setup_cs(struct spi + struct ath79_spi *sp = ath79_spidev_to_sp(spi); + int status; + +- if (spi->chip_select && !gpio_is_valid(spi->cs_gpio)) +- return -EINVAL; +- + status = 0; +- if (spi->chip_select) { ++ if (gpio_is_valid(spi->cs_gpio)) { + unsigned long flags; + + flags = GPIOF_DIR_OUT; +@@ -134,10 +133,12 @@ static int ath79_spi_setup_cs(struct spi + status = gpio_request_one(spi->cs_gpio, flags, + dev_name(&spi->dev)); + } else { ++ u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); ++ + if (spi->mode & SPI_CS_HIGH) +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; ++ sp->ioc_base &= ~cs_bit; + else +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; ++ sp->ioc_base |= cs_bit; + + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } +@@ -147,7 +148,7 @@ static int ath79_spi_setup_cs(struct spi + + static void ath79_spi_cleanup_cs(struct spi_device *spi) + { +- if (spi->chip_select) { ++ if (gpio_is_valid(spi->cs_gpio)) { + gpio_free(spi->cs_gpio); + } + } diff --git a/target/linux/ar71xx/patches-4.4/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch b/target/linux/ar71xx/patches-4.4/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch new file mode 100644 index 0000000000..11b6a83104 --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch @@ -0,0 +1,19 @@ +From: Felix Fietkau +Date: Fri, 9 Dec 2016 20:11:35 +0100 +Subject: [PATCH] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip + select + +Signed-off-by: Felix Fietkau +--- + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -80,7 +80,7 @@ static void ath79_spi_chipselect(struct + + if (gpio_is_valid(spi->cs_gpio)) { + /* SPI is normally active-low */ +- gpio_set_value(spi->cs_gpio, cs_high); ++ gpio_set_value_cansleep(spi->cs_gpio, cs_high); + } else { + u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); + diff --git a/target/linux/ar71xx/patches-4.4/206-spi-ath79-make-chipselect-logic-more-flexible.patch b/target/linux/ar71xx/patches-4.4/206-spi-ath79-make-chipselect-logic-more-flexible.patch deleted file mode 100644 index e0863a4a02..0000000000 --- a/target/linux/ar71xx/patches-4.4/206-spi-ath79-make-chipselect-logic-more-flexible.patch +++ /dev/null @@ -1,199 +0,0 @@ -From 7008284716403237f6bc7d7590b3ed073555bd56 Mon Sep 17 00:00:00 2001 -From: Gabor Juhos -Date: Wed, 11 Jan 2012 22:25:11 +0100 -Subject: [PATCH 34/34] spi/ath79: make chipselect logic more flexible - -Signed-off-by: Gabor Juhos ---- - arch/mips/ath79/mach-pb44.c | 6 ++ - .../include/asm/mach-ath79/ath79_spi_platform.h | 8 ++- - drivers/spi/spi-ath79.c | 67 +++++++++++++------- - 8 files changed, 88 insertions(+), 23 deletions(-) - ---- a/arch/mips/ath79/mach-pb44.c -+++ b/arch/mips/ath79/mach-pb44.c -@@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio - } - }; - -+static struct ath79_spi_controller_data pb44_spi0_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, -+ .cs_line = 0, -+}; -+ - static struct spi_board_info pb44_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p64", -+ .controller_data = &pb44_spi0_data, - }, - }; - ---- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -@@ -16,8 +16,14 @@ struct ath79_spi_platform_data { - unsigned num_chipselect; - }; - -+enum ath79_spi_cs_type { -+ ATH79_SPI_CS_TYPE_INTERNAL, -+ ATH79_SPI_CS_TYPE_GPIO, -+}; -+ - struct ath79_spi_controller_data { -- unsigned gpio; -+ enum ath79_spi_cs_type cs_type; -+ unsigned cs_line; - }; - - #endif /* _ATH79_SPI_PLATFORM_H */ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -33,6 +33,8 @@ - #define ATH79_SPI_RRW_DELAY_FACTOR 12000 - #define MHZ (1000 * 1000) - -+#define ATH79_SPI_CS_LINE_MAX 2 -+ - struct ath79_spi { - struct spi_bitbang bitbang; - u32 ioc_base; -@@ -67,6 +69,7 @@ static void ath79_spi_chipselect(struct - { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active; -+ struct ath79_spi_controller_data *cdata = spi->controller_data; - - if (is_active) { - /* set initial clock polarity */ -@@ -78,20 +81,24 @@ static void ath79_spi_chipselect(struct - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); - } - -- if (spi->chip_select) { -- struct ath79_spi_controller_data *cdata = spi->controller_data; -- -- /* SPI is normally active-low */ -- gpio_set_value(cdata->gpio, cs_high); -- } else { -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: - if (cs_high) -- sp->ioc_base |= AR71XX_SPI_IOC_CS0; -+ sp->ioc_base |= AR71XX_SPI_IOC_CS(cdata->cs_line); - else -- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; -+ sp->ioc_base &= ~AR71XX_SPI_IOC_CS(cdata->cs_line); - - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -- } -+ break; - -+ case ATH79_SPI_CS_TYPE_GPIO: -+ /* SPI is normally active-low */ -+ if (gpio_cansleep(cdata->cs_line)) -+ gpio_set_value_cansleep(cdata->cs_line, cs_high); -+ else -+ gpio_set_value(cdata->cs_line, cs_high); -+ break; -+ } - } - - static void ath79_spi_enable(struct ath79_spi *sp) -@@ -119,14 +126,15 @@ static int ath79_spi_setup_cs(struct spi - { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - struct ath79_spi_controller_data *cdata = spi->controller_data; -+ unsigned long flags; - int status; - -- if (spi->chip_select && (!cdata || !gpio_is_valid(cdata->gpio))) -+ if (!cdata) - return -EINVAL; - - status = 0; -- if (spi->chip_select) { -- unsigned long flags; -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_GPIO: - - flags = GPIOF_DIR_OUT; - if (spi->mode & SPI_CS_HIGH) -@@ -134,15 +142,21 @@ static int ath79_spi_setup_cs(struct spi - else - flags |= GPIOF_INIT_HIGH; - -- status = gpio_request_one(cdata->gpio, flags, -+ status = gpio_request_one(cdata->cs_line, flags, - dev_name(&spi->dev)); -- } else { -+ break; -+ case ATH79_SPI_CS_TYPE_INTERNAL: -+ if (cdata->cs_line > ATH79_SPI_CS_LINE_MAX) -+ status = -EINVAL; -+ break; -+ - if (spi->mode & SPI_CS_HIGH) - sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; - else - sp->ioc_base |= AR71XX_SPI_IOC_CS0; - - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ break; - } - - return status; -@@ -150,9 +164,19 @@ static int ath79_spi_setup_cs(struct spi - - static void ath79_spi_cleanup_cs(struct spi_device *spi) - { -- if (spi->chip_select) { -- struct ath79_spi_controller_data *cdata = spi->controller_data; -- gpio_free(cdata->gpio); -+ struct ath79_spi_controller_data *cdata; -+ -+ cdata = spi->controller_data; -+ if (!cdata) -+ return; -+ -+ switch (cdata->cs_type) { -+ case ATH79_SPI_CS_TYPE_INTERNAL: -+ /* nothing to do */ -+ break; -+ case ATH79_SPI_CS_TYPE_GPIO: -+ gpio_free(cdata->cs_line); -+ break; - } - } - -@@ -217,6 +241,10 @@ static int ath79_spi_probe(struct platfo - unsigned long rate; - int ret; - -+ pdata = pdev->dev.platform_data; -+ if (!pdata) -+ return -EINVAL; -+ - master = spi_alloc_master(&pdev->dev, sizeof(*sp)); - if (master == NULL) { - dev_err(&pdev->dev, "failed to allocate spi master\n"); -@@ -226,15 +254,11 @@ static int ath79_spi_probe(struct platfo - sp = spi_master_get_devdata(master); - platform_set_drvdata(pdev, sp); - -- pdata = dev_get_platdata(&pdev->dev); -- - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->setup = ath79_spi_setup; - master->cleanup = ath79_spi_cleanup; -- if (pdata) { -- master->bus_num = pdata->bus_num; -- master->num_chipselect = pdata->num_chipselect; -- } -+ master->bus_num = pdata->bus_num; -+ master->num_chipselect = pdata->num_chipselect; - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ar71xx/patches-4.4/460-m25p80-spi-read-flash-check.patch b/target/linux/ar71xx/patches-4.4/460-m25p80-spi-read-flash-check.patch new file mode 100644 index 0000000000..a34b38398d --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/460-m25p80-spi-read-flash-check.patch @@ -0,0 +1,15 @@ +--- a/drivers/mtd/devices/m25p80.c ++++ b/drivers/mtd/devices/m25p80.c +@@ -149,8 +149,10 @@ static int m25p80_read(struct spi_nor *n + msg.data_nbits = m25p80_rx_nbits(nor); + + ret = spi_flash_read(spi, &msg); +- *retlen = msg.retlen; +- return ret; ++ if (!ret) { ++ *retlen = msg.retlen; ++ return 0; ++ } + } + + spi_message_init(&m); diff --git a/target/linux/ar71xx/patches-4.4/460-spi-bitbang-export-spi_bitbang_bufs.patch b/target/linux/ar71xx/patches-4.4/460-spi-bitbang-export-spi_bitbang_bufs.patch deleted file mode 100644 index 2a8d7af1bb..0000000000 --- a/target/linux/ar71xx/patches-4.4/460-spi-bitbang-export-spi_bitbang_bufs.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/spi/spi-bitbang.c -+++ b/drivers/spi/spi-bitbang.c -@@ -231,13 +231,14 @@ void spi_bitbang_cleanup(struct spi_devi - } - EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); - --static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) -+int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) - { - struct spi_bitbang_cs *cs = spi->controller_state; - unsigned nsecs = cs->nsecs; - - return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t); - } -+EXPORT_SYMBOL_GPL(spi_bitbang_bufs); - - /*----------------------------------------------------------------------*/ - ---- a/include/linux/spi/spi_bitbang.h -+++ b/include/linux/spi/spi_bitbang.h -@@ -39,6 +39,7 @@ extern int spi_bitbang_setup(struct spi_ - extern void spi_bitbang_cleanup(struct spi_device *spi); - extern int spi_bitbang_setup_transfer(struct spi_device *spi, - struct spi_transfer *t); -+extern int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t); - - /* start or stop queue processing */ - extern int spi_bitbang_start(struct spi_bitbang *spi); diff --git a/target/linux/ar71xx/patches-4.4/461-spi-add-type-field-to-spi_transfer.patch b/target/linux/ar71xx/patches-4.4/461-spi-add-type-field-to-spi_transfer.patch deleted file mode 100644 index 6ccb632ecc..0000000000 --- a/target/linux/ar71xx/patches-4.4/461-spi-add-type-field-to-spi_transfer.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/include/linux/spi/spi.h -+++ b/include/linux/spi/spi.h -@@ -583,6 +583,12 @@ extern struct spi_master *spi_busnum_to_ - - /*---------------------------------------------------------------------------*/ - -+enum spi_transfer_type { -+ SPI_TRANSFER_GENERIC = 0, -+ SPI_TRANSFER_FLASH_READ_CMD, -+ SPI_TRANSFER_FLASH_READ_DATA, -+}; -+ - /* - * I/O INTERFACE between SPI controller and protocol drivers - * -@@ -703,6 +709,7 @@ struct spi_transfer { - u8 bits_per_word; - u16 delay_usecs; - u32 speed_hz; -+ enum spi_transfer_type type; - - struct list_head transfer_list; - }; diff --git a/target/linux/ar71xx/patches-4.4/461-spi-ath79-add-fast-flash-read.patch b/target/linux/ar71xx/patches-4.4/461-spi-ath79-add-fast-flash-read.patch new file mode 100644 index 0000000000..0dc73a8b5b --- /dev/null +++ b/target/linux/ar71xx/patches-4.4/461-spi-ath79-add-fast-flash-read.patch @@ -0,0 +1,54 @@ +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -102,9 +102,6 @@ static void ath79_spi_enable(struct ath7 + /* save CTRL register */ + sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); + sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); +- +- /* TODO: setup speed? */ +- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); + } + + static void ath79_spi_disable(struct ath79_spi *sp) +@@ -205,6 +202,33 @@ static u32 ath79_spi_txrx_mode0(struct s + return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); + } + ++static int ath79_spi_read_flash_data(struct spi_device *spi, ++ struct spi_flash_read_message *msg) ++{ ++ struct ath79_spi *sp = ath79_spidev_to_sp(spi); ++ ++ if (msg->addr_width > 3) ++ return -EOPNOTSUPP; ++ ++ if (spi->chip_select || gpio_is_valid(spi->cs_gpio)) ++ return -EOPNOTSUPP; ++ ++ /* disable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); ++ ++ memcpy_fromio(msg->buf, sp->base + msg->from, msg->len); ++ ++ /* enable GPIO mode */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); ++ ++ /* restore IOC register */ ++ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); ++ ++ msg->retlen = msg->len; ++ ++ return 0; ++} ++ + static int ath79_spi_probe(struct platform_device *pdev) + { + struct spi_master *master; +@@ -234,6 +258,7 @@ static int ath79_spi_probe(struct platfo + master->num_chipselect = pdata->num_chipselect; + master->cs_gpios = pdata->cs_gpios; + } ++ master->spi_flash_read = ath79_spi_read_flash_data; + + sp->bitbang.master = master; + sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ar71xx/patches-4.4/462-mtd-m25p80-set-spi-transfer-type.patch b/target/linux/ar71xx/patches-4.4/462-mtd-m25p80-set-spi-transfer-type.patch deleted file mode 100644 index f949235966..0000000000 --- a/target/linux/ar71xx/patches-4.4/462-mtd-m25p80-set-spi-transfer-type.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -159,10 +159,12 @@ static int m25p80_read(struct spi_nor *n - flash->command[0] = nor->read_opcode; - m25p_addr2cmd(nor, from, flash->command); - -+ t[0].type = SPI_TRANSFER_FLASH_READ_CMD; - t[0].tx_buf = flash->command; - t[0].len = m25p_cmdsz(nor) + dummy; - spi_message_add_tail(&t[0], &m); - -+ t[1].type = SPI_TRANSFER_FLASH_READ_DATA; - t[1].rx_buf = buf; - t[1].rx_nbits = m25p80_rx_nbits(nor); - t[1].len = len; diff --git a/target/linux/ar71xx/patches-4.4/463-spi-ath79-add-fast-flash-read.patch b/target/linux/ar71xx/patches-4.4/463-spi-ath79-add-fast-flash-read.patch deleted file mode 100644 index 408ce653e9..0000000000 --- a/target/linux/ar71xx/patches-4.4/463-spi-ath79-add-fast-flash-read.patch +++ /dev/null @@ -1,185 +0,0 @@ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -35,6 +35,11 @@ - - #define ATH79_SPI_CS_LINE_MAX 2 - -+enum ath79_spi_state { -+ ATH79_SPI_STATE_WAIT_CMD = 0, -+ ATH79_SPI_STATE_WAIT_READ, -+}; -+ - struct ath79_spi { - struct spi_bitbang bitbang; - u32 ioc_base; -@@ -42,6 +47,11 @@ struct ath79_spi { - void __iomem *base; - struct clk *clk; - unsigned rrw_delay; -+ -+ enum ath79_spi_state state; -+ u32 clk_div; -+ unsigned long read_addr; -+ unsigned long ahb_rate; - }; - - static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg) -@@ -109,9 +119,6 @@ static void ath79_spi_enable(struct ath7 - /* save CTRL register */ - sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); - sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); -- -- /* TODO: setup speed? */ -- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); - } - - static void ath79_spi_disable(struct ath79_spi *sp) -@@ -232,6 +239,110 @@ static u32 ath79_spi_txrx_mode0(struct s - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_spi_do_read_flash_data(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(t->rx_buf, sp->base + sp->read_addr, t->len); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ return t->len; -+} -+ -+static int ath79_spi_do_read_flash_cmd(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ int len; -+ const u8 *p; -+ -+ sp->read_addr = 0; -+ -+ len = t->len - 1; -+ p = t->tx_buf; -+ -+ while (len--) { -+ p++; -+ sp->read_addr <<= 8; -+ sp->read_addr |= *p; -+ } -+ -+ return t->len; -+} -+ -+static bool ath79_spi_is_read_cmd(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ return t->type == SPI_TRANSFER_FLASH_READ_CMD; -+} -+ -+static bool ath79_spi_is_data_read(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ return t->type == SPI_TRANSFER_FLASH_READ_DATA; -+} -+ -+static int ath79_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ int ret; -+ -+ switch (sp->state) { -+ case ATH79_SPI_STATE_WAIT_CMD: -+ if (ath79_spi_is_read_cmd(spi, t)) { -+ ret = ath79_spi_do_read_flash_cmd(spi, t); -+ sp->state = ATH79_SPI_STATE_WAIT_READ; -+ } else { -+ ret = spi_bitbang_bufs(spi, t); -+ } -+ break; -+ -+ case ATH79_SPI_STATE_WAIT_READ: -+ if (ath79_spi_is_data_read(spi, t)) { -+ ret = ath79_spi_do_read_flash_data(spi, t); -+ } else { -+ dev_warn(&spi->dev, "flash data read expected\n"); -+ ret = -EIO; -+ } -+ sp->state = ATH79_SPI_STATE_WAIT_CMD; -+ break; -+ -+ default: -+ BUG(); -+ } -+ -+ return ret; -+} -+ -+static int ath79_spi_setup_transfer(struct spi_device *spi, -+ struct spi_transfer *t) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ struct ath79_spi_controller_data *cdata; -+ int ret; -+ -+ ret = spi_bitbang_setup_transfer(spi, t); -+ if (ret) -+ return ret; -+ -+ cdata = spi->controller_data; -+ if (cdata->is_flash) -+ sp->bitbang.txrx_bufs = ath79_spi_txrx_bufs; -+ else -+ sp->bitbang.txrx_bufs = spi_bitbang_bufs; -+ -+ return ret; -+} -+ - static int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -254,6 +365,8 @@ static int ath79_spi_probe(struct platfo - sp = spi_master_get_devdata(master); - platform_set_drvdata(pdev, sp); - -+ sp->state = ATH79_SPI_STATE_WAIT_CMD; -+ - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->setup = ath79_spi_setup; - master->cleanup = ath79_spi_cleanup; -@@ -263,7 +376,7 @@ static int ath79_spi_probe(struct platfo - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; - sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0; -- sp->bitbang.setup_transfer = spi_bitbang_setup_transfer; -+ sp->bitbang.setup_transfer = ath79_spi_setup_transfer; - sp->bitbang.flags = SPI_CS_HIGH; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -@@ -283,7 +396,8 @@ static int ath79_spi_probe(struct platfo - if (ret) - goto err_put_master; - -- rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ); -+ sp->ahb_rate = clk_get_rate(sp->clk); -+ rate = DIV_ROUND_UP(sp->ahb_rate, MHZ); - if (!rate) { - ret = -EINVAL; - goto err_clk_disable; ---- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -@@ -24,6 +24,7 @@ enum ath79_spi_cs_type { - struct ath79_spi_controller_data { - enum ath79_spi_cs_type cs_type; - unsigned cs_line; -+ bool is_flash; - }; - - #endif /* _ATH79_SPI_PLATFORM_H */ diff --git a/target/linux/ar71xx/patches-4.4/464-spi-ath79-fix-fast-flash-read.patch b/target/linux/ar71xx/patches-4.4/464-spi-ath79-fix-fast-flash-read.patch deleted file mode 100644 index 03483e82a6..0000000000 --- a/target/linux/ar71xx/patches-4.4/464-spi-ath79-fix-fast-flash-read.patch +++ /dev/null @@ -1,35 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -159,6 +159,9 @@ static int m25p80_read(struct spi_nor *n - flash->command[0] = nor->read_opcode; - m25p_addr2cmd(nor, from, flash->command); - -+ if (dummy == 1) -+ t[0].dummy = true; -+ - t[0].type = SPI_TRANSFER_FLASH_READ_CMD; - t[0].tx_buf = flash->command; - t[0].len = m25p_cmdsz(nor) + dummy; ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -268,6 +268,10 @@ static int ath79_spi_do_read_flash_cmd(s - sp->read_addr = 0; - - len = t->len - 1; -+ -+ if (t->dummy) -+ len -= 1; -+ - p = t->tx_buf; - - while (len--) { ---- a/include/linux/spi/spi.h -+++ b/include/linux/spi/spi.h -@@ -710,6 +710,7 @@ struct spi_transfer { - u16 delay_usecs; - u32 speed_hz; - enum spi_transfer_type type; -+ bool dummy; - - struct list_head transfer_list; - }; diff --git a/target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch b/target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch index 0e33674adf..61b6b4ee16 100644 --- a/target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch +++ b/target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch @@ -29,7 +29,9 @@ - u32 bootstrap; + void __iomem *phy_reg; + u32 t; -+ + +- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); +- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) + phy_reg = ioremap(base, 4); + if (!phy_reg) + return; @@ -41,9 +43,7 @@ + + iounmap(phy_reg); +} - -- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) ++ +static void ar934x_usb_reset_notifier(struct platform_device *pdev) +{ + if (pdev->id != -1) diff --git a/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch index 0126f6a3b9..c5035778a2 100644 --- a/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch +++ b/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch @@ -155,7 +155,7 @@ +#define AR934X_RESET_LUT BIT(2) +#define AR934X_RESET_MBOX BIT(1) +#define AR934X_RESET_I2S BIT(0) -+ + +#define QCA955X_RESET_HOST BIT(31) +#define QCA955X_RESET_SLIC BIT(30) +#define QCA955X_RESET_HDMA BIT(29) @@ -188,7 +188,7 @@ +#define QCA955X_RESET_LUT BIT(2) +#define QCA955X_RESET_MBOX BIT(1) +#define QCA955X_RESET_I2S BIT(0) - ++ +#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) +#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) diff --git a/target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch b/target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch index f9ec7753f1..3377e91a2f 100644 --- a/target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch +++ b/target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch @@ -50,15 +50,10 @@ #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) -@@ -92,21 +117,66 @@ static struct ath79_spi_controller_data - .cs_line = 0, +@@ -87,20 +112,59 @@ static struct gpio_keys_button pb44_gpio + } }; -+static struct ath79_spi_controller_data pb44_spi1_data = { -+ .cs_type = ATH79_SPI_CS_TYPE_GPIO, -+ .cs_line = PB44_GPIO_VSC7395_CS, -+}; -+ +static void pb44_vsc7395_reset(void) +{ + ath79_device_reset_set(AR71XX_RESET_GE1_PHY); @@ -93,7 +88,6 @@ .max_speed_hz = 25000000, .modalias = "m25p64", + .platform_data = &pb44_flash_data, - .controller_data = &pb44_spi0_data, }, + { + .bus_num = 0, @@ -101,7 +95,6 @@ + .max_speed_hz = 25000000, + .modalias = "spi-vsc7385", + .platform_data = &pb44_vsc7395_data, -+ .controller_data = &pb44_spi1_data, + } }; @@ -118,7 +111,7 @@ static void __init pb44_init(void) { i2c_register_board_info(0, pb44_i2c_board_info, -@@ -122,6 +192,22 @@ static void __init pb44_init(void) +@@ -116,6 +180,22 @@ static void __init pb44_init(void) ARRAY_SIZE(pb44_spi_info)); ath79_register_usb(); ath79_register_pci(); diff --git a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch index 4d7902e166..5d9d802eda 100644 --- a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch +++ b/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch @@ -135,7 +135,8 @@ +static void __init ap136_common_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ + +-static int ap136_pci_plat_dev_init(struct pci_dev *dev) + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), @@ -150,8 +151,7 @@ + ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); + + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - --static int ap136_pci_plat_dev_init(struct pci_dev *dev) ++ + ath79_register_mdio(0, 0x0); + ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0); + @@ -211,16 +211,16 @@ + /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ + ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; + ap136_ar8327_pad0_cfg.sgmii_delay_en = true; -+ + +- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); +- ath79_register_pci(); + /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */ + ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_RGMII; + ap136_ar8327_pad6_cfg.txclk_delay_en = true; + ap136_ar8327_pad6_cfg.rxclk_delay_en = true; + ap136_ar8327_pad6_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; + ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; - -- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); -- ath79_register_pci(); ++ + ath79_eth0_pll_data.pll_1000 = 0x56000000; + ath79_eth1_pll_data.pll_1000 = 0x03000101; +