From: Florian Fainelli Date: Wed, 16 Dec 2009 10:29:06 +0000 (+0100) Subject: MIPS: add readl/write_be accessors X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=f868ba29723be46e0981226d7455090d515b08ef;p=openwrt%2Fstaging%2Fblogic.git MIPS: add readl/write_be accessors MIPS currently lacks the readl_be and writel_be accessors which are required by BCM63xx for OHCI and EHCI support. Let's define them globally for MIPS. This also fixes the compilation of the bcm63xx defconfig against USB. Signed-off-by: Florian Fainelli Cc: Geert Uytterhoeven Cc: Thomas Bogendoerfer Cc: linux-mips@linux-mips.org Cc: Maxime Bizon Patchwork: http://patchwork.linux-mips.org/patch/793/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 436878e4e063..c98bf514ec7d 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -447,6 +447,24 @@ __BUILDIO(q, u64) #define readl_relaxed readl #define readq_relaxed readq +#define readb_be(addr) \ + __raw_readb((__force unsigned *)(addr)) +#define readw_be(addr) \ + be16_to_cpu(__raw_readw((__force unsigned *)(addr))) +#define readl_be(addr) \ + be32_to_cpu(__raw_readl((__force unsigned *)(addr))) +#define readq_be(addr) \ + be64_to_cpu(__raw_readq((__force unsigned *)(addr))) + +#define writeb_be(val, addr) \ + __raw_writeb((val), (__force unsigned *)(addr)) +#define writew_be(val, addr) \ + __raw_writew(cpu_to_be16((val)), (__force unsigned *)(addr)) +#define writel_be(val, addr) \ + __raw_writel(cpu_to_be32((val)), (__force unsigned *)(addr)) +#define writeq_be(val, addr) \ + __raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr)) + /* * Some code tests for these symbols */